Vertical cavity surface emitting laser array with tilted emitter pattern

Abstract

A VCSEL array can include a semiconductor substrate and a plurality of emitters conforming to an emitter pattern on the substrate. The emitter pattern can be oriented at a non-zero angle to an edge of the substrate and can include two or more cells arranged to form the emitter pattern. Each of the two or more cells can include a same number of emitters, and the two or more cells can be arranged to achieve a measure of misalignment associated with two adjacent cells of the two or more cells to satisfy a misalignment threshold.

Description

[0001] Related applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 041,427, filed June 19, 2020, entitled “VERTICAL-CAVITY SURFACE-EMITTING LASER DESIGN FOR DOT PROJECTION”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to vertical cavity surface-emitting laser (VCSEL) arrays and VCSELs with tilted emitter patterns. Background Technology

[0004] Structured light systems may include an emitter array (e.g., a vertical-cavity surface-emitting laser (VCSEL) array), lenses, and diffractive optics (DOEs). In operation, light emitted by the emitters of the emitter array is collimated by lenses, and the collimated beams (each corresponding to a respective emitter) are guided to the DOE. The DOE distributes the collimated beams to create point projections (e.g., projections of the collimated beams). More specifically, the DOE diffracts a given beam such that the diffracted orders of the given beam are transmitted by the DOE at different angles. The range of diffracted angles that occurs within an angular range relative to the surface of the DOE is called the field of view (FOV). For example, the FOV could be a 60-degree FOV, a 90-degree FOV, etc. These diffracted orders in different directions form point projections (e.g., comprising tens of thousands of points) within the FOV. Summary of the Invention

[0005] In some embodiments, the VCSEL array includes: a semiconductor substrate; a plurality of emitters conforming to an emitter pattern on the substrate, wherein the emitter pattern is oriented at a non-zero angle to the edge of the substrate, wherein the emitter pattern includes two or more cells arranged to form the emitter pattern, wherein each of the two or more cells includes the same number of emitters, and wherein the two or more cells are arranged to achieve a misalignment measurement associated with two adjacent cells of the two or more cells to satisfy a misalignment threshold.

[0006] In some implementations, a structured light system includes: a VCSEL array including: a plurality of emitters conforming to an emitter pattern, wherein the emitter pattern is oriented at a non-zero angle to a straight axis of a DOE, wherein the emitter pattern includes two or more cells arranged to form the emitter pattern, wherein each cell of the two or more cells includes a same number of emitters, and wherein the two or more cells are arranged to achieve a measure of cell misalignment associated with two adjacent cells of the two or more cells to satisfy a cell misalignment threshold; and the DOE configured to produce a spot projection from light emitted by the plurality of emitters of the VCSEL array, wherein the spot projection includes a plurality of tiles.

[0007] In some implementations, a structured light system includes: a VCSEL array including: a plurality of emitters conforming to an emitter pattern, wherein the emitter pattern is oriented at a non-zero angle to a straight axis of a DOE, wherein the emitter pattern includes two or more cells arranged to form the emitter pattern, wherein each cell of the two or more cells includes a same number of emitters, and wherein the two or more cells are arranged to achieve a measure of cell misalignment associated with two adjacent cells of the two or more cells to satisfy a cell misalignment threshold; and the DOE configured to produce a spot projection from light emitted by the plurality of emitters of the VCSEL array, wherein the spot projection includes a plurality of tiles. BRIEF DESCRIPTION OF DRAWINGS

[0008] Figures 1A-1B is a schematic diagram of an example implementation described herein.

[0009] Figure 2 is an example spot projection diagram associated with a conventional VCSEL array of a structured light device, wherein the emitter pattern of the conventional VCSEL array has no tilt angle.

[0010] Figure 3 is an example spot projection diagram associated with a conventional VCSEL array of a structured light device, wherein the emitter pattern of the conventional VCSEL array has a tilt angle.

[0011] Figures 4A-4D is a schematic diagram of an example implementation related to designing an emitter pattern having a tilt angle for an example VCSEL array described herein.

[0012] Figure 5 is a schematic diagram of an example spot projection associated with an example VCSEL array described herein, the array having an emitter pattern with a tilt angle.

[0013] Figure 6 is a schematic diagram of another example spot projection associated with an example VCSEL array described herein, the array having an emitter pattern with a tilt angle. DETAILED DESCRIPTION

[0014] The following detailed description of example implementations refers to the accompanying drawings. The same reference numbers in different drawings can identify the same or similar elements.

[0015] An indirect time-of-flight (iToF) measurement system can include a structured light device (e.g., including an array of emitters, such as a VCSEL array; a lens; a DOE; and / or the like) for projecting points onto a target (e.g., a screen, a surface, a scene, etc.) to allow the iToF measurement system to measure the target. Typically, the features of the DOE are formed along rectilinear axes of the DOE that are perpendicular to an optical axis of the lens and / or the DOE. Typically, the array of VCSELs of the structured light device includes a plurality of emitters that conform to an emitter pattern that is positioned along the optical axis of the lens and / or the DOE of the structured light device. Typically, the emitter pattern is parallel to an edge of the VCSEL chip that is parallel to one of the rectilinear axes of the DOE. This can result in a uniform projection of points (e.g., many points of the projection of points can be aligned vertically or horizontally) on the target that can impede the iToF measurement system from obtaining accurate measurements of the target. Moreover, in some cases, the emitter pattern of the array of VCSELs can be aligned horizontally or vertically parallel to an edge of the chip of the array of VCSELs, which can allow crystal plane defects of the chip (e.g., that typically travel vertically or horizontally along the chip) to easily propagate to groups of emitters of the emitter pattern. This can result in some emitters failing, thereby negatively impacting the performance of the array of VCSELs.

[0016] Some implementations described herein provide a VCSEL array including a plurality of emitters that conform to an emitter pattern that is at a non-zero angle (e.g., between 1 and 45 degrees, between 5 and 20 degrees, and / or between 9 and 13 degrees, among other examples) relative to a rectilinear axis of an associated DOE and / or a reference edge of a chip (e.g., a semiconductor substrate of a VCSEL on which the plurality of emitters are formed) of the VCSEL array. The emitter pattern can include one or more cells (e.g., that act as a basic cell of the emitter pattern) that can be arranged to form the emitter pattern (e.g., placed side-by-side in m rows and n columns, where m and n are greater than or equal to 1). When the emitter pattern includes two or more cells, each cell can include the same number of emitters, and the two or more cells can be arranged to minimize an amount of misalignment (e.g., in an x-direction and / or a y-direction) between adjacent cells.

[0017] In some implementations, the DOE can produce a dot projection from light emitted by the plurality of emitters of the VCSEL array. The dot projection can include a plurality of tiles, where each tile includes a plurality of dots that conform to a dot pattern corresponding to the emitter pattern (e.g., the dots of the dot pattern are respectively associated with the emitters of the emitter pattern). The DOE can be configured such that the plurality of tiles are arranged to minimize an amount of misalignment (e.g., in the x-direction and / or the y-direction) between adjacent tiles.

[0018] In this way, some implementations described herein allow the DOE to produce an aligned and / or uniformly spaced dot projection from light produced by a VCSEL array having an emitter pattern with a non-zero tilt angle (e.g., with respect to a straight axis of the DOE and / or with respect to a reference edge of the VCSEL chip). Thus, the dot projection produced in some implementations described herein is less uniform (e.g., several dots of the dot projection are aligned vertically or horizontally) than a dot projection produced using a conventional VCSEL array without a non-zero tilt angle, which allows an interferometry system including the VCSEL array and / or the DOE described herein to obtain more accurate target measurements. Furthermore, by using an emitter pattern with a non-zero tilt angle (e.g., with respect to a straight axis of the DOE and / or a reference edge of the VCSEL chip), the emitter pattern is not aligned horizontally or vertically with the reference edge of the chip of the VCSEL array, which reduces the likelihood of a crystallographic defect propagating to a group of emitters in the emitter pattern. Thus, this prevents some emitters from failing and, therefore, improves the performance of the VCSEL array and / or improves the robustness of the VCSEL array.

[0019] Figures 1A-1B is a schematic diagram of an example embodiment 100 described herein. As Figure 1A shown, the structured light device 102 can include a VCSEL array 104 including a plurality of emitters 106 (e.g., in a chip of the VCSEL array 104), a lens 108, and / or a diffractive optical element (DOE) 110 (shown as a diffraction grating). The structured light device 102 can be configured to emit a dot projection 112 including a plurality of dots 114. For example, the plurality of emitters 106 of the VCSEL array 104 can be configured to emit light, the lens 108 can be configured to collimate and / or direct the light to the DOE 110, and the DOE 110 can be configured to generate the dot projection 112 covering a scene (e.g., a target, an object, etc.).

[0020] As shown in FIGS. 1A and IB, the plurality of emitters 106 can conform to an emitter pattern 116. As Figure 1A and 1BAs shown, transmitter pattern 116 can be aligned with the linear axis of DOE 110 (e.g., in...). Figure 1B (Displayed as the y-axis or z-axis) and / or at an angle (e.g., a non-zero angle) to the reference edge 118 of the VCSEL chip. The orientation of the emitter pattern 116 is further described herein. Figure 1A As shown, dot projection 112 can be a repeating optical copy of the transmitter pattern 116 stitched together. The composition of dot projection 112 is further described herein.

[0021] As mentioned above, Figures 1A-1B This is one example. Other examples can be found with... Figures 1A-1B The descriptions are different.

[0022] Figure 2 This is a diagram of an exemplary point projection 200 associated with a conventional 120-emitter VCSEL array (e.g., a 12×10 emitter hexagonal array) of a structured light device, wherein the emitter pattern of the conventional 120-emitter VCSEL array has a zero-degree tilt angle (e.g., the emitter pattern is aligned with the linear axis of the DOE of the structured light device and / or the reference edge of the chip of the VCSEL array). Figure 2 As shown, the first patch 202 of the exemplary dot projection 200 (e.g., a darker dot of the exemplary dot projection 200) can be a first optical projection of the emitter pattern, and the second patch 204 of the exemplary dot projection 200 (e.g., a brighter dot of the exemplary dot projection 200) can be a second optical projection of the emitter pattern. Figure 2 As shown, the first tile 202 of the exemplary point projection 200 can be adjacent to the second tile 204 of the exemplary point projection 200 (e.g., projected adjacent to each other to form a 1×2 tile pattern). As shown by lines 206 and 208, passing through multiple points of the first tile 202 and multiple points of the second tile 204 of the exemplary point projection 200 respectively, the first tile 202 and the second tile 204 of the exemplary point projection 200 are aligned (e.g., the spacing associated with the points of the exemplary point projection 200 is uniform and / or consistent throughout the exemplary point projection 200). Therefore, Figure 2 This demonstrates the ease of replicating the array when zero tilt is present.

[0023] As mentioned above, providing Figure 2 As an example. Other examples can be used with reference to... Figure 2 The description is different.

[0024] Figure 3is a diagram of an example point projection 300 associated with a conventional 240-emitter VCSEL array of a structured light device, where the emitter pattern 302 of the conventional 240-emitter VCSEL array has an 11 degree tilt (e.g., the emitter pattern is oriented at 11 degrees relative to the straight axis of the DOE of the conventional structured light device). As shown, the example point projection 300 is a 3x3 optical projection of the emitter pattern 302 (e.g., the emitter pattern can be optically projected to form nine tiles, identified by the dashed lines, arranged in a three row and three column tile pattern). Figure 3

[0025] However, due to the 11 degree tilt, the points in the middle tile of the example point projection 300 are misaligned with the points in the adjacent tiles of the middle tile. For example, as shown by line 304, the points from the tiles above and below the middle tile are misaligned with the points from the middle tile. As another example, as shown by line 306, the points from the tiles to the left and right of the middle tile are misaligned with the points from the middle tile. Furthermore, as shown by arrow 308, there can be no uniform and / or consistent spacing between the points from the edges of the middle tile and the points of the adjacent tiles.

[0026] Accordingly, due to the misalignment and spacing issues when using conventional VCSEL arrays with non-zero tilt angles, some embodiments described herein provide a VCSEL array having an emitter pattern with a non-zero tilt and emitting light that can be projected (e.g., through a lens and / or a DOE) into a point projection of aligned and / or consistently spaced points. Furthermore, some embodiments described herein provide a method for designing such a VCSEL array having a non-zero tilted emitter pattern.

[0027] As described above, a method for designing a VCSEL array having a non-zero tilted emitter pattern is provided Figure 3 as an example. Other examples can differ from Figure 3 what is described.

[0028] Figures 4A-4D is a diagram of an example embodiment 400 related to designing an emitter pattern (e.g., the emitter pattern 116 shown in FIG. 1) having a tilt angle (e.g., oriented at a non-zero angle) of a VCSEL array (e.g., the VCSEL array 104 or another VCSEL array) described herein that can be used in a structured light device (e.g., the structured light device 102 including the lens 108 and / or the DOE 110) to emit a point projection (e.g., the example point projection 112) including a plurality of tiles, where the points of the point projection are aligned and / or consistently spaced.

[0029] ​In some implementations, a user device can be used to design an emitter pattern. In some implementations, the user device can include a communication device and / or a computing device. For example, the user device can include a wireless communication device, a mobile phone (e.g., a smartphone or a cell phone, etc.), a laptop computer, a tablet computer, a handheld computer, a desktop computer, or a similar type of device. The user device can include a processor, such as a central processing unit (CPU), a graphics processing unit (GPU), an accelerated processing unit (APU), a microprocessor, a microcontroller, a digital signal processor (DSP), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or another type of processing component. The processor can be implemented in hardware, firmware, and / or a combination of hardware and software. The user device can include one or more processors capable of being programmed to perform a function. One or more memories, including a random access memory (RAM), a read only memory (ROM), and / or another type of dynamic or static storage device (e.g., a flash memory, a magnetic memory, and / or an optical memory), can store information and / or instructions for use by the user device. The user device can include a memory (e.g., a non-transitory computer-readable medium) capable of storing instructions that, when executed, cause the processor to perform one or more processes and / or methods described herein.

[0030] In some implementations, the user device can obtain one or more optical requirements of the structured light device (e.g., from a data structure, from information input by a user of the user device via a user interface of the user device, etc.). For example, the optical system requirements can include information about a target point projection (e.g., a target point pattern including each tile of the point projection, a target number of points of the point projection, etc.), information about a target operating current (Iop), information about a target output optical power of the Iop (Pop), information about a target range of a plurality of emitters of a VCSEL array, information about a target tilt angle range of an emitter pattern of the VCSEL, array information about a target chip size (e.g., an active area of a chip including the VCSEL array, one or more dimensions, etc.), information about a target FOV of a DOE (e.g., an angular dimension of the FOV), information about a target aspect ratio of the DOE (e.g., a number of rows and / or a number of columns of the emitter pattern of the optical projection of the DOE), etc. Accordingly, the user device can adjust, design (and / or the like), based on the one or more optical requirements, parameters associated with the emitter pattern of the VCSEL array to provide an optimal configuration of the emitter pattern of the VCSEL array.

[0031] In some implementations, the user device can determine (e.g., based on one or more optical requirements) an emitter pattern for an emitter array, for example, Figure 4Aa hexagonal emitter pattern 402 is shown. For example, based on information about a target point projection, information about a target range of a number of emitters of a VCSEL array, information about a target tilt angle of an emitter pattern of a VCSEL array, information about a target die size, information about a target FOV, and / or the like, a user device can determine an emitter pattern. An emitter pattern can include a plurality of emitters. For example, Figure 4A a hexagonal emitter pattern 402 is shown. For example, based on information about a target point projection, information about a target range of a number of emitters of a VCSEL array, information about a target tilt angle of an emitter pattern of a VCSEL array, information about a target die size, information about a target FOV, and / or the like, a user device can determine an emitter pattern. An emitter pattern can include a plurality of emitters. For example, Figure 4A As shown on the left, the hexagonal emitter pattern 402 can have a zero degree tilt angle. As shown on the right, the hexagonal emitter pattern 402 can have a tilt angle a (in this case, 11 degrees, but a can be any non-zero angle in the range of, for example, 9 to 13 degrees). Figure 4A As shown on the left, the hexagonal emitter pattern 402 can have a zero degree tilt angle. As shown on the right, the hexagonal emitter pattern 402 can have a tilt angle a (in this case, 11 degrees, but a can be any non-zero angle in the range of, for example, 9 to 13 degrees). Figure 4A As shown on the left, the hexagonal emitter pattern 402 can have a zero degree tilt angle. As shown on the right, the hexagonal emitter pattern 402 can have a tilt angle a (in this case, 11 degrees, but a can be any non-zero angle in the range of, for example, 9 to 13 degrees). Figure 4A As shown, the positions of the emitters in the hexagonal emitter pattern 402 (e.g., when the hexagonal emitter pattern 402 has a zero degree tilt angle or an a tilt angle) can be represented by a and b vectors for any pitch and / or any tilt angle a.

[0032] In some implementations, an emitter pattern can be a hexagonal emitter pattern that includes one or more instances of the hexagonal emitter pattern 402 arranged adjacent to each other (e.g., where the emitters in the one or more instances of the hexagonal emitter pattern 402 are aligned and uniformly spaced apart). Such a hexagonal emitter pattern can provide a compact VCSEL array while maintaining a maximum pitch between the emitters of the hexagonal emitter pattern. Additionally or alternatively, an emitter pattern can conform to another pattern, such as a square pattern, a rectangular pattern, an octagonal pattern, and / or the like.

[0033] In some implementations, a user device can determine a cell of emitters to be able to determine an emitter pattern of a VCSEL array. A cell can include a plurality of emitters, where a placement of an emitter in the plurality of emitters relative to each other emitter in the plurality of emitters in a layout of the cell can be represented as a combination of a first vector and a second vector. For example, Figure 4B An emitter pattern 404 of a 210-emitter VCSEL array of a structured light device is shown, where the emitter pattern 404 is a hexagonal emitter pattern and has an 11 degree tilt. Figure 4B An enlarged view of a portion of the emitter pattern 404 in FIG. 4B shows a cell 406. The cell 406 includes seventeen emitters within a rectangular bounding box. As shown in FIG. 4B, Figure 4BAs shown, the placement of a transmitter in the cell layout 406 relative to another transmitter in the cell layout can be represented by a combination of the a-vector and the b- vector (e.g., a vector representing the shortest path between points of the transmitter pattern 404).

[0034] In some implementations, the user device can determine the boundary of a cell by identifying a combination of the first vector and the second vector that represents a difference in placement of transmitters having the same x-coordinate or the same y-coordinate (or some other similar coordinate). For example, as shown in FIG. 4B, the user device can determine the boundary of the cell 406, which can be represented by a difference in placement of transmitters having the same x-coordinate (referred to below as dy), which is represented by 3b x la (e.g., a total distance in the y-direction represented by 3 times the b-vector and 1 times the a-vector), and a difference in placement of transmitters having the same y-coordinate (referred to below as dx), which is represented by lb x 5a (e.g., a total distance in the x-direction represented by 1 times the b-vector and 5 times the a-vector). As another example, the user device can use a similar process to determine the boundary of the cell 408, where the boundary of the cell 408 can be represented as 3b x 5a (e.g., a total distance in the y-direction represented by 3 times the b-vector and a total distance in the x-direction represented by 5 times the a-vector). Figure 4B

[0035] In some implementations, the user device can determine a transmitter pattern of the VCSEL array based on determining a cell. For example, the user device can arrange two or more cells (e.g., copies of the same cell such that each copy has the same number of transmitters, the same layout, the same spacing, etc.) to form a transmitter pattern such that the cells are adjacent to each other (e.g., in a row, a column, etc. such that the copies of the cells are placed adjacent to each other, spaced apart from each other consistently, do not overlap each other, etc.). Thus, the placement of a transmitter in a first cell of the two or more cells relative to a corresponding transmitter of a second cell of the two or more cells can be represented as a combination of dx and / or dy.

[0036] In some implementations, the alignment error can be associated with two adjacent cells of the transmitter pattern. For example, as shown in FIG. 4C, the user device can determine an alignment error 414 between the cell 406 and the cell 408. The alignment error 414 can be represented as a difference between the boundary of the cell 406 and the boundary of the cell 408. For example, the alignment error 414 can be represented as a difference between the dx of the cell 406 and the dx of the cell 408 (referred to below as dxerror), which is represented by 4a (e.g., a total distance in the x-direction represented by 4 times the a-vector), and a difference between the dy of the cell 406 and the dy of the cell 408 (referred to below as dyerror), which is represented by 2b (e.g., a total distance in the y-direction represented by 2 times the b-vector). Figure 4B ​As shown, Δx can represent an amount of misalignment between adjacent cells 406 along the y-axis (e.g., an amount of error associated with dy) and / or Δy can represent an amount of misalignment between adjacent cells 406 along the x-axis (e.g., an amount of error associated with dx). In other words, Δx and Δy represent cell placement errors when the sum of a and b vectors totals an exact dy or dx displacement for a given tilt angle. In some implementations, a user device can determine cells and / or a transmitter pattern such that an amount of misalignment between adjacent cells of the transmitter pattern is minimized. For example, a user device can determine cells and / or a transmitter pattern such that Δx satisfies (e.g., is less than or equal to) a y-axis misalignment threshold and / or Δy satisfies (e.g., is less than or equal to) an x-axis misalignment threshold. In some implementations, the x-axis misalignment threshold and / or the y-axis misalignment threshold can be 5 nanometers (nm), 10 nm, 20 nm, 50 nm, etc.

[0037] In some implementations, a user device can adjust (e.g., in association with determining cells and / or a transmitter pattern) a tilt angle of a transmitter pattern to minimize an amount of misalignment between adjacent cells. For example, a user device can adjust a target tilt angle of 11 degrees (e.g., indicated by optical requirements obtained by the user device) to a tilt angle of 10.89 degrees to result in a lower amount of misalignment than would be achieved with 11 degrees.

[0038] In some implementations, a user device can determine a plurality of cells arranged along an x-axis and / or a y-axis to form a transmitter pattern such that the transmitter pattern has an aspect ratio, a number of transmitters, etc. that satisfies optical requirements. For example, Figure 4C includes a table 410 that identifies a number of transmitters for a transmitter pattern based on multiples (e.g., m columns and n rows) of cells (e.g., having boundaries defined by dx and dy) that include 14 transmitters. In other words, table 410 provides different numbers of solutions for a plurality of transmitters of a transmitter pattern based on a number of cells that form the transmitter pattern, where dx and dy represent dimensions of the cells (e.g., in microns). The shaded solutions correspond to numbers of transmitters that fall within a range of 172 transmitters to 257 transmitters, which can be an optimal range of transmitters for a particular implementation.

[0039] In some implementations, a user device selects a plurality of transmitters from individual solutions of table 410 based on an aspect ratio of the individual solutions and / or an aspect ratio of an active area size (e.g., a chip size) of a VCSEL array. For example, optical requirements can indicate an active area size (e.g., a chip size, represented by X x Y) within a range of about 500 microns x 500 microns, which corresponds to an aspect ratio (X / Y) of about 1. Accordingly, in such an example, as Figure 4Cas shown by the ellipses in Table 410, other shaded solutions result in active areas that are outside of the range provided by the optical requirements (e.g., greater than 500 microns X or Y range). Thus, other numbers of emitters and / or active area sizes can result in vertical and / or horizontal misalignments, gaps in the projection points, and / or overlaps in the projection points. In this way, the user device can determine an optimal emitter pattern associated with the target tilt angle, the optimal emitter pattern including a total number of emitters within the target range of emitters (e.g., the total number of emitters of the emitter pattern is greater than or equal to the minimum number of emitters and less than or equal to the maximum number of emitters), the optimal emitter pattern conforming to a target aspect ratio of the structured light device, and / or the like.

[0040] In some implementations, the user device can adjust the aspect ratio of the emitter pattern (e.g., the X x Y active area of the VCSEL chip) to address the optical requirements of the lens and / or DOE of the structured light device. For example, for a dot projection including an aspect ratio of 5 x 7 tiles, the DOE can have a FOV of 60 x 78 degrees, and the user device can determine that the optimal chip aspect ratio is equal to (60 / 5) / (78 / 7), or approximately 1.08.

[0041] In some implementations, the user device can adjust the pitch in the emitter pattern and / or can scale (e.g., stretch or contract) the emitter pattern in the x and / or y direction to adjust the emitter pattern to conform to the optimal chip aspect ratio. Figure 4D including Table 412, which illustrates an example in which the user device adjusts the pitch in the emitter pattern (e.g., with an original emitter pitch of 32 microns) and stretches the emitter pattern (e.g., with an original active area size of 439.9265 microns x 423.31948 microns and an original aspect ratio of 1.0392305) to a target active area size (e.g., 422 microns x 380 microns) and a target aspect ratio (e.g., approximately 1.11). In this example, the user device can adjust the pitch of the emitter pattern from 32 microns to 28.7 microns (e.g., to uniformly contract the cells forming the emitter pattern), which can result in a target active area size of 394.9165 microns x 380.0086 microns. The user device can then stretch the emitter pattern in the x direction from 394.9165 microns to 422 microns to obtain the target active area size (e.g., 422 microns x 380 microns) and the target aspect ratio (e.g., approximately 1.11).

[0042] As further shown in Table 412, this results in a pitch in the emitter pattern that differs in the x and y directions. (For example, the pitch in the x direction has one value, while the pitch in the y direction has a different value). For example, the length of the a vector can change from 28.726 microns to 30.627 microns, while the length of the b vector can change from 28.726 microns to 28.941 microns. As additionally shown, as a result of adjusting the pitch and / or stretching the emitter pattern, the tilt angle associated with the emitter pattern can be adjusted from 11 degrees to 10.955 degrees.

[0043] In this way, the user device can iteratively adjust one or more parameters associated with an emitter pattern for a VCSEL array to design an optical emitter pattern for a lens and / or DOE of a structured light device to emit a dot projection comprising a plurality of tiles, where corresponding dots of each tile of the dot projection are aligned and / or uniformly spaced.

[0044] As described above, Figures 4A-4D is one example. Other examples can differ from what is described for Figures 4A-4D without departing from the scope of the disclosure.

[0045] Figure 5 is a diagram of an example dot projection 500 associated with an example 210 emitter VCSEL array of a structured light device, where an emitter pattern 502 of the example 210 emitter VCSEL array (e.g., an optimal emitter pattern designed using a user device, as described herein for Figures 4A-4D without departing from the scope of the disclosure. As shown in Figure 5 , the example dot projection 500 is a 3x3 optical projection of the emitter pattern 502 (e.g., the emitter pattern can be optically projected to form nine tiles, roughly identified by the dashed lines, arranged in a three row and three column tile pattern).

[0046] Accordingly, each tile of the example dot projection 500 can comprise a plurality of dots that conform to a dot pattern (e.g., corresponding to the emitter pattern 502), where each dot of the dot pattern is respectively associated with an emitter of the emitter pattern 502. In some implementations, when a placement of a first emitter in the emitter pattern 502 relative to a second emitter in the emitter pattern 502 can be represented as a combination of vectors (e.g., the a and b vectors described herein), a first dot in the dot pattern (e.g., corresponding to the first emitter) relative to a second dot in the dot pattern (e.g., corresponding to the second emitter) can be represented as the same combination of vectors (e.g., the a and b vectors multiplied by respective constants associated with the example dot projection 500).

[0047] As described above, Figure 5As further shown, each tile of the exemplary dot projection 500 includes multiple repetitions of unit 504 having emitter pattern 502. For example, the middle tile of the exemplary dot projection 500 includes five rows and three columns of repeating unit 504 (e.g., a 5×3 design based on emitter pattern 502). Figure 5 As further shown, the tiles of the exemplary dot projection 500 do not overlap each other and are placed adjacent to each other to form a seamless dot pattern.

[0048] As mentioned above, providing Figure 5 As an example. Other examples can be used with reference to... Figure 5 The descriptions are different.

[0049] Figure 6 This is a diagram of an exemplary point projection 600 associated with an exemplary 210 transmitter VCSEL array of a structured light device, wherein the transmitter pattern of the 210 transmitter VCSEL array (e.g., an optimal transmitter pattern not shown) is designed using user equipment, as described herein. Figures 4A-4D The pattern described above is a hexagonal emitter pattern with an 11-degree tilt angle. (As...) Figure 6 As shown, the exemplary dot projection 600 is a 1×2 optical projection of the transmitter pattern (e.g., the transmitter pattern can be optically projected to form two pieces arranged in a row).

[0050] like Figure 6 As further shown, the first patch 602 of the exemplary point projection 600 (e.g., comprising the bright spots of the exemplary point projection 600) can be a first optical projection of the emitter pattern, and the second patch 604 of the exemplary point projection 600 (e.g., comprising the dark spots of the exemplary point projection 600) can be a second optical projection of the emitter pattern. For example, the DOE of the structured light device can be along an axis (e.g., Figure 6 The x-axis shown in the diagram performs an optical translation operation on the emitter pattern so that the first piece 602 of the exemplary point projection 600 is projected along the axis next to the second piece 604 of the exemplary point projection 600. Figure 6 As further shown, in such an example, point 606-1 of the first puzzle piece 602 may have the same y-coordinate as the corresponding point 606-2 of the second puzzle piece 604, point 608-1 of the first puzzle piece 602 may have the same y-coordinate as the corresponding point 608-2 of the second puzzle piece 604, and so on.

[0051] As another example, the DOE can perform an optical translation operation of the emitter pattern along a different axis (e.g., the y-axis). In such an example, the points of the first tile 602 can have the same x-coordinate as the corresponding points in the second tile 604. Additionally or alternatively, the DOE can perform multiple optical translation operations of the emitter pattern along the x-axis, the y-axis, and / or another axis. For example, the DOE can perform an optical translation operation of the emitter pattern to generate one or more tiles that are adjacent to each other to form a point projection (e.g., where each tile conforms to the point pattern that is the optical projection of the emitter pattern).

[0052] In some implementations, the lens and / or the DOE can be configured to generate a point projection comprising a plurality of tiles such that an amount of misalignment between adjacent tiles of the point projection is minimized. For example, the DOE can cause the plurality of tiles to be arranged to achieve a measure of tile misalignment (e.g., in the x-direction, the y-direction, etc.) associated with two adjacent tiles of the plurality of tiles to satisfy (e.g., be less than or equal to) a tile misalignment threshold. In some implementations, the tile misalignment threshold can be 1 pm, 3 pm, 10 pm, 20 pm, 50 pm, 100 pm, etc. In this way, the DOE can be configured to ensure that the points of the point projection are aligned and / or uniformly spaced. For example, as shown, the line 610 connecting the point 608-1 of the first tile 602 and the point 606-2 of the second tile 604 passes through other points of the first tile 602, indicating that the first tile 602 and the second tile 604 are well-aligned (e.g., a measure of tile misalignment between the first tile 602 and the second tile 604 satisfies the tile misalignment threshold). Figure 6

[0053] As described above, providing Figure 6 as an example. Other examples can differ Figure 6 from the described examples.

[0054] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the embodiments to the precise form disclosed. Modifications and variations can be possible in light of the above disclosure or from practicing the disclosure. Additionally, any implementation described herein can be combined with another implementation described herein, unless the foregoing disclosure expressly provides a reason why one or more implementations can not be combined.

[0055] As used herein, satisfying a threshold can refer to a value that is greater than the threshold, greater than or equal to the threshold, less than the threshold, less than or equal to the threshold, equal to the threshold, etc., depending on the context.

[0056] ​Even though specific combinations of features are referenced in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of various embodiments. In fact, many of these features can be combined in ways not specifically stated in the claims and / or not disclosed in the specification. Although each dependent claim listed below may directly depend on only one claim, the disclosure of various embodiments includes combinations of each dependent claim with each other claim in the claim set.

[0057] Unless explicitly stated otherwise, the elements, actions, or instructions used herein should not be construed as critical or necessary. Furthermore, as used herein, the article “a” is intended to include one or more items and may be used interchangeably with “one or more.” Furthermore, as used herein, the article “the” is intended to include one or more items associated with the article “the” and may be used interchangeably with “the one or more.” Furthermore, as used herein, the term “group” is intended to include one or more items (e.g., related items, unrelated items, a combination of related and unrelated items, etc.) and may be used interchangeably with “one or more.” When only one item is intended, the phrase “only one” or similar language is used. Furthermore, as used herein, the terms “having” and the like are intended to be open-ended terms. Furthermore, the phrase “based on” is intended to mean “at least partially based on” unless explicitly stated otherwise. Furthermore, as used herein, the term “or” is intended to be included when used in series and may be used interchangeably with “and / or” unless explicitly stated otherwise (e.g., if used in conjunction with “any” or “only one of them”). Furthermore, for ease of description, spatially relative terms such as “down,” “below,” “up,” “above,” etc., may be used herein to describe the relationship of one element or feature to another element or feature shown in the figures. In addition to the orientations described in the figures, spatially related terms are intended to include different orientations of the equipment, apparatus, and / or elements in use or operation. The equipment may be oriented in other ways (rotated 90 degrees or in other directions), and the spatially relative descriptors used herein may be interpreted accordingly.

Claims

1. A vertical-cavity surface-emitting laser (VCSEL) array, comprising: Semiconductor substrates; and Multiple emitters on the substrate conform to an emitter pattern. The emitter pattern is oriented at a non-zero angle to the edge of the substrate. The transmitter pattern comprises two or more units arranged to form the transmitter pattern. Each of the two or more units includes the same number of transmitters, and The two or more units are placed adjacent to each other, spaced consistently apart, and do not overlap, such that the misalignment measurement associated with two adjacent units of the two or more units is less than or equal to a misalignment threshold of 1000 nm.

2. The vertical cavity surface-emitting laser array according to claim 1, wherein the non-zero angle is between 5 degrees and 20 degrees.

3. The vertical-cavity surface-emitting laser array according to claim 1, wherein, The placement of the transmitter in the first unit of the two or more units relative to the corresponding transmitter in the second unit of the two or more units is represented as a combination of the first unit placement vector and the second unit placement vector.

4. The vertical-cavity surface-emitting laser array according to claim 3, wherein, The misaligned measurement shall measure at least one of the following: The amount of error associated with the placement vector of the first unit, or The amount of error associated with the placement vector of the second unit.

5. The vertical-cavity surface-emitting laser array of claim 1, wherein the emitter pattern is configured to emit light toward a diffractive optical element (DOE), the diffractive optical element being configured to convert the light into a dot projection comprising a plurality of patches. Each of the plurality of puzzle pieces includes a plurality of dots that conform to a dot pattern, and The dot pattern is an optical projection of the emitter pattern.

6. A structured light system, comprising: A vertical-cavity surface-emitting laser (VCSEL) array, comprising multiple emitters conforming to an emitter pattern. The emitter pattern is oriented at a non-zero angle to the linear axis of the diffractive optical element (DOE). The transmitter pattern comprises two or more units arranged to form the transmitter pattern. Each of the two or more units includes the same number of transmitters, and The two or more cells are placed adjacent to each other, spaced evenly apart, and do not overlap, such that the measurement of cell misalignment associated with two adjacent cells of the two or more cells is less than or equal to a misalignment threshold of 1000 nm; and The diffractive optical element is configured to produce a point projection from light emitted from multiple emitters of the vertical-cavity surface-emitting laser array. The point projection includes multiple mosaic pieces.

7. The structured light system of claim 6, wherein the aspect ratio associated with the emitter pattern is a combination of the aspect ratio of the diffractive optical element and the field of view of the diffractive optical element.

8. The structured light system of claim 6, wherein each of the plurality of tiles comprises a plurality of dots conforming to a dot pattern. Each dot of the dot pattern is associated with a transmitter of the transmitter pattern.

9. The structured light system of claim 6, wherein each of the plurality of tiles comprises a plurality of dots conforming to a dot pattern. The dot pattern is an optical projection of the emitter pattern.

10. The structured light system according to claim 6, wherein the plurality of tiles do not overlap.

11. The structured light system of claim 6, wherein the plurality of tiles are arranged to achieve a measurement of tile misalignment associated with two adjacent tiles among the plurality of tiles, to satisfy a tile misalignment threshold.

12. The structured light system according to claim 6, further comprising: The lens is configured to collimate the light emitted by the plurality of emitters of the vertical cavity surface-emitting laser array and guide the light to the diffractive optical element.

13. The structured light system of claim 6, wherein the emitter spacing associated with the emitter pattern is different between the x-direction and the y-direction.

14. A structured light system, comprising: A vertical-cavity surface-emitting laser (VCSEL) array, comprising multiple emitters conforming to an emitter pattern. The emitter pattern is oriented at a non-zero angle to the linear axis of the diffractive optical element (DOE). The transmitter pattern includes one or more units arranged to form the transmitter pattern; and The diffractive optical element is configured to produce a point projection from light emitted from multiple emitters of the vertical-cavity surface-emitting laser array. The point projection includes multiple tiles, and The plurality of tiles are arranged such that the measurement of tile misalignment associated with two adjacent tiles is less than or equal to a tile misalignment threshold of 100 μm.

15. The structured light system of claim 14, wherein each of the plurality of tiles comprises a plurality of points, and The number of emitters in the vertical cavity surface-emitting laser array is equal to the number of corresponding points in the multiple tiles.

16. The structured light system of claim 14, wherein each of the plurality of tiles comprises a plurality of dots conforming to a dot pattern. The dot pattern corresponds to the transmitter pattern.

17. The structured light system of claim 14, wherein the tiles in the plurality of tiles comprise a plurality of points conforming to a dot pattern, and wherein: The placement of the first point in the dot pattern relative to the second point corresponds to the placement of the first transmitter relative to the second transmitter in the transmitter pattern, and The first point corresponds to the first transmitter, and the second point corresponds to the second point.

18. The structured light system of claim 14, wherein the emitter spacing associated with the emitter pattern is different between the x-direction and the y-direction.

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