Code block interpretation execution method and apparatus, electronic device, and storage medium
By using the correspondence between the execution frequency of logical frames and the execution frequency of code blocks in the interpreted execution of code blocks, the problem of inconsistent operation caused by differences in device performance is solved, the stability and accuracy of code block execution are achieved, and the smooth operation of the software is ensured.
Patent Information
- Application Number
- CN202111220014.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-10-20
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2041-10-20
AI Technical Summary
Differences in the performance of electronic devices can lead to inconsistencies in the execution speed and results of code block interpretation, affecting the smooth operation of the software.
By obtaining the interpretation and execution rules of the code block, and utilizing the correspondence between the execution frequency of the logical frame and the interpretation and execution frequency of the code block, the code block and the logical frame are ensured to execute synchronously. Furthermore, the frequency stability of interpretation and execution is controlled by smoothing the time, thus avoiding the impact of changes in device performance.
Maintaining a stable frequency and consistent results for code block interpretation and execution under different device load conditions improves the accuracy of execution results and the smoothness of device operation.
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Figure CN113867734B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of programming, in particular, to a code block interpretation execution method, a code block interpretation execution device, an electronic device and a computer readable storage medium. BACKGROUND
[0002] In some software, the interpretation execution frequency of a code block is related to the performance of an electronic device, for example, for the Scratch software, the interpretation execution of a code block is related to the screen refresh rate. With the development of technology, the performance of existing electronic devices is constantly improving, but the performance of different electronic devices is different, resulting in different task concurrency. When the performance of some electronic devices is poor, the performance of the electronic device will be dynamically reduced when the load increases, reducing the occupation of computing resources, so as to ensure the smooth running of the electronic device.
[0003] Since the interpretation execution of the code block is related to the performance of the electronic device, when the load of the same electronic device increases, the performance of part of the electronic device is adjusted to ensure the smooth running of the electronic device, and at the same time, the code block will be affected by the performance adjustment, reducing the number of interpretation executions, thereby changing the running speed of the code block interpretation execution, and the running result changes due to the change of the number of executions. SUMMARY
[0004] Therefore, the present application aims to provide a code block interpretation execution method, a code block interpretation execution device, an electronic device and a storage medium, which can solve the problem that the running result of the code block interpretation execution is inconsistent due to the load of the device, so that the code block interpretation execution is not affected by the load, the same running speed is maintained, and the same operation result is obtained.
[0005] In order to achieve the above-mentioned purpose, the embodiments of the present application are implemented in the following way:
[0006] In a first aspect, the embodiments of the present application provide a code block interpretation execution method, comprising: obtaining an interpretation execution rule of a code block, wherein the interpretation execution rule represents the corresponding relationship between the interpretation execution frequency of the code block and the execution frequency of a logical frame; and performing interpretation execution on the code block based on the execution frequency of the logical frame and the interpretation execution rule.
[0007] In the embodiments of the present application, the corresponding relationship between the interpretation execution frequency of the code block and the execution frequency of the logical frame is used as the interpretation execution rule of the code block, so that the code block is interpreted and executed based on the execution frequency of the logical frame. When the performance of the electronic device changes, the number of interpretation executions of the code block in a unit of time will not be affected by the electronic device, thereby ensuring that the code block interpretation execution remains consistent under different loads of the same device, so that the final running result is more accurate.
[0008] In an embodiment, the interpretation execution rule represents that the code block is synchronously executed with the logical frame.
[0009] In the embodiments of the present application, when the logical frame starts to execute, the code block starts to be interpreted and executed at the same time, so that the start of the interpretation and execution of the code block is synchronized with the logical frame. Thus, the number of times of the interpretation and execution of the code block is at least the same as the number of times of the execution of the logical frame, and is not affected by the performance of each hardware of the electronic device, so that the final running result is more accurate.
[0010] In an embodiment, the interpretation and execution of the code block based on the execution frequency of the logical frame and the interpretation execution rule comprises: starting the interpretation and execution of the code block from the start time of the execution of the logical frame, and accumulating a smoothing time; when the smoothing time or the interpretation and execution time of the code block meets a preset condition, executing the next logical frame and starting the next interpretation and execution of the code block.
[0011] In the embodiments of the present application, the execution time of the logical frame is recorded by using the smoothing time, so that the execution frequency of the logical frame is not affected by the device and remains stable, so that the execution frequency of the code block can also remain stable and will not fluctuate greatly, and thus the running result of the code block will not change due to the length of the interpretation and execution time, and the accuracy of the result is maintained.
[0012] In an embodiment, when the smoothing time meets the preset condition, the next logical frame is executed and the next interpretation and execution of the code block is started, which comprises: when the interpretation and execution of the code block is triggered by a rendering thread, it is judged whether the current accumulated smoothing time reaches a logical frame interval, wherein the logical frame interval is the interval duration of the start time of the execution of the previous and next logical frames, and is a fixed value; if yes, the next logical frame is executed and the next interpretation and execution of the code block is started.
[0013] In the embodiments of the present application, it is judged whether the smoothing time meets the logical frame interval, so that the logical frame can be executed at a set frequency and a predetermined number of times of execution is completed within a predetermined time. Since the code block starts to be interpreted and executed when the logical frame starts to execute, the code block can also complete a predetermined number of times of interpretation and execution within a predetermined time.
[0014] In an embodiment, when the smoothing time meets the preset condition, the next logical frame is executed and the next interpretation and execution of the code block is started, which further comprises: when the interpretation and execution of the code block is triggered by a rendering thread, it is judged whether half of the current accumulated smoothing time reaches the difference between the logical frame interval and the current accumulated smoothing time; if yes, the next logical frame is executed and the next interpretation and execution of the code block is started.
[0015] In the embodiments of the present application, the execution of the current logical frame is completed in advance by judging the difference between the logical frame interval and the smooth time, so as to avoid the delay of the control instruction caused by signal delay or other performance changes from affecting the execution frequency of the logical frame, and further avoid affecting the code block from being interpreted and executed according to the set execution frequency.
[0016] In an embodiment, when the smooth time meets the preset condition, the next logical frame is executed and the next interpretation execution of the code block is started, and the method further includes: when the interpretation of the code block in one round is completed and the execution of the logical frame is not completed, judging whether the interpretation execution time of the code block reaches a preset time, wherein the preset time is set based on the logical frame interval; if yes, pausing the accumulation of the smooth time and stopping the continuous interpretation execution of the code block; at the moment of re-triggering the interpretation execution of the code block, continuing to accumulate the smooth time; when the accumulation of the smooth time reaches the logical frame interval, executing the next logical frame and starting the next interpretation execution of the code block.
[0017] In the embodiments of the present application, the interpretation execution of one round of code block may be performed on multiple executable code blocks with different lengths of time, and these code blocks do not need to be rendered. Therefore, when the interpretation execution of the code block in one round is completed, the execution of the logical frame in one round may not be completed. Therefore, whether the execution time of the code block reaches the preset time is judged, and when the preset time is reached, the accumulation of the smooth time is paused and the interpretation execution of the next round of code block is not performed, and the thread possession right is given to other work that needs to be executed and rendered. Thus, the occupation of the rendering thread by the code block is avoided, so that other work in the thread can be normally performed, and the delay of other work caused by the execution of the code block is reduced.
[0018] In an embodiment, the interpretation execution of the code block is recorded based on the number of executions of the logical frame.
[0019] In the embodiments of the present application, the number of executions of the logical frame is used to record the interpretation execution time of the code block, so that the interpretation execution time of the code block is not affected by the performance of the device. When running on different devices, whether the device is overloaded or not, more similar and more accurate results of the interpretation execution of the code block can be obtained.
[0020] In a second aspect, the embodiments of the present application provide a code block interpretation execution device, which includes: an acquisition module, configured to acquire an interpretation execution rule of a code block, wherein the interpretation execution rule represents the corresponding relationship between the interpretation execution frequency of the code block and the execution frequency of a logical frame; and a processing module, configured to interpret and execute the code block based on the execution frequency of the logical frame and the interpretation execution rule.
[0021] In a third aspect, an electronic device is provided, comprising a memory and a processor, the memory storing computer readable instructions, the computer readable instructions being executed by the processor to cause the processor to perform the functions of the code block interpretation execution method of the first aspect or the code block interpretation execution apparatus of the second aspect.
[0022] In a fourth aspect, a computer readable storage medium is provided, the computer readable storage medium storing a computer program, the computer program causing a computer to perform the functions of the code block interpretation execution method of the first aspect or the code block interpretation execution apparatus of the second aspect when the computer program is run on the computer.
[0023] Other features and advantages of the present disclosure will be illustrated in the following description, or can be learned from the description, or can be determined without any doubt, or can be known by implementing the above-mentioned technologies of the present disclosure.
[0024] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the following will describe the preferred embodiments of the present application, and the accompanying drawings will be described in detail as follows. BRIEF DESCRIPTION OF DRAWINGS
[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments of the present application. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope, and for those skilled in the art, other related drawings can also be obtained without any creative labor on the basis of these drawings.
[0026] Figure 1 A structural block diagram of an electronic device provided by the embodiments of the present application is provided.
[0027] Figure 2 A flowchart of a code block interpretation execution method provided by the embodiments of the present application is provided.
[0028] Figure 3 A structural block diagram of a code block interpretation execution apparatus provided by the embodiments of the present application is provided.
[0029] Icon: electronic device 100; processor 110; memory 120; code block interpretation execution apparatus 20; acquisition module 21; processing module 22. DETAILED DESCRIPTION
[0030] In order to make the purposes, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.
[0031] Please refer to Figure 1 An electronic device 100 is provided in an embodiment of the present application. The electronic device 100 is configured to perform the code block interpretation execution method provided in the present application and realize the functions of the code block interpretation execution apparatus provided in the present application.
[0032] In the embodiment, the electronic device 100 can be a terminal or a server. The terminal includes, but is not limited to, a personal computer (PC), a smart phone, a tablet computer, a personal digital assistant (PDA), a mobile Internet device (MID), etc. The server includes, but is not limited to, a network server, a database server, a cloud server, or a server integrated by multiple sub-servers, etc. Of course, the above-mentioned devices are only used to facilitate the understanding of the embodiments of the present application, and should not be used to limit the embodiments of the present application.
[0033] In terms of structure, the electronic device 100 includes a processor 110 and a memory 120. The processor 110 and the memory 120 are directly or indirectly electrically connected to realize the transmission or interaction of data. For example, the processor 110 and the memory 120 can be electrically connected through a communication bus or a signal line. The code block interpretation execution apparatus includes at least one software module which can be stored in the memory 120 in the form of software or firmware (Firmware) or solidified in the operating system (OS) of the electronic device 100. The processor 110 is configured to execute the executable modules stored in the memory 120, such as the software functional modules and computer programs included in the code block interpretation execution apparatus, to realize the functions of the code block interpretation execution apparatus.
[0034] The memory 120 can store computer readable instructions. The processor 110 can execute the code block interpretation execution method by calling the computer readable instructions.
[0035] The processor 110 can be an integrated circuit chip with signal processing capability. The processor 110 can also be a general-purpose processor, for example, can be a central processing unit (CPU), a digital signal processor (DSP), an application specific integrated circuit (ASIC), a discrete gate or transistor logic, a discrete hardware component, and can implement or execute the disclosed methods, steps, and logic block diagrams in the embodiments of the present application. In addition, the general-purpose processor can be a microprocessor or any conventional processor, etc.
[0036] The memory 120 can be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), and an electrically erasable programmable read-only memory (EEPROM). The memory 120 is used to store a program, and the processor 110 executes the program after receiving an execution instruction.
[0037] It should be noted that, Figure 1 The structure shown is only a schematic, and the electronic device 100 provided by the embodiments of the present application can also have fewer or more components, or have a different configuration from Figure 1 the structure shown. In addition, Figure 1 each component shown can be implemented by software, hardware, or a combination thereof. Figure 1
[0038] Please refer to Figure 2 , an embodiment of the present application provides a code block interpretation execution method, which can be executed by the foregoing electronic device 100. In the embodiment, the code block interpretation execution method can include the following steps.
[0039] S110, an interpretation execution rule of the code block is obtained. The interpretation execution rule represents the correspondence between the interpretation execution frequency of the code block and the execution frequency of the logical frame.
[0040] In this embodiment, the interpretation execution frequency of the code block refers to the number of times of interpretation execution of the code block per unit time, and the execution frequency of the logical frame refers to the number of times of execution of the logical frame per unit time. The correspondence between the interpretation execution frequency of the code block and the execution frequency of the logical frame can be that the execution frequency of the logical frame and the interpretation execution frequency of the code block are in a certain proportion, for example, 1:1, 1:2, 2:1, etc. When the execution frequency of the logical frame and the interpretation execution frequency of the code block are in a 1:1 relationship, it means that the execution of the logical frame and the interpretation execution of the code block are in the same frequency, for example, the logical frame is executed 30 times in one second, and the code block is also interpreted and executed 30 times in one second. Specifically, a trigger signal can be set at the beginning, middle or end time of the logical frame to trigger the interpretation execution of the code block. When the execution frequency of the logical frame and the interpretation execution of the code block are in a 2:1 relationship, it means that every two executions of the logical frame correspond to one interpretation execution of the code block, for example, the logical frame is executed 60 times in one second, and the code block is interpreted and executed 30 times in one second. Specifically, the logical frame starts to execute at the 1st, 3rd, 5th frame, and so on, and the code block starts to interpret and execute at the same time.
[0041] In an embodiment, the interpretation execution rule represents that the interpretation execution of the code block is synchronized with the execution of the logical frame, that is, the code block also starts to interpret and execute at the beginning time of the execution of the logical frame. By binding the interpretation execution of the code block with the execution of the logical frame, the interpretation execution of the code block is not affected by the performance of the electronic device, so that the influence of the performance of the electronic device is guaranteed, and a more accurate running result is obtained.
[0042] In this embodiment, the code block starts to interpret and execute when the logical frame starts to execute. The code block can include a plurality of executable code blocks, and all the executable code blocks need to be executed in one round of interpretation execution of the code block.
[0043] In S120, the code block is interpreted and executed based on the execution frequency of the logical frame and the interpretation execution rule.
[0044] In an embodiment, the code block starts to interpret and execute from the beginning time of the execution of the logical frame, and the smooth time is accumulated. When the smooth time meets the preset condition, the next logical frame is executed and the next interpretation execution of the code block is started.
[0045] In this embodiment, the accumulated smooth time can be accumulated in the same thread of the interpretation execution of the code block or in other threads. It can be understood that the smooth time is used to prevent the interval between two frames from fluctuating too much. It can be understood that there are many methods for accumulating smooth time in the prior art, which will not be introduced here, and the method for accumulating smooth time is not specifically limited.
[0046] In an embodiment, the next logical frame is executed and the next interpretation execution of the code block is started by judging whether the smooth time meets a preset condition. When the interpretation execution of the code block is triggered by the rendering thread, whether the current accumulated smooth time reaches a logical frame interval can be judged, where the logical frame interval is a preset time used for executing a logical frame once. If yes, the next logical frame is executed and the next interpretation execution of the code block is started.
[0047] In the embodiment, the code block needs to be triggered by a thread capable of rendering, for example, triggered by a Unity rendering thread. The code block can be a code block of pure data operation or a code block needing to use rendering, which are distinguished by whether rendering is used after the interpretation execution of the code block is completed. The two code blocks need to be processed in different ways when the interpretation execution rule is used to interpret the code block due to different execution modes. The interpretation execution of the code block needing rendering needs to be rendered, and whether the next round of interpretation execution of the code block is performed is determined by judging whether the accumulated smooth time reaches a logical frame interval. Since the code block starts to be interpreted when the logical frame starts to be executed, whether the next round of interpretation execution of the code block is performed can be determined.
[0048] In the embodiment, the logical frame interval is the interval duration of the execution start time of the two adjacent logical frames, and is a fixed value. For example, when the logical frame execution frequency is 30 times per second, the interval duration of the two adjacent logical frames is 1 / 30 second, that is, the logical frame interval is 1 / 30 second. Since the smooth time is accumulated when the logical frame is executed, when the accumulated smooth time reaches the logical frame interval, the logical frame execution time is the accumulated smooth time. When the running time of the logical frame execution reaches a preset requirement, the next round of execution of the logical frame is performed, and the next round of interpretation execution of the code block is started, so that the execution frequency of the code block is the same as the execution frequency of the logical frame, and the requirement of preset execution times can be met.
[0049] In an embodiment, the next logical frame is executed and the next interpretation execution of the code block is started by judging whether the smooth time meets a preset condition. When the interpretation execution of the code block is triggered by the rendering thread, whether the current accumulated smooth time reaches a logical frame interval can be judged, where the logical frame interval is a preset time used for executing a logical frame once. If yes, the next logical frame is executed and the next interpretation execution of the code block is started.
[0050] In the embodiment, when the difference between the accumulated smooth time and the preset logical frame interval is less than half of the current accumulated smooth time, the next logical frame can also be executed. Specifically, when the accumulated smooth time is 2 / 3 of the logical frame interval, and the difference between the accumulated smooth time and the preset logical frame interval is 1 / 3 of the logical frame interval, it can be determined that half of the current accumulated smooth time reaches the difference between the logical frame and the current accumulated smooth time. It can be understood that the next logical frame can be executed when the accumulated smooth time reaches 2 / 3 of the logical frame interval. Thus, the delay that can occur between the control and the execution can be avoided, the execution times of the code block can reach the expected times, and the running speed can be maintained.
[0051] In an embodiment, by judging whether the smooth time meets the preset condition, the execution of the next logical frame and the start of the next interpretation execution of the code block can also include: when the interpretation execution of the code block is completed in one round and the execution of the logical frame is not completed, judging whether the interpretation execution time of the code block reaches a preset time, wherein the preset time is set based on the logical frame interval; if yes, suspending the accumulation of the smooth time, and stopping the continuous interpretation execution of the code block; at the moment of retriggering the interpretation execution of the code block, continuing to accumulate the smooth time; and when the accumulated smooth time reaches the logical frame interval, executing the next logical frame and starting the next round of interpretation execution of the code block.
[0052] In this embodiment, for the code block of pure data operation, since rendering is not needed, after completing a round of interpretation execution, whether to continue the second round of interpretation execution is determined according to the interpretation execution time. Specifically, the code block can include a plurality of executable code blocks, and after being triggered by the rendering thread, the code block executes all executable code blocks, that is, completes a round of interpretation execution. Different code blocks can have different interpretation execution times, resulting in that when a round is completed, the logical frame has not completed execution. Therefore, when the logical frame is not completed, the code block can continue the next round of interpretation execution. The interpretation execution of the code block occupies the use right of the thread, so that the execution of other work rendering needs to be delayed, causing rendering delay. Therefore, in order to ensure the normal operation of other work rendering, the rendering is synchronized with the data, and when the interpretation execution of the code block is completed and the time used reaches a suitable time, that is, a preset time, the next round of interpretation execution of the code block and the accumulation of the smoothing time are stopped, and the thread is used for picture rendering of other work. Specifically, the preset time can be set according to the preset interpretation execution time of the logical frame or a single code block. For example, when the execution frequency of the logical frame is 1 second and 30 times, the logical frame interval is 1 / 30 second, and the code block execution time is 1 / 30 second, the preset time can be 60%, 70%, 80% and the like of the logical frame interval. In the process of successive interpretation execution of a plurality of code blocks, because the code blocks have different interpretation execution times, when the interpretation execution of each round of code block is completed and the logical frame is not completed, whether the accumulated current smoothing time reaches 70% of the logical frame interval is judged. When it is not reached, the next round of interpretation execution of the code block is continued. When it is reached, the next round of interpretation execution of the code block is stopped, and the accumulation of the smoothing time is stopped. The use right of the thread is given to rendering. When the interpretation execution of the code block is triggered again by the rendering thread, the accumulation of the smoothing time is continued. When the interpretation execution of the code block is completed and the logical frame reaches the logical frame interval, the next logical frame and the next round of interpretation execution of the code block are executed.
[0053] In this embodiment, after rendering is completed, the rendering thread triggers the interpretation execution of the code block again. Because the logical frame has not completed a round of execution, the logical frame continues to execute, and the smoothing time is accumulated. When the accumulated smoothing time reaches the logical frame interval, the next logical frame is executed. For example, when the preset time is 70% of the logical frame interval, the accumulation of the smoothing time continues from the time when the pause starts, and accumulates from 70% to 100% of the logical frame interval. At this time, it is indicated that the actual execution time of the logical frame reaches the preset execution time. It should be noted that whether the logical frame reaches the preset time needs to be judged after the interpretation execution of the code block is completed. When the smoothing time reaches the logical frame interval, the execution of the next round of logical frame is performed, and the execution of the logical frame enables the code block to perform the next round of interpretation execution.
[0054] In an embodiment, the interpretation execution of the code block is recorded based on the number of times of logical frame execution.
[0055] In the embodiment, the electronic device may be overloaded and thus be stuck, and even if the performance of the electronic device is adjusted, the electronic device cannot run smoothly. When stuck, the original recording time is recorded by the electronic device, and the time of the electronic device is not recorded when stuck, that is, the time of the electronic device deviates from the actual time. For example, the next round of signals is originally sent after 1 second, but due to sticking and other reasons, more than 1 second is actually spent, and the electronic device does not record the extra time. Because the actual time spent is longer, the code block will continue to operate and judge before the code block receives the signal of the control code block for the next round of interpretation execution, resulting in different times of operation and judgment of the code block, and finally different results.
[0056] In the embodiment, the interpretation execution of the code block is recorded based on the number of times of logical frame execution.
[0057] Please refer to Figure 3 based on the same inventive concept, Figure 3 A structural block diagram of a code block interpretation execution device provided by an embodiment of the present application is shown in FIG. 2, wherein the code block interpretation execution device 20 includes an acquisition module 21 and a processing module 22.
[0058] In an embodiment, the acquisition module 21 is configured to acquire an interpretation execution rule of a code block, wherein the interpretation execution rule represents a corresponding relationship between an interpretation execution frequency of the code block and an execution frequency of a logical frame; and the processing module 22 is configured to perform interpretation execution on the code block based on the execution frequency of the logical frame and the interpretation execution rule.
[0059] In an embodiment, the processing module 22 is further configured to synchronize execution of the code block and the logical frame.
[0060] In an embodiment, the processing module 22 is further configured to start the interpretation execution of the code block from a starting time of the execution of the logical frame and accumulate a smoothing time, and when the smoothing time meets a preset condition, execute a next logical frame and start a next interpretation execution of the code block.
[0061] In an embodiment, the processing module 22 is further configured to determine whether the accumulated smooth time reaches a logical frame interval when the interpretation execution of the code block is triggered by the rendering thread, wherein the logical frame interval is a time interval between the start time of two adjacent logical frames, and is a fixed value; if yes, the next logical frame is executed and the next interpretation execution of the code block is started.
[0062] In an embodiment, the processing module 22 is configured to determine whether half of the accumulated smooth time reaches a difference between the logical frame interval and the accumulated smooth time when the interpretation execution of the code block is triggered by the rendering thread; if yes, the next logical frame is executed and the next interpretation execution of the code block is started.
[0063] In an embodiment, the processing module 22 is further configured to determine whether the interpretation execution time of the code block reaches a preset time when the one round of interpretation execution of the code block is completed and the logical frame is not executed, wherein the preset time is set based on the logical frame interval; if yes, the accumulation of the smooth time is paused, and the continuous interpretation execution of the code block is stopped; at the time when the interpretation execution of the code block is triggered again, the smooth time is continued to be accumulated; when the accumulation of the smooth time reaches the logical frame interval, the next logical frame is executed and the next round of interpretation execution of the code block is started.
[0064] In an embodiment, the processing module 22 is further configured to record the interpretation execution of the code block based on the number of logical frames.
[0065] It can be understood that the code block interpretation execution apparatus 20 provided in the present application corresponds to the code block interpretation execution method provided in the present application, and for the sake of brevity of the description, the same or similar parts can refer to the content of the code block interpretation execution method part, which will not be repeated here.
[0066] Based on the same inventive concept, the present application further provides a computer readable storage medium, and the computer readable storage medium stores a computer program, when the computer program runs on a computer, the computer program makes the computer execute the code block interpretation execution method.
[0067] In the embodiments provided in the present application, it should be understood that the disclosed method and apparatus can also be implemented in other manners. The embodiment described above is only schematic. In various embodiments of the present application, the modules of the various embodiments can be integrated into one independent part, or can be separate parts, or two or more modules can be integrated into one independent part.
[0068] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the parts of the prior art that make contributions or parts of the technical solutions can be embodied in the form of software products. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.
[0069] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. A method for interpreting and executing code blocks, characterized in that, include: Obtain the interpretation and execution rules of the code block, wherein the interpretation and execution rules characterize the correspondence between the interpretation and execution frequency of the code block and the execution frequency of the logical frame; the code block is a pure data operation code block outside the code executed by the logical frame, or a code block that needs to be rendered; The code block is interpreted and executed based on the execution frequency of the logical frame and the interpretation and execution rules; The interpretation and execution rule indicates that the interpretation and execution of the code block is synchronized with the execution of the logical frame; the synchronization of the interpretation and execution of the code block with the execution of the logical frame indicates that when the logical frame starts to execute, the code block starts to be interpreted and executed simultaneously. The step of interpreting and executing the code block based on the execution frequency of the logical frame and the interpretation and execution rules includes: starting the interpretation and execution of the code block from the beginning of the execution of the logical frame and accumulating smoothing time; when the smoothing time meets a preset condition, executing the next logical frame and starting the next interpretation and execution of the code block.
2. The method according to claim 1, characterized in that, The step of executing the next logical frame and starting the next interpretation execution of the code block when the smoothing time meets the preset condition includes: When the code block is interpreted and executed by the rendering thread, it is determined whether the currently accumulated smoothing time has reached the logical frame interval, wherein the logical frame interval is the interval between the start times of two consecutive logical frames and is a fixed value. If so, then the next logical frame described herein will be executed, and the next interpretation and execution of the code block will begin.
3. The method according to claim 1, characterized in that, The step of starting the execution of the next logical frame and the next interpretation execution of the code block when the smoothing time meets the preset condition further includes: When the code block is interpreted and executed by the rendering thread, it is determined whether half of the current accumulated smoothing time reaches the difference between the logical frame interval and the current accumulated smoothing time. If so, then the next logical frame described herein will be executed, and the next interpretation and execution of the code block will begin.
4. The method according to claim 1, characterized in that, The step of executing the next logical frame and starting the next interpretation execution of the code block when the smoothing time meets the preset condition further includes: After one round of interpretation and execution of the code block is completed, and before the execution of the logic frame ends, it is determined whether the interpretation and execution time of the code block has reached a preset time, wherein the preset time is set based on the logic frame interval; If so, pause the accumulation of the smoothing time and stop further interpretation and execution of the code block; The smoothing time continues to accumulate at the moment when the interpretation and execution of the code block is retried; When the accumulated smoothing time reaches the logical frame interval, the next logical frame is executed and the next round of interpretation and execution of the code block begins.
5. The method according to claim 1, characterized in that, include: The interpretation and execution of the code block are recorded based on the number of times the logical frame is executed.
6. A code block interpretation and execution apparatus, characterized in that, include: The acquisition module is used to acquire the interpretation and execution rules of the code block, wherein the interpretation and execution rules characterize the correspondence between the interpretation and execution frequency of the code block and the execution frequency of the logical frame; the code block is a pure data operation code block outside the code executed by the logical frame, or a code block that needs to be rendered; The processing module interprets and executes the code block based on the execution frequency of the logical frame and the interpretation and execution rules; The interpretation and execution rule indicates that the interpretation and execution of the code block is synchronized with the execution of the logical frame; the synchronization of the interpretation and execution of the code block with the execution of the logical frame indicates that when the logical frame starts to execute, the code block starts to be interpreted and executed simultaneously; the processing module is further configured to start the interpretation and execution of the code block from the start time of the execution of the logical frame and accumulate smoothing time; when the smoothing time meets the preset condition, execute the next logical frame and start the next interpretation and execution of the code block.
7. An electronic device comprising a memory and a processor, characterized in that, The memory stores computer-readable instructions, which, when executed by the processor, cause the processor to perform the code block interpretation and execution method as described in any one of claims 1-5.
8. A computer-readable storage medium, characterized in that, The readable storage medium stores a computer program that, when run on a computer, causes the computer to execute the code block interpretation and execution method as described in any one of claims 1-5.
Citation Information
Patent Citations
Data processing method and device, storage medium and electronic device
CN108289246A