Three-phase current reconstruction method, device, equipment and storage medium

By calculating the three-phase duty cycle and PWM cycle duration, combined with the minimum sampling time of the bus current, a reconstruction strategy is formulated to reconstruct the three-phase current value, which solves the problem that a single current sensor is difficult to realize three-phase current reconstruction in the SVPWM control system, and improves the motor output torque and power supply voltage utilization rate.

CN113872487BActive Publication Date: 2025-05-27FOSHAN SHUNDE MIDEA ELECTRONICS TECH CO LTD +1
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Patent Information

Application Number
CN202111136625.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-09-27
Publication Date
2025-05-27
Estimated Expiration
2041-09-27

AI Technical Summary

Technical Problem

In SVPWM control systems, it is difficult to realize the reconstruction of three-phase current in a single current sensor, especially in the overmodulation zone, resulting in limited motor maximum output torque and power supply voltage utilization.

Method used

By calculating the three-phase duty cycle and the duration of the PWM period, the high-level duration of each phase line is determined, and based on the minimum sampling duration of the bus current, a reconstruction strategy is formulated to reconstruct the three-phase current value. Specific strategies include reducing the high-level duration of the maximum phase during the PWM period and adding a supplementary sampling period after the period to obtain the sample value of the bus current.

Benefits of technology

It realizes the effective reconstruction of the three-phase current under single current sensor conditions, especially in the overmodulation zone, and increases the output torque and power supply voltage utilization of the motor.

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Abstract

The present application discloses a three-phase current reconstruction method, apparatus, device, and storage medium. The method includes: calculating the three-phase duty cycles of the current PWM cycle based on the three-phase current values of the previous PWM cycle; determining the high-level durations of each phase line based on the three-phase duty cycles and the duration of the PWM cycle; determining a reconstruction strategy for reconstructing the three-phase current based on the sampling value of the bus current, based on the high-level durations of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current; and reconstructing the three-phase current values of the current PWM cycle based on the reconstruction strategy. It can achieve three-phase current reconstruction based on the sampling value of the bus current when the space vector falls in the unobservable region. Especially in the overmodulation region, it can achieve three-phase current reconstruction on the basis of satisfying the effective voltage vector. Furthermore, it can increase the output torque of the motor and improve the utilization rate of the power supply voltage when the bus voltage remains unchanged.
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Description

Technical Field

[0001] The present application relates to the technical field of motor control, and in particular, to a three-phase current reconstruction method, device, equipment, and storage medium. Background Art

[0002] With the active promotion of energy-saving and consumption-reducing technologies, the energy-saving technologies of motor control have been increasingly emphasized. For example, variable-frequency air conditioners adopt permanent magnet synchronous motors (PMSMs) with low losses and high efficiency.

[0003] When a frequency converter drives a permanent magnet synchronous motor, the three-phase bridge inverter of the frequency converter can be controlled by the SVPWM (Space Vector Pulse Width Modulation) method. SVPWM is based on the idea of stator flux linkage tracking of an AC motor, which is easy to implement with a digital controller and has advantages such as good output current waveform and high utilization rate of the DC link voltage.

[0004] In a traditional SVPWM control system, since it is necessary to measure three-phase AC signals as feedback to achieve closed-loop current control, that is, three current sensors need to be set on the AC side of the frequency converter, resulting in high cost, complex structure, and large volume, which is not conducive to integration. Using a single current sensor to complete the reconstruction of three-phase currents has become a research hotspot.

[0005] In practical applications, in order to increase the output voltage of the three-phase bridge inverter to increase the maximum output torque of the motor in motor control, overmodulation technology is often required. However, when overmodulation occurs, the space vector falls into the unobservable region, and related methods for reconstructing three-phase currents based on a single current sensor are difficult to implement. Summary of the Invention

[0006] In view of this, the embodiments of the present application provide a three-phase current reconstruction method, device, equipment, and storage medium, aiming to meet the three-phase current reconstruction in the case of single current sensor acquisition for SVPWM control.

[0007] The technical solution of the embodiments of the present application is implemented as follows:

[0008] In a first aspect, the embodiments of the present application provide a three-phase current reconstruction method, including:

[0009] Calculating the three-phase duty cycles of the current PWM period based on the three-phase current values of the previous Pulse Width Modulation (PWM) period, where the phase with the largest duty cycle in the three-phase line is the maximum phase, the phase with the smallest duty cycle is the minimum phase, and the phase with the duty cycle in the middle is the intermediate phase;

[0010] Determine the high-level duration of each phase line based on the three-phase duty cycle and the duration of the PWM period;

[0011] Determine a reconstruction strategy for reconstructing three-phase currents based on the sampled values of the bus current based on the high-level duration of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current;

[0012] Reconstruct the three-phase current values of the current PWM period based on the reconstruction strategy.

[0013] In some embodiments, the determining a reconstruction strategy for reconstructing three-phase currents based on the sampled values of the bus current based on the high-level duration of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current includes:

[0014] If it is determined that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM period and the high-level duration of the intermediate phase is less than the minimum sampling duration, then determine that the reconstruction strategy is the first reconstruction strategy;

[0015] Correspondingly, the reconstructing the three-phase current values of the current PWM period based on the reconstruction strategy includes:

[0016] Symmetrically reduce the action duration of the high level of the maximum phase by one minimum sampling duration within the PWM period;

[0017] Add a supplementary sampling period for supplementary current sampling after the PWM period, the duration of the supplementary sampling period is not less than the minimum sampling duration, and the maximum phase is set to high level within the supplementary sampling period, and the intermediate phase and the minimum phase are set to low level;

[0018] Obtain a first current value of the bus current within the PWM period and obtain a second current value within the supplementary sampling period;

[0019] Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

[0020] In some embodiments, the determining a reconstruction strategy for reconstructing three-phase currents based on the sampled values of the bus current based on the high-level duration of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current includes:

[0021] If it is determined that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration and the high-level durations of both the intermediate phase and the minimum phase are less than the minimum sampling duration, then determine that the reconstruction strategy is the second reconstruction strategy;

[0022] Accordingly, the reconstruction of the three-phase current values for the current PWM cycle based on the reconstruction strategy includes:

[0023] During the PWM cycle, symmetrically reduce the duration of the high level of the maximum phase by one minimum sampling duration, and replace the high level of the middle phase with a low level;

[0024] After the PWM cycle, add a supplementary sampling cycle for supplementary current sampling. The duration of the supplementary sampling cycle is not less than the minimum sampling duration, and the maximum phase and the middle phase are set to high level within the supplementary sampling cycle, and the minimum phase is set to low level;

[0025] Obtain the first current value of the bus current during the PWM cycle and the second current value during the supplementary sampling cycle;

[0026] Reconstruct the three-phase current values for the current PWM cycle based on the first current value and the second current value.

[0027] In some embodiments, the determination of the reconstruction strategy for reconstructing the three-phase current based on the sampled value of the bus current based on the high-level duration of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current further includes:

[0028] If it is determined that the difference between the high-level duration of the maximum phase and the high-level duration of the middle phase is less than the minimum sampling duration and the difference between the duration of the PWM cycle and the high-level duration of the middle phase is greater than or equal to the minimum sampling duration, then determine the reconstruction strategy as the third reconstruction strategy;

[0029] Accordingly, the reconstruction of the three-phase current values for the current PWM cycle based on the reconstruction strategy includes:

[0030] During the PWM cycle, form two sampling cycles not less than the minimum sampling duration based on phase-shift processing, and obtain the first current value and the second current value of the bus current;

[0031] Reconstruct the three-phase current values for the current PWM cycle based on the first current value and the second current value.

[0032] In some embodiments, the determination of the reconstruction strategy for reconstructing the three-phase current based on the sampled value of the bus current based on the high-level duration of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current further includes:

[0033] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration and at least one of the high-level duration of the intermediate phase and the high-level duration of the minimum phase is greater than or equal to the minimum sampling duration, then determine that the reconstruction strategy is the fourth reconstruction strategy;

[0034] Correspondingly, the reconstruction of the three-phase current value of the current PWM period based on the reconstruction strategy includes:

[0035] Obtain the first current value and the second current value of the bus current based on the minimum sampling duration within the PWM period;

[0036] Reconstruct the three-phase current value of the current PWM period based on the first current value and the second current value.

[0037] In a second aspect, an embodiment of the present application provides a three-phase current reconstruction device, including:

[0038] A first determination module, configured to calculate the three-phase duty cycle of the current PWM period based on the three-phase current values of the previous pulse width modulation (PWM) period, where the phase with the largest duty cycle in the three-phase line is the maximum phase, the phase with the smallest duty cycle is the minimum phase, and the phase with the duty cycle in the middle is the intermediate phase;

[0039] A second determination module, configured to determine the high-level duration of each phase line based on the three-phase duty cycle and the duration of the PWM period;

[0040] A third determination module, configured to determine a reconstruction strategy for reconstructing the three-phase current based on the sampling value of the bus current based on the high-level duration of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current;

[0041] A current reconstruction module, configured to reconstruct the three-phase current value of the current PWM period based on the reconstruction strategy.

[0042] In some implementation manners, the third determination module is specifically configured to:

[0043] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM period and the high-level duration of the intermediate phase is less than the minimum sampling duration, then determine that the reconstruction strategy is the first reconstruction strategy;

[0044] Correspondingly, the current reconstruction module is specifically configured to:

[0045] Symmetrically reduce the action duration of the high level of the maximum phase by one minimum sampling duration within the PWM period;

[0046] After the PWM period, a supplementary sampling period for supplementary current sampling is added. The duration of the supplementary sampling period is not less than the minimum sampling duration, and in the supplementary sampling period, the maximum phase is set to high level, and the intermediate phase and the minimum phase are set to low level;

[0047] Obtain a first current value of the bus current during the PWM period and a second current value during the supplementary sampling period;

[0048] Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

[0049] In some embodiments, the third determination module is specifically configured to:

[0050] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration, and the high-level durations of the intermediate phase and the minimum phase are both less than the minimum sampling duration, then determine that the reconstruction strategy is the second reconstruction strategy;

[0051] Correspondingly, the current reconstruction module is specifically configured to:

[0052] Symmetrically reduce the active duration of the high level of the maximum phase by one minimum sampling duration within the PWM period, and replace the high level of the intermediate phase with a low level;

[0053] After the PWM period, a supplementary sampling period for supplementary current sampling is added. The duration of the supplementary sampling period is not less than the minimum sampling duration, and in the supplementary sampling period, the maximum phase and the intermediate phase are set to high level, and the minimum phase is set to low level;

[0054] Obtain a first current value of the bus current during the PWM period and a second current value during the supplementary sampling period;

[0055] Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

[0056] In some embodiments, the third determination module is further configured to:

[0057] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration, and the difference between the duration of the PWM period and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration, then determine that the reconstruction strategy is the third reconstruction strategy;

[0058] Correspondingly, the current reconstruction module is specifically configured to:

[0059] Within the PWM period, two sampling periods not less than the minimum sampling duration are formed based on phase shift processing, and a first current value and a second current value of the bus current are obtained;

[0060] Based on the first current value and the second current value, the three-phase current values of the current PWM period are reconstructed.

[0061] In some embodiments, the third determination module is further configured to:

[0062] Determine that the difference between the high-level duration of the largest phase and the high-level duration of the middle phase is greater than or equal to the minimum sampling duration and at least one of the high-level duration of the middle phase and the high-level duration of the smallest phase is greater than or equal to the minimum sampling duration, then determine the reconstruction strategy as the fourth reconstruction strategy;

[0063] Correspondingly, the current reconstruction module is specifically configured to:

[0064] Within the PWM period, a first current value and a second current value of the bus current are obtained based on the minimum sampling duration;

[0065] Based on the first current value and the second current value, the three-phase current values of the current PWM period are reconstructed.

[0066] In a third aspect, an embodiment of the present application provides a three-phase current reconstruction device, including: a processor and a memory for storing a computer program that can run on the processor, wherein,

[0067] The processor is configured to execute the steps of the method described in the embodiment of the present application when running the computer program.

[0068] In some embodiments, the three-phase current reconstruction device further includes: a bus current acquisition device for acquiring a sampling value of the bus current and sending the sampling value to the processor.

[0069] In a fourth aspect, an embodiment of the present application provides a storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method described in the embodiment of the present application are implemented.

[0070] The technical solution provided by the embodiments of this application determines a reconstruction strategy for reconstructing three-phase currents based on the sampling value of the bus current, based on the high-level duration of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current; and reconstructs the three-phase current values of the current PWM period based on the reconstruction strategy. When the space vector falls into the unobservable region, three-phase current reconstruction can be realized based on the sampling value of the bus current. Especially in the overmodulation region, three-phase current reconstruction can be realized on the basis of satisfying the effective voltage vector. Furthermore, when the bus voltage remains unchanged, the output torque of the motor can be increased, and the utilization rate of the power supply voltage can be improved. Description of the Drawings

[0071] Figure 1 FIG. is a schematic structural diagram of a system applying the three-phase current reconstruction method of the embodiments of this application;

[0072] Figure 2 FIG. is a schematic distribution diagram of space voltage vectors;

[0073] Figure 3 FIG. is a schematic principle diagram of the unobservable region of the space voltage vector in the embodiments of this application;

[0074] Figure 4 FIG. is a schematic principle diagram of phase shift processing in the related art;

[0075] Figure 5 FIG. is a schematic flow diagram of the three-phase current reconstruction method of the embodiments of this application;

[0076] Figure 6 FIG. is a schematic principle diagram of current sampling based on the first reconstruction strategy in the embodiments of this application;

[0077] Figure 7 FIG. is a schematic principle diagram of current sampling based on the second reconstruction strategy in the embodiments of this application;

[0078] Figure 8 FIG. is a schematic flow diagram of the three-phase current reconstruction method in an application example of this application;

[0079] Figure 9 FIG. is a schematic structural diagram of the three-phase current reconstruction device of the embodiments of this application;

[0080] Figure 10 FIG. is a schematic structural diagram of the three-phase current reconstruction device of the embodiments of this application. Detailed Embodiments

[0081] The following further describes this application in detail with reference to the drawings and embodiments.

[0082] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0083] Before describing the three-phase current reconstruction method of the embodiments of this application, the system applying this three-phase current reconstruction method will be exemplarily described first.

[0084] As Figure 1 shown, the system includes: a motor M, a three-phase bridge inverter 101, a DC power supply DC, and a bus current acquisition device 102.

[0085] Exemplarily, a capacitor C1 is also connected between the positive and negative poles of the DC power supply DC. The direct current supplied by the DC power supply DC is converted into a three-phase power supply for the motor M by the three-phase bridge inverter 101, and the motor M can be a PMSM. The three-phase bridge inverter 101 can be controlled by a frequency converter using the SVPWM method. Among them, the bus current acquisition device 102 can adopt a typical single-resistor sampling circuit. For example, it includes a resistor R1 connected between the negative pole of the DC power supply DC and the three-phase bridge inverter 101. The voltage across both ends of the resistor R1 is transmitted to the AD conversion circuit through an operational amplifier, and the bus current is generated by the AD conversion circuit. This bus current is used for subsequent three-phase current reconstruction, and then the reconstructed three-phase alternating current is used as feedback to achieve closed-loop current control.

[0086] It can be understood that when the three-phase bridge inverter is controlled by the SVPWM modulation method, there are 8 switching operating states, including 6 non-zero voltage vectors (V 1 -V 6 ) and 2 zero voltage vectors (V 0 and V 7 ), and it divides the voltage space plane into a hexagon as Figure 2 shown. The basic principle of phase current reconstruction is to obtain each phase current by sampling the bus current at different moments within 1 PWM period. The relationship between the current of the DC bus and the three-phase current is determined by the state of the instantaneous switching quantity, and the relationship is shown in Table 1.

[0087] Table 1

[0088] Voltage vector Phase current Voltage vector Phase current <![CDATA[V 1 > <![CDATA[I c > <![CDATA[V 5 > <![CDATA[-I b > <![CDATA[V 2 > <![CDATA[I b > <![CDATA[V 6 > <![CDATA[-I c > <![CDATA[V 3 > <![CDATA[-I a > <![CDATA[V 0 > 0 <![CDATA[V 4 > <![CDATA[I a > <![CDATA[V 7 > 0

[0089] In practical applications, considering that the sampling of the bus current needs to meet the sampling window, that is, it is required that the non-zero voltage vector must last for 1 minimum sampling duration T min , T min =T d +T set +T AD , where Td Indicates the dead time of the upper and lower bridge arms, T set Indicates the bus current establishment time, T AD Indicates the sampling conversion time.

[0090] As Figure 3 shown, when the output voltage vector is in the low modulation region or near a non-zero voltage vector, the duration of the non-zero voltage vector may be less than T within one PWM cycle min . This situation makes the sampled bus current meaningless. In the embodiments of the present application, the region where two-phase different-phase currents (i.e., the bus DC corresponding to two non-zero voltage vectors) cannot be sampled within one PWM cycle is collectively referred to as the unobservable region.

[0091] In the related art, in order to ensure that two-phase phase currents can be sampled in each PWM cycle, phase shift processing is required in the unobservable region to ensure that two-phase phase currents are sampled within one PWM cycle. For example, as Figure 4 shown, exemplarily, the three-phase line includes: phase a, phase b, and phase c lines. The original sampling window of T1 is less than T min , and through phase shift processing, the high level of phase b is shifted to the right by T shift , which can make the sampling window of the shifted T1 equal to T min .

[0092] When the unobservable region is an overmodulation region, for example, Figure 3 the region outside the inscribed circle of the hexagon shown, there will be a problem that the phase shift moves out of the PWM cycle and cannot satisfy the effective vector voltage. However, if the PWM cycle of the vector voltage is to be ensured, there will be a situation where no sampling window can be provided, resulting in the inability to collect two-phase phase currents within one PWM cycle. Therefore, the related three-phase current reconstruction method based on phase shift processing cannot meet the requirements for three-phase current reconstruction in the overmodulation region.

[0093] Based on this, in various embodiments of the present application, a three-phase current reconstruction method capable of adapting to the overmodulation region is proposed, so that three-phase current reconstruction can be realized based on the bus current in the overmodulation region.

[0094] As Figure 5 shown, the three-phase current reconstruction method in the embodiments of the present application includes:

[0095] Step 501, calculating the three-phase duty cycles of the current PWM cycle based on the three-phase current values of the previous PWM cycle, where the phase with the largest duty cycle in the three-phase line is the maximum phase, the phase with the smallest duty cycle is the minimum phase, and the phase with the duty cycle in the middle is the middle phase.

[0096] Exemplarily, the calculation process of the three-phase duty cycles is as follows:

[0097] 1), Obtain the three-phase current values \(i_a\), \(i_b\), and \(i_c\) of the previous PWM cycle, where \(i_a\) is the phase current corresponding to the a-phase line, \(i_b\) is the phase current corresponding to the b-phase line, and \(i_c\) is the phase current corresponding to the c-phase line;

[0098] 2), Determine the magnetic field angle \(\theta\) and speed \(\omega\) of the motor rotor through the speed-position estimation module;

[0099] 3), Obtain \(i_d\) and \(i_q\) by performing Clark transformation and Park transformation on the three-phase current values \(i_a\), \(i_b\), and \(i_c\). The Clark transformation is used to transform the abc three-axis coordinate system to the stationary \(\alpha\beta\) coordinate system, and the Park transformation is used to convert the stationary \(\alpha\beta\) coordinate system to the rotating dq coordinate system. \(i_d\) is the current value of the d-axis after transformation, and \(i_q\) is the current value of the q-axis after transformation;

[0100] 4), Based on the magnetic field angle \(\theta\) and speed \(\omega\) of the motor rotor, obtain the given current values of the d-axis and q-axis. Based on the given current values and \(i_d\), \(i_q\) obtained in step 3), through PID (Proportional Integral Derivative) operation, obtain \(V_d\) and \(V_q\), where \(V_d\) is the modulation voltage of the d-axis and \(V_q\) is the modulation voltage of the q-axis;

[0101] 5), Perform inverse Park transformation on \(V_d\) and \(V_q\) to obtain \(V_{\alpha}\) and \(V_{\beta}\), where \(V_{\alpha}\) is the modulation voltage of the \(\alpha\)-axis and \(V_{\beta}\) is the modulation voltage of the \(\beta\)-axis;

[0102] 6), Perform SV vector operation on \(V_{\alpha}\) and \(V_{\beta}\) to obtain \(V_a\), \(V_b\), and \(V_c\), where \(V_a\) is the modulation voltage of the a-axis, \(V_b\) is the modulation voltage of the a-axis, and \(V_c\) is the modulation voltage of the a-axis;

[0103] 7), Calculate the three-phase duty cycle duty through the bus voltage and the obtained \(V_a\), \(V_b\), and \(V_c\) a 、duty b 、duty c ,where duty a is the duty cycle of the a-phase, duty b is the duty cycle of the b-phase, duty c is the duty cycle of the c-phase.

[0104] Step 502, Determine the high-level duration of each phase line based on the three-phase duty cycle and the duration of the PWM cycle.

[0105] Exemplarily, assuming \(T_p\) is the duration of the PWM cycle, then the high-level duration \(T_a\) of the a-phase is \(T_a = T_p\times duty\) a ,the high-level duration \(T_b\) of the b-phase is \(T_b = T_p\times duty\) b ,the high-level duration \(T_c\) of the c-phase is \(T_c = T_p\times duty\) c 。

[0106] Step 503: Determine a reconstruction strategy for reconstructing three-phase currents based on the sampled value of the bus current, based on the high-level duration of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current.

[0107] Step 504: Reconstruct the three-phase current values of the current PWM cycle based on the reconstruction strategy.

[0108] It can be understood that in the embodiments of the present application, based on the relationship between the high-level duration of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current, it is possible to reasonably distinguish whether the space vector falls into the unobservable region, and a corresponding reconstruction strategy for reconstructing three-phase currents can be determined according to the specific situation of the unobservable region. When the space vector falls into the unobservable region, three-phase current reconstruction can be achieved based on the sampled value of the bus current. Especially in the overmodulation region, three-phase current reconstruction can be achieved on the basis of satisfying the effective voltage vector. Furthermore, when the bus voltage remains unchanged, the output torque of the motor can be increased, and the utilization rate of the power supply voltage can be improved.

[0109] In some embodiments, determining a reconstruction strategy for reconstructing three-phase currents based on the sampled value of the bus current, based on the high-level duration of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current, includes:

[0110] If it is determined that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM cycle and the high-level duration of the intermediate phase is less than the minimum sampling duration, then determine that the reconstruction strategy is the first reconstruction strategy;

[0111] Correspondingly, reconstructing the three-phase current values of the current PWM cycle based on the reconstruction strategy includes:

[0112] Symmetrically reduce the action duration of the high level of the maximum phase by a minimum sampling duration within the PWM cycle;

[0113] Add a supplementary sampling cycle for supplementing current sampling after the PWM cycle. The duration of the supplementary sampling cycle is not less than the minimum sampling duration, and the maximum phase is set to high level within the supplementary sampling cycle, and the intermediate phase and the minimum phase are set to low level;

[0114] Obtain the first current value of the bus current within the PWM cycle and obtain the second current value within the supplementary sampling cycle;

[0115] Reconstruct the three-phase current values of the current PWM cycle based on the first current value and the second current value.

[0116] It can be understood that the above first reconstruction strategy corresponds to the situation where there are two relatively large duty ratios among the three-phase duty ratios. Exemplarily, such as Figure 6As shown, within the PWM cycle, the difference between the high-level duration of phase a and the high-level duration of phase b is less than the minimum sampling duration T min and the difference between the duration of the PWM cycle and the high-level duration of phase b is less than the minimum sampling duration T min , then both sides of phase a are reduced by half of T towards the middle min , that is, symmetrically reduced by one T min , after the PWM cycle, a supplementary sampling cycle for supplementary current sampling is added, and the duration of this supplementary sampling cycle is not less than T min and phase a is set to high level within the supplementary sampling cycle, and phases b and c are set to low level. In this way, a current sampling can be performed within T2 / 2 as shown Figure 6 , to obtain the first current value of the bus current, and supplementary current sampling is performed within the supplementary sampling cycle to obtain the second current value of the bus current. Then, based on the first current value and the second current value, the three-phase current values of the current PWM cycle are reconstructed

[0117] In some embodiments, based on the high-level duration of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current, a reconstruction strategy for reconstructing the three-phase current based on the sampled value of the bus current is determined, including:

[0118] If it is determined that the difference between the high-level duration of the maximum phase and the high-level duration of the middle phase is greater than or equal to the minimum sampling duration, and the high-level durations of the middle phase and the minimum phase are both less than the minimum sampling duration, then the reconstruction strategy is determined as the second reconstruction strategy;

[0119] Correspondingly, based on the reconstruction strategy, the three-phase current values of the current PWM cycle are reconstructed, including:

[0120] Within the PWM cycle, the active duration of the high level of the maximum phase is symmetrically reduced by one minimum sampling duration, and the high level of the middle phase is replaced with a low level;

[0121] After the PWM cycle, a supplementary sampling cycle for supplementary current sampling is added. The duration of the supplementary sampling cycle is not less than the minimum sampling duration, and within the supplementary sampling cycle, the maximum phase and the middle phase are set to high level, and the minimum phase is set to low level;

[0122] Obtain the first current value of the bus current within the PWM cycle and obtain the second current value within the supplementary sampling cycle;

[0123] Reconstruct the three-phase current values of the current PWM cycle based on the first current value and the second current value

[0124] It can be understood that the above second reconstruction strategy corresponds to the situation where there are two relatively small duty ratios among the three-phase duty ratios. Exemplarily, such as Figure 7As shown, within the PWM period, the difference between the high-level duration of phase a and that of phase b is greater than the minimum sampling duration T min and the high-level durations of both phase b and phase c are less than the minimum sampling duration T min , then T is reduced by half from both sides towards the middle for phase a min , that is, symmetrically reduced by one T min , and the high level of phase b is replaced with a low level. A supplementary sampling period for supplementary current sampling is added after the PWM period, and the duration of this supplementary sampling period is not less than T min and phase a and phase b are set to high level, and phase c is set to low level within the supplementary sampling period. In this way, a current sampling can be performed once within the Figure 7 shown PWM period to obtain the first current value of the bus current, and supplementary current sampling is performed within the supplementary sampling period to obtain the second current value of the bus current. Then, based on the first current value and the second current value, the three-phase current values of the current PWM period are reconstructed.

[0125] In some embodiments, based on the high-level durations of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current, determining the reconstruction strategy for reconstructing the three-phase current based on the sampled value of the bus current further includes:

[0126] If it is determined that the difference between the high-level duration of the maximum phase and that of the middle phase is less than the minimum sampling duration and the difference between the duration of the PWM period and the high-level duration of the middle phase is greater than or equal to the minimum sampling duration, then the reconstruction strategy is determined as the third reconstruction strategy;

[0127] Correspondingly, reconstructing the three-phase current values of the current PWM period based on the reconstruction strategy includes:

[0128] Forming two sampling periods not less than the minimum sampling duration based on phase-shifting processing within the PWM period to obtain the first current value and the second current value of the bus current;

[0129] Reconstructing the three-phase current values of the current PWM period based on the first current value and the second current value.

[0130] It can be understood that the above-mentioned third reconstruction strategy corresponds to a scheme for realizing two-phase current acquisition based on phase-shifting processing within the PWM period. By determining the middle phase and performing phase-shifting processing on the middle phase, it is possible to satisfy the sampling of two-phase phase currents within the PWM period.

[0131] In some embodiments, based on the high-level durations of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current, determining the reconstruction strategy for reconstructing the three-phase current based on the sampled value of the bus current further includes:

[0132] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration, and at least one of the high-level duration of the intermediate phase and the high-level duration of the minimum phase is greater than or equal to the minimum sampling duration, then determine that the reconstruction strategy is the fourth reconstruction strategy;

[0133] Correspondingly, reconstruct the three-phase current values of the current PWM cycle based on the reconstruction strategy, including:

[0134] Obtain the first current value and the second current value of the bus current based on the minimum sampling duration within the PWM cycle;

[0135] Reconstruct the three-phase current values of the current PWM cycle based on the first current value and the second current value.

[0136] It can be understood that the above fourth reconstruction strategy corresponds to the case where the space vector is in the observable region. During the PWM cycle, two-phase phase currents can be directly sampled, and the three-phase current values of the current PWM cycle are reconstructed based on the collected two-phase phase currents.

[0137] The three-phase current reconstruction method of the embodiment of the present application will be described below with a specific application example.

[0138] As Figure 8 shown, the three-phase current reconstruction method may include:

[0139] Step 801, calculate the three-phase duty cycles of the current PWM cycle and the high-level duration of each phase.

[0140] Exemplarily, the three-phase duty cycles of the current PWM cycle can be calculated based on the three-phase current values of the previous PWM cycle. Among them, the phase with the largest duty cycle in the three-phase line is the maximum phase, the phase with the smallest duty cycle is the minimum phase, and the phase with the duty cycle in the middle is the intermediate phase. Determine the high-level duration of each phase line based on the three-phase duty cycles and the duration of the PWM cycle.

[0141] Step 802, determine whether the difference between the high-level durations of the maximum phase and the intermediate phase < T min , if so, execute step 803; if not, execute step 806.

[0142] Step 803, determine whether the difference between the duration of the PWM cycle and the high-level duration of the intermediate phase < T min , if so, execute step 804; if not, execute step 805.

[0143] Step 804, reconstruct the three-phase current values of the current PWM cycle based on the first reconstruction strategy.

[0144] Step 805, reconstruct the three-phase current values of the current PWM cycle based on the third reconstruction strategy.

[0145] Step 806: Determine whether the high-level durations of both the intermediate phase and the minimum phase are <T min , if yes, execute Step 807; if no, execute Step 808.

[0146] Step 807: Reconstruct the three-phase current values of the current PWM cycle based on the second reconstruction strategy.

[0147] Step 808: Reconstruct the three-phase current values of the current PWM cycle based on the fourth reconstruction strategy.

[0148] For the specific processes of reconstructing the three-phase current values using the above first, second, third, and fourth reconstruction strategies, reference can be made to the foregoing descriptions, which will not be elaborated herein.

[0149] It can be understood that in this application example, when the voltage vector is in the overmodulation region, a supplementary sampling period for supplementing current sampling can be added after the PWM cycle. On the premise of meeting the volt-second characteristic, the supplementary voltage vector subtracted within the PWM cycle can be migrated to the supplementary sampling period, and this supplementary sampling period can meet the requirement of the minimum sampling duration of the bus current, so as to meet the requirement of three-phase current reconstruction based on the bus current in the overmodulation region. Furthermore, when the bus voltage remains unchanged, the output torque of the motor can be increased and the utilization rate of the power supply voltage can be improved.

[0150] To implement the method of this embodiment of the present application, this embodiment of the present application also provides a three-phase current reconstruction device. This three-phase current reconstruction device corresponds to the above three-phase current reconstruction method, and each step in the embodiment of the above three-phase current reconstruction method is also fully applicable to this embodiment of the three-phase current reconstruction device.

[0151] As Figure 9 shown, this three-phase current reconstruction device includes: a first determination module 901, a second determination module 902, a third determination module 903, and a current reconstruction module 904.

[0152] The first determination module 901 is used to calculate the three-phase duty cycles of the current PWM cycle based on the three-phase current values of the previous pulse width modulation (PWM) cycle. Among them, the phase with the largest duty cycle in the three-phase line is the maximum phase, the phase with the smallest duty cycle is the minimum phase, and the phase with the duty cycle in the middle is the intermediate phase;

[0153] The second determination module 902 is used to determine the high-level durations of each phase line based on the three-phase duty cycles and the duration of the PWM cycle;

[0154] The third determination module 903 is used to determine the reconstruction strategy for reconstructing the three-phase current based on the sampling value of the bus current based on the high-level durations of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current;

[0155] The current reconstruction module 904 is used to reconstruct the three-phase current values of the current PWM cycle based on a reconstruction strategy.

[0156] In some embodiments, the third determination module 903 is specifically configured to:

[0157] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM cycle and the high-level duration of the intermediate phase is less than the minimum sampling duration, and then determine that the reconstruction strategy is the first reconstruction strategy;

[0158] Correspondingly, the current reconstruction module 904 is specifically configured to:

[0159] Symmetrically reduce the action duration of the high level of the maximum phase by a minimum sampling duration within the PWM cycle;

[0160] Add a supplementary sampling period for supplementary current sampling after the PWM cycle, the duration of the supplementary sampling period is not less than the minimum sampling duration, and the maximum phase is set to high level and the intermediate phase and the minimum phase are set to low level within the supplementary sampling period;

[0161] Obtain the first current value of the bus current within the PWM cycle and obtain the second current value within the supplementary sampling period;

[0162] Reconstruct the three-phase current values of the current PWM cycle based on the first current value and the second current value.

[0163] In some embodiments, the third determination module 903 is specifically configured to:

[0164] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration and the high-level durations of the intermediate phase and the minimum phase are both less than the minimum sampling duration, and then determine that the reconstruction strategy is the second reconstruction strategy;

[0165] Correspondingly, the current reconstruction module 904 is specifically configured to:

[0166] Symmetrically reduce the action duration of the high level of the maximum phase by a minimum sampling duration within the PWM cycle, and replace the high level of the intermediate phase with a low level;

[0167] Add a supplementary sampling period for supplementary current sampling after the PWM cycle, the duration of the supplementary sampling period is not less than the minimum sampling duration, and the maximum phase and the intermediate phase are set to high level and the minimum phase is set to low level within the supplementary sampling period;

[0168] Obtain the first current value of the bus current within the PWM cycle and obtain the second current value within the supplementary sampling period;

[0169] Reconstruct the three-phase current values of the current PWM cycle based on the first current value and the second current value.

[0170] In some embodiments, the third determination module 903 is further configured to:

[0171] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM period and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration, and then determine that the reconstruction strategy is the third reconstruction strategy;

[0172] Correspondingly, the current reconstruction module 904 is specifically configured to:

[0173] Form two sampling periods not less than the minimum sampling duration based on phase shift processing within the PWM period, and obtain a first current value and a second current value of the bus current;

[0174] Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

[0175] In some embodiments, the third determination module 903 is further configured to:

[0176] Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration and at least one of the high-level duration of the intermediate phase and the high-level duration of the minimum phase is greater than or equal to the minimum sampling duration, and then determine that the reconstruction strategy is the fourth reconstruction strategy;

[0177] Correspondingly, the current reconstruction module 904 is specifically configured to:

[0178] Obtain a first current value and a second current value of the bus current based on the minimum sampling duration within the PWM period;

[0179] Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

[0180] In practical applications, the first determination module 901, the second determination module 902, the third determination module 903, and the current reconstruction module 904 can be implemented by the processor of the three-phase current reconstruction device. Of course, the processor needs to run the computer program in the memory to implement its functions.

[0181] It should be noted that: when the three-phase current reconstruction device provided in the above embodiments performs three-phase current reconstruction, only the above-mentioned division of each program module is used for illustration. In practical applications, the above-mentioned processing can be allocated to different program modules according to needs, that is, the internal structure of the device is divided into different program modules to complete all or part of the above-described processing. In addition, the three-phase current reconstruction device provided in the above embodiments and the embodiments of the three-phase current reconstruction method belong to the same concept, and the specific implementation process is detailed in the method embodiments and will not be elaborated here.

[0182] Based on the hardware implementation of the above program modules and to implement the method of the embodiments of the present application, the embodiments of the present application further provide a three-phase current reconstruction device. Figure 10 Only the exemplary structure of the three-phase current reconstruction device is shown rather than all structures, and the partial structure or all structures shown can be implemented as needed. Figure 10 The partial structure or all structures shown.

[0183] As Figure 10 shown, the three-phase current reconstruction device 1000 provided by the embodiments of the present application includes: at least one processor 1001, a memory 1002, and a user interface 1003. Each component in the three-phase current reconstruction device 1000 is coupled together through a bus system 1004. It can be understood that the bus system 1004 is used to realize the connection and communication between these components. In addition to including a data bus, the bus system 1004 also includes a power bus, a control bus, and a status signal bus. However, for the sake of clear illustration, in Figure 10 all kinds of buses are labeled as the bus system 1004.

[0184] Exemplarily, the three-phase current reconstruction device 1000 further includes: a bus current acquisition device, configured to obtain a sampling value of the bus current and send the sampling value to the processor 1001. For example, the bus current acquisition device can be a single-resistor sampling circuit as Figure 1 shown.

[0185] Among them, the user interface 1003 may include a display, a keyboard, a mouse, a trackball, a click wheel, a button, a touchpad, or a touch screen, etc.

[0186] The memory 1002 in the embodiments of the present application is used to store various types of data to support the operation of the three-phase current reconstruction device. Examples of these data include: any computer program for operating on the three-phase current reconstruction device.

[0187] The three-phase current reconstruction method disclosed in the embodiments of the present application can be applied to the processor 1001 or implemented by the processor 1001. The processor 1001 may be an integrated circuit chip with signal processing capabilities. During implementation, the steps of the three-phase current reconstruction method can be completed by the integrated logic circuit of the hardware in the processor 1001 or instructions in software form. The aforementioned processor 1001 may be a general-purpose processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The processor 1001 can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or any conventional processor, etc. Combining the steps of the method disclosed in the embodiments of the present application can be directly embodied as being executed and completed by the hardware decoding processor, or executed and completed by the combination of the hardware and software modules in the decoding processor. The software module may be located in the storage medium, and this storage medium is located in the memory 1002. The processor 1001 reads the information in the memory 1002 and combines its hardware to complete the steps of the three-phase current reconstruction method provided in the embodiments of the present application.

[0188] In an exemplary embodiment, the three-phase current reconstruction device can be implemented by one or more application-specific integrated circuits (ASICs, Application Specific Integrated Circuits), DSPs, programmable logic devices (PLDs, Programmable Logic Devices), complex programmable logic devices (CPLDs, Complex Programmable Logic Devices), field programmable gate arrays (FPGAs, Field Programmable Gate Arrays), general-purpose processors, controllers, microcontroller units (MCUs, Micro Controller Units), microprocessors (Microprocessors), or other electronic components, and is used to execute the foregoing method.

[0189] It can be understood that the memory 1002 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM, Read Only Memory), a programmable read-only memory (PROM, Programmable Read-Only Memory), an erasable programmable read-only memory (EPROM, Erasable Programmable Read-Only Memory), an electrically erasable programmable read-only memory (EEPROM, Electrically Erasable Programmable Read-Only Memory), a ferromagnetic random access memory (FRAM, ferromagnetic random access memory), a flash memory (Flash Memory), a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM, Compact Disc Read-Only Memory); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM, Random Access Memory), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as a static random access memory (SRAM, Static Random Access Memory), a synchronous static random access memory (SSRAM, Synchronous Static Random Access Memory), a dynamic random access memory (DRAM, Dynamic Random Access Memory), a synchronous dynamic random access memory (SDRAM, Synchronous Dynamic Random Access Memory), a double data rate synchronous dynamic random access memory (DDR SDRAM, Double Data Rate Synchronous Dynamic Random Access Memory), an enhanced synchronous dynamic random access memory (ESDRAM, Enhanced Synchronous Dynamic Random Access Memory), a sync link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and a direct rambus random access memory (DRRAM, Direct Rambus Random Access Memory).The memories described in the embodiments of the present application are intended to include, but are not limited to, these and any other suitable types of memories.

[0190] In an exemplary embodiment, the embodiments of the present application also provide a storage medium, namely a computer storage medium, specifically a computer-readable storage medium, such as a memory 1002 storing a computer program. The above computer program can be executed by a processor 1001 of a three-phase current reconstruction device to complete the steps described in the method of the embodiments of the present application. The computer-readable storage medium can be a memory such as ROM, PROM, EPROM, EEPROM, Flash Memory, magnetic surface memory, optical disc, or CD-ROM.

[0191] It should be noted that: "first", "second", etc. are used to distinguish similar objects and do not necessarily have to be used to describe a specific order or sequence.

[0192] In addition, the technical solutions described in the embodiments of the present application can be arbitrarily combined without conflict.

[0193] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A three-phase current reconstruction method, characterized in that, it includes: Calculating the three-phase duty cycles of the current PWM cycle based on the three-phase current values of the previous pulse width modulation (PWM) cycle. Among them, the phase with the largest duty cycle in the three-phase line is the maximum phase, the phase with the smallest duty cycle is the minimum phase, and the phase with the duty cycle in the middle is the intermediate phase; Determining the high-level durations of each phase line based on the three-phase duty cycles and the duration of the PWM cycle; Determining a reconstruction strategy for reconstructing the three-phase current based on the sampling value of the bus current based on the high-level durations of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current; Reconstructing the three-phase current values of the current PWM cycle based on the reconstruction strategy; Among them, the determining the reconstruction strategy for reconstructing the three-phase current based on the sampling value of the bus current based on the high-level durations of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current includes: Determining that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM cycle and the high-level duration of the intermediate phase is less than the minimum sampling duration, then determining that the reconstruction strategy is the first reconstruction strategy; Correspondingly, the reconstructing the three-phase current values of the current PWM cycle based on the reconstruction strategy includes: Symmetrically reducing the action duration of the high level of the maximum phase by one minimum sampling duration within the PWM cycle; Adding a supplementary sampling cycle for supplementary current sampling after the PWM cycle. The duration of the supplementary sampling cycle is not less than the minimum sampling duration, and the maximum phase is set to high level within the supplementary sampling cycle, and the intermediate phase and the minimum phase are set to low level; Obtaining a first current value of the bus current within the PWM cycle and obtaining a second current value within the supplementary sampling cycle; Reconstructing the three-phase current values of the current PWM cycle based on the first current value and the second current value.

2. The method according to claim 1, characterized in that, the determining the reconstruction strategy for reconstructing the three-phase current based on the sampling value of the bus current based on the high-level durations of each phase line, the duration of the PWM cycle, and the minimum sampling duration of the bus current further includes: Determining that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration and the high-level durations of both the intermediate phase and the minimum phase are less than the minimum sampling duration, then determining that the reconstruction strategy is the second reconstruction strategy; Correspondingly, the reconstructing the three-phase current values of the current PWM cycle based on the reconstruction strategy includes: Symmetrically reducing the action duration of the high level of the maximum phase by one minimum sampling duration within the PWM cycle and replacing the high level of the intermediate phase with a low level; Adding a supplementary sampling cycle for supplementary current sampling after the PWM cycle. The duration of the supplementary sampling cycle is not less than the minimum sampling duration, and the maximum phase and the intermediate phase are set to high level within the supplementary sampling cycle, and the minimum phase is set to low level; Obtain the first current value of the bus current within the PWM period and obtain the second current value within the supplementary sampling period; Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

3. The method according to claim 1 or 2, characterized in that the determining of the reconstruction strategy for reconstructing the three-phase current based on the sampled value of the bus current based on the high-level duration of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current further includes: if it is determined that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM period and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration, then determine the reconstruction strategy as the third reconstruction strategy; Correspondingly, the reconstructing of the three-phase current values of the current PWM period based on the reconstruction strategy includes: Within the PWM period, form two sampling periods not less than the minimum sampling duration based on phase-shift processing, and obtain the first current value and the second current value of the bus current; Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

4. The method according to claim 1 or 2, characterized in that the determining of the reconstruction strategy for reconstructing the three-phase current based on the sampled value of the bus current based on the high-level duration of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current further includes: if it is determined that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration and at least one of the high-level duration of the intermediate phase and the high-level duration of the minimum phase is greater than or equal to the minimum sampling duration, then determine the reconstruction strategy as the fourth reconstruction strategy; Correspondingly, the reconstructing of the three-phase current values of the current PWM period based on the reconstruction strategy includes: Within the PWM period, obtain the first current value and the second current value of the bus current based on the minimum sampling duration; Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

5. A three-phase current reconstruction device, characterized in that it includes: A first determination module, configured to calculate the three-phase duty cycles of the current PWM period based on the three-phase current values of the previous pulse width modulation (PWM) period, wherein, among the three-phase lines, the phase with the largest duty cycle is the maximum phase, the phase with the smallest duty cycle is the minimum phase, and the phase with the duty cycle in the middle is the intermediate phase; A second determination module, configured to determine the high-level duration of each phase line based on the three-phase duty cycles and the duration of the PWM period; A third determination module, configured to determine the reconstruction strategy for reconstructing the three-phase current based on the sampled value of the bus current based on the high-level duration of each phase line, the duration of the PWM period, and the minimum sampling duration of the bus current; A current reconstruction module, configured to reconstruct the three-phase current values of the current PWM period based on the reconstruction strategy; The third determination module is specifically configured to: Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM period and the high-level duration of the intermediate phase is less than the minimum sampling duration, then determine that the reconstruction strategy is the first reconstruction strategy; Correspondingly, the current reconstruction module is specifically configured to: Symmetrically reduce the action duration of the high level of the maximum phase by one minimum sampling duration within the PWM period; Add a supplementary sampling period for supplementary current sampling after the PWM period, the duration of the supplementary sampling period is not less than the minimum sampling duration, and the maximum phase is set to high level within the supplementary sampling period, and the intermediate phase and the minimum phase are set to low level; Obtain a first current value of the bus current within the PWM period and obtain a second current value within the supplementary sampling period; Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

6. The three-phase current reconstruction device according to claim 5, characterized in that, The third determination module is specifically configured to: Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration and the high-level durations of the intermediate phase and the minimum phase are both less than the minimum sampling duration, then determine that the reconstruction strategy is the second reconstruction strategy; Correspondingly, the current reconstruction module is specifically configured to: Symmetrically reduce the action duration of the high level of the maximum phase by one minimum sampling duration within the PWM period, and replace the high level of the intermediate phase with a low level; Add a supplementary sampling period for supplementary current sampling after the PWM period, the duration of the supplementary sampling period is not less than the minimum sampling duration, and the maximum phase and the intermediate phase are set to high level within the supplementary sampling period, and the minimum phase is set to low level; Obtain a first current value of the bus current within the PWM period and obtain a second current value within the supplementary sampling period; Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

7. The three-phase current reconstruction device according to claim 5 or 6, characterized in that, The third determination module is further configured to: Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is less than the minimum sampling duration and the difference between the duration of the PWM period and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration, then determine that the reconstruction strategy is the third reconstruction strategy; Correspondingly, the current reconstruction module is specifically configured to: Form two sampling periods not less than the minimum sampling duration based on phase-shift processing within the PWM period, and obtain a first current value and a second current value of the bus current; Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

8. The three-phase current reconstruction device according to claim 5 or 6, characterized in that, The third determination module is further configured to: Determine that the difference between the high-level duration of the maximum phase and the high-level duration of the intermediate phase is greater than or equal to the minimum sampling duration and at least one of the high-level duration of the intermediate phase and the high-level duration of the minimum phase is greater than or equal to the minimum sampling duration, then determine that the reconstruction strategy is the fourth reconstruction strategy; Correspondingly, the current reconstruction module is specifically configured to: Obtain a first current value and a second current value of the bus current based on the minimum sampling duration within the PWM period; Reconstruct the three-phase current values of the current PWM period based on the first current value and the second current value.

9. A three-phase current reconstruction device, Characterized in that, It includes: A processor and a memory for storing a computer program that can run on the processor, wherein, The processor, when running the computer program, executes the steps of the method according to any one of claims 1 to 4.

10. The three-phase current reconstruction device according to claim 9, Characterized in that, It further includes: A bus current acquisition device for acquiring a sampling value of the bus current and sending the sampling value to the processor.

11. A storage medium, on which a computer program is stored, Characterized in that, When the computer program is executed by the processor, the steps of the method according to any one of claims 1 to 4 are implemented.

Citation Information

Patent Citations

  • Single current sensor based three-phase current reconstruction method and device

    CN105577062A