A method for preparing a MEMS resonator
By using SOI substrate etching and vacuum bonding methods in the manufacturing of MEMS resonators, the problems of manufacturing process consistency and yield in the prior art are solved, and efficient preparation of MEMS resonators is achieved, which is suitable for large-scale production.
Patent Information
- Application Number
- CN202111184562.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-10-11
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2041-10-11
AI Technical Summary
The existing MEMS resonator manufacturing technology is difficult to meet the industrialized large-scale manufacturing needs of high-end devices, and there are problems such as manufacturing process consistency, yield, vacuum packaging methods and costs.
A method for preparing a MEMS resonator is proposed, including obtaining an SOI substrate, etching to form a packaging ring and a chip portion, etching the chip portion to form an input electrode, a resonant structure and an output electrode, etching the buried oxygen layer, preparing a packaging cover sheet and achieving airtight packaging through vacuum bonding.
This method improves the yield of MEMS resonators, facilitates large-scale production, and facilitates the preparation of small-size, high-performance, high-stability, and low-parasitic MEMS resonators.
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Figure CN113872545B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of micro-nano radio frequency electromechanical systems, and in particular to a method for preparing a MEMS resonator. Background Art
[0002] High-end MEMS devices, such as resonant sensors, filters, clock devices, etc., are widely used in consumer electronics, defense, aerospace, satellite communications and other fields. Micro-nano resonators are the core components of high-end MEMS devices. The resonant frequency and Q value of MEMS resonators are key indicators, among which the Q value determines the frequency stability of the resonator. MEMS resonators have the advantages of high Q value, easy integration with IC circuits, low power consumption, high reliability, and mass production.
[0003] At present, the transducer methods used by MEMS resonators mainly include piezoelectric conversion and electrostatic conversion. Among them, electrostatic resonators are mainly based on silicon materials, using electrodes and resonant structures to form parallel plate capacitors, and driving device vibrations through electrostatic forces; electrostatic MEMS resonators have the advantages of high f×Q value, easy integration, low power consumption, high reliability, and batch manufacturing, so they have become an ideal structural unit for building high-end MEMS devices.
[0004] So far, the manufacturing technology of MEMS resonators cannot meet the needs of large-scale manufacturing of high-end device industrialization. Engineering issues such as manufacturing process consistency, yield rate, vacuum packaging methods and costs need to be broken through. In addition, vacuum airtight packaging is a necessary condition to ensure the normal operation of high-end resonators. Summary of the invention
[0005] The main purpose of the present invention is to propose a method for preparing a MEMS resonator, aiming to solve the problem that the MEMS resonator is difficult to manufacture.
[0006] To achieve the above object, the present invention provides a method for preparing a MEMS resonator, comprising the following steps:
[0007] Obtaining an SOI substrate, wherein the SOI substrate comprises a top silicon layer, a buried oxide layer and a substrate layer arranged in sequence from top to bottom;
[0008] Etching the top silicon layer to form a packaging ring and a chip portion within the packaging ring;
[0009] Etching the chip portion to form an input electrode, a resonant structure, and an output electrode that are sequentially arranged at intervals in a horizontal direction, wherein a capacitor gap is formed between the input electrode, the resonant structure, and the output electrode;
[0010] From the capacitor gap, the buried oxide layer under the resonant structure is removed by etching;
[0011] A packaging cover sheet is prepared, and the packaging cover sheet and the packaging ring are vacuum bonded to form a MEMS resonator.
[0012] Optionally, before the step of removing the buried oxide layer under the resonant structure through the capacitor gap by etching, the method further includes:
[0013] growing a thermal oxide layer on the top silicon layer;
[0014] The thermal oxide layer is removed by etching.
[0015] Optionally, the step of preparing the package cover sheet includes:
[0016] Obtain a silicon substrate, and arrange two silicon column vertical leads and a coaxial shielding layer on the silicon substrate corresponding to the input electrode and the output electrode;
[0017] The silicon substrate comprises a packaging surface and an exposed surface which are arranged opposite to each other, a packaging cavity is prepared on the packaging surface, and an insulating layer is grown and patterned on the exposed surface, wherein the packaging cavity is located between two vertical leads of the silicon pillars;
[0018] In-plane leads and electrical signal application pads are prepared on the exposed surface, and packaging pads and vertical lead pads are respectively prepared on the packaging surface corresponding to the packaging ring and the silicon column vertical leads.
[0019] Optionally, the step of obtaining a silicon substrate, and providing two silicon column vertical leads and a coaxial shielding layer on the silicon substrate corresponding to the input electrode and the output electrode includes:
[0020] Obtain a silicon substrate, and etch two annular grooves on the silicon substrate corresponding to the input electrode and the output electrode to form two vertical leads of the silicon column;
[0021] Filling insulating material in the two annular grooves to form the coaxial shielding layer;
[0022] The silicon substrate is ground to expose the silicon column vertical leads and the coaxial shielding layer on both side end surfaces of the silicon substrate.
[0023] Optionally, the insulating material includes any one of glass and silicon nitride.
[0024] Optionally, the method of preparing the in-plane leads, the electrical signal applying pads, the packaging pads and the vertical lead pads comprises any one of stripping, etching or electroplating.
[0025] Optionally, the top-view cross-section of the resonant structure includes any one of a circular, rectangular and annular shape; and / or,
[0026] In the horizontal direction, the resonant structure includes any one of a straight beam and a curved beam.
[0027] Optionally, the material of the top silicon layer and the substrate layer includes any one of Ge, SiC and III-V semiconductor materials; and / or,
[0028] The materials of the top silicon layer and the substrate layer are n-type or p-type doped.
[0029] Optionally, the capacitor gap thickness is between 0 and 2 μm; and / or,
[0030] The capacitor gap is at least partially filled with a solid dielectric material.
[0031] Optionally, the vacuum bonding includes any one of anodic bonding, eutectic bonding and intermediate layer bonding.
[0032] In the technical solution provided by the present invention, the top silicon layer is used to define the resonant structure, electrodes, capacitor gap and packaging ring, and the buried oxide layer is used as a sacrificial layer. After being released, the resonant structure is suspended in the air, and the packaging cover and the packaging ring are vacuum bonded to achieve airtight packaging; the process flow is simple and reliable, which improves the yield of MEMS resonators, facilitates large-scale production, and is also convenient for preparing small-size, high-performance, high-stability, and low-parasitic MEMS resonators. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 A schematic diagram of the cross-sectional structure of the MEMS resonator after packaging provided by the present invention;
[0034] Figure 2 Schematic diagram of the cross-sectional structure of the SOI wafer;
[0035] Figure 3 It is a schematic diagram of the cross-sectional structure of the SOI wafer after etching;
[0036] Figure 4 It is a schematic diagram of the cross-sectional structure of the SOI wafer after etching;
[0037] Figure 5 is a schematic diagram of a cross-sectional structure of a silicon substrate;
[0038] Figure 6 is a schematic diagram of the cross-sectional structure of the package cover;
[0039] Figure 7 Schematic diagram of the cross-sectional structure of a silicon substrate filled with insulating material.
[0040] Description of Figure Numbers:
[0041]
[0042] DETAILED DESCRIPTION
[0043] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
[0044] It should be noted that if a directional indication is involved in the embodiment of the present invention, the directional indication is only used to explain the relative position relationship, movement status, etc. between the components in a certain specific posture. If the specific posture changes, the directional indication will also change accordingly.
[0045] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or suggesting their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.
[0046] See also Figure 1 The present invention provides a MEMS resonator, wherein the MEMS resonator includes a resonant structure 1, an input electrode 2, an output electrode 3, a capacitor gap 4 and a packaging ring 5.
[0047] The basic working principle of the MEMS resonator is as follows: at the input end, an AC voltage and a DC bias voltage are applied to the input electrode 2 and the resonant structure 1 respectively, and the potential difference between the two is used to generate an alternating electrostatic force to excite the resonant structure to vibrate; at the output end, the width of the capacitive gap between the resonant structure 1 and the output electrode 3 is modulated by the vibration of the resonator, and the output electrode 3 extracts an alternating current.
[0048] See also Figures 2 to 4 The present invention provides a method for preparing a MEMS resonator, comprising the following steps:
[0049] S10, obtaining an SOI substrate, wherein the SOI substrate comprises a top silicon layer 14, a buried oxide layer 15 and a substrate layer 16 arranged in sequence from top to bottom;
[0050] S20, etching the top silicon layer 14 to form a packaging ring 5 and a chip portion within the packaging ring;
[0051] S30, etching the chip portion to form an input electrode 2, a resonant structure 1, and an output electrode 3 that are sequentially arranged at intervals in a horizontal direction, wherein a capacitor gap 4 is formed between the input electrode 2, the resonant structure 1, and the output electrode 1;
[0052] S40, removing the buried oxide layer under the resonant structure 1 from the capacitor gap 4 by etching;
[0053] S50, preparing a packaging cover sheet, and vacuum bonding the packaging cover sheet and the packaging ring 5 to form a MEMS resonator.
[0054] In the technical solution provided by the present invention, the top silicon layer is used to define the resonant structure, electrodes, capacitor gaps and packaging rings, and the buried oxide layer is used as a sacrificial layer. The buried oxide layer is removed by releasing the sacrificial layer, and the resonant structure is suspended after the release. The packaging cover is airtightly packaged by vacuum bonding. The process is simple and reliable, which improves the yield of MEMS resonators, facilitates large-scale production, and is also convenient for preparing small-size, high-performance, high-stability, and low-parasitic MEMS resonators.
[0055] Furthermore, before step S40, the following steps are also included:
[0056] S401, growing a thermal oxide layer on the top silicon layer 14;
[0057] S402, removing the thermal oxide layer by etching.
[0058] The sidewall roughness of the resonant structure is reduced by growing a layer of thermal oxide and etching.
[0059] On the other hand, see Figures 5 and 6 The steps of preparing the package cover sheet include:
[0060] S51, obtaining a silicon substrate 17, and arranging two silicon column vertical leads 7 and a coaxial shielding layer 8 on the silicon substrate 17 corresponding to the input electrode 2 and the output electrode 3;
[0061] S52, the silicon substrate 17 comprises a packaging surface and an exposed surface which are arranged opposite to each other, a packaging cavity 6 is formed on the packaging surface, an insulating layer is grown and patterned on the exposed surface, wherein the packaging cavity 6 is between the two silicon column vertical leads 7;
[0062] S53, prepare in-plane leads 10 and electrical signal application pads 11 on the exposed surface, and prepare packaging pads 12 and vertical lead pads 13 on the packaging surface corresponding to the packaging ring 5 and the silicon column vertical leads 7, respectively.
[0063] This facilitates packaging of the packaging cover and the SOI substrate.
[0064] It should be noted that the method of preparing the packaging cavity 6 includes any one of wet etching or dry etching, and can also be anisotropic or isotropic etching; in addition, in the preparation of the in-plane leads 10 and the electrical signal application pads 11 on the exposed surface, it is necessary to grow a surface dielectric layer 9 on the exposed surface.
[0065] Further, please participate Figure 7 , step S51 comprises:
[0066] S511, obtaining a silicon substrate 17, and etching two annular grooves on the silicon substrate 17 corresponding to the input electrode 2 and the output electrode 3 to form two silicon column vertical leads 7;
[0067] S512, filling the two annular grooves with insulating material 18 to form the coaxial shielding layer 8;
[0068] S513 , grinding the silicon substrate 17 to expose the silicon column vertical leads 7 and the coaxial shielding layer 8 on both side end surfaces of the silicon substrate 17 .
[0069] It should be noted that the insulating material 18 includes any one of glass and silicon nitride; in addition, the silicon column vertical lead 7 is electrically connected to the in-plane lead 10; the silicon column vertical lead 7 is arranged corresponding to the input electrode 2 and the output electrode 3, thereby realizing the electrical connection between the in-plane lead 10 and the input electrode 2 and the output electrode 3.
[0070] On the other hand, the method of preparing the in-plane leads 10, the electrical signal applying pads 11, the package pads 12, and the vertical lead pads 13 includes any one of stripping, etching, or electroplating.
[0071] In this embodiment, the resonant structure 1 is a vibrating mechanical frequency-selective structure, and the top-view cross-section of the resonant structure 1 includes any one of a circular, rectangular, and annular shape.
[0072] Along the horizontal direction, the resonant structure 1 includes any one of a straight beam and a curved beam.
[0073] It should be noted that the top view cross section and the horizontal setting of the resonant structure 1 may exist either alone or simultaneously. The combination of the cross section and the horizontal shape is selected according to the actual situation, and no specific limitation is made here.
[0074] In this embodiment, the material of the top silicon layer 14 and the substrate layer 16 includes any one of Ge, SiC and III-V semiconductor materials.
[0075] The materials of the top silicon layer 14 and the substrate layer 16 are n-type or p-type doped.
[0076] It should be noted that the above materials can be selected one by one or they can be present at the same time, and no specific limitation is made here.
[0077] In addition, it should be noted that the buried oxide layer 15 has a thickness of 0 to 2 μm.
[0078] On the other hand, the thickness of the capacitor gap 4 is between 0 and 2 μm.
[0079] The capacitor gap 4 is at least partially filled with a solid dielectric material.
[0080] It should be noted that the two related features of the capacitor gap can be selected to exist alone, that is, the capacitor gap 4 is not filled with solid dielectric material; when they exist at the same time, at least partially filled with solid dielectric material includes partially filled and fully filled. No specific limitation is made here.
[0081] It should be noted that the solid dielectric includes HfO2, SiNx or a composite dielectric material, which is not specifically limited here.
[0082] In addition, the vacuum bonding includes any one of anodic bonding, eutectic bonding and interlayer bonding.
[0083] In order to make the method steps described in the present invention clearer and more understandable, a specific embodiment of preparation is provided below. Taking the MEMS resonator provided by the present invention as an example, the method for preparing the MEMS resonator provided by the present invention mainly includes the following steps:
[0084] 1. Prepare a SOI wafer, the SOI wafer structure includes a top silicon layer 14, a buried oxide layer 15, and a substrate layer 16, and etch to form a resonant structure 1, a micro-nano capacitor gap 4, and a resonator packaging ring 5;
[0085] 2. Grow a layer of thermal oxide and remove it by wet etching;
[0086] 3. Use HF solution to corrode SiO2 on the side wall of the resonator and the buried oxide at the bottom of the device to form a capacitor gap 4 and leave the device suspended.
[0087] 4. Prepare a silicon substrate 17, and etch silicon column vertical leads 7 on the silicon substrate;
[0088] 5. Fill the groove around the silicon column vertical lead 7 with insulating glass 18 to form a coaxial shielding layer 8;
[0089] 6. Grind both sides of the silicon substrate until the silicon pillars 7 and the coaxial shielding layer 8 are exposed on both sides;
[0090] 7. Etch a packaging cavity 6 on one side of the silicon substrate, and grow and pattern an insulating layer on the cavity-free surface.
[0091] 8. On both sides of the package cover, by sputtering and patterning a metal film, in-plane leads 10, cover electrical signal application pads 11, cover package pads 12, and cover vertical lead pads 13 are formed.
[0092] 9. After the resonator and cover are prepared separately, vacuum packaging is completed by bonding.
[0093] The specific embodiments described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.
Claims
1. A method for preparing a MEMS resonator, characterized in that: The following steps are involved: Obtaining an SOI substrate, wherein the SOI substrate comprises a top silicon layer, a buried oxide layer and a substrate layer arranged in sequence from top to bottom; Etching the top silicon layer to form a packaging ring and a chip portion within the packaging ring; Etching the chip portion to form an input electrode, a resonant structure, and an output electrode that are sequentially arranged in a horizontal direction and spaced apart from each other, wherein a capacitive gap is formed between the input electrode and the output electrode and the resonant structure; Growing a thermal oxide layer on the top silicon layer, and removing the thermal oxide layer by wet etching; From the capacitor gap, HF is used to etch SiO2 on the side wall of the resonator, and the buried oxide layer under the resonant structure at the bottom of the device is etched away to form a capacitor gap and make the device suspended; preparing a packaging cover sheet, vacuum bonding the packaging cover sheet and the packaging ring to form a MEMS resonator, The steps of preparing the packaging cover sheet include: Obtain a silicon substrate, and arrange two silicon column vertical leads and a coaxial shielding layer on the silicon substrate corresponding to the input electrode and the output electrode; The silicon substrate comprises a packaging surface and an exposed surface which are arranged opposite to each other, a packaging cavity is prepared on the packaging surface, and an insulating layer is grown and patterned on the exposed surface, wherein the packaging cavity is located between two vertical leads of the silicon pillars; In-plane leads and electrical signal application pads are prepared on the exposed surface, and packaging pads and vertical lead pads are respectively prepared on the packaging surface corresponding to the packaging ring and the silicon column vertical leads.
2. The method for preparing a MEMS resonator according to claim 1, characterized in that: The steps of obtaining a silicon substrate, and providing two silicon column vertical leads and a coaxial shielding layer on the silicon substrate corresponding to the input electrode and the output electrode include: Obtain a silicon substrate, and etch two annular grooves on the silicon substrate corresponding to the input electrode and the output electrode to form two vertical leads of the silicon column; Filling insulating material in the two annular grooves to form the coaxial shielding layer; The silicon substrate is ground to expose the silicon column vertical leads and the coaxial shielding layer on both side end surfaces of the silicon substrate.
3. The method for preparing a MEMS resonator according to claim 2, characterized in that: The insulating material includes any one of glass and silicon nitride.
4. The method for preparing a MEMS resonator according to claim 1, characterized in that: The method of preparing the in-plane leads, the electrical signal applying pads, the package pads, and the vertical lead pads includes any one of stripping, etching, or electroplating.
5. The method for preparing a MEMS resonator according to claim 1, characterized in that: The top view cross-section of the resonant structure includes any one of a circular, rectangular and annular shape; and / or, In the horizontal direction, the resonant structure includes any one of a straight beam and a curved beam.
6. The method for preparing a MEMS resonator according to claim 1, characterized in that: The materials of the top silicon layer and the substrate layer include any one of Ge, SiC and III-V group semiconductor materials; and / or, The materials of the top silicon layer and the substrate layer are n-type or p-type doped.
7. The method for preparing a MEMS resonator according to claim 1, characterized in that: The capacitance gap thickness is between 0 and 2 μm; and / or, The capacitor gap is at least partially filled with a solid dielectric material.
Citation Information
Patent Citations
Micro-nano radio frequency device and preparation method thereof
CN113086943A