Wafer laser repair alignment offset correction method and device

Abstract

This application relates to the field of wafer technology and provides a method and apparatus for correcting alignment misalignment during wafer laser repair. In the embodiments of this application, a wafer region is obtained, and the wafer region is divided into target regions according to a preset method; a target block is selected from the target region, and the alignment misalignment degree of the target block is determined; when the alignment misalignment degree of the target block is greater than a preset misalignment threshold, the target block is corrected and compensated for alignment based on preset alignment points in the target block; when the alignment misalignment degree of the corrected target block is less than or equal to the preset misalignment threshold, laser repair is performed on the target region corresponding to the corrected target block, thereby improving chip yield.

Description

Technical Field

[0001] This application belongs to the field of wafer technology, and in particular relates to a method and apparatus for correcting alignment misalignment during wafer laser repair. Background Technology

[0002] With societal development, electronic products such as mobile phones, computers, and televisions are becoming increasingly common in people's lives. Chips are a crucial component of these products, responsible for computation and storage. As wafer fabrication technology becomes increasingly refined, chip sizes are also shrinking. Therefore, laser repair of chips plays a vital role. However, factors such as differences in the refractive index of the dielectric layer, wafer warping, and variations in the thickness of the films within the chip can cause the wafer to shift relative to the machine's calibration. If laser repair is performed on individual chips within the wafer when this shift is too significant, it will result in a low chip yield. Summary of the Invention

[0003] This application provides a method and apparatus for correcting alignment misalignment during wafer laser repair, which can solve the problem of low chip yield.

[0004] In a first aspect, embodiments of this application provide a method for correcting alignment misalignment during wafer laser repair, including:

[0005] Obtain the wafer region of the wafer, and divide the wafer region into target regions in a preset manner;

[0006] Select a target block from the target region and determine the alignment offset of the target block;

[0007] When the alignment offset of the target block is greater than the preset offset threshold, the target block is corrected and compensated according to the preset alignment point in the target block;

[0008] When the alignment offset of the target block after alignment correction and compensation is less than or equal to a preset offset threshold, laser repair is performed on the target area corresponding to the target block after alignment correction and compensation.

[0009] Secondly, embodiments of this application provide an alignment misalignment correction device for wafer laser repair, comprising:

[0010] The partitioning module is used to obtain the wafer region of the wafer and partition the wafer region into target regions in a preset manner;

[0011] The selection module is used to select a target block from the target region and determine the alignment offset of the target block;

[0012] The correction and compensation module is used to perform alignment correction and compensation on the target block according to the preset alignment point in the target block when the alignment offset of the target block is greater than the preset offset threshold.

[0013] The laser repair module is used to perform laser repair on the target area corresponding to the aligned target block when the alignment offset of the aligned target block is less than or equal to a preset offset threshold.

[0014] Thirdly, embodiments of this application provide a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of any of the above-mentioned wafer laser repair alignment offset correction methods.

[0015] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of any of the above-described methods for correcting alignment offsets during wafer laser repair.

[0016] Fifthly, embodiments of this application provide a computer program product that, when run on a terminal device, causes the terminal device to execute any of the alignment offset correction methods for wafer laser repair described in the first aspect.

[0017] In this embodiment, a wafer region is obtained, and the wafer region is divided into target regions in a preset manner to facilitate the determination of the alignment offset degree of the target regions of the wafer. This allows for accurate adjustment of the alignment offset degree of the chips corresponding to the target regions of the wafer. A target block is selected from the target regions, and the alignment offset degree of the target block is determined. This alignment offset degree of the target block is used as the alignment offset degree of the target region. When the alignment offset degree of the target block is greater than a preset offset threshold, it indicates that the alignment offset degree of the target region is too large. In this case, the target block needs to be aligned and compensated according to a preset alignment point to reduce the alignment offset degree of the target region. This causes the chips contained in the target region to undergo offset correction. When the alignment offset degree of the aligned and compensated target block is less than or equal to the preset offset threshold, it indicates that the alignment of the target region meets the accuracy requirements and will not affect the laser repair of the chips in the target region. Therefore, laser repair is performed on the target region corresponding to the aligned and compensated target block, thereby improving the chip yield. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic flowchart of the alignment offset correction method for wafer laser repair provided in the embodiments of this application;

[0020] Figure 2 This is a schematic diagram of wafer variations provided in an embodiment of this application;

[0021] Figure 3 This is a schematic diagram of the target area provided in the embodiments of this application;

[0022] Figure 4 This is a schematic diagram of the alignment correction compensation of the target block provided in the embodiments of this application;

[0023] Figure 5 This is a schematic diagram of the preset alignment point offset provided in the embodiments of this application;

[0024] Figure 6 This is a schematic diagram of alignment correction and compensation of the target block based on the offset angle provided in an embodiment of this application;

[0025] Figure 7 This is a schematic diagram of alignment correction and compensation of the target block based on the offset displacement provided in an embodiment of this application;

[0026] Figure 8 This is a schematic diagram of the alignment offset correction device for wafer laser repair provided in the embodiments of this application;

[0027] Figure 9 This is a schematic diagram of the structure of the terminal device provided in the embodiments of this application. Detailed Implementation

[0028] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0029] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0030] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0031] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."

[0032] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0033] Figure 1 The diagram shown is a flowchart illustrating a method for correcting alignment offsets during wafer laser repair according to an embodiment of this application. The execution subject of this method can be a terminal device, such as... Figure 1 As shown, the alignment offset correction method for wafer laser repair described above may include the following steps:

[0034] Step S101: Obtain the wafer region of the wafer and divide the wafer region into target areas in a preset manner.

[0035] Because many chips are arranged within a wafer area, if only the overall wafer area is offset and corrected, the chips within the wafer area may have different brightness levels near their corresponding points due to differences in thickness, deformation, and other properties of different areas of the wafer. This results in a misalignment in the alignment result, which in turn affects the chip yield during laser repair. In this embodiment, the terminal device divides the wafer area into at least one target area using a preset method, so that the alignment offset correction can be performed according to the unique properties of different target areas, thereby improving the chip yield. The preset method includes, but is not limited to, dividing the area by a preset range or dividing the area by chip characteristics, such as chip thickness and deformation.

[0036] For example, different parts of a wafer have different deformations, meaning different parts of the wafer have different degrees of warping. Warping can easily lead to inaccurate positioning and focusing at that location, causing offset and affecting subsequent testing. Figure 2 As shown, Figure 2 Darker colored areas indicate larger deformation, and larger deformation indicates greater wafer warpage. Therefore, regions can be divided based on the deformation characteristics of the chip. Specifically, the terminal device can divide the wafer region into cells based on the chip size, where each cell contains one chip, and the edge of the cell represents the chip's dicing line. The deformation of each cell is then determined to facilitate the division of the target region. Specifically, at least one adjacent cell with deformation within a preset range can be defined as a target region. Figure 3 As shown, Figure 3 This represents a portion of the wafer. In the diagram, each small square represents a cell, and different shaded areas represent target regions with different deformations. Depending on the deformation, [the area will be...]. Figure 3 The target area is divided into five regions: region A, region B, region C, region D, and region E. The shape variables mentioned above are within a preset range. This can be achieved by the difference between the shape variables of individual cells within the region being within a preset range, or the difference between the shape variables of adjacent cells being within a preset range. Alternatively, a target region can be defined by a preset shape variable interval, i.e., the aforementioned preset range, which identifies adjacent cells whose shape variables fall within the aforementioned interval.

[0037] Understandably, when dividing a wafer region into areas based on chip characteristics, if the difference between the characteristic values ​​corresponding to each cell in the wafer region or the difference between the characteristic values ​​corresponding to each adjacent cell in the wafer region are all within a preset range, or if the characteristic values ​​corresponding to each cell in the wafer region are all within a preset range of characteristic values, then the wafer region is divided into a target region, meaning that the target region is the wafer region. For example, when the characteristic value is a deformation variable, if the wafer region is divided into a target region based on the deformation variable of each cell, it means that the deformation variable of each cell in the wafer region is within a preset range.

[0038] For example, when the terminal device divides the area according to a preset range, it may specifically include: the terminal device divides the wafer area into cells based on the chip size, that is, each cell contains a chip, and then divides the wafer area equally according to a preset range containing at least one cell, that is, each target area after division includes at least one chip. It can be understood that the smaller the preset range, the more accurate the alignment of the determined target block.

[0039] Step S102: Select a target block from the target area and determine the alignment offset of the target block.

[0040] After dividing the wafer area into at least one target area, in order to improve the calculation speed while ensuring the accuracy of determining the alignment offset of the area, in this embodiment, the terminal device selects a target block from the target area to represent the target area and determine the alignment offset, thereby quickly determining the alignment offset of the target area. The aforementioned target block includes at least one cell.

[0041] Specifically, the terminal device can select a target block by determining four marker points in the target area. That is, the four marker points can be connected to form a target block, and the four marker points are all located at the corners of the cell.

[0042] It is understandable that when the wafer area is divided into at least two target areas, the alignment offset of the second target area can be determined after the alignment correction compensation of the first target area. This is to avoid affecting the alignment offset of other uncorrected target areas when the alignment correction compensation is performed on one of the target areas after the alignment offset of each target area is determined at the same time, thereby affecting the chip yield.

[0043] In one embodiment, since the target block represents the target area, the selection of the target block will affect the accuracy of the determination of the alignment offset of the target area. The selection of the target block from the target area in step S102 may specifically include: the terminal device determining the size of the target block according to the deformation of the target area, and then selecting the target block from the target area according to the size of the target block.

[0044] Understandably, the larger the deformation of the target area, the more reference data is needed to improve the accuracy of determining the alignment offset, i.e., the more cells are required, and the larger the size of the target block becomes. Since the target block mentioned above includes at least one cell, it can be a rectangle.

[0045] Specifically, the aforementioned deformation can be measured using deformation measuring instruments.

[0046] In one embodiment, since the target block represents a target region, the selection of the target block affects the accuracy of determining the alignment offset of the target region. Step S102, selecting the target block from the target region, may specifically include: the terminal device determining the position of the target block based on the deformation of the target region, and then selecting the target block from the target region based on its position. For example, if the deformation of the target region is less than a preset threshold, it indicates that the target region is relatively flat, and the target block can be selected from the center position of the target region.

[0047] In one embodiment, selecting a target block from the target area in step S102 may specifically include: the terminal device selecting a target block from the target area via a block pre-set by the operator on the machine or a currently issued instruction. The currently issued instruction is the instruction sent by the machine to the host computer when selecting a block, so that the user can issue an instruction based on the selected information.

[0048] In one embodiment, when the terminal device has at least two target areas, the terminal device can determine the degree of alignment offset from the target areas sequentially from left to right and from top to bottom.

[0049] In one embodiment, determining the alignment offset degree of the target block in step S102 may include: the terminal device determining the target deviation value of a preset alignment point in the target block through machine detection. Then, a preset number of block deviation values ​​corresponding to the same position as the target block for each wafer of the same model are obtained from historical data of wafers of the same model. The same position of the target block may include the alignment point position within a preset target range of the preset alignment point in the target block. The alignment offset degree is then determined based on the target deviation value and the preset number of block deviation values. The accuracy of the alignment offset degree of the target block is improved by comparing it with wafers of the same model. The preset number of block deviation values ​​corresponding to the same position as the target block for each wafer of the same model are obtained as deviation values ​​in a qualified state, and comparison is performed using these qualified deviation values. The target area includes at least one preset alignment point, which can be directly set by the operator as a reference.

[0050] Understandably, because the wafer is held onto the disk by a pneumatic suction device on the equipment, the gas supply flow is not always stable in real time, which can cause vibration or displacement. Furthermore, minor physical tolerances can occur when the laser trimming equipment moves, leading to misalignment of the target area. Figure 4 As shown, Figure 4 The gray shaded area represents the standard area corresponding to the disk, meaning the target block needs to be aligned with this standard area; this is equivalent to a target area that has not been offset. The white shaded area represents the target area that cannot be aligned after offset. In this embodiment, the aforementioned preset alignment points are alignment layout points pre-set on the machine by relevant personnel. Figure 4 Points A and B are defined as follows: Point A is the coordinate position of the preset alignment point corresponding to the standard area; Point B is the coordinate position of the preset alignment point corresponding to the target area, i.e., the coordinate position after the preset alignment point is offset. The target deviation value of the preset alignment point is the deviation value between points A and B.

[0051] In one embodiment, before determining the target deviation value of the preset alignment point within the target block, the process may include: the terminal device determining the alignment mark identification inaccuracy of the preset alignment point through image comparison in the machine, determining whether the alignment mark identification inaccuracy is greater than a preset identification inaccuracy threshold; if the alignment mark identification inaccuracy is greater than the preset inaccuracy threshold, and if the alignment offset is greater than a preset offset threshold, then the target block can be aligned and compensated based on the preset alignment point in the target block. Conversely, if the alignment mark identification inaccuracy is less than or equal to the preset inaccuracy threshold, indicating that the image comparison of the alignment point meets the alignment accuracy requirements, then the alignment offset of the target block can be further determined using the preset number of block deviation values ​​to make further determinations, thereby determining whether the target block needs alignment correction compensation. For example, if the preset identification inaccuracy threshold is set to 0.05, and the detected alignment mark identification inaccuracy of the preset alignment point is 0.1, it means that the alignment mark identification inaccuracy is greater than the preset identification inaccuracy threshold. In this case, it is necessary to judge the degree of offset to determine whether the target block needs to be aligned and compensated.

[0052] In one embodiment, determining the degree of alignment offset based on the target deviation value and a preset number of block deviation values ​​includes: calculating the average and standard deviation of the preset number of block deviation values; calculating the difference between the target deviation value and the average value; and determining the ratio of the difference to the standard deviation as the degree of alignment offset.

[0053] Step S103: Determine whether the alignment offset of the target block is greater than the preset offset threshold.

[0054] If yes, proceed to step S105 and subsequent steps; otherwise, proceed to step S104.

[0055] In one embodiment, when the alignment offset of the target block is determined based on the average and standard deviation of a preset number of block deviation values, the preset offset threshold can be the standard deviation of the preset number of block deviation values.

[0056] Step S104: Perform laser repair on the target area corresponding to the target block.

[0057] In this embodiment, the laser repair is performed sequentially on each chip within the target area, for example, from left to right and from top to bottom.

[0058] Step S105: Perform alignment correction and compensation on the target block according to the preset alignment points in the target block.

[0059] Understandably, the offset of the target block can be determined based on the aforementioned preset alignment points, thereby enabling alignment correction and compensation. For example, Figure 4 Points A and B in the diagram, that is, point B is aligned and compensated to point A. Figure 4 Point C in the diagram represents the actual position after alignment correction and compensation. The aforementioned offsets include, but are not limited to, offset angles and offset displacements.

[0060] In one embodiment, step S105, which involves performing alignment correction compensation on the target block based on a preset alignment point, may specifically include: obtaining the coordinates (point B) of the preset alignment point after offset and the coordinates (point A) of the preset alignment point; and then calculating the offset angle of the target block based on the coordinates of the preset alignment point after offset and the coordinates of the preset alignment point. Figure 4 The θ angle is obtained by performing trigonometric function calculations using the coordinates of points A and B, and the target block is then aligned and compensated based on the calculated offset angle.

[0061] Understandably, since the target block contains at least one cell, the aforementioned preset alignment point is located at the connection between cells, and each cell contains one chip. Therefore, the aforementioned preset alignment point is located on the cutting path between chips. Thus, when performing alignment correction compensation on the target block based on the offset angle, the target block needs to be properly aligned. Figure 5 As shown, Figure 5 The gray shaded area represents the coordinate axis established with the preset alignment point as the center. The intersection of the gray shaded areas represents the offset preset alignment point position. After the target block is aligned and compensated according to the offset angle, it is then properly aligned. For example... Figure 6 As shown, the horizontal and vertical directions of the coordinate axes established with the preset alignment point as the center are parallel to the corresponding cutting direction of the chip.

[0062] In one embodiment, such as Figure 6 As shown, sometimes after correcting the offset angle of the target block, there is still a large difference in its displacement. Therefore, after performing alignment correction compensation on the target block based on the offset angle, the specific steps can include: the terminal determines the degree of alignment offset of the target block after alignment correction compensation and makes a judgment. If the degree of alignment offset of the target block after alignment correction compensation is less than or equal to a preset offset threshold, then laser repair is directly performed on the target area corresponding to the target block. When the degree of alignment offset of the target block after alignment correction compensation is greater than the preset offset threshold, the terminal device calculates the offset displacement of the target block based on the coordinates of the preset alignment point after offset and the coordinates of the preset alignment point, and then performs alignment correction compensation on the target block based on the offset displacement, such as... Figure 7 As shown, Figure 7 To correct the position of the preset alignment point after displacement.

[0063] Understandably, if it is not necessary to perform alignment correction compensation on the target block based on the offset angle, but only to perform alignment correction compensation on the target block based on the offset displacement, then the alignment correction compensation is performed on the basis of ensuring that the horizontal and vertical directions of the coordinate axis established with the preset alignment point as the center are parallel to the corresponding cutting direction of the chip.

[0064] Specifically, the center coordinates between two points can be calculated based on the coordinates of the preset alignment point after offset and the coordinates of the preset alignment point. The distance from the center coordinates to any point is used as the offset displacement of the target block, so that the terminal device can compensate the coordinates of the preset alignment point after offset to the center coordinates.

[0065] Step S106: Determine whether the alignment offset of the target block after alignment correction and compensation is greater than the preset offset threshold.

[0066] If yes, proceed to step S105 and subsequent steps; otherwise, proceed to step S104.

[0067] In this embodiment, the alignment correction compensation of the target block is verified to be qualified by judging the degree of alignment offset of the target block after alignment correction compensation.

[0068] In one embodiment, if it is determined that the alignment offset of the target block after alignment correction compensation is greater than a preset offset threshold, and the previous alignment correction compensation was performed on the target block based on the offset angle, then when performing alignment correction compensation on the target block again after alignment correction compensation, the target block will be aligned based on the offset displacement.

[0069] In one embodiment, when there are at least two target regions, the target regions are sorted, and steps S102 to S106 are executed sequentially on the sorted target regions. The target regions can be sorted based on their deformation.

[0070] Understandably, when a wafer area is divided into at least two target areas, in order to avoid simultaneously determining the alignment offset of each target area and when none of the target areas have undergone laser repair, the alignment correction compensation of some target areas may affect the alignment offset of other uncorrected or corrected target areas. Therefore, when the alignment offset of a target block is determined to be less than or equal to a preset offset threshold, laser repair must be performed on each chip in the target area corresponding to the target block immediately. This way, no matter how the alignment correction compensation is performed on other target blocks later, it will not affect the target area corresponding to the target block whose alignment offset was previously determined to be less than or equal to the preset offset threshold.

[0071] In this embodiment, a wafer region is obtained, and the wafer region is divided into target regions in a preset manner to facilitate the determination of the alignment offset degree of the target regions of the wafer. This allows for accurate adjustment of the alignment offset degree of the chips corresponding to the target regions of the wafer. A target block is selected from the target regions, and the alignment offset degree of the target block is determined. This alignment offset degree of the target block is used as the alignment offset degree of the target region. When the alignment offset degree of the target block is greater than a preset offset threshold, it indicates that the alignment offset degree of the target region is too large. In this case, the target block needs to be aligned and compensated according to a preset alignment point to reduce the alignment offset degree of the target region. This causes the chips contained in the target region to undergo offset correction. When the alignment offset degree of the aligned and compensated target block is less than or equal to the preset offset threshold, it indicates that the alignment of the target region meets the accuracy requirements and will not affect the laser repair of the chips in the target region. Therefore, laser repair is performed on the target region corresponding to the aligned and compensated target block, thereby improving the chip yield.

[0072] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0073] Corresponding to the alignment offset correction method for wafer laser repair described above, Figure 8 The diagram shown is a schematic representation of a wafer laser repair alignment offset correction device according to an embodiment of this application. Figure 8 As shown, the alignment misalignment correction device for wafer laser repair may include:

[0074] The partitioning module 801 is used to obtain the wafer region of the wafer and partition the wafer region into target regions in a preset manner.

[0075] The selection module 802 is used to select a target block from the target area and determine the alignment offset of the target block.

[0076] The correction and compensation module 803 is used to perform alignment correction and compensation on the target block according to the preset alignment point in the target block when the alignment offset of the target block is greater than the preset offset threshold.

[0077] The laser repair module 804 is used to perform laser repair on the target area corresponding to the aligned target block when the alignment offset of the aligned target block is less than or equal to a preset offset threshold.

[0078] In one embodiment, the division module 801 may include:

[0079] Dividing units are used to divide the wafer area into individual cells based on chip size.

[0080] The shape variable determination unit is used to determine the shape variable of each cell, and to define at least one cell whose shape variable is within a preset range and that are adjacent to each other as a target area.

[0081] In one embodiment, the selection module 802 may include:

[0082] The size determination unit is used to determine the size of the target block based on the deformation of the target area.

[0083] The selection unit is used to select a target block from the target region based on the size of the target block.

[0084] In one embodiment, the selection module 802 may further include:

[0085] The deviation value determination unit is used to determine the target deviation value of the preset alignment point in the target block.

[0086] The deviation value acquisition unit is used to acquire a preset number of block deviation values ​​at the same position as the target block from the historical data of wafers of the same model as the wafer.

[0087] The alignment offset degree determination unit is used to determine the alignment offset degree based on the target deviation value and the deviation value of a preset number of blocks.

[0088] In one embodiment, the above-mentioned alignment offset determination unit may include:

[0089] The first calculation subunit is used to calculate the average and standard deviation of the deviation values ​​of a preset number of blocks.

[0090] The second calculation subunit is used to calculate the difference between the target deviation value and the average value.

[0091] The alignment offset determination sub-unit is used to determine the alignment offset degree by the ratio of the difference to the standard deviation.

[0092] In one embodiment, the above-mentioned alignment misalignment correction device for wafer laser repair may further include:

[0093] The inaccuracy determination module is used to determine the inaccuracy of alignment mark identification of preset alignment points in the target block.

[0094] The compensation module is used to perform alignment correction compensation on the target block according to the preset alignment point in the target block when the alignment mark identification inaccuracy is greater than the preset identification inaccuracy threshold and the alignment offset is greater than the preset offset threshold.

[0095] In one embodiment, the above-mentioned correction and compensation module 803 may include:

[0096] The coordinate acquisition unit is used to acquire the coordinates of the preset alignment point after offset and the coordinates of the preset alignment point.

[0097] An angle calculation unit is used to calculate the offset angle of the target block based on the coordinates of the preset alignment point after offset and the coordinates of the preset alignment point.

[0098] Angle correction compensation unit is used to perform alignment correction compensation on the target block according to the offset angle.

[0099] In one embodiment, the above-mentioned correction and compensation module 803 may further include:

[0100] The degree determination unit is used to determine the degree of alignment offset of the target block after alignment correction compensation.

[0101] The displacement calculation unit is used to calculate the offset displacement of the target block based on the coordinates of the preset alignment point after offset and the coordinates of the preset alignment point when the alignment offset of the target block after alignment correction and compensation is greater than the preset offset threshold.

[0102] The displacement correction and compensation unit is used to perform alignment correction and compensation on the target block based on the offset displacement.

[0103] In this embodiment, a wafer region is obtained, and the wafer region is divided into target regions in a preset manner to facilitate the determination of the alignment offset degree of the target regions of the wafer. This allows for accurate adjustment of the alignment offset degree of the chips corresponding to the target regions of the wafer. A target block is selected from the target regions, and the alignment offset degree of the target block is determined. This alignment offset degree of the target block is used as the alignment offset degree of the target region. When the alignment offset degree of the target block is greater than a preset offset threshold, it indicates that the alignment offset degree of the target region is too large. In this case, the target block needs to be aligned and compensated according to a preset alignment point to reduce the alignment offset degree of the target region. This causes the chips contained in the target region to undergo offset correction. When the alignment offset degree of the aligned and compensated target block is less than or equal to the preset offset threshold, it indicates that the alignment of the target region meets the accuracy requirements and will not affect the laser repair of the chips in the target region. Therefore, laser repair is performed on the target region corresponding to the aligned and compensated target block, thereby improving the chip yield.

[0104] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the above-described device and module can be referred to the corresponding process in the foregoing system embodiments and method embodiments, and will not be repeated here.

[0105] Figure 9 This is a schematic diagram of the structure of a terminal device provided in an embodiment of this application. For ease of explanation, only the parts related to the embodiments of this application are shown.

[0106] like Figure 9 As shown, the terminal device 9 of this embodiment includes: at least one processor 900 ( Figure 9 (Only one is shown in the image), a memory 901 connected to the processor 900, and a computer program 902 stored in the memory 901 and executable on at least one processor 900, such as a wafer laser repair alignment offset correction program. When the processor 900 executes the computer program 902, it implements the steps in the respective wafer laser repair alignment offset correction method embodiments, for example... Figure 1 Steps S101 to S106 are shown. Alternatively, when the processor 900 executes the computer program 902, it implements the functions of each module in the above-described device embodiments, for example... Figure 8 The functions of modules 801 to 804 are shown.

[0107] For example, the computer program 902 described above can be divided into one or more modules. One or more of these modules are stored in the memory 901 and executed by the processor 900 to complete this application. The one or more modules can be a series of computer program instruction segments capable of performing specific functions, which describe the execution process of the computer program 902 in the terminal device 9. For example, the computer program 902 can be divided into a partitioning module 801, a selection module 802, a correction and compensation module 803, and a laser repair module 804. The specific functions of each module are as follows:

[0108] The partitioning module 801 is used to obtain the wafer region of the wafer and partition the wafer region into target regions in a preset manner;

[0109] The selection module 802 is used to select a target block from the target area and determine the alignment offset of the target block;

[0110] The correction and compensation module 803 is used to perform alignment correction and compensation on the target block according to the preset alignment point in the target block when the alignment offset of the target block is greater than the preset offset threshold.

[0111] The laser repair module 804 is used to perform laser repair on the target area corresponding to the aligned target block when the alignment offset of the aligned target block is less than or equal to a preset offset threshold.

[0112] The aforementioned terminal device 9 may include, but is not limited to, a processor 900 and a memory 901. Those skilled in the art will understand that... Figure 9This is merely an example of terminal device 9 and does not constitute a limitation on terminal device 9. It may include more or fewer components than shown, or combine certain components, or different components, such as input / output devices, network access devices, buses, etc.

[0113] The processor 900 may be a Central Processing Unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0114] In some embodiments, the aforementioned memory 901 may be an internal storage unit of the terminal device 9, such as a hard disk or memory of the terminal device 9. In other embodiments, the aforementioned memory 901 may be an external storage device of the terminal device 9, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal device 9. Furthermore, the aforementioned memory 901 may include both internal storage units and external storage devices of the terminal device 9. The aforementioned memory 901 is used to store operating systems, applications, boot loaders, data, and other programs, such as the program code of the aforementioned computer programs. The aforementioned memory 901 can also be used to temporarily store data that has been output or will be output.

[0115] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the above device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0116] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0117] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0118] In the embodiments provided in this application, it should be understood that the disclosed devices / terminal equipment and methods can be implemented in other ways. For example, the device / terminal equipment embodiments described above are merely illustrative. For instance, the division of modules or units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0119] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0120] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0121] If the integrated units described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: any entity or device capable of carrying computer program code to a photographing device / terminal device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electrical carrier signals or telecommunication signals.

[0122] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for correcting alignment misalignment during wafer laser repair, characterized in that, include: Obtain the wafer region and divide the wafer region into individual cells based on the chip size; Determine the shape of each cell, and define at least one adjacent cell within the preset range as a target area; The size of the target block is determined based on the deformation of the target region; Select a target block from the target region based on the size of the target block, and determine the alignment offset of the target block; When the alignment offset of the target block is greater than the preset offset threshold, the target block is corrected and compensated according to the preset alignment point in the target block; When the alignment offset of the target block after alignment correction and compensation is less than or equal to a preset offset threshold, laser repair is performed on the target area corresponding to the target block after alignment correction and compensation.

2. The alignment offset correction method for wafer laser repair as described in claim 1, characterized in that, Determining the alignment offset of the target block includes: Determine the target deviation value of the preset alignment point in the target block; Obtain a preset number of block deviation values ​​at the same position as the target block from historical data of wafers of the same model as the wafer; The alignment offset degree is determined based on the target deviation value and the preset number of block deviation values.

3. The alignment offset correction method for wafer laser repair as described in claim 2, characterized in that, Determining the alignment offset degree based on the target deviation value and the preset number of block deviation values ​​includes: Calculate the average and standard deviation of the preset number of block deviation values; Calculate the difference between the target deviation value and the average value; The ratio of the difference to the standard deviation is determined as the degree of alignment shift.

4. The alignment misalignment correction method for wafer laser repair as described in claim 2, characterized in that, Before determining the target deviation value of the preset alignment point within the target block, the method further includes: Determine the alignment mark identification inaccuracy of the preset alignment point in the target block; Accordingly, after determining the alignment offset of the target block, the method further includes: When the misidentification of the alignment mark is greater than a preset misidentification threshold, if the degree of alignment offset is greater than a preset offset threshold, then the target block is corrected and compensated according to the preset alignment point in the target block.

5. The method for correcting alignment misalignment during wafer laser repair as described in any one of claims 1 to 4, characterized in that, The alignment correction compensation of the target block based on the preset alignment point in the target block includes: Obtain the coordinates of the preset alignment point after offset and the coordinates of the preset alignment point; The offset angle of the target block is calculated based on the coordinates of the preset alignment point after offset and the coordinates of the preset alignment point. The target block is aligned and compensated based on the offset angle.

6. The alignment misalignment correction method for wafer laser repair as described in claim 5, characterized in that, After performing alignment correction compensation on the target block according to the offset angle, the process includes: Determine the degree of alignment offset of the target block after alignment correction and compensation; When the alignment offset of the target block after the alignment correction compensation is greater than the preset offset threshold, the offset displacement of the target block is calculated based on the coordinates of the preset alignment point after the offset and the coordinates of the preset alignment point. The target block is aligned and compensated based on the offset displacement.

7. A device for correcting alignment misalignment during wafer laser repair, characterized in that, include: The partitioning module is used to obtain the wafer region of the wafer and partition the wafer region into target regions in a preset manner; The selection module is used to select a target block from the target region and determine the alignment offset of the target block; The correction and compensation module is used to perform alignment correction and compensation on the target block according to the preset alignment point in the target block when the alignment offset of the target block is greater than the preset offset threshold. The laser repair module is used to perform laser repair on the target area corresponding to the aligned target block when the alignment offset of the aligned target block is less than or equal to a preset offset threshold.

8. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the alignment offset correction method for wafer laser repair as described in any one of claims 1 to 6.

Images