Spatial scalability support in video encoding and decoding
By implementing special processing of IDR pictures in the video decoder, removing all decoded pictures of the layer to which the IDR pictures belong, while retaining the decoded pictures of lower-level IDs, the impact of IDR pictures on DPB in multi-layer video data management is solved, and the video decoding quality and scalability are improved.
Patent Information
- Application Number
- CN202080040288.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-06-04
- Filing Date
- 2020-06-05
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2040-06-05
AI Technical Summary
When managing multi-layer video data, existing video encoding and decoding technologies are difficult to effectively handle the impact of instantaneous decoding refresh (IDR) pictures on the decoding picture buffer (DPB), resulting in unavailability of reference pictures and affecting the quality of video decoding.
By determining whether the picture of the layer is an IDR picture, if so, the video decoder removes all decoded pictures of the layer to which the IDR picture belongs, and retains the decoded pictures with lower layer IDs to ensure future decoding capabilities.
This management method avoids undecoded bitstreams due to the unavailability of necessary reference pictures, and improves the quality and scalability of video decoding.
Smart Images

Figure CN113906756B_ABST
Abstract
Description
[0001] This application claims priority to U.S. Application No. 16 / 892,709, filed on June 4, 2020, which claims the benefit of U.S. Provisional Application No. 62 / 858,901, filed on June 7, 2019, the entire contents of both applications are incorporated herein by reference. Technical Field
[0002] The present disclosure relates to video encoding and video decoding. Background Art
[0003] Digital video capabilities can be incorporated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio telephones (so-called "smart phones"), video teleconferencing equipment, video streaming equipment, etc. Digital video devices implement video codec technologies, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4 Part 10, Advanced Video Codec (AVC), ITU-T H.265 / High Efficiency Video Codec (HEVC), and extensions of such standards. By implementing such video codec technologies, video devices can more efficiently send, receive, encode, decode and / or store digital video information.
[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) can be partitioned into video blocks, which can also be referred to as codec tree units (CTUs), codec units (CUs), and / or codec nodes. Video blocks in an intra-frame codec (I) slice of a picture are encoded using spatial predictions of reference samples in neighboring blocks in the same picture. Video blocks in an inter-frame codec (P or B) slice of a picture can use spatial predictions of reference samples in neighboring blocks in the same picture, or temporal predictions of reference samples in other reference pictures. Pictures can be referred to as frames, and reference pictures can be referred to as reference frames. Summary of the invention
[0005] The technology of the present disclosure relates to multi-layer video data encoding and decoding, and more specifically, to technology for managing decoded picture buffers for multi-layer video data encoding and decoding. The present disclosure also describes technology for detecting the start of a new access unit in multi-layer video data encoding and decoding. Multi-layer video data can be used to enable spatial scalability.
[0006] According to an example of the present disclosure, a method for decoding multi-layer video data includes: obtaining multi-layer video data, wherein the multi-layer video data includes at least a first layer and a second layer; determining a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer; storing decoded pictures of the first layer and decoded pictures of the second layer in a decoded picture buffer; and in response to determining that an instantaneous decoding refresh (IDR) picture belongs to the second layer, removing all decoded pictures of the second layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer.
[0007] According to another example of the present disclosure, a device for decoding multi-layer video data includes: a memory configured to store multi-layer video data; and one or more processors implemented in a circuit and configured to: obtain multi-layer video data, wherein the multi-layer video data includes at least a first layer and a second layer; determine a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer; store decoded pictures of the first layer and decoded pictures of the second layer in a decoded picture buffer; and in response to determining that an instantaneous decoding refresh (IDR) picture belongs to the second layer, remove all decoded pictures of the second layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer.
[0008] According to another example of the present disclosure, a computer-readable storage medium storing instructions, when the instructions are executed by one or more processors, causes the one or more processors to: obtain multi-layer video data, wherein the multi-layer video data includes at least a first layer and a second layer; determine a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer; store decoded pictures of the first layer and decoded pictures of the second layer in a decoded picture buffer; and in response to determining that an instantaneous decoding refresh (IDR) picture belongs to the second layer, remove all decoded pictures of the second layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer.
[0009] An apparatus for decoding multi-layer video data includes: a component for obtaining the multi-layer video data, wherein the multi-layer video data includes at least a first layer and a second layer; a component for determining a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer; a component for storing decoded pictures of the first layer and decoded pictures of the second layer in a decoded picture buffer; and a component for removing all decoded pictures of the second layer from the decoded picture buffer while leaving all decoded pictures of the first layer in the decoded picture buffer in response to determining that an instantaneous decoding refresh (IDR) picture belongs to the second layer.
[0010] The details of one or more examples will be set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.
[0012] Figure 2A and Figure 2B is a conceptual diagram illustrating an exemplary quadtree binary tree (QTBT) structure and a corresponding codec tree unit (CTU).
[0013] Figure 3 An example is shown in which pictures within an access unit have the same POC value.
[0014] Figure 4 An example is shown where the POC count is continuous across different layers and pictures within an access unit have different POC values.
[0015] Figure 5 An example of an access unit is shown, where not all layers are present in the access unit.
[0016] Figure 6 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.
[0017] Figure 7 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.
[0018] Figure 8 is a flow chart illustrating a video encoding process.
[0019] Fig. 9 is a flow chart illustrating a video decoding process.
[0020] Fig.10is a flow chart illustrating an exemplary process for maintaining a DPB. DETAILED DESCRIPTION
[0021] Video coding (e.g., video encoding and / or video decoding) typically involves predicting (e.g., intra-frame prediction) blocks of video data from blocks of coded video data in the same picture or predicting (e.g., inter-frame prediction) blocks of video data from blocks of coded video data in different pictures. In some instances, the video encoder also calculates residual data by comparing the predicted block with the original block. Therefore, the residual data represents the difference between the predicted block and the original block. In order to reduce the number of bits required to signal the residual data, the video encoder transforms and quantizes the residual data, and signals the transformed and quantized residual data in the encoded bitstream. The compression achieved by the transform and quantization process may be lossy, which means that the transform and quantization process may introduce distortion into the decoded video data.
[0022] The video decoder decodes the residual data and adds it to the prediction block to produce a reconstructed video block that more closely matches the original video block than the prediction block alone. The first reconstructed block may have distortion or artifacts due to losses introduced by transforming and quantizing the residual data. One common type of artifact or distortion is called blockiness, where the boundaries of the blocks used to encode and decode the video data are visible.
[0023] In order to further improve the quality of the decoded video, the video decoder can perform one or more filtering operations on the reconstructed video blocks. Examples of these filtering operations include deblocking filtering, sample adaptive offset (SAO) filtering, and adaptive loop filtering (ALF). The parameters for these filtering operations can be determined by the video encoder and explicitly signaled in the encoded video bitstream, or can be implicitly determined by the video decoder without the need for explicit signaling of these parameters in the encoded video bitstream.
[0024] To allow scalability (generally referring to the ability of a video bitstream to support multiple spatial resolutions and / or multiple frame rates), some video bitstreams include multiple layers. A multi-layer bitstream may include a base layer and one or more non-base layers. Non-base layers are sometimes also referred to as enhancement layers. In a scalable bitstream, the base layer may generally have a layer identifier (e.g., nuh_layer_id) equal to zero and may be independently decodable, meaning that the base layer may be decoded without requiring information from other layers. Non-base layers may have a layer identifier greater than zero and may provide additional video data that is not included in the base layer. The additional video data may, for example, include more sample values that may be used to increase spatial resolution or frame rate. Non-base layers may or may not be independently decodable. Some non-base layers will not be decoded without access to information associated with other layers and are therefore considered to depend on those other layers. Video Codec Layer (VCL) Network Abstraction Layer (NAL) units generally refer to coded slice NAL units that include video data for picture slices. A layer collectively refers to a collection of VCL NAL units and associated non-VCL NAL units, all of which have a specific nuh_layer_id value.
[0025] A NAL unit is a syntactic structure containing an indication of the type of data to follow and bytes containing the data in the form of a Raw Byte Sequence Payload (RBSP), interspersed with emulation prevention bytes if necessary. An access unit (AU) is a collection of picture units belonging to different layers and containing coded pictures associated with the same time. A picture unit is a group of NAL units that are associated with each other according to a specified classification rule, are consecutive in decoding order, and contain exactly one coded picture.
[0026] An instantaneous decoding refresh (IDR) picture is a type of picture that does not use inter-frame prediction during the decoding process, and can therefore be the first picture in the bitstream in decoding order. IDR pictures can also appear later in the bitstream and can be used for random access, which generally refers to the action of starting the decoding process for a bitstream at a point other than the beginning of the stream. Each IDR picture is the first picture of a coded video sequence (CVS) in decoding order.
[0027] The video encoder and video decoder store decoded pictures in a decoded picture buffer (DPB) so that the decoded pictures can be used as reference pictures to encode and decode later pictures in the bitstream. Reference pictures contain samples that can be used for inter-frame prediction in the decoding process of subsequent pictures in decoding order. Determining which picture to keep in the DPB and which picture to remove, i.e., "bumping", can pose unique challenges for multi-layer video data because adding pictures from one layer to the DPB may call out pictures from other layers. The present disclosure describes techniques for calling out pictures from the DPB when a video data layer includes an IDR picture.
[0028] According to some techniques of the present disclosure, in response to determining that a picture of a layer is an IDR picture, the video decoder can remove all decoded pictures of the layer to which the IDR picture belongs from the DPB, while leaving all decoded pictures with lower layer IDs in the decoded picture buffer. By configuring the video decoder in this way, when those lower layers do not include IDR pictures, the video decoder can retain the ability to decode future pictures based on decoded pictures with lower layer IDs. By managing the DPB in this way, the video decoder can prevent codec situations where there is no decodable bitstream due to the unavailability of necessary reference pictures.
[0029] According to some techniques of the present disclosure, in response to determining that (1) a layer identifier of a VCL NAL unit of a second access unit is less than a layer identifier of an immediately preceding picture in decoding order, and (2) a picture sequence count (POC) value of the VCL NAL unit of the second access unit is different from the POC value for the immediately preceding picture in decoding order, a video decoder may determine that the VCL NAL unit of the second access unit corresponds to the beginning of the second access unit. The technique may represent an improved approach for detecting the beginning of a new access unit without placing an undue burden on a single-layer video decoder.
[0030] Although the technology of the present disclosure can be described from the perspective of a video decoder, it should be understood that the described technology can also be performed by a video encoder. For example, a video encoder typically also decodes video data as part of a process of determining how to encode the video data. In conjunction with this decoding, a video encoder can maintain the DPB using the same technology as a video decoder.
[0031] Figure 11 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of the present disclosure. The techniques of the present disclosure generally relate to encoding and decoding (encoding and / or decoding) video data. In general, video data includes any data used to process video. Therefore, video data can include original, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.
[0032] like Figure 1 As shown, in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. In particular, source device 102 provides video data to destination device 116 via computer-readable medium 110. Source device 102 and destination device 116 may include any of a wide range of devices, including: a desktop computer, a notebook (i.e., laptop) computer, a tablet computer, a set-top box, a telephone handset such as a smartphone, a television, a camera, a display device, a digital media player, a video game console, a video streaming device, or the like. In some cases, source device 102 and destination device 116 may be equipped for wireless communication and, therefore, may be referred to as wireless communication devices.
[0033] exist Figure 1 In the example of , source device 102 includes video source 104, memory 106, video encoder 200 and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of destination device 116 can be configured to apply the technology for continuous picture order count (POC) numbering described in the present disclosure. Therefore, source device 102 represents an example of a video encoding device, and destination device 116 represents an example of a video decoding device. In other examples, the source device and the destination device may include other components or arrangements. For example, source device 102 can receive video data from an external video source such as an external camera. Similarly, destination device 116 can be engaged with an external display device without including an integrated display device.
[0034] like Figure 1The system 100 shown is only an example. In general, any digital video encoding and / or decoding device can perform the techniques described in this disclosure for continuous POC numbering to support scalability. The source device 102 and the destination device 116 are only examples of such codec devices, wherein the source device 102 generates encoded and decoded video data to send to the destination device 116. The present disclosure refers to a "codec" device as a device that performs the encoding and decoding (encoding and / or decoding) of data. Therefore, the video encoder 200 and the video decoder 300 represent examples of codec devices, in particular, a video encoder and a video decoder, respectively. In some examples, the devices 102 and 116 can operate in a substantially symmetrical manner so that each of the devices 102 and 116 includes a video encoding and decoding component. Therefore, the system 100 can, for example, support one-way or two-way video transmission between video devices 102 and 116 for video streaming, video playback, video broadcasting, or video telephony.
[0035] Typically, video source 104 represents the source of video data (i.e., original, uncoded video data), and provides a continuous series of pictures (also referred to as "frames") of video data to video encoder 200, which encodes the data for pictures. Video source 104 of source device 102 may include a video capture device, such as a video camera, a video archive containing previously captured original video, and / or a video feed interface receiving video from a video content provider. As a further alternative, video source 104 may generate computer graphics-based data as source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes captured, pre-captured, or computer-generated video data. Video encoder 200 may rearrange pictures from a received order (sometimes referred to as "display order") into a codec order for encoding and decoding. Video encoder 200 may generate a bitstream comprising encoded video data. Source device 102 may then output the encoded video data, including the encoded multi-layer video data, via output interface 108 onto computer-readable medium 110 for receipt and / or ingestion by, for example, input interface 122 of destination device 116 .
[0036] The memory 106 of the source device 102 and the memory 120 of the destination device 116 represent general purpose memories. In some examples, the memories 106, 120 can store raw video data, such as raw video from the video source 104 and raw, decoded video data from the video decoder 300. Additionally or alternatively, the memories 106, 120 can store software instructions that can be executed by, for example, the video encoder 200 and the video decoder 300, respectively. Although shown separately from the video encoder 200 and the video decoder 300 in this example, it should be understood that the video encoder 200 and the video decoder 300 can also include internal memories for functionally similar or equivalent purposes. In addition, the memories 106, 120 can store encoded video data, such as data output from the video encoder 200 and input to the video decoder 300. In some examples, portions of the memories 106, 120 can be allocated as one or more video buffers, for example to store raw, decoded and / or encoded video data.
[0037] The computer-readable medium 110 may represent any type of medium or device capable of transmitting the encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium so that the source device 102 can send the encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard, such as a wireless communication protocol, the output interface 108 can output (e.g., by modulation) a transmission signal including the encoded video data, and the input interface 122 can receive (e.g., by demodulation) the received transmission signal. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include a router, a switch, a base station, or any other device that helps facilitate communication from the source device 102 to the destination device 116.
[0038] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data, including the encoded multi-layer video data, from storage device 112 via output interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, a Blu-ray disc, a DVD, a CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.
[0039] In some examples, source device 102 may output encoded video data to file server 114 or another intermediate storage device that may store encoded video generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or downloading. File server 114 may be any type of server device that can store encoded video data and send the encoded video data to destination device 116. File server 114 may represent a web server (e.g., for a website), a file transfer protocol (FTP) server, a content delivery network device, or a network attached storage (NAS) device. Destination device 116 may access the encoded video data from file server 114 via any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), an optical fiber connection, or a combination of the two, which are suitable for accessing the encoded video data stored on file server 114. File server 114 and input interface 122 may be configured to operate according to a streaming protocol, a downloading transmission protocol, or a combination thereof.
[0040] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired network components (e.g., Ethernet cards), wireless communication components that operate according to any of a variety of IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transmit data, such as encoded video data, according to a cellular communication standard, such as 4G, 4G-LTE (Long Term Evolution), Advanced LTE, 5G, etc. In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transmit data, such as encoded video data, according to other wireless standards, such as IEEE 802.11 specifications, IEEE 802.15 specifications (e.g., ZigBee TM ),Bluetooth TM Standard or similar standards to transmit data, such as encoded video data. In some examples, source device 102 and / or destination device 116 may include corresponding system-on-chip (SoC) devices. For example, source device 102 may include a SoC device that performs functionality belonging to video encoder 200 and / or output interface 108, and destination device 116 may include a SoC device that performs functionality belonging to video decoder 300 and / or input interface 122.
[0041] The techniques disclosed herein can be applied to video encoding and decoding to support any of a variety of multimedia applications, such as over-the-air television broadcasting, cable television transmission, satellite television transmission, Internet streaming video transmission (such as Dynamic Adaptive Streaming over HTTP (DASH)), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.
[0042] The input interface 122 of the destination device 116 may receive an encoded video bitstream from the computer-readable medium 110 (e.g., the storage device 112, the file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200, such as syntax elements with values describing characteristics and / or processing of video blocks or other units of coding and decoding (e.g., slices, pictures, groups of pictures, sequences, etc.), which is also used by the video decoder 300. The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.
[0043] Although Figure 1 200 and 300 may each be integrated with an audio encoder and / or an audio decoder, and may include appropriate MUX-DEMUX units or other hardware and / or software to process multiplexed streams including both audio and video in a common data stream. If applicable, the MUX-DEMUX units may conform to the ITU H.223 multiplexer protocol, or other protocols such as the User Datagram Protocol (UDP).
[0044] The video encoder 200 and the video decoder 300 can each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When these techniques are partially implemented in software, the device can store instructions for the software in a suitable non-transitory computer-readable medium, and use one or more processors in hardware to run these instructions to perform the techniques of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, any of which can be integrated as part of a combined encoder / decoder (codec (CODEC)) in the corresponding device. The device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device, such as a cellular phone.
[0045] The video encoder 200 and the video decoder 300 may operate according to a video codec standard, such as ITU-T H.265, also known as High Efficiency Video Coding (HEVC) or an extension thereof, such as a multi-view and / or scalable video codec extension. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards, such as the Joint Exploration Test Model (JEM) or ITU-T H.266, also known as the Versatile Video Codec (VVC). The latest draft of the VVC standard was described in "Versatile Video Coding (Draft 5)" (hereinafter referred to as "VVC Draft 5") proposed by Bross et al. at the 14th meeting (JVET-N1001-v3) of the Joint Video Experts Group (JVET) of ITU-T SG 16WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11 held in Geneva, Switzerland from March 19 to 27, 2019. However, the technology disclosed herein is not limited to any particular codec standard.
[0046] In general, the video encoder 200 and the video decoder 300 can perform block-based encoding and decoding of pictures. The term "block" generally refers to a structure that includes data to be processed (e.g., encoded, decoded, or other forms of data used in the encoding process and / or decoding process). For example, a block may include a two-dimensional matrix of samples of luminance and / or chrominance data. In general, the video encoder 200 and the video decoder 300 can encode and decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, the video encoder 200 and the video decoder 300 can encode and decode luminance separation and chrominance components instead of encoding and decoding red, green, and blue (RGB) data for samples of pictures, where the chrominance components may include both red-toned and blue-toned chrominance components. In some examples, the video encoder 200 converts the received RGB formatted data into a YUV representation before encoding, and the video decoder 300 converts the YUV representation into an RGB format. Alternatively, pre-processing and post-processing units (not shown) can perform these conversions.
[0047] The present disclosure may generally relate to the encoding and decoding of pictures (e.g., encoding and decoding) to include the process of encoding or decoding picture data. Similarly, the present disclosure may relate to the encoding and decoding of blocks of pictures to include the process of encoding or decoding data for blocks, such as prediction and / or residual encoding and decoding. The encoded video bitstream generally includes a series of values of syntax elements that represent codec decisions (e.g., codec mode) and the partitioning of pictures into blocks. Therefore, references to codec pictures or blocks should generally be understood as codec values for syntax elements that form pictures or blocks.
[0048] HEVC defines various blocks, including codec units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video codec (such as the video encoder 200) partitions a codec tree unit (CTU) into CUs according to a quadtree structure. That is, the video codec partitions the CTU and CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node", and the CU of this leaf node may include one or more PUs and / or one or more TUs. The video codec may also partition PUs and TUs. For example, in HEVC, a residual quadtree (RQT) represents the partitioning of a TU. In HEVC, a PU represents inter-frame prediction data, and a TU represents residual data. An intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.
[0049] As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to JEM or VVC. According to JEM or VVC, a video codec (such as the video encoder 200) partitions a picture into a plurality of codec tree units (CTUs). The video encoder 200 may partition the CTU according to a tree structure, such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure. The QTBT structure removes the concept of multiple partition types, such as the separation between CU, PU, and TU of HEVC. The QTBT structure includes two layers: a first layer partitioned according to quadtree partitioning and a second layer partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to codec units (CUs).
[0050] In the MTT partitioning structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of ternary tree (TT) partitioning. Ternary tree partitioning is a partitioning that divides a block into three sub-blocks. In some examples, ternary tree partitioning divides a block into three sub-blocks without dividing the original block by the center. The partitioning types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.
[0051] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma component and the chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for corresponding chroma components).
[0052] The video encoder 200 and the video decoder 300 may be configured to use per-HEVC quadtree segmentation, QTBT segmentation, or MTT segmentation or other segmentation structures. For purposes of explanation, the description of the disclosed techniques is presented with respect to QTBT segmentation. However, it should be understood that the disclosed techniques may also be applied to video codecs configured to use quadtree segmentation or other types of segmentation.
[0053] The present disclosure may use "N×N" and "N by N" interchangeably to refer to the sample dimensions of a block (such as a CU or other video block) in the vertical and horizontal dimensions, for example, 16×16 samples or 16 by 16 samples. Typically, a 16×16 CU has 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Similarly, an N×N CU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. In addition, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include N×M samples, where M is not necessarily equal to N.
[0054] The video encoder 200 encodes video data for a CU representing prediction and / or residual information and other information. The prediction information indicates how to predict the CU in order to form a prediction block for the CU. The residual information generally represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.
[0055] In order to predict a CU, the video encoder 200 can generally form a prediction block for the CU by inter-frame prediction or intra-frame prediction. Inter-frame prediction generally refers to predicting a CU from data of a previously coded picture, while intra-frame prediction generally refers to predicting a CU from previously coded data of the same picture. In order to perform inter-frame prediction, the video encoder 200 can use one or more motion vectors to generate a prediction block. The video encoder 200 can generally perform a motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 can calculate a difference metric using the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), or other such difference calculations to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 can use unidirectional prediction or bidirectional prediction to predict the current CU.
[0056] Some examples of JEM and VVC also provide an affine motion compensation mode, which can be considered an inter-frame prediction mode. In the affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion, such as enlargement or reduction, rotation, perspective motion, or other irregular motion types.
[0057] To perform intra prediction, the video encoder 200 can select an intra prediction mode to generate a prediction block. Some examples of JEM and VVC provide sixty-seven intra prediction modes, including modes for various directions, as well as a planar mode and a DC mode. Typically, the video encoder 200 selects an intra prediction mode that describes samples adjacent to a current block (e.g., a block of a CU) and predicts the samples of the current block according to the mode. Assuming that the video encoder 200 encodes and decodes CTUs and CUs in a raster scan order (from left to right, from top to bottom), such samples can typically be above the current block in the same picture as the current block, above to the left of the current block, or to the left of the current block.
[0058] The video encoder 200 encodes data representing a prediction mode for a current block. For example, for an inter-frame prediction mode, the video encoder 200 may encode data representing which of various available inter-frame prediction modes is used, and motion information for the corresponding mode. For example, for unidirectional or bidirectional inter-frame prediction, the video encoder 200 may encode motion vectors using advanced motion vector prediction (AMVP) or merge mode. The video encoder 200 may use a similar mode to encode motion vectors for an affine motion compensation mode.
[0059] After prediction, such as intra-prediction or inter-prediction of a block, the video encoder 200 may calculate residual data for the block. The residual data, such as a residual block, represents the sample-by-sample difference between the block and a predicted block for the block, which is formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to produce transformed data in a transform domain rather than a sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. Additionally, the video encoder 200 may apply a secondary transform after the first transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc. The video encoder 200 generates transform coefficients after applying one or more transforms.
[0060] As described above, after any transforms that produce transform coefficients, the video encoder 200 can perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to minimize the amount of data used to represent the coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 can reduce the bit depth associated with some or all of the coefficients. For example, the video encoder 200 can round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 can perform a bitwise right shift on the value to be quantized.
[0061] After quantization, the video encoder 200 can scan the transform coefficients to generate a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan can be designed to place coefficients of higher energy (and therefore lower frequency) in front of the vector and transform coefficients of lower energy (and therefore higher frequency) in the back of the vector. In some examples, the video encoder 200 can scan the quantized transform coefficients using a predetermined scanning order to generate a serialized vector, and then, entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 can perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 can entropy encode the one-dimensional vector, for example, according to context adaptive binary arithmetic coding (CABAC). The video encoder 200 can also entropy encode the values of the syntax elements used to describe the metadata associated with the encoded video data for use by the video decoder 300 when decoding the video data.
[0062] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. The context may relate to, for example, whether neighboring values of the symbol are zero values. The probability determination may be based on the context assigned to the symbol.
[0063] The video encoder 200 may also generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, for example, in a picture header, a block header, a slice header, or other syntax data, such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS), to the video decoder 300. The video decoder 300 may similarly decode such syntax data to determine how to decode the corresponding video data.
[0064] In this way, the video encoder 200 can generate a bitstream that includes the encoded video data, such as syntax elements describing the partitioning of the picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Finally, the video decoder 300 can receive the bitstream and decode the encoded video data.
[0065] In general, the video decoder 300 performs a process that is inverse to the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 may decode the values of the syntax elements for the bitstream using CABAC in a manner substantially similar to but inverse to the CABAC encoding process of the video encoder 200. The syntax elements may define partitioning information of the picture into CTUs, and the partitioning of each CTU according to a corresponding partitioning structure (such as a QTBT structure) to define CUs of the CTUs. The syntax elements may also define prediction and residual information for a block (e.g., CU) of video data.
[0066] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to regenerate a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame prediction or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to regenerate the original block. The video decoder 300 may perform additional processing, such as performing a deblocking process to reduce visual artifacts along the boundaries of the blocks.
[0067] According to the technology disclosed in the present invention, the video encoder 200 and the video decoder 300 can be configured to remove all decoded pictures of the layer to which the IDR picture belongs from the DPB in response to determining that the picture of the layer is an IDR picture. In response to determining that the picture of the layer is an IDR picture, the video encoder 200 and the video decoder 300 can also be configured to leave all decoded pictures with a layer ID lower than the layer of the IDR picture in the decoded picture buffer. By configuring the video encoder 200 and the video decoder 300 in this manner, when those lower layers do not include IDR pictures, the video encoder 200 and the video decoder 300 can retain the ability to decode future pictures based on decoded pictures with lower layer IDs. By managing the DPB in this manner, the video encoder 200 and the video decoder 300 can prevent the encoding and decoding of undecodable bitstreams due to the unavailability of necessary reference pictures.
[0068] The present disclosure may generally relate to "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the communication of values for syntax elements and / or other data used to decode encoded video data. That is, the video encoder 200 may signal values for syntax elements in a bitstream. Generally, signaling refers to generating values in a bitstream. As described above, the source device 102 may transmit the bitstream to the destination device 116 in substantially real time or in non-real time, such as may occur when storing syntax elements to the storage device 112 for later retrieval by the destination device 116.
[0069] Figure 2A and Figure 2B is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure 130 and a corresponding codec tree unit (CTU) 132. Solid lines represent quadtree partitions, and dashed lines indicate binary tree partitions. In each partition node (i.e., non-leaf node) of the binary tree, a flag is signaled to indicate which partition type (i.e., horizontal or vertical) is used, where in this example, 0 indicates horizontal partitioning and 1 indicates vertical partitioning. For quadtree partitioning, there is no need to indicate the partition type because the quadtree node divides the block horizontally and vertically into 4 equally sized sub-blocks. Accordingly, the video encoder 200 can encode syntax elements (such as partition information) for the regional tree layer (i.e., solid line) of the QTBT structure 130 and syntax elements (e.g., partition information) for the prediction tree layer (i.e., dashed line) of the QTBT structure 130, and the video decoder 300 can decode these syntax elements. The video encoder 200 may encode video data (such as prediction and transform data) for a CU represented by a terminal leaf node of the QTBT structure 130 , and the video decoder 300 may decode the video data.
[0070] generally, Figure 2B The CTU 132 of the first and second layers may be associated with parameters defining the size of blocks corresponding to nodes of the QTBT structure 130 of the first and second layers. These parameters may include a CTU size (indicating the size of the CTU 132 in samples), a minimum quadtree size (MinQTSize, indicating the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, indicating the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, indicating the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, indicating the minimum allowed binary tree leaf node size).
[0071] The root node of the QTBT structure corresponding to the CTU may have four child nodes at the first layer of the QTBT structure, each of which may be partitioned according to a quadtree partition. That is, the nodes of the first layer are either leaf nodes (without child nodes) or have four child nodes. The example of the QTBT structure 130 represents such a node as including a parent node and a child node with a solid line for branching. If the node of the first layer is not larger than the maximum allowed binary tree root node size (MaxBTSize), the node may be further partitioned by the corresponding binary tree. The binary tree partitioning of a node may be iterated until the node obtained by the partitioning reaches the minimum allowed binary tree leaf node size (MinBTSize) or the maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such a node as having a dotted line for branching. The binary tree leaf node is called a codec unit (CU), which is used for prediction (e.g., intra-frame picture or inter-frame picture prediction) and transformation without any further partitioning. As discussed above, a CU may also be referred to as a "video block" or "block".
[0072] In one example of a QTBT partitioning structure, the CTU size is set to 128×128 (luminance sample and two corresponding 64×64 chrominance samples), MinQTSize is set to 16×16, MaxBTSize is set to 64×64, MinBTSize (for both width and height) is set to 4, and MaxBTDepth is set to 4. Quadtree partitioning is first applied to the CTU to generate quadtree leaf nodes. The size of the quadtree leaf node can be from 16×16 (i.e., MinQTSize) to 128×128 (i.e., CTU size). If the leaf quadtree node is 128×128, the leaf quadtree node will not be further divided by the binary tree because the size exceeds MaxBTSize (i.e., 64×64 in this example). Otherwise, the leaf quadtree node will be further divided by the binary tree. Therefore, the quadtree leaf node is also the root node for the binary tree and has a binary tree depth of 0. When the binary tree depth reaches MaxBTDepth (4 in this example), no further partitioning is allowed. When the width of the binary tree node is equal to MinBTSize (4 in this example), it means that no further horizontal partitioning is allowed. Similarly, a binary tree node with a height equal to MinBTSize means that no further vertical partitioning is allowed for the binary tree node. As described above, the leaf nodes of the binary tree are called CUs and are further processed based on prediction and transformation instead of further segmentation.
[0073] In VVC, there is a reference picture resampling (RPR) tool under consideration. This tool allows a video encoder to use (multiple) reference pictures whose picture size is different from the current picture size. In this case, the picture resampling process can be called to provide an upsampled or downsampled version of the picture to match the current picture size, similar to the spatial scalability implemented in HEVC, for example. This disclosure describes several techniques that can be used alone or in combination with each other to increase support for spatial scalability in VVC in conjunction with the RPR tool.
[0074] The present disclosure describes technologies related to VPS signaling, which, for example, can be used by a middle box to deliver streaming video data. In this context, a middle box generally refers to a video router, a bitstream splicing and extraction device, and other such devices.
[0075] Multi-layer video data may include different types of layer dependencies, which may be derived from reference picture lists, i.e., lists of reference pictures that may be used for inter-frame prediction of P slices and B slices. Typically, the video encoder 200 and the video decoder 300 may maintain two reference picture lists, reference picture list 0 and reference picture list 1, which are generated for each slice of a non-IDR picture. However, when performing sub-bitstream extraction, i.e., when a layer or layers are extracted into separate bitstreams, the reference picture list is not a convenient mechanism for the middlebox to use, because the middlebox cannot determine the dependencies between layers without performing substantial decoding operations. Therefore, the middlebox cannot confirm that the dependencies across different pictures are consistent. For example, the middlebox cannot simply discard unneeded NAL units by checking the layer ID.
[0076] This disclosure describes techniques for indicating dependencies between layers in a high-level parameter set (PS, such as a VPS). A middlebox can use these indications to determine which layers can be decoded independently and which layers depend on other layers. The video encoder 200 and the video decoder 300 can be configured to maintain reference picture lists according to these indications and not use other layers for prediction. Using such techniques, a middlebox can discard unneeded NAL units simply by checking the layer IDs for those NAL units.
[0077] The reference picture structure is a structure used for picture marking to identify which pictures will be kept in the DPB and which pictures can be removed or called out from the DPB to free up memory. The reference picture structure may allow for other layers than the dependency layers as indicated in the PS. Pictures from other layers may need to remain in the DPB and not be called out.
[0078] For example, assume there are three layers, where layer 0 is independently coded and both layer 1 and layer 2 depend on layer 0 (i.e., layer 0 pictures can be used for prediction of layer 1 pictures and layer 2 pictures). In this example, the middlebox or video decoder can extract layer 0 from the bitstream, extract layer 0 and layer 1 from the bitstream, or extract layer 0 and layer 2 from the bitstream. Accordingly, the PS can indicate that layer 0 has no layer dependencies, layer 1 depends on layer 0, and layer 2 depends on layer 0. In each picture of a layer, all reference pictures from all layers required for prediction can be included in the reference picture structure. For example, layer 2 can have layer 0 reference pictures and layer 1 reference pictures. Layer 1 pictures may not be required for layer 2 prediction, but can be included in the marking process used to determine whether these pictures are retained or called out from the DPB. However, the reference picture list for pictures from layer 2 may not have layer 1 pictures because layer 2 does not depend on layer 1 in this example.
[0079] This disclosure describes a "call-out process" for removing reference pictures from a decoded picture buffer. In this context, call-out or removal simply means that the reference picture is no longer available for reference and the memory location used to store the reference picture can be used to store other data. The terms "call-out" or "remove" do not require or imply any kind of active step for deleting or removing the reference picture from memory.
[0080] As mentioned in the previous section, when a picture from a layer is decoded, the decoded picture can call out pictures of other layers from the DPB. However, according to the technology of the present disclosure, the video encoder 200 and the video decoder 300 can be configured to implement a constraint that only pictures of the same layer or higher layer as the current picture are called out. When a higher layer uses a lower layer for prediction, a picture can be called out. For example, assuming that layer 0 is a lower layer than layer 1 and layer 1 is a lower layer than layer 2, the video encoder 200 and the video decoder 300 can be configured so that layer 1 pictures cannot call out layer 0 pictures from the DPB, but layer 1 pictures can call out layer 2 pictures. In this example, cross-layer dependencies are taken into account because higher layers can be encoded independently of lower layers. In this example, lower layer pictures do not call out or mark higher layer pictures.
[0081] According to the technology of the present disclosure, when a layer has an IDR picture, all pictures of the layer and the higher layer are removed from the DPB, but the lower layer pictures can be retained because the lower layer may not be IDR and it may be necessary to continue decoding the pictures in the layer. In the absence of such a constraint, the video decoder can remove all pictures from the DPB so that the lower layer cannot be decoded. In order to implement this constraint, the video encoder 200 and the video decoder 300 can be configured to determine a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer, and the decoded pictures of the first layer and the decoded pictures of the second layer are stored in the DPB. In response to determining that the IDR picture belongs to the second layer, the video encoder 200 and the video decoder 300 can be configured to remove all decoded pictures of the second layer from the DPB, while leaving all decoded pictures of the first layer in the DPB.
[0082] This disclosure also describes modifications to the constraints implemented for access units. In a multi-layer stream, there may be two cases, such as Figure 3 and Figure 4 Depicted. Figure 3 In , pictures of different representations may have the same POC value as in, for example, the Scalable High Efficiency Codec (SHVC) (H.265 / HEVC) standard. Figure 3 In the example of , both the layer 0 picture and the layer 1 picture of the access unit 150 have a POC value POC n-1 , both the layer 0 picture and the layer 1 picture of access unit 152 have a POC value POC n , and both the layer 0 picture and the layer 1 picture of the access unit 154 have a POC value POC n+1 That is, all pictures of the same access unit have the same POC value. This constraint does not change the definition of an AU, but may impose an excessive processing burden on common and widespread single-layer decoders.
[0083] Alternatively, if Figure 4 As shown, the POC counts can be continuous across different layers. Figure 4 For example, access unit 160 includes a POC value POC n-1 The layer 0 picture and the POC value POC n The access unit 162 includes a layer 1 picture having a POC value POC n+1 The layer 0 picture and the POC value POC n+2 In this case, the video decoder is not required to process pictures with the same POC number, since all POCs are unique, but the definition of the AU needs to be changed to reflect the layered stream.
[0084] In one exemplary technique of the present disclosure, the definition of an AU includes a layer ID check. For example, when a picture encounters a picture with a layer ID lower than or the same as the layer ID of the previous picture, a new AU starts. This definition is opposite to the definition of an AU currently defined in VVC draft 5, which only checks the POC value.
[0085] To implement this example, the video encoder 200 and the video decoder 300 may be configured to implement a constraint requiring layer IDs to be numbered in increasing order.
[0086] Using the terminology in VVC draft 5, the AU definition can be changed to the following:
[0087] Let firstVclNalUnitInAu be the VCL NAL unit that is the first VCL NAL unit of a coded picture and for which the derived PicOrderCntVal is different from that of the previous coded picture and nuh_layer_id is less than or equal to that of the previous coded picture. The first of any of the following NAL units (if any) preceding firstVclNalUnitInAu and following the last VCL NAL unit before firstVclNalUnitInAu specifies the start of a new access unit:
[0088] – access unit delimiter NAL unit (when present),
[0089] – DPS NAL unit (when present),
[0090] – VPS NAL unit (when present),
[0091] – SPS NAL unit (when present),
[0092] –PPS NAL unit (when present),
[0093] – APS NAL unit (when present),
[0094] – prefix SEI NAL unit (when present),
[0095] – NAL units where NalUnitType is equal to RSV_NVCL_5, RSV_NVCL_6, RSV_NVCL_21, or RSV_NVCL_22 (when present),
[0096] – NAL units where NalUnitType is in the range of UNSPEC28..UNSPEC29 (when present).
[0097] When there is no such NAL unit (if any) before firstVclNalUnitInAu and after the last VCL NAL before firstVclNalUnitInAu, then firstVclNalUnitInAu starts a new access unit if <<nuh_layer_id is less than or equal to the nuh_layer_id of the previous decoded picture>>.
[0098] The text within the above “<<” and “>>” symbols is an example of layer ID check for AU determination. AU determination particularly needs to know which pictures can be output or displayed, because generally speaking, pictures of the same AU can be considered to have the same content but different representations (resolutions).
[0099] To handle the above types of AUs, video encoder 200 and video decoder 300 can be configured to determine that the VCL NAL unit of the second access unit corresponds to the start of the second access unit in response to determining (1) that the layer identifier of the VCL NAL unit of the second access unit is less than the layer identifier of the previous picture in decoding order, and (2) that the POC value of the VCL NAL unit of the second access unit is different from the POC value of the previous picture in decoding order. The NAL units received between the VCL NAL unit of the second access unit and the last VCL NAL unit of the previous picture are access unit delimiter NAL units.
[0100] Video decoder 300 can be configured to handle non - complete AUs. As Figure 5 shown in the example, there may be coding and decoding situations where not all layers are present in an access unit. In such a situation, applying the above definition of AU may not provide an AU division between pictures because layer 1 pictures have a higher layer ID than layer 0 pictures. The video decoder may consider such coding and decoding situations as one AU under the above definition, which may be undesirable because those pictures may not represent the same content.
[0101] To solve this potential problem, the present disclosure elaborates the following possible solutions. Video encoder 200 can be configured to insert an AU delimiter between a layer 0 picture and a layer 1 picture to indicate an indented AU delimiter. The AU delimiter indicates which NAL units belong to the previous AU and which NAL units belong to the next AU. Thus, video decoder 300 can process the AU delimiter to identify the NAL units belonging to the same AU.
[0102] The video encoder 200 can be configured to continue numbering the POC in the same manner as other layer pictures in the AU, i.e., each AU can have a POC for the number of layers, and the AU definition can include a POC difference check. That is, the start of a new AU can be signaled by the POC difference between two pictures being equal to or exceeding a threshold, which can be equal to the number of layers. In other words, the video encoder 200 can be configured to assign the POC value as num_layers*POC+layer_id.
[0103] The video encoder 200 can be configured to assign different temporal IDs to pictures in layer 0 and layer 1. A check for the temporal ID can be added to the AU definition. For example, a new AU starts at a NAL unit whose temporal ID is different from the temporal ID of the previous NAL unit. In the example above, in order to have an AU delimiter, the video encoder 200 can assign temporal ID 0 to the picture in layer 0 and temporal ID 1 to the layer 1 picture. The video decoder 300 can then detect the start of the new AU at the layer 1 picture.
[0104] The present disclosure also describes techniques related to outputting pictures. Initially, pictures in all layers can be marked for output. For example, if the middlebox extracts layer 0, then the middlebox outputs all pictures of layer 0. However, for example, when there is more than one layer in the bitstream, then the layer 0 pictures and layer 1 pictures can all be marked for output, but the pictures in the same AU can have the same content, so that only one picture needs to be output from the AU. According to the technology of the present disclosure, the middlebox can be configured to output only the picture with the highest layer ID in the AU. In another example, a flag can be signaled in any parameter set, slice header, or elsewhere to indicate which layers are output, or whether all layers are output. Outputting more than one picture in an AU can be useful for coverage or multi-view purposes.
[0105] Figure 6 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 6 The above description is provided for the purpose of explanation and should not be considered as limiting the techniques as broadly illustrated and described in this disclosure. For the purpose of explanation, this disclosure describes the video encoder 200 in the context of video codec standards such as the H.265 (HEVC) video codec standard and the H.266 (VVC) video codec standard under development. However, the techniques of this disclosure are not limited to these video codec standards and are generally applicable to video encoding and decoding.
[0106] exist Figure 6In the example of , the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any one or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 may be implemented in one or more processors or processing circuits. In addition, the video encoder 200 may include additional or alternative processors or processing circuits to perform these and other functions.
[0107] Video data memory 230 may store video data to be encoded by components of video encoder 200. Video encoder 200 may receive video data from, for example, video source 104 ( Figure 1 ) receives video data stored in video data memory 230. DPB218 can be used as a reference picture memory that stores reference video data for prediction of subsequent video data by video encoder 200. Video data memory 230 and DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM) or other types of memory devices. Video data memory 230 and DPB 218 can be provided by the same storage device or a separate storage device. In various examples, video data memory 230 can be on-chip with other components of video encoder 200, as illustrated, or off-chip relative to those components.
[0108] In the present disclosure, references to the video data memory 230 should not be interpreted as limited to memory internal to the video encoder 200, unless specifically described as such, or to memory external to the video encoder 200, unless specifically described as such. Instead, references to the video data memory 230 should be understood as a reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data for a current block to be encoded). Figure 1 The memory 106 may also provide temporary storage of outputs from the various units of the video encoder 200 .
[0109] Picture shows Figure 6Various units are provided to help understand the operations performed by the video encoder 200. These units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide specific functionality and are preset on operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit can run software or firmware so that the programmable circuit operates in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more units may be integrated circuits.
[0110] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 1 ) may store object code for software received and executed by the video encoder 200, or another memory (not shown) within the video encoder 200 may store such instructions.
[0111] The video data memory 230 is configured to store the received video data. The video encoder 200 may retrieve a picture of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be original video data to be encoded.
[0112] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units to perform video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette codec unit, an intra block copy codec unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine codec unit, a linear model (LM) codec unit, etc.
[0113] The mode selection unit 202 generally coordinates multiple encoding processes to test combinations of encoding parameters and the resulting rate-distortion values for such combinations. The encoding parameters may include the partitioning of CTUs into CUs, the prediction mode for the CUs, the transform type for the CU residual data, the quantization parameter for the CU residual data, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than other tested combinations.
[0114] The video encoder 200 may partition a picture retrieved from the video data memory 230 into a series of CTUs, and encapsulate one or more CTUs in a slice. The mode selection unit 202 may partition the CTUs of the picture according to a tree structure (such as the QTBT structure or quadtree structure of HEVC described above). As described above, the video encoder 200 may form one or more CUs by partitioning the CTUs according to the tree structure. This CU may also be generally referred to as a "video block" or "block".
[0115] In general, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for a current block (e.g., the current CU, or in HEVC, the overlapping portion of the PU and TU). For inter prediction of the current block, the motion estimation unit 222 can perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). In particular, the motion estimation unit 222 can calculate values indicating how similar the potential reference blocks are to the current block, for example, based on the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), etc. The motion estimation unit 222 can generally perform these calculations using the sample-by-sample differences between the current block and the reference block under consideration. The motion estimation unit 222 can identify the reference block having the lowest value obtained from these calculations, indicating the reference block that most closely matches the current block.
[0116] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in a current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, for unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, and for bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate values for the prediction block according to one or more interpolation filters. In addition, for bidirectional inter prediction, the motion compensation unit 224 may retrieve data for two reference blocks identified by the corresponding motion vectors and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.
[0117] As another example, for intra prediction or intra prediction codec, the intra prediction unit 226 can generate a prediction block from samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can generally mathematically combine the values of adjacent samples and pad these calculated values in a defined direction across the current block to produce a prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average value of samples adjacent to the current block and generate a prediction block to include the obtained average value for each sample of the prediction block.
[0118] The mode selection unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives the original, uncoded version of the current block from the video data memory 230 and receives the prediction block from the mode selection unit 202. The residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, the residual generation unit 204 may also determine the difference between the sample values in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.
[0119] In the example where the mode selection unit 202 partitions the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As indicated above, the size of the CU may refer to the size of the luma codec block of the CU, and the size of the PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2N×2N, the video encoder 200 may support PU sizes of 2N×2N or N×N for intra-frame prediction, and symmetric PU sizes of 2N×2N, 2N×N, N×2N, N×N or the like for inter-frame prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning of PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter-frame prediction.
[0120] In an example where the mode selection unit does not further partition the CU into PUs, each CU may be associated with a luma codec block and a corresponding chroma codec block. As above, the size of a CU may refer to the size of the luma codec block of the CU. The video encoder 200 and the video decoder 300 may support a CU size of 2N×2N, 2N×N, or N×2N.
[0121] For other video codec techniques, such as intra block copy mode codec, affine mode codec, and linear model (LM) mode codec, as a few examples, the mode selection unit 202 generates a prediction block for the current block being encoded via a corresponding unit associated with the codec technique. In some examples, such as palette mode codec, the mode selection unit 202 may not generate a prediction block, but instead generate syntax elements indicating a manner to reconstruct the block based on the selected palette. In such a mode, the mode selection unit 202 may provide these syntax elements to the entropy coding unit 220 for encoding.
[0122] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.
[0123] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 can apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 can apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 can perform multiple transforms on the residual block, such as a primary transform and a secondary transform, such as a rotation transform. In some examples, the transform processing unit 206 does not apply a transform to the residual block.
[0124] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce a loss of information, and therefore, the quantized transform coefficients may have a lower precision than the original transform coefficients produced by the transform processing unit 206.
[0125] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although it may have a certain degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples of the prediction block generated by the mode selection unit 202 to generate a reconstructed block.
[0126] Filter unit 216 may perform one or more filtering operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, the operations of filter unit 216 may be skipped.
[0127] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in an example where the operation of the filter unit 216 is performed, the reconstruction unit 214 may store the reconstructed blocks to the DPB 218. In an example where the operation of the filter unit 216 is not performed, the filter unit 216 may store the filtered reconstructed blocks to the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 may retrieve a reference picture from the DPB 218, which is formed by the reconstructed (and possibly filtered) blocks, to perform inter-frame prediction on blocks of subsequently encoded pictures. Additionally, the intra-frame prediction unit 226 may use the reconstructed blocks of the current picture in the DPB 218 to perform intra-frame prediction on other blocks in the current picture.
[0128] In general, the entropy coding unit 220 may entropy encode syntax elements received from other functional components of the video encoder 200. For example, the entropy coding unit 220 may entropy encode the quantized transform coefficient blocks from the quantization unit 208. As another example, the entropy coding unit 220 may entropy encode the prediction syntax elements (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from the mode selection unit 202. The entropy coding unit 220 may perform one or more entropy coding operations on the syntax elements as another example of video data to generate entropy-encoded data. For example, the entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential-Golomb coding operation, or another type of entropy coding operation on the data. In some examples, the entropy coding unit 220 may operate in a bypass mode, in which the syntax elements are not entropy encoded.
[0129] The video encoder 200 may output a bitstream including syntax elements for entropy coding required for reconstructing blocks of a slice or picture. In particular, the entropy coding unit 220 may output a bitstream.
[0130] The above operations are described with respect to blocks. This description should be understood as operations for luma codec blocks and / or chroma codec blocks. As described above, in some examples, the luma codec block and the chroma codec block are the luma component and chroma component of a CU. In some examples, the luma codec block and the chroma codec block are the luma component and chroma component of a PU.
[0131] In some examples, operations performed with respect to luma codec blocks do not need to be repeated for chroma codec blocks. As an example, operations to identify motion vectors (MVs) and reference pictures for luma codec blocks do not need to be repeated for identifying MVs and reference pictures for chroma blocks. Instead, the MVs for luma codec blocks may be scaled to determine MVs for chroma blocks, and the reference pictures may be the same. As another example, the intra prediction process may be the same for luma codec blocks and chroma codec blocks.
[0132] Video encoder 200 represents an example of a video encoder, which includes a memory and one or more processors, which are implemented in a circuit and are configured to: obtain multi-layer video data, the multi-layer video data including at least a first layer, a second layer, and a third layer; determine a layer identification value for the first layer, a layer identification value for the second layer, and a layer identification value for the third layer, wherein the layer identification value for the third layer is higher than the layer identification value for the second layer, and the layer identification value for the second layer is higher than the layer identification value for the second value; store decoded pictures of the first layer, decoded pictures of the second layer, and decoded pictures of the third layer in a decoded picture buffer; in response to determining that the pictures of the second layer are IDR pictures, remove all decoded pictures of the second layer and all decoded pictures of the third layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer; and after removing all decoded pictures of the second layer and all decoded pictures of the third layer from the decoded picture buffer, extract a copy of the decoded picture of the first layer to predict a block of a current picture of the multi-layer video data.
[0133] The video encoder 200 also represents an example of a video encoder, which includes a memory and one or more processors, which are implemented in a circuit and are configured to: obtain multi-layer video data, the multi-layer video data including at least a first layer and a second layer; determine a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer; store the decoded pictures of the first layer and the decoded pictures of the second layer in a decoded picture buffer; and in response to determining that the IDR picture belongs to the second layer, remove all decoded pictures of the second layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer.
[0134] Figure 7 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 7 It is provided for the purpose of explanation and does not limit the technology as widely illustrated and described in this disclosure. For the purpose of explanation, this disclosure describes a video decoder 300 according to the technology of JEM, VVC and HEVC. However, the technology of this disclosure can be performed by a video codec device configured for other video codec standards.
[0135] exist Figure 7 In the example of , the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or processing circuits. In addition, the video decoder 300 may include additional or alternative processors or processing circuits to perform these and other functions.
[0136] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units to perform predictions according to other prediction modes. As an example, the prediction processing unit 304 may include a palette codec unit, an intra block copy codec unit (which may form part of the motion compensation unit 316), an affine codec unit, a linear model (LM) codec unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.
[0137] The CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of the video decoder 300. The video data stored in the CPB memory 320 may be, for example, received from the computer-readable medium 110 ( Figure 1). The CPB memory 320 may include a CPB that stores encoded video data (e.g., syntax elements) from an encoded video bitstream. Moreover, the CPB memory 320 may store video data other than syntax elements of encoded and decoded pictures, such as temporary data representing outputs from various units of the video decoder 300. The DPB 314 typically stores decoded pictures, which the video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures of the encoded video bitstream. The CPB memory 320 and the DPB 314 may be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. The CPB memory 320 and the DPB 314 may be provided by the same memory device or a separate memory device. In various examples, the CPB memory 320 may be on-chip with other components of the video decoder 300, or off-chip relative to those components.
[0138] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1 ) to capture the encoded and decoded video data. That is, the memory 120 may store data using the CPB memory 320 as discussed above. Similarly, the memory 120 may store instructions to be executed by the video decoder 300 when some or all of the functionality of the video decoder 300 is implemented in software to be executed by the processing circuitry of the video decoder 300.
[0139] Picture shows Figure 7 Various units are shown to aid in understanding the operations performed by the video decoder 300. These units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 6 , fixed-function circuits refer to circuits that provide specific functionality and are preset on the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit can execute software or firmware so that the programmable circuit operates in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (for example, to receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more units may be integrated circuits.
[0140] The video decoder 300 may include an ALU, an EFU, a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video decoder 300 is performed by software executed on the programmable circuit, an on-chip or off-chip memory may store instructions (e.g., object code) of the software received and executed by the video decoder 300.
[0141] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to regenerate the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.
[0142] Typically, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (where the block currently being reconstructed, ie, the block being decoded, may be referred to as a "current block").
[0143] The entropy decoding unit 302 may entropy decode syntax elements defining quantized transform coefficients of the quantized transform coefficient block and transform information, such as a quantization parameter (QP) and / or (multiple) transform mode indications. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization and, similarly, a degree of inverse quantization to be applied for the inverse quantization unit 306. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.
[0144] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the coefficient block.
[0145] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax elements entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax elements indicate that the current block is inter-predicted, motion compensation unit 316 can generate the prediction block. In this case, the prediction information syntax elements can indicate the reference picture in DPB 314 from which the reference block was retrieved, and the motion vector that identifies the position of the reference block in the reference picture relative to the current block in the current picture. Motion compensation unit 316 can generally generate the prediction block in the same manner as relative to motion compensation unit 224 ( Figure 6 ) describes an inter-frame prediction process in a manner substantially similar to that described herein.
[0146] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Again, the intra-prediction unit 318 may generally generate a prediction block in the same manner as the intra-prediction unit 226 ( Figure 6 The intra prediction unit 318 may retrieve data of samples adjacent to the current block from the DPB 314.
[0147] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.
[0148] The filter unit 312 may perform one or more filtering operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filter unit 312 may not necessarily be performed in all examples.
[0149] The video decoder 300 may store the reconstructed blocks in the DPB 314. As described above, the DPB 314 may provide reference information to the prediction processing unit 304, such as samples of the current picture for intra prediction and previously decoded pictures for subsequent motion compensation. In addition, the video decoder 300 may output decoded pictures from the DPB 314 for subsequent presentation on a display device, such as a Figure 1 Display device 118.
[0150] The video decoder 300 represents an example of a video decoder, which includes a memory and one or more processors, which are implemented in a circuit and are configured to: receive multi-layer video data, the multi-layer video data including at least a first layer, a second layer, and a third layer; determine a layer identification value for the first layer, a layer identification value for the second layer, and a layer identification value for the third layer, wherein the layer identification value for the third layer is higher than the layer identification value for the second layer, and the layer identification value for the second layer is higher than the layer identification value for the second value; store decoded pictures of the first layer, decoded pictures of the second layer, and decoded pictures of the third layer in a decoded picture buffer; in response to determining that the pictures of the second layer are IDR pictures, remove all decoded pictures of the second layer and all decoded pictures of the third layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer; and after removing all decoded pictures of the second layer and all decoded pictures of the third layer from the decoded picture buffer, extract a copy of the decoded picture of the first layer to predict a block of a current picture of the multi-layer video data.
[0151] The video decoder 300 also represents an example of a video decoder, which includes a memory and one or more processors, which are implemented in a circuit and are configured to: obtain multi-layer video data, the multi-layer video data including at least a first layer and a second layer; determine a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer; store the decoded pictures of the first layer and the decoded pictures of the second layer in a decoded picture buffer; and in response to determining that the IDR picture belongs to the second layer, remove all decoded pictures of the second layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer.
[0152] The video decoder 300 also represents an example of a video decoder that includes a memory and one or more processors that are implemented in a circuit and configured to: receive a first picture in video data; determine a POC value for the first picture; receive a second picture in video data; determine a POC value for the second picture; and detect the start of a new access unit based on the POC value for the first picture and the POC value for the second picture. To detect the start of a new access unit based on the POC value for the first picture and the POC value for the second picture, the video decoder 300 may, for example, compare the POC value for the first picture with the POC value for the second picture, and detect the start of the new access unit in response to the POC value for the second picture differing from the POC value for the first picture by more than a threshold amount. The second picture may belong to a new access unit, and the first picture may belong to a previous access unit. The first picture may have the lowest POC value among all pictures in the previous access unit.
[0153] The video decoder 300 also represents an example of a video decoder that includes a memory and one or more processors that are implemented in a circuit and configured to: receive a first NAL unit in the video data; determine a time identification (ID) for the first NAL unit; receive a second NAL unit in the video data; determine a time ID for the second NAL unit; and detect the start of a new access unit based on the time ID for the first NAL unit and the time ID for the second NAL unit. To detect the start of a new access unit based on the time ID for the first NAL unit and the time ID for the second NAL unit, the video decoder 300 may compare the time ID for the first NAL unit with the time ID for the second NAL unit, and in response to the time ID for the first NAL unit being different from the time ID for the second NAL unit, detect the start of the new access unit. The second NAL unit may belong to a new access unit, and the first NAL unit may belong to a previous access unit.
[0154] Figure 8 2 is a flowchart illustrating an exemplary process for encoding a current block. The current block may include a current CU. Although relative to the video encoder 200 ( Figure 1 and Figure 6 ), but it should be understood that other devices may still be configured to perform the same Figure 8 The process is similar to the process.
[0155] In this example, the video encoder 200 initially predicts the current block (350). As part of predicting the current block, the video encoder 200 may maintain the DPB according to the techniques described herein. For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). In order to calculate the residual block, the video encoder 200 may calculate the difference between the original, uncoded block and the prediction block for the current block. The video encoder 200 may then transform and quantize the transform coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During or after the scan, the video encoder 200 may entropy encode the coefficients (358). For example, the video encoder 200 may encode the coefficients using CAVLC or CABAC. The video encoder 200 may then output entropy-encoded data of the block (360).
[0156] Fig. 9 300 ( Figure 1 and Figure 8), but it should be understood that other devices may still be configured to perform the same Fig. 9 The process is similar to the process.
[0157] The video decoder 300 may receive entropy-coded data for a current block, such as entropy-coded prediction information and entropy-coded data for coefficients of a residual block corresponding to the current block (370). The video decoder 300 may entropy decode the entropy-coded data to determine prediction information for the current block and to regenerate coefficients of the residual block (372). The video decoder 300 may predict the current block (374), for example, using an intra-frame or inter-frame prediction mode as indicated by the prediction information for the current block, to calculate a prediction block for the current block. As part of predicting the current block, the video encoder 200 may maintain a DPB according to the techniques described herein. The video decoder 300 may then inverse scan the regenerated coefficients (376) to create a block of quantized transform coefficients. The video decoder 300 may then inverse quantize and inverse transform the coefficients to generate a residual block (378). The video decoder 300 may ultimately decode the current block by combining the prediction block and the residual block (380).
[0158] Fig.10 is a flow chart illustrating an exemplary process for maintaining the DPB. Fig.10 The universal video decoder may correspond, for example, to the video decoder 300 or to the decoding functionality of the video encoder 200. The universal video decoder may, for example, be part of a wireless communication device that includes a receiver configured to receive multi-layer video data. The video decoder may be part of a telephone handset having a receiver that is configured to demodulate a signal including multi-layer video data according to a wireless communication standard. In other examples, the universal video decoder may be part of one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box. In some examples, the universal video decoder may include or communicate with a display configured to display the decoded multi-layer video data.
[0159] The video decoder obtains multi-layer video data, which includes at least a first layer and a second layer (400). The video decoder 300 may obtain the multi-layer video data, for example, from an encoded bit stream stored in the CPB memory 320. The video encoder 200 may obtain the multi-layer video data as an output, for example, from the filter unit 216 or the DPB 218. For example, the first layer may be an independently decodable layer, and the second layer may depend on the first layer, which means that the video decoder 300 needs to access information included in the first layer in order to decode the second layer.
[0160] The video decoder determines a layer identification value for a first layer and a layer identification value for a second layer (402). In this example, the layer identification values are different. In particular, the layer identification value for the second layer is higher than the layer identification value for the first layer.
[0161] The video decoder stores the decoded pictures of the first layer and the decoded pictures of the second layer in the DPB (404). For example, the DPB may correspond to Figure 6 DPB 218 or Figure 7 DPB 314.
[0162] In response to determining that the IDR picture belongs to the second layer, the video decoder removes (eg, discards or pages out) all decoded pictures of the second layer from the DPB while leaving all decoded pictures of the first layer in the decoded picture buffer (406).
[0163] In one example, the multi-layer video data may include a third layer having a layer identification value that is higher than the layer identification value for the second layer, and therefore higher than the layer identification for the first layer. The video decoder stores the decoded pictures of the third layer in a decoded picture buffer, and in response to determining that the IDR picture belongs to the second layer, removes all decoded pictures of the second layer and all decoded pictures of the third layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer. After removing all decoded pictures of the second layer and all decoded pictures of the third layer from the decoded picture buffer, the video decoder extracts a copy of the decoded picture of the first layer to predict a block of a current picture of the multi-layer video data. After extracting a copy of the decoded picture of the first layer, the video decoder may, for example, use the copy of the decoded picture of the first layer as a reference picture for performing inter-frame prediction. The video decoder may, for example, extract a decodable bitstream including the first layer and the third layer without the second layer from the multi-layer video data.
[0164] The video decoder may additionally be configured to obtain multi-layer video data by receiving a first access unit including a first picture of one or more layers and receiving a second access unit including one or more second pictures of the layers. The video decoder may, for example, determine that the VCL NAL unit of the second access unit corresponds to the beginning of the second access unit in response to determining that (1) the layer identifier of the VCL NAL unit of the second access unit is less than the layer identifier of the immediately preceding picture in decoding order, and (2) the POC value of the VCL NAL unit of the second access unit is different from the POC value of the immediately preceding picture in decoding order. The NAL unit received between the VCL NAL unit of the second access unit and the last VCL NAL unit of the immediately preceding picture may be an access unit delimiter NAL unit.
[0165] It can be appreciated that, depending on the example, certain actions or events of any of the techniques described herein may be performed in a different order, may be added, combined, or omitted altogether (e.g., not all described actions or events are necessary for the practice of the techniques). Additionally, in some examples, actions or events may be performed simultaneously, such as through multithreading, interrupt handling, or multiple processors, rather than sequentially.
[0166] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored or sent as one or more instructions or codes on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media corresponding to tangible media such as data storage media, or communication media including any media that facilitates the transfer of a computer program from one place to another, for example, according to a communication protocol. In this manner, computer-readable media may generally correspond to (1) non-transitory tangible computer-readable storage media, or (2) communication media such as signals or carrier waves. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures for implementing the techniques described in the present disclosure. A computer program product may include a computer-readable medium.
[0167] By way of example and not limitation, this computer-readable storage medium may include any one or more of the following: RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage device, flash memory, or any other medium that can be used to store the desired program code in the form of instructions or data structures and accessible by a computer. In addition, any connection is properly referred to as a computer-readable medium. For example, if the instruction is sent from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave), the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology (such as infrared, radio and microwave) are all included in the definition of the medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals or other temporary media, but point to non-temporary tangible storage media. As used herein, disks and discs include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks and blue-ray discs, wherein the disks usually reproduce data magnetically, while the discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
[0168] The instructions may be run by one or more processors, such as one or more DSPs, general-purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuits. Accordingly, the terms "processor" and "processing circuitry" as used herein may refer to any of the aforementioned structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or may be incorporated into a combined codec. Furthermore, these techniques may be fully implemented in one or more circuits or logic elements.
[0169] The techniques of the present disclosure may be implemented in a wide variety of devices or apparatuses, including wireless handsets, integrated circuits (ICs), or collections of ICs (e.g., chipsets). Various components, modules, or units are described in the present disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require implementation by different hardware units. Instead, as described above, the various units may be combined in a codec hardware unit in conjunction with appropriate software and / or firmware, or provided by a collection of interoperable hardware units including one or more processors as described above.
[0170] Various examples have been described. These and other examples are within the scope of the following claims.
Claims
1. A method for decoding multi-layer video data, the method comprising: Obtaining the multi-layer video data, wherein the multi-layer video data includes at least a first layer and a second layer, wherein obtaining the multi-layer video data including at least the first layer and the second layer includes receiving a first access unit including a first picture of one or more layers and receiving a second access unit including a second picture of the one or more layers; In response to determining that (1) a layer identifier of a video codec layer (VCL) network abstraction layer (NAL) unit of the second access unit is less than a layer identifier of an immediately preceding picture in decoding order and (2) a picture order count (POC) value of the VCL NAL unit of the second access unit is different from a POC value of the immediately preceding picture in the decoding order, determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit; and In response to determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit, determining that the second picture of the second access unit is associated with a same temporal output.
2. The method according to claim 1, further comprising: determining a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer; storing the decoded picture of the first layer and the decoded picture of the second layer in a decoded picture buffer; and In response to determining that the instantaneous decoding refresh (IDR) picture belongs to the second layer, all decoded pictures of the second layer are removed from the decoded picture buffer while leaving all decoded pictures of the first layer in the decoded picture buffer.
3. The method according to claim 1, wherein: The first layer comprises an independently decodable layer.
4. The method according to claim 1, wherein: The second layer is dependent on the first layer.
5. The method according to claim 2, wherein: The multi-layer video data further includes a third layer, and the method includes: determining a layer identification value for the third layer, wherein the layer identification value for the third layer is higher than the layer identification value for the second layer; storing the decoded picture of the third layer in the decoded picture buffer; In response to determining that the IDR picture belongs to the second layer, removing all decoded pictures of the second layer and all decoded pictures of the third layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer; and After removing all the decoded pictures of the second layer and all the decoded pictures of the third layer from the decoded picture buffer, a copy of the decoded picture of the first layer is retrieved to predict a block of a current picture of the multi-layer video data.
6. The method according to claim 5, further comprising: A decodable bitstream including the first layer and the third layer without the second layer is extracted from the multi-layer video data.
7. The method according to claim 1, wherein: NAL units received between the VCL NAL unit of the second access unit and a last VCL NAL unit of the immediately previous picture include an access unit delimiter NAL unit.
8. The method according to claim 1, wherein: Obtaining the multi-layer video data includes storing the multi-layer video data in a memory of a wireless communication device, the method further comprising: encoding the multi-layer video data with one or more processors of the wireless communication device; and The encoded multi-layer video data is transmitted from a transmitter of the wireless communication device.
9. The method according to claim 8, wherein: The wireless communication device comprises a telephone handset, and wherein transmitting the multi-layer video data at a transmitter of the wireless communication device comprises modulating a signal comprising the multi-layer video data in accordance with a wireless communication standard.
10. The method according to claim 1, wherein: Obtaining the multi-layer video data includes receiving the multi-layer video data at a receiver of a wireless communication device, the method further comprising: storing the multiple layers of video data in a memory of the wireless communication device; and The multi-layer video data is decoded using one or more processors of the wireless communication device.
11. The method according to claim 10, wherein: The wireless communication device comprises a telephone handset, and wherein receiving the multi-layer video data at the receiver of the wireless communication device comprises demodulating a signal comprising the multi-layer video data in accordance with a wireless communication standard.
12. A device for decoding multi-layer video data, the device comprising: a memory configured to store the multi-layer video data; and One or more processors implemented in circuitry and configured to: Obtaining the multi-layer video data, wherein the multi-layer video data comprises at least a first layer and a second layer, wherein, to obtain the multi-layer video data comprising at least the first layer and the second layer, the one or more processors are further configured to receive a first access unit comprising a first picture of one or more layers and to receive a second access unit comprising a second picture of the one or more layers; In response to determining that (1) a layer identifier of a video codec layer (VCL) network abstraction layer (NAL) unit of the second access unit is less than a layer identifier of an immediately preceding picture in decoding order and (2) a picture order count (POC) value of the VCL NAL unit of the second access unit is different from a POC value of the immediately preceding picture in decoding order, determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit; and In response to determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit, determining that the second picture of the second access unit is associated with a same temporal output.
13. The device according to claim 12, wherein: The one or more processors are further configured to: determining a layer identification value for the first layer and a layer identification value for the second layer, wherein the layer identification value for the second layer is higher than the layer identification value for the first layer; storing the decoded picture of the first layer and the decoded picture of the second layer in a decoded picture buffer; and In response to determining that an instantaneous decoding refresh (IDR) picture belongs to the second layer, all the decoded pictures of the second layer are removed from the decoded picture buffer while leaving all the decoded pictures of the first layer in the decoded picture buffer.
14. The apparatus according to claim 12, wherein: The first layer comprises an independently decodable layer.
15. The apparatus according to claim 12, wherein: The second layer is dependent on the first layer.
16. The apparatus according to claim 13, wherein: The multi-layer video data further includes a third layer, and the one or more processors are further configured to: determining a layer identification value for the third layer, wherein the layer identification value for the third layer is higher than the layer identification value for the second layer; storing the decoded picture of the third layer in the decoded picture buffer; In response to determining that the IDR picture belongs to the second layer, removing all decoded pictures of the second layer and all decoded pictures of the third layer from the decoded picture buffer, while leaving all decoded pictures of the first layer in the decoded picture buffer; and After removing all the decoded pictures of the second layer and all the decoded pictures of the third layer from the decoded picture buffer, a copy of the decoded picture of the first layer is retrieved to predict a block of a current picture of the multi-layer video data.
17. The device according to claim 16, wherein: The one or more processors are further configured to: A decodable bitstream including the first layer and the third layer without the second layer is extracted from the multi-layer video data.
18. The apparatus according to claim 12, wherein: NAL units received between the VCL NAL unit of the second access unit and a last VCL NAL unit of the immediately previous picture include an access unit delimiter NAL unit.
19. The apparatus according to claim 12, wherein: The apparatus comprises a wireless communication device and further comprises a receiver configured to receive the multi-layer video data.
20. The apparatus of claim 19, wherein: The wireless communication device comprises a telephone handset, and wherein the receiver is configured to demodulate a signal comprising the multi-layer video data in accordance with a wireless communication standard.
21. The apparatus of claim 12, further comprising: A display is configured to display the decoded multi-layer video data.
22. The apparatus of claim 12, wherein: The device includes one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.
23. A computer-readable storage medium storing instructions that, when executed by one or more processors, cause the one or more processors to: Obtain multi-layer video data, where The multi-layer video data includes at least a first layer and a second layer, wherein obtaining the multi-layer video data including at least the first layer and the second layer includes receiving a first access unit including a first picture of one or more layers and receiving a second access unit including a second picture of the one or more layers; In response to determining that (1) a layer identifier of a video codec layer (VCL) network abstraction layer (NAL) unit of the second access unit is less than a layer identifier of an immediately preceding picture in decoding order and (2) a picture order count (POC) value of the VCL NAL unit of the second access unit is different from a POC value of the immediately preceding picture in the decoding order, determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit; and In response to determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit, determining that the second picture of the second access unit is associated with a same temporal output.
24. An apparatus for decoding multi-layer video data, the apparatus comprising: means for obtaining the multi-layer video data, wherein the multi-layer video data comprises at least a first layer and a second layer, wherein obtaining the multi-layer video data comprising at least the first layer and the second layer comprises receiving a first access unit comprising a first picture of one or more layers and receiving a second access unit comprising a second picture of the one or more layers; In response to determining that (1) a layer identifier of a video codec layer (VCL) network abstraction layer (NAL) unit of the second access unit is less than a layer identifier of an immediately preceding picture in decoding order and (2) a picture order count (POC) value of the VCL NAL unit of the second access unit is different from a POC value of the immediately preceding picture in decoding order, a component for determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit; and In response to determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit, means for determining that the second picture of the second access unit is associated with a same temporal output.
25. A computer program product comprising computer instructions which, when executed by a processor, cause the processor to perform a method of decoding multi-layer video data, the method comprising: Obtaining the multi-layer video data, wherein the multi-layer video data includes at least a first layer and a second layer, wherein obtaining the multi-layer video data including at least the first layer and the second layer includes receiving a first access unit including a first picture of one or more layers and receiving a second access unit including a second picture of the one or more layers; In response to determining that (1) a layer identifier of a video codec layer (VCL) network abstraction layer (NAL) unit of the second access unit is less than a layer identifier of an immediately preceding picture in decoding order and (2) a picture order count (POC) value of the VCL NAL unit of the second access unit is different from a POC value of the immediately preceding picture in the decoding order, determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit; and In response to determining that the VCL NAL unit of the second access unit corresponds to the start of the second access unit, determining that the second picture of the second access unit is associated with a same temporal output.