Display panel and display device

Abstract

The embodiment of the present invention discloses a display panel and a display device, wherein the display panel includes a substrate, the substrate is divided into a display area and a non-display area, the non-display area includes a fan-out area and a bending area, the fan-out area is located between the bending area and the display area; the display area includes a plurality of first data lines extending along a first direction, and also includes a plurality of first connection lines and a plurality of second connection lines, the second connection lines are located in the bending area, and the second connection lines are connected to the corresponding first data lines through the first connection lines; wherein the first connection lines enter the display area through the fan-out area and are connected to the first data lines. The technical solution provided by the embodiment of the present invention does not require oblique wiring in the fan-out area, and can greatly reduce the width of the fan-out area, thereby reducing the width of the lower frame of the display panel.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development trend of extreme full-screen, the borders of display panels are getting narrower and the screen-to-body ratio is getting higher, bringing consumers a more extreme experience.

[0003] Currently, the bottom border of the display panel still has a large width. Summary of the invention

[0004] Embodiments of the present invention provide a display panel and a display device to reduce the width of a lower frame and achieve a narrow lower frame.

[0005] In a first aspect, an embodiment of the present invention provides a display panel, including a substrate, wherein the substrate is divided into a display area and a non-display area, wherein the non-display area includes a fan-out area and a bending area, and the fan-out area is located between the bending area and the display area;

[0006] The display area includes a plurality of data lines extending along a first direction, the data lines include a plurality of first data lines, and the areas where the first data lines are located are located at two sides of the display area;

[0007] The display panel further includes a plurality of first connection lines and a plurality of second connection lines, wherein the first connection lines are located in the display area and the fan-out area, the second connection lines are located in the bending area, and the second connection lines are connected to the corresponding first data lines through the first connection lines;

[0008] The portion of the first connection line located in the fan-out area extends along the first direction.

[0009] Optionally, the first connecting line includes a first sub-segment and a second sub-segment, one end of the second sub-segment is connected to the first data line, the other end of the second sub-segment is connected to one end of the first sub-segment, and the other end of the first sub-segment is connected to the second connecting line;

[0010] The second sub-segment is located in the display area, at least part of the first sub-segment is located in the fan-out area, and the first sub-segment extends along the first direction.

[0011] Optionally, the second subsegment extends along a second direction, and the first direction and the second direction intersect each other; preferably, along a direction parallel to a display surface of the display panel, the first direction and the second direction are perpendicular to each other.

[0012] Optionally, the first connection line, the data line, and the second connection line are all in different layers, and the first connection line is connected to the first data line through a via.

[0013] Optionally, the first connection line is located in a first metal layer, the data line is located in a second metal layer, and the first metal layer is located on one side of the substrate; the display panel further includes:

[0014] A first interlayer dielectric layer, located on a side of the first metal layer away from the substrate;

[0015] A gate insulating layer, located on a side of the first interlayer dielectric layer away from the substrate;

[0016] A third metal layer is located on a side of the gate insulating layer away from the substrate;

[0017] A capacitor insulating layer, located on a side of the third metal layer away from the substrate;

[0018] A fourth metal layer is located on a side of the capacitor insulating layer away from the substrate;

[0019] A second interlayer dielectric layer is located on a side of the fourth metal layer away from the substrate, and the second metal layer is located on a side of the second interlayer dielectric layer away from the substrate;

[0020] a third interlayer dielectric layer, located on a side of the second metal layer away from the substrate;

[0021] The fifth metal layer is located on a side of the third interlayer dielectric layer away from the substrate, and the second connecting line is located on the fifth metal layer.

[0022] Optionally, the first connection line is located in a first metal layer, the data line is located in a second metal layer, and the display panel further includes:

[0023] A gate insulating layer, located on one side of the substrate;

[0024] A third metal layer is located on a side of the gate insulating layer away from the substrate;

[0025] A capacitor insulating layer, located on a side of the third metal layer away from the substrate;

[0026] A fourth metal layer is located on a side of the capacitor insulating layer away from the substrate;

[0027] A second interlayer dielectric layer is located on a side of the fourth metal layer away from the substrate, and the second metal layer is located on a side of the second interlayer dielectric layer away from the substrate;

[0028] a third interlayer dielectric layer, located on a side of the second metal layer away from the substrate;

[0029] A fifth metal layer is located on a side of the third interlayer dielectric layer away from the substrate, and the second connecting line is located on the fifth metal layer;

[0030] The first interlayer dielectric layer is located at a side of the fifth metal layer away from the substrate, and the first metal layer is located at a side of the first interlayer dielectric layer away from the substrate.

[0031] Optionally, the first connection line is located in a first metal layer, the data line is located in a second metal layer, and the first connection line is connected to the first data line through a first line switching portion;

[0032] Preferably, it further includes a second line changing portion, and the first connecting line is connected to the first data line via the first line changing portion and the second line changing portion in sequence.

[0033] Optionally, the display panel further comprises a plurality of third connection lines located in the fan-out region, the data lines further comprise a plurality of second data lines, and the region where the first data lines are located is located on both sides of the region where the second data lines are located;

[0034] In the fan-out region, the third connection line extends along the first direction, and the second connection line is connected to the corresponding second data line through the third connection line.

[0035] Optionally, the non-display area further includes a fourth connection line connected to the gate driving circuit, the fourth connection line includes at least one of a clock signal line and a power line, and in the fan-out area, the fourth connection line is connected to the second connection line through a via.

[0036] In a second aspect, an embodiment of the present invention further provides a display device, which includes the display panel provided by any embodiment of the present invention.

[0037] The display panel and display device provided by the embodiment of the present invention include a plurality of data lines extending along a first direction, the data lines include a plurality of first data lines and a plurality of second data lines, and the area where the first data lines are located is located on both sides of the area where the second data lines are located; and also include a plurality of first connection lines and a plurality of second connection lines, and the second connection lines are connected to the corresponding first data lines through the first connection lines. Among them, the first connection lines are located in the fan-out area and the display area, and the part of the first connection lines located in the fan-out area extends along the first direction. Compared with the prior art, the technical solution provided by the embodiment of the present invention avoids connecting the first data lines through oblique routing in the fan-out area by adopting a method in which the first connection lines enter the display area through the fan-out area and are connected to the first data lines located in the arc angle area of ​​the display area. It is precisely because the first connection lines are connected to the first data lines after entering the display area through the fan-out area, there is no need to obliquely wire in the fan-out area, which can greatly reduce the width of the fan-out area, thereby reducing the width of the lower frame of the display panel, which is conducive to realizing the lower narrow frame of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 A schematic diagram of the structure of a display panel provided by the prior art;

[0039] Figure 2 A schematic diagram of a top view structure of a display panel provided by an embodiment of the present invention;

[0040] Figure 3 A schematic cross-sectional structure diagram of a display panel provided by an embodiment of the present invention;

[0041] Figure 4 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention;

[0042] Figure 5 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention;

[0043] Figure 6 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention;

[0044] Figure 7 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention;

[0045] Figure 8 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention;

[0046] Fig. 9 A schematic diagram of a top view of a display device provided by an embodiment of the present invention;

[0047] Fig.10 A schematic top view of another display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0048] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0049] As described in the background technology, the left and right frames and the upper frame of the display panel in the prior art can be made very narrow (for example, the width is less than 1mm), while the width of the lower frame is often greater than 1mm, and there is a phenomenon that the lower frame is too wide, which is not conducive to the development of the lower narrow frame. The inventors have found that the reason for the above problem is that the lower frame of the display panel is usually designed with a relatively dense array of wiring, making the structure of the lower frame more complicated than other frames. For example, Figure 1 A schematic diagram of a display panel provided by the prior art, referring to Figure 1 When arranging these array wirings, the oblique wiring method is usually selected, and the connecting wires led out from the bending area BA are obliquely wired in the fan-out area FA to realize the connection of the data lines Data in the display area AA. In the display area AA, there are usually many data lines Data. As the resolution increases, the number of data lines Data also increases rapidly. For example, at a resolution of 1080*2340, there are 2160 data lines Data. When the oblique wiring is used in the prior art, in order to prevent short circuits between the connecting wires, the width of the lower frame needs to be increased, that is, the value of a will be very large (greater than 1mm), which is not conducive to achieving a narrow lower frame.

[0050] Based on the above problems, embodiments of the present invention provide a display panel and a display device to achieve a narrow bottom frame. Figure 2 A schematic diagram of a top view of a display panel provided by an embodiment of the present invention is shown. Figure 3 A schematic cross-sectional structure diagram of a display panel provided by an embodiment of the present invention, specifically: Figure 2 The cross-sectional view of the display panel along the cutting line CC' is shown in FIG. Figure 2 and 3 The display panel provided by the embodiment of the present invention includes a substrate 30, the substrate 30 is divided into a display area AA and a non-display area NA, the non-display area NA includes a fan-out area FA and a bending area BA, and the fan-out area FA is located between the bending area BA and the display area AA;

[0051] The display area AA includes a plurality of data lines extending along a first direction, the data lines include a plurality of first data lines 11, and the areas where the first data lines 11 are located are located on both sides of the display area AA;

[0052] The display panel also includes a plurality of first connection lines 21 and a plurality of second connection lines 22, the first connection lines 21 are located in the display area AA and the fan-out area FA, the second connection lines 22 are located in the bending area BA, and the second connection lines 22 are connected to the first data lines 11 through the first connection lines 21; wherein the portion of the first connection lines 21 located in the fan-out area FA extends along the first direction.

[0053] Specifically, the display area AA is used to realize the display function of the display panel, and a pixel circuit composed of a thin film transistor is arranged in the display area AA, which is used to drive the light-emitting element on the substrate 30 to emit light. A plurality of data lines extending along a first direction are also arranged in the display area AA, which are used to transmit data voltages to the pixel circuit, wherein the first direction may be a Y direction, and the data lines include a plurality of first data lines 11 extending to the arc angle region.

[0054] The display panel also includes a plurality of first connection lines 21 and a plurality of second connection lines 22, wherein the first connection line 21 includes a portion located in the display area AA and another portion in the fan-out area FA, and the second connection line 22 is located in the bending area BA. The second connection line 22 is connected to the corresponding data line through the first connection line 21. In other words, the first connection line 21 enters the display area AA through the fan-out area FA and is connected to the first data line 11 in the arc angle area. The first connection line 21 is wired in both the display area AA and the fan-out area FA. In other words, a portion of the first connection line 21 is wired in the fan-out area FA, and the other portion is wired in the display area AA. In this way, the first connection line can be connected to the corresponding first data line 11 in the display area AA, thereby eliminating the need to be wired obliquely in the fan-out area FA to connect to the corresponding first data line 11. Since the first data line 11 in the arc angle area is no longer connected to the second connection line 22 by being wired obliquely in the fan-out area FA, the width of the fan-out area FA can be greatly reduced, that is, the width of the lower frame of the display panel is reduced.

[0055] The second connection line 22 is used to transmit the data voltage output by the driver chip to the corresponding data line. In the prior art, the second connection line 22 located in the bending area BA is connected to the corresponding data line one by one through an oblique line arranged in the fan-out area FA. In this embodiment, since the first connection line 21 enters the display area AA through the fan-out area FA and is connected to the first data line 11 in the arc angle area, the multiple second connection lines 22 corresponding to the first data line 11 in the arc angle area can be inserted between the multiple second connection lines 22 used to connect the data lines in the non-arc angle area (adjacent second connection lines 22 have sufficient spacing, such as Figure 1 The first connecting line 21 then enters the display area AA from the fan-out area FA and connects to the first data line 11. Of course, in other embodiments, the second connecting line 22 may be re-set at the position of the original routing line. This embodiment is not limited to this.

[0056] The display panel provided by the embodiment of the present invention includes a plurality of data lines extending along a first direction, wherein the data lines include a plurality of first data lines, and the areas where the first data lines are located are located on both sides of the display area; and further includes a plurality of first connection lines and a plurality of second connection lines, and the second connection lines are connected to the first data lines through the first connection lines. Among them, the first connection lines are located in the fan-out area and the display area, and the part located in the fan-out area extends along the first direction. Compared with the prior art, the technical solution provided by the embodiment of the present invention avoids connecting the first data lines through oblique routing in the fan-out area by adopting a method in which the first connection line enters the display area through the fan-out area and is connected to the first data line located in the arc angle area of ​​the display area. It is precisely because the first connection line enters the display area through the fan-out area and then connects to the first data line, there is no need to obliquely wire in the fan-out area, which can greatly reduce the width of the fan-out area, thereby reducing the width of the lower frame of the display panel, which is conducive to realizing a narrow lower frame of the display panel.

[0057] Furthermore, the first connecting line 21 includes a first sub-segment 201 and a second sub-segment 202, one end of the second sub-segment 202 is connected to the first data line 11, the other end of the second sub-segment 202 is connected to one end of the first sub-segment 201, and the other end of the first sub-segment 201 is connected to the corresponding second connecting line 22; the second sub-segment 202 is located in the display area AA, at least part of the first sub-segment 201 is located in the fan-out area FA, and the first sub-segment 201 extends along the first direction.

[0058] In some embodiments of the present application, the first connection line 21 and the data line are arranged in the same layer. In this embodiment, the first connection line 21 is located in the first metal layer M1, and the data line is located in the second metal layer M2. Since the first connection line 21 and the data line are arranged in different layers, the first connection line 21 can be electrically connected to the data line through a via in the display area AA, so as to reduce the wiring space occupied by the display panel, which is conducive to achieving a narrow frame and flexible wiring.

[0059] Since the first data line 11 is located on both sides of the display area AA, the second connection line 22 in the bending area is generally arranged corresponding to the central area of ​​the display area AA, so the first connection line 21 needs to be bent. Specifically, the first connection line 21 includes a first sub-segment 201 extending along the first direction and a second sub-segment 202 extending along the second direction, wherein the first direction may be the Y direction, the second direction may be the X direction, the Y direction and the X direction intersect each other, and preferably, along the direction parallel to the display surface of the display panel, the Y direction and the X direction are perpendicular to each other. The second sub-segment 202 is located in the display area AA, and the second sub-segment 202 is connected to the first data line 11 through a via hole. The first sub-segment 201 enters the display area AA vertically from the fan-out area FA along the first direction and is connected to the second sub-segment 202. In this way, the first data line 11 is connected to the second connection line 22 by vertical routing in the fan-out area FA. Compared with the oblique routing method, the vertical routing along the first direction can minimize the width of the fan-out area FA, and can further reduce the width of the lower frame of the display panel.

[0060] In addition, continue to refer to Figure 2 , the display panel further includes a plurality of third connection lines 23 located in the fan-out area FA, the data lines further include a plurality of second data lines 12, and the area where the first data lines 11 are located is located on both sides of the area where the second data lines 12 are located. The second connection lines 22 located in the bending area BA are connected to the second data lines 12 through the third connection lines 23 extending along the first direction, wherein the third connection lines 23 are located in the fan-out area FA. Therefore, the second connection lines 22 are connected to the corresponding data lines through the first connection lines 21 or the third connection lines 23, so that the second data lines 12 in the non-arc angle area and the first data lines 11 in the arc angle area are vertically connected along the first direction in the fan-out area FA. The routing lines (the first sub-segment 201 and the third connection lines 23) in the fan-out area FA are all extended along the first direction, wherein a second connection line 22 for connecting the first sub-metal segment 201 is arranged between two adjacent second connection lines 22 for connecting the third connection lines 23, and has a higher process yield. That is, the first connection line 21 enters the display area AA vertically along the first direction through the fan-out area FA and is connected to the first data line 11 in the arc angle area, thereby enabling the first connection line 21 to enter the display area AA vertically, thereby eliminating the need to connect the first data line 11 obliquely in the fan-out area FA. The third connection line 23 located in the fan-out area FA extends along the first direction, and a vertical wiring method is formed in the fan-out area FA so that the second connection line 22 is vertically connected to the corresponding second data line 12. Since the wiring in the fan-out area FA adopts a vertical wiring method, the width of the fan-out area FA can be greatly reduced, that is, the width of the lower frame of the display panel is reduced.

[0061] Figure 4A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention, wherein: Figure 4 The left half of the cross section corresponds to Figure 2 The right half corresponds to the cross-sectional view of the pixel portion in the display area AA, refer to Figures 2 to 4 , the first metal layer M1 is located on the side of the substrate 30; the display panel also includes: a first interlayer dielectric layer 50, located on the side of the first metal layer M1 away from the substrate 30; a gate insulating layer 60, located on the side of the first interlayer dielectric layer 50 away from the substrate 30; a third metal layer M3, located on the side of the gate insulating layer 60 away from the substrate 30; a capacitor insulating layer 70, located on the side of the third metal layer M3 away from the substrate 30; a fourth metal layer M4, located on the side of the capacitor insulating layer 70 away from the substrate 30; a second interlayer dielectric layer 80, located on the side of the fourth metal layer M4 away from the substrate 30, and the second metal layer M2 is located on the side of the second interlayer dielectric layer 80 away from the substrate 30; a third interlayer dielectric layer 90, located on the side of the second metal layer M2 away from the substrate 30; a fifth metal layer M5, located on the side of the third interlayer dielectric layer 90 away from the substrate 30, and the second connecting line 22 is located on the fifth metal layer M5.

[0062] Specifically, the substrate 30 may be a flexible substrate, which is convenient for bending. A buffer layer 40 is provided on the substrate 30, which can play a protective buffering role. A first metal layer M1 is provided on the buffer layer 40, and the first connecting line 21 is located on the first metal layer M1. The first interlayer dielectric layer 50 covers the first metal layer M1, wherein the first interlayer dielectric layer 50 may be a silicon nitride and / or silicon oxide layer, which is used to play an insulating isolation role. An active layer 601 for forming a thin film transistor 61 is provided on the side of the first interlayer dielectric layer 50 away from the substrate 30, and the active layer 601 includes a source region, a drain region and a channel region, and the channel region is located between the source region and the drain region. A gate layer 602 is formed at a position corresponding to the channel region, and a gate insulating layer 60 is provided between the gate layer 602 and the active layer 601, which is used to isolate the gate layer 602 from the active layer 601. The gate layer 602 is located in the third metal layer M3. A capacitor insulating layer 70 is provided on the side of the third metal layer M3 away from the substrate 30, and the capacitor insulating layer 70 is used to isolate the upper and lower plates of the capacitor (not shown in the figure), wherein the upper plate can be located on the fourth metal layer M4, and the lower plate can be located on the third metal layer M3. Of course, in the fan-out area FA, the third metal layer M3 and the fourth metal layer M4 can also be used to form the third connecting line 23. The second interlayer dielectric layer 80 covers the fourth metal layer M4, and a second metal layer M2 is formed on the side of the second interlayer dielectric layer 80 away from the substrate 30, and the second interlayer dielectric layer 80 is used to isolate the second metal layer M2 and the fourth metal layer M4. The data line is located in the second metal layer M2, and the second metal layer M2 is connected to the first metal layer M1 through a via hole to realize the connection between the data line and the first connecting line 21. The third interlayer dielectric layer 90 is located on the side of the second metal layer M2 away from the substrate 30, and a fifth metal layer M5 is formed on the third interlayer dielectric layer 90, wherein the second connecting line 22 is located in the fifth metal layer M5, and in the display area AA, the power line can also be set in the fifth metal layer M5.

[0063] The source and drain of the thin film transistor 61 may also be disposed on the second metal layer M2 and connected to the source region and drain region on the active layer 601 through vias.

[0064] In this embodiment, by adding the first metal layer M1, the second connection line 22 comes out of the bending area BA and vertically enters the display area AA through the first metal layer M1 in the fan-out area FA, and is connected to the first data line 11 located in the second metal layer M2 through the via hole after entering the display area AA. This structure reduces the wiring space occupied by the display panel by adding the first metal layer M1 without affecting the existing wiring structure, which is conducive to achieving a narrow frame and flexible wiring.

[0065] Figure 3In the display panel structure shown, the second metal layer M2 is located on the side of the first metal layer M1 away from the substrate 30. Of course, the second metal layer M2 can also be located on the side of the first metal layer M1 close to the substrate 30 to reduce the depth of the via between the second metal layer M2 and the first metal layer M1. Figure 5 A schematic cross-sectional view of another display panel provided by an embodiment of the present invention, referring to Figure 5 On the basis of the above technical solutions, the gate insulating layer 60 is located on the side of the substrate 30; the third metal layer M3 is located on the side of the gate insulating layer 60 away from the substrate 30; the capacitor insulating layer 70 is located on the side of the third metal layer M3 away from the substrate 30; the fourth metal layer M4 is located on the side of the capacitor insulating layer 70 away from the substrate 30; the second interlayer dielectric layer 80 is located on the side of the fourth metal layer M4 away from the substrate 30, and the second metal layer M3 is located on the side of the second interlayer dielectric layer 80 away from the substrate 30; the third interlayer dielectric layer 90 is located on the side of the second metal layer M2 away from the substrate 30; the fifth metal layer M5 is located on the side of the third interlayer dielectric layer 90 away from the substrate 30, and the second connecting line 22 is located on the fifth metal layer M5; the first interlayer dielectric layer 50 is located on the side of the fifth metal layer M5 away from the substrate 30, and the first metal layer M1 is located on the side of the first interlayer dielectric layer 50 away from the substrate 30.

[0066] Specifically, compared to Figure 3 The structure shown, Figure 5 The difference of the structure shown is that the positions of the first metal layer M1 and the first interlayer dielectric layer 50 are different, so as to reduce the via depth between the first metal layer M1 and the second metal layer M2. Figure 3 The description will not be repeated here.

[0067] Of course, in other embodiments, the first metal layer M1 may also be located on the side of the third interlayer dielectric layer 90 away from the substrate 30 , and the fifth metal layer M5 may be located on the side of the first interlayer dielectric layer 50 away from the substrate 30 .

[0068] Optionally, when the second metal layer M2 is directly connected to the first metal layer M1 by drilling, considering that the drilling depth is large, at least one line changing portion may be provided to change the line so as to reduce the via depth. Figure 6 A schematic cross-sectional view of another display panel provided by an embodiment of the present invention, referring to Figure 2 and Figure 6 The first connection line 21 is located in the first metal layer M1, the data line is located in the second metal layer M2, and the first connection line 21 is connected to the first data line 11 through the first line switching part 62; wherein the first line switching part 62 is located in the third metal layer M3, and the third metal layer M3 is located between the first metal layer M1 and the second metal layer M2.

[0069] Specifically, the first line switching portion 62 is arranged in the same layer as the gate layer 602, and both are located in the third metal layer M3. Since the third metal layer M3 is arranged between the first metal layer M1 and the second metal layer M2, the second metal layer M2 is first punched to the first line switching portion 62, and the first line switching portion 62 is then punched to the first metal layer M1, so that the data line is connected to the first connection line 21 through the first line switching portion 62, thereby reducing the depth of each punching, which is conducive to reducing the difficulty of the process.

[0070] Optionally, Figure 7 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention, based on the above technical solutions, with reference to Figure 7 The display panel also includes a second wiring portion 63 located on the fourth metal layer M4. The second wiring portion 63 is located on the side of the first wiring portion 62 away from the first metal layer M1. The first connecting line 21 is connected to the first data line 11 through the first wiring portion 62 and the second wiring portion 63 in sequence.

[0071] Specifically, in Figure 6 On the basis of the structure shown, a second line switching portion 63 is also included, and the second line switching portion 63 is located in the fourth metal layer M4, and the fourth metal layer M4 is located between the second metal layer M2 and the third metal layer M3. The first connection line 21 is connected to the first data line 11 through the first line switching portion 62 and the second line switching portion 63 in sequence to further reduce the punching depth. Exemplarily, after the second connection line 22 comes out of the bending area BA, it vertically runs through the first metal layer M1 in the fan-out area FA, and switches to the third metal layer M3 and the fourth metal layer M4 through punching in the fan-out area FA, wherein the third metal layer M3 is provided with a first line switching portion 62, and the fourth metal layer M4 is provided with a second line switching portion 63. In the display area AA, the fourth metal layer M4 is switched to the third metal layer M3 by punching to achieve connection with the first data line 11.

[0072] Optionally, Figure 8 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention, based on the above technical solutions, with reference to Figure 8 The non-display area NA also includes a fourth connection line 24 connected to the gate driving circuit, the fourth connection line 24 includes at least one of a clock signal line and a power line, and in the fan-out area FA, the fourth connection line 24 is connected to the second connection line 22 through a via.

[0073] Specifically, in this embodiment, the clock signal line or the power line can be connected to the second connection line 22 by directly routing obliquely in the fan-out area FA, which is conducive to simplifying the manufacturing process of the display panel. Even if the clock signal line or the power line is connected by oblique wiring, since the first connection line 21 and the third connection line 23 in the fan-out area FA are both vertically wired, compared with the technical solutions in the prior art, the technology provided by the embodiment of the present invention can at least significantly reduce the width of the fan-out area FA, for example, it can reduce the width of the fan-out area FA of the prior art by half. And by vertical wiring, there is no need to set the wiring spacing in the fan-out area very small, avoiding the use of ultra-high-specification masks, and will not increase the manufacturing cost.

[0074] Optionally, an embodiment of the present invention further provides a display device, which includes the display panel provided by any embodiment of the present invention. Therefore, the display device provided by the embodiment of the present invention also has the beneficial effects described in any of the above embodiments. Fig. 9 A schematic diagram of a top view of a display device provided by an embodiment of the present invention is shown in FIG. Fig.10 A schematic diagram of a top view of another display device provided in an embodiment of the present invention, referring to Fig. 9 and Fig.10 , the second connection line 22 of the bending area BA is bound to the driver chip 42 through another fan-out area FA2. When a test circuit (or anti-static circuit) 41 is provided, the test circuit 41 is connected to the fan-out area FA2 to implement the test function. The bending area BA is bent as a whole to the back of the light-emitting side of the display panel. In this embodiment, the display device can be Fig.10 The mobile phone shown can also be any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc. The embodiments of the present invention do not specifically limit this.

[0075] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: It includes a substrate, the substrate is divided into a display area and a non-display area, the non-display area includes a fan-out area and a bending area, and the fan-out area is located between the bending area and the display area; The display area includes a plurality of data lines extending along a first direction, the data lines include a plurality of first data lines, and the areas where the first data lines are located are located at two sides of the display area; The display panel further includes a plurality of first connection lines and a plurality of second connection lines, wherein the first connection lines are located in the display area and the fan-out area, the second connection lines are located in the bending area, and the second connection lines are connected to the corresponding first data lines through the first connection lines; Wherein, the portion of the first connection line located in the fan-out area extends along the first direction; The first connection line and the data line and the second connection line are all in different layers, and the first connection line is connected to the first data line through a via hole; The first connection line is located in the first metal layer, the data line is located in the second metal layer, and the first metal layer is located on one side of the substrate; the display panel further includes: A first interlayer dielectric layer, located on a side of the first metal layer away from the substrate; A gate insulating layer, located on a side of the first interlayer dielectric layer away from the substrate; A third metal layer is located on a side of the gate insulating layer away from the substrate; A capacitor insulating layer, located on a side of the third metal layer away from the substrate; A fourth metal layer is located on a side of the capacitor insulating layer away from the substrate; A second interlayer dielectric layer is located on a side of the fourth metal layer away from the substrate, and the second metal layer is located on a side of the second interlayer dielectric layer away from the substrate; a third interlayer dielectric layer, located on a side of the second metal layer away from the substrate; A fifth metal layer is located on a side of the third interlayer dielectric layer away from the substrate, and the second connecting line is located on the fifth metal layer; Or, the first connection line is located in a first metal layer, the data line is located in a second metal layer, and the display panel further includes: A gate insulating layer, located on one side of the substrate; A third metal layer is located on a side of the gate insulating layer away from the substrate; A capacitor insulating layer, located on a side of the third metal layer away from the substrate; A fourth metal layer is located on a side of the capacitor insulating layer away from the substrate; A second interlayer dielectric layer is located on a side of the fourth metal layer away from the substrate, and the second metal layer is located on a side of the second interlayer dielectric layer away from the substrate; a third interlayer dielectric layer, located on a side of the second metal layer away from the substrate; A fifth metal layer is located on a side of the third interlayer dielectric layer away from the substrate, and the second connecting line is located on the fifth metal layer; The first interlayer dielectric layer is located at a side of the fifth metal layer away from the substrate, and the first metal layer is located at a side of the first interlayer dielectric layer away from the substrate.

2. The display panel according to claim 1, characterized in that: The first connecting line includes a first sub-segment and a second sub-segment, one end of the second sub-segment is connected to the first data line, the other end of the second sub-segment is connected to one end of the first sub-segment, and the other end of the first sub-segment is connected to the second connecting line; The second sub-segment is located in the display area, at least part of the first sub-segment is located in the fan-out area, and the first sub-segment extends along the first direction.

3. The display panel according to claim 2, characterized in that: The second subsegment extends along a second direction, and the first direction and the second direction intersect each other.

4. The display panel according to claim 3, characterized in that: Along a direction parallel to the display surface of the display panel, the first direction and the second direction are perpendicular to each other.

5. The display panel according to claim 1, characterized in that: The first connection line is located in the first metal layer, the data line is located in the second metal layer, and the first connection line is connected to the first data line through a first line switching portion.

6. The display panel according to claim 5, characterized in that: It also includes a second line changing portion, and the first connecting line is connected to the first data line through the first line changing portion and the second line changing portion in sequence.

7. The display panel according to claim 1, characterized in that: The display panel further comprises a plurality of third connection lines located in the fan-out region, the data lines further comprise a plurality of second data lines, and the region where the first data lines are located is located on both sides of the region where the second data lines are located; In the fan-out region, the third connection line extends along the first direction, and the second connection line is connected to the corresponding second data line through the third connection line.

8. The display panel according to claim 1, characterized in that: The non-display area further includes a fourth connection line connected to the gate driving circuit, the fourth connection line includes at least one of a clock signal line and a power line, and in the fan-out area, the fourth connection line is connected to the second connection line through a via.

9. A display device, characterized in that: Comprising the display panel as described in any one of claims 1-8.

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