Arc extinguishing device for plasma processing equipment

Abstract

The present disclosure relates to a plasma generation system, particularly applicable to a system for semiconductor processing using plasma. The plasma generation system according to the present disclosure includes an arc suppression device coupled to an RF generator. The arc device includes a switch that is engaged based on a trigger signal. Additionally, the arc device includes a power dissipator that is engaged by the set of switches to dissipate stored and delivered energy when the set of switches is engaged. The arc suppression device further includes an impedance transformer coupled to the power dissipator to perform impedance transformation, which reduces the reflection coefficient at the input end of the device when the switch is engaged with the power dissipator. The plasma generation system also includes a matching network coupled to the radio frequency generator and a plasma chamber coupled to the matching network.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims priority to U.S. Non - Provisional Patent Application No. 16 / 456,598, filed on June 28, 2019, the content of which is incorporated herein by reference. Background Art

[0003] Plasma arc events that occur during plasma vapor deposition processes can cause defects that reduce yields when fabricating integrated circuits on semiconductor wafers. Plasma arc events often result in flashes and heat similar to the type of discharge caused by low - impedance connections through air to ground or other voltage phases in an electrical system. Additionally, due to fault events between phase conductors, between a phase conductor and a neutral conductor, or between a phase conductor and a ground point, plasma arc events can also cause a rapid release of energy. Brief Description of the Drawings

[0004] To more fully understand the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings, in which like reference numerals represent like structural elements, and it will be easier to understand examples of various features described herein.

[0005] Figure 1 is an illustration of a plasma generation system including an arc suppression device according to the systems and methods of the present disclosure.

[0006] Figure 2 is an illustration of an arc suppression device according to the systems and methods of the present disclosure. In some examples, Figure 2 the arc suppression device of Figure 1 can be used to implement the arc suppression device of the plasma generation system of

[0007] Figure 3 is an illustration of a matching network including an arc suppression device according to the systems and methods of the present disclosure.

[0008] Figure 4 is a Smith Chart that shows the transformation characteristics of the disclosed system on an impedance having a low - resistance portion and an inductive reactance portion.

[0009] Figure 5 is a Smith Chart that shows the transformation characteristics of the disclosed system on an impedance having a low - resistance portion and a capacitive reactance portion.

[0010] Figure 6 is a Smith Chart that shows the transformation characteristics of the disclosed system on an impedance having a high - resistance portion and an inductive reactance portion.

[0011] Figure 7is a Smith chart that shows the transformation characteristics of the disclosed system on an impedance having a high resistance portion and a capacitive reactance portion.

[0012] Figure 8 is a Smith chart that shows the impedance transformation path of the disclosed system on an exemplary impedance having a high resistance and no reactance.

[0013] Figure 9 is a Smith chart that shows the impedance transformation path of the disclosed system on an exemplary impedance having a low resistance and no reactance.

[0014] Figure 10 is a Smith chart that shows the impedance transformation path of the disclosed system on an exemplary impedance having a low resistance and an inductive reactance.

[0015] Figure 11 is a Smith chart that shows the impedance transformation path of the disclosed system on an exemplary impedance having a low resistance and a capacitive reactance.

[0016] Figure 12 is a flowchart of a method for suppressing arc events of a system and method according to the present disclosure. Detailed Description

[0017] The description of the different advantageous embodiments is presented for purposes of illustration and is not intended to be exhaustive or limiting to the embodiments in the disclosed forms. Many modifications and variations are obvious to those of ordinary skill in the art. Additionally, different embodiments may provide different advantages compared to other embodiments. The one or more embodiments selected are chosen and described to best explain the principles of the embodiments, the practical application, and to enable those of ordinary skill in the art to understand the disclosure having various embodiments with various modifications suitable for a particular intended use.

[0018] Before describing the present disclosure in detail, it should be understood that, unless otherwise specified, the present disclosure is not limited to specific processes or articles, whether or not described. It should also be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of the present disclosure.

[0019] A plasma processing system uses, for example, radio frequency (“RF”) power to initiate and sustain a plasma, where the RF energy is coupled to a gas through inductive and / or capacitive plasma coupling elements. In some embodiments, an RF power source provides RF power to a plasma coupling element (e.g., a coil or an electrode), which in turn excites the gas into a plasma within the plasma region of a processing chamber. The generated plasma is then used to process a substrate (e.g., a semiconductor wafer).

[0020] A plasma is typically maintained in a part of its current-voltage characteristic known as the abnormal glow regime. In this case, due to the presence of a high density of electrons and ions, and also a significant electric field, the plasma is vulnerable to plasma arcs ("arc discharges"). An arc discharge is a situation in which the region of current flow in the plasma typically spreads over a relatively large volume and collapses into a highly localized region containing a concentrated arc discharge current (referred to as the "arc discharge region"). During an arc discharge, the surface of the substrate or system component may be altered or damaged due to ion or electron implantation, surface sputtering, and / or local heating, which results in spalling due to the high concentration of power dissipation and high velocities attained by the electrons and ions in the arc discharge region.

[0021] While normal metal deposition is typically less than one micron, an arc discharge can result in locally thicker deposition of metal on a semiconductor wafer. When an arc discharge occurs, the electromagnetic field energy in the plasma chamber becomes concentrated on a smaller-than-expected area of the target, which can cause chunks of the target solid to break off. The chunks of the target material that break off may be relatively large compared to the thickness of the expected uniform coating on the wafer, and if a large chunk lands on the semiconductor wafer, then it can cause defects in the integrated circuit formed on the semiconductor wafer at that location.

[0022] In an RF system, impedance matching is important for maximizing power transfer. In this context, impedance is defined as the total opposition of a device or circuit to the flow of alternating current ("AC") at a given frequency, and is represented as a complex number that can be graphically displayed on a vector plane. The impedance vector consists of a real part (resistance, R) and an imaginary part (reactance, X), and can be expressed in rectangular coordinate form: Z = R + Xj. As is known in the art, while the effect of resistance is constant and independent of frequency, reactance varies with frequency.

[0023] In electronics, impedance matching is the practice of transforming the relationship between voltage and current in terms of phase and amplitude such that the input impedance of an electrical load or the output impedance of its corresponding signal source maximizes power transfer or minimizes signal reflection from the load. The main role of any impedance matching scheme is to force the load impedance to behave as the complex conjugate of the source impedance so that maximum power can be transferred to the load. Any reactance between the source resistance and the load resistance reduces the current in the load resistance, thereby reducing the power dissipation in the load resistance. To restore the dissipation to the maximum value that occurs when the source resistance equals the load resistance, the net reactance of the transmission loop is equal to zero. This occurs when the load impedance and the source impedance become the complex conjugate of one another such that they have the same real part and opposite types of reactance components. If the source impedance is Zs = R + Xj, then the complex conjugate will be Zs* = R - Xj.

[0024] The present disclosure provides an impedance transformer (e.g., a 90-degree (i.e., 90°) or quarter-wave impedance transformer) for use in combination with a pair of resistive terminations to transform an impedance caused by a plasma arc event (e.g., an arc discharge). The impedance transformer may include a coaxial transmission line, a broadside-coupled transmission line, an embedded transmission line, or a waveguide. However, these are merely examples and the present disclosure is not limited thereto.

[0025] The impedance transformer can be implemented by inserting a section of transmission line with appropriate electrical length and characteristic impedance. For example, a quarter-wave impedance transformer can be used to match a real impedance. However, a complex load impedance can also be transformed into a real impedance by adding series or shunt reactance components. It is noted that a quarter-wave transformer can provide a match at a specific operating frequency, as well as an acceptable match over a bandwidth of one octave or less, depending on the quality factor Q of the transformation and the application.

[0026] The present disclosure provides a plasma generation system for processing a substrate such as a semiconductor wafer using plasma. Notably, the present disclosure provides a novel arc suppression device that can respond to an electrical signal when an arc discharge occurs and can further reduce the energy supplied to the plasma chamber when a signal is received. Additionally, the arc suppression device disclosed herein can reduce the reflection coefficient (e.g., gamma) seen by an RF generator in a power delivery system.

[0027] Figure 1 FIG. 100 is a diagram of a plasma generation system 100 including an arc suppression device 102 in accordance with the systems and methods of the present disclosure. As shown, in addition to the arc suppression device 102, the plasma generation system 100 includes an RF generator 101, a matching network 103, and a plasma chamber 104, all of which are coupled by a series of transmission lines 105a - 105c.

[0028] The RF generator 101 provides the power to be delivered to the plasma chamber 104 via the transmission lines 105a - 105c. The RF generator 101 can operate at many different frequencies. For example, according to one or more examples of the present disclosure, the RF generator 101 can operate at low frequencies (e.g., 30 kHz -> 300 kHz), medium frequencies (e.g., 300 kHz -> 3 MHz), high frequencies (e.g., 3 MHz -> 30 MHz), and very high frequencies (e.g., 30 MHz -> 300 MHz).

[0029] It should be noted that even during an unexpected event (e.g., a plasma arc discharge) that may cause a sharp change in the impedance within the plasma chamber 104, the present disclosure provides a stable load (e.g., approximately 50 ohms) for the RF generator 101. During an arc discharge, the impedance within the plasma chamber 104 changes rapidly, which can change the load line, thus changing the efficiency and stability of the RF generator 101 and causing spurious emissions, etc. Advantageously, the arc suppression device 102 can divert the energy provided by the RF generator 101 from the processing chamber feeding the plasma arc, thereby suppressing or at least mitigating the arc event. The arc suppression device 102 can be equipped with one or more sensors (e.g., optical or electrical sensors) 106 that determine when an arc discharge occurs and provide one or more trigger signals to the arc suppression device 102 upon detection of the arc discharge.

[0030] Advantageously, as will be explained in more detail below, the arc suppression device 102 can include a set of switching elements that can react quickly such that the arc suppression device 102 can react on the order of microseconds or less. The set of switching elements can include PIN diodes, silicon carbide field effect transistors ("SiCFETs"), metal oxide semiconductor field effect transistors ("MOSFETs"), insulated gate bipolar transistors ("IGBTs"), or bipolar junction transistors ("BJTs"). However, it should be understood that the present disclosure is not limited to the examples of switching elements above. Additionally, in some embodiments, the switching elements 210, 211 can be ganged together or operated individually.

[0031] Those of ordinary skill in the art benefiting from the present disclosure should understand that during a processing operation, the actual impedance within the plasma chamber 104 is not actually measured accurately along the transmission lines 105a - 105c. Regardless of the load impedance, the systems described in the present disclosure can operate effectively.

[0032] The matching network 103 can include a plurality of reactive elements; and a controller configured to provide corresponding control signals to each actuation device for the plurality of reactive elements. In response to the corresponding control signals provided thereto, each reactive element is actuated according to the control signal. The matching network 103 can adopt the impedance presented by the plasma chamber 104 and transform it into a desired source impedance (e.g., 50 ohms). However, automatic impedance matching networks used in plasma processing systems typically use motor-driven tunable elements. The matching network 103 may take hundreds of milliseconds or longer to react to a sharp change in the load impedance. In some cases, if an event causes a load impedance that is outside the range of the matching network, then the matching network 103 may not be able to tune quickly.

[0033] Figure 2FIG. 0 is an illustration of an arc suppression device 200 in accordance with systems and methods of the present disclosure. In some examples, the arc suppression device 200 may be connected to an RF power port 201 along a transmission line 202. The arc suppression device 200 includes two shunt networks (e.g., elements) 213, 214 and a 90-degree π network impedance transformer 212. In one implementation, each shunt network 213, 214 includes a power dissipator 216 (e.g., a resistor), one or more capacitive elements 220, and switching elements 210, 211. The 90-degree π network impedance transformer 212 may be coupled to the power dissipator 216 to perform impedance transformation, which reduces the reflection coefficient at the input of the device 200 when the set of switching elements is engaged with the power dissipator 216. In one implementation, the reflection coefficient is reduced to a range of 0 - 0.5 (e.g., VSWR is not greater than 3:1).

[0034] In one implementation, the shunt network 214 adopts the impedance present at node 203 (e.g., the impedance within the plasma chamber) and couples it in parallel therewith. The 90-degree π network impedance transformer 212 then transforms the resulting impedance by 90 degrees. Finally, the shunt network 213 adopts the impedance transformed by the 90-degree π network impedance transformer 212 and couples it in parallel therewith.

[0035] The arc suppression device 200 may transform a high impedance into a low impedance and vice versa to transform within a target VSWR (e.g., 3:1). Additionally, the arc suppression device 200 may transform an impedance having a negative phase angle into an impedance having a positive phase angle and vice versa within a target VSWR.

[0036] Those of ordinary skill in the art will appreciate that the arc suppression device 200 is not limited to a pair of shunt networks 213, 214. In some implementations, a pair of shunt networks 213, 214 may be replaced with a series configuration.

[0037] The power dissipator 216 may include a non-inductive resistive element. The power dissipator 216 dissipates the energy stored and conveyed within the system when engaged by the switching elements 210, 211. In the illustrated implementation, the value of the power dissipator 216 is 130 ohms, while the value of the capacitive element is approximately 0.01 μF. However, these values are merely exemplary and do not limit the present disclosure. The value of the power dissipator 216 determines the extent of the dissipated energy and the amount by which the reflection coefficient seen by the RF generator is minimized.

[0038] The arc suppression device 200 includes three main components: switching elements (e.g., switching elements 210, 211) for engaging (e.g., closing) or disengaging (e.g., opening), which may reverse by the plasma chamber (e.g., Figure 1an impedance transformer (e.g., 90-degree π-network impedance transformer 212) for the impedance presented by the plasma chamber 104) therein, and a power dissipator (e.g., power dissipator 216) for transferring and dissipating the energy stored in the plasma chamber.

[0039] In one embodiment, the switching elements 210, 211 are engaged based on one or more trigger signals. For example, the trigger signal can be the result of a change in the reflection coefficient of at least 0.5. However, the present disclosure is not limited thereto. Additionally, the trigger signal can be a change in current, voltage, or reflection coefficient that exceeds a predetermined threshold over a period of time. Additionally, the trigger signal can be a combination of multiple sensing signals distributed throughout the plasma generation system.

[0040] The trigger signal can be provided by the RF generator to the arc suppression device 200. Additionally, the radio frequency plasma chamber can include a sensor that determines when an arc event occurs and provides a trigger signal to the arc suppression device 200 when the arc event has been detected.

[0041] The switching elements 210, 211 can be mounted to the arc suppression device 200 through a heat sink (not shown). Additionally, the switching elements 210, 211 can respond to the trigger signal on the order of microseconds or less. Additionally, according to some embodiments, when the switching elements 210, 211 are engaged, the arc suppression device 200 network transforms the plasma load impedance into some new impedance having a low reflection coefficient to the RF power port 201, regardless of the plasma load impedance, and dissipates the stored energy from the plasma processing module. Alternatively, when the switching elements 210, 211 are disengaged, the arc suppression device 200 behaves as a filter having 50-ohm input and output impedances. When the switching elements 210, 211 are disengaged, the switching elements 210, 211 prevent current from flowing into the power dissipator 216 and the capacitive element 220, so the shunt network 213 / 214 behaves as an open circuit. In one embodiment, each of the switching elements 210, 211 is a symmetric FET switch that includes a silicon carbide field effect transistor ("SiCFET") having a floating gate drive circuitry for an intermediate frequency ("MF") RF power system.

[0042] In other embodiments, the switching elements 210, 211 include PIN diodes having a high voltage, bipolar bias power supply. Additionally, the switching elements 210, 211 can include SiCFETs, metal oxide semiconductor field effect transistors ("MOSFETs"), insulated gate bipolar transistors ("IGBTs"), or bipolar junction transistors ("BJTs"), so long as doing so does not depart from the spirit and scope of the present disclosure. As shown, the switching elements 210, 211 can isolate or connect the terminals to ground.

[0043] The switching elements 210, 211 can be engaged by the switch actuator 207 via the transmission lines 208, 209. The switch actuator 207 can also be coupled to a digital isolator 206, which provides electrical and / or current isolation between the high-voltage RF waveform and the trigger signal in the RF power generation system. As Figure 2 further shown, the digital isolator 206 can be coupled to a trigger 205.

[0044] As described above, the arc suppression device 200 can include a network that performs a quarter-wave impedance transformation to utilize two dissipative terminals. This network combines the matched input impedance (the plasma load impedance transformed by the matching network) in parallel with the first terminal and rotates it by a quarter wavelength such that the RF generator presents an impedance equal to the parallel combination of this new impedance and the second terminal. This mechanism ensures the minimization of gamma seen by the RF generator and is a function of the characteristic impedance of the system, the characteristic impedance of the transformer (e.g., usually the same impedance), and the terminal resistance. The quarter-wave impedance transformer can be defined as a transmission line or waveguide (with some known characteristic impedance) that is a quarter wavelength (λ) in length. The quarter-wave impedance transformer can present twice the impedance of its terminated impedance at its input node 203. In this embodiment, it is preferred for some VHF and higher frequency applications where lumped elements are very small and difficult to construct with high current and voltage capabilities.

[0045] In one embodiment, the 90-degree impedance transformer 212 includes a lumped element π network (e.g., a 90-degree π network transformer). The π network performs the same impedance transformation as a transmission line or waveguide but provides a much more limited bandwidth. In one embodiment, the π network of lumped elements includes capacitors in the shunt network branches in addition to inductors in the series branches. This embodiment is more preferable for MF and HF applications where the wavelength is very long.

[0046] In one example, the magnitude of the impedance presented by the plasma chamber (e.g., Figure 1 the plasma chamber 104 in N ) may have become a low impedance, and the impedance Z L1 can be placed in parallel with the power dissipation element (e.g., the power dissipator 216) of the shunt network by engaging the switching device. Thus, the first power dissipator does not have a significant impact on the resulting impedance (e.g., Z1 = Z N / / Z D ). The resulting impedance Z1 is transformed by the 90-degree π network impedance transformer into a high impedance (e.g., Z D ). Then the transformed impedance Z M is placed in parallel with the shunt network 214 (e.g., Z L2 = Z D) The shunt network aligns the impedance with the center of the Smith chart (e.g., a source impedance close to 50 ohms). In some embodiments, the combination of switch elements 210, 211 can be flange-mounted on a water-cooled heat sink for high-power applications.

[0047] Alternatively, if the magnitude of the plasma impedance in the plasma chamber (e.g., Figure 1 the plasma chamber 104 in N becomes high, then the impedance Z L1 is placed in parallel with the power dissipator 216 of the shunt network 213, 214 (e.g., Z2 = Z N / / Z N ). Thus, when a high impedance is placed in parallel with another high impedance, the resulting impedance Z2 aligns with the center. Additionally, the 90-degree π-network impedance transformer 212 can transform the impedance to a relatively low impedance (e.g., Z D ). After that, the transformed impedance Z D is then placed in parallel with the power dissipator 216 of the shunt network 213 (e.g., Z M = Z L2 / / Z D ). The shunt network 213 can have little impact on the resulting impedance.

[0048] Figure 3 FIG. is a diagram of a matching network 300 including an arc suppression device 305 according to the systems and methods of the present disclosure. A matching network can be used, particularly in radio frequency applications, to match the impedance or admittance of a power source to a load having a different impedance or admittance in order to provide maximum power transfer to the load and prevent damage to the power source due to energy reflected from mismatches. In addition to unexpected plasma arc events, the plasma load impedance can vary depending on variables such as generator frequency, delivered power, chamber pressure, gas composition, plasma ignition, etc. Matching addresses these variations in the load impedance by changing the electrical components (usually vacuum variable capacitors) inside the matching to maintain a desired input impedance.

[0049] The matching network 300 can include reactive elements, meaning elements that store energy in electric and magnetic fields rather than resistive elements that dissipate electrical power. The most common reactive elements are capacitors, inductors, and coupled inductors, but other elements such as distributed circuits can also be used. The matching network can also include elements containing transmission lines and transformers. In the illustrated embodiment, the matching network 300 includes a single capacitive element 301 and an inductive element 302.

[0050] Most notably, the matching network 300 includes an arc suppression device 303. However, it is noted that the matching network 300 is related to Figure 1The matching network 103 shown in [reference] is different in that the matching network 300 includes an arc suppression device 303, while the plasma generation system 100 (see Figure 1 ) includes a separate arc suppression device 102 (see Figure 1 ) and a matching network 103 (see Figure 1 ) components. Thus, in some embodiments, the arc suppression system disclosed herein may be implemented within the matching network.

[0051] Figure 4 Figure 400 is a Smith chart that shows the transformation characteristics of the disclosed system on an impedance having a low resistance portion and an inductive reactance portion. Thus, the Smith chart 400 shows an impedance region 402 having a low resistance portion and an inductive reactance portion, which can be transformed into an impedance within the target VSWR 401. When the arc suppression device is engaged, the impedance within the region 402 will be transformed into the impedance within the region 403, as shown, and the region 403 falls within the VSWR 401.

[0052] Those of ordinary skill in the art should understand that the regions 402 and 403 are exemplary, as the impedance region 402 having a low resistance portion and an inductive reactance portion and the transformation region 403 may be larger or smaller than Figure 4 the regions shown in the example of [reference]. In this document, an impedance having a low resistance portion may be defined as an impedance having a resistance less than 50 ohms, while an impedance having a high resistance portion may be defined as an impedance having a resistance greater than 50 ohms. In particular, depending on the target VSWR 401, the transformation region 403 may have a larger or smaller area on the Smith chart 400. Additionally, according to embodiments employing an arc suppression device with a 90-degree π-network impedance transformer, the impedance within the transformation region 403 is capacitive.

[0053] Furthermore, Figure 4 points 404 and 405 are shown within and outside the target VSWR 401, respectively. Thus, regardless of whether the initial impedance is within or outside the target VSWR 401, the arc suppression device disclosed herein can transform any impedance having a low resistance portion and an inductive reactance portion into an impedance within the target VSWR 401.

[0054] Figure 5 Figure 500 is a Smith chart that shows the transformation characteristics of the disclosed system on an impedance having a low resistance portion and a capacitive reactance portion. Thus, the Smith chart 500 shows a region 502 having a low resistance portion and a capacitive reactance portion, which can be transformed into an impedance within the target VSWR 501.

[0055] The systems and methods disclosed herein can transform an impedance having a low resistance portion and a capacitive reactance portion into an acceptable impedance, as shown in transformation region 503. Regions 502 and 503 are exemplary because the impedance regions 502 having a low resistance portion and a capacitive reactance portion and the transformation region 503 can be larger or smaller than Figure 5 the regions shown in the example of. Thus, depending on the target VSWR 501, the transformation region 503 can have a larger or smaller area on the Smith chart 500. Additionally, according to an embodiment of the arc suppression device employing a 90-degree π-network impedance transformer, the impedance within the transformation region 503 is inductive.

[0056] Additionally, Figure 5 points 504 and 505 are also shown, which are within and outside the target VSWR 501, respectively. Thus, regardless of whether the initial impedance is within or outside the target VSWR 501, the arc suppression device disclosed herein can transform any impedance having a low resistance portion and a capacitive reactance portion into an impedance within the target VSWR 501.

[0057] Figure 6 Figure 600 is a Smith chart that shows the transformation characteristics of the disclosed system on an impedance having a high resistance portion and an inductive reactance portion. Thus, the Smith chart 600 shows an impedance region 602 having a high resistance portion and an inductive reactance portion, which can be transformed into an impedance within the target VSWR 601. It is noted that the impedance region 602 having a high resistance portion and an inductive reactance portion and the purely inductive low impedance region 402 as shown in Figure 4 (see Figure 4 ) together constitute the entire inductive impedance on the Smith chart 600. One of ordinary skill in the art can recognize that the upper half of a standard Smith chart represents the inductive region of the impedance thereon.

[0058] Regions 602 and 603 are exemplary because the impedance region 602 having a high resistance portion and an inductive reactance portion and the transformation region 603 can be larger or smaller than Figure 6 the regions shown in the example of. Thus, depending on the target VSWR 601, the transformation region 603 can have a larger or smaller area on the Smith chart 600.

[0059] As described herein, the systems and methods of the present disclosure can transform an impedance having a high resistance portion and an inductive reactance portion into the transformation region 603 within the target VSWR 601. It is noted that according to an embodiment of the arc suppression device employing a 90-degree π-network impedance transformer, the impedance within the transformation region 603 is capacitive.

[0060] Additionally, Figure 6Points 604 and 605 are shown inside and outside the target VSWR 601, respectively. Thus, regardless of whether the initial impedance is inside or outside the target VSWR 601, the arc suppression device disclosed herein can transform any impedance having a high resistance portion and an inductive reactance portion into an impedance within the target VSWR 601.

[0061] Figure 7 is a Smith chart 700, which shows the transformation characteristics of the disclosed system on an impedance having a high resistance portion and a capacitive reactance portion. Thus, the Smith chart 700 shows an impedance region 702 having a high resistance portion and a capacitive reactance portion, which can be transformed into an impedance within the target VSWR. It is noted that the impedance region 702 having a high resistance portion and a capacitive reactance portion and the impedance region 502 having a low resistance portion and a capacitive reactance portion as shown in Figure 5 (see Figure 5 ) together constitute all the capacitive impedances on the Smith chart 700. Those of ordinary skill in the art will recognize that the lower half of a standard Smith chart represents the capacitive region of the impedance thereon. The regions 702, 703 are exemplary because the impedance region 702 having a high resistance portion and a capacitive reactance portion and the transformation region 703 can be larger or smaller than Figure 7 the regions shown in the example of

[0062] Thus, depending on the target VSWR 701, the transformation region 703 can have a larger or smaller area on the Smith chart 700. Advantageously, the systems and methods of the present disclosure can transform an impedance having a high resistance portion and a capacitive reactance portion into the transformation region 703 within the target VSWR 701. It is noted that according to an embodiment employing an arc suppression device with a 90-degree π-network impedance converter, the impedance within the transformation region 703 is inductive.

[0063] Finally, Figure 7 Points 704 and 705 are shown inside and outside the target VSWR 701, respectively. Thus, regardless of whether the initial impedance is inside or outside the target VSWR 701, the arc suppression device disclosed herein can transform any impedance having a high resistance portion and a capacitive reactance portion into an impedance within the target VSWR 701.

[0064] Figure 8 is a Smith chart 800, which shows the impedance transformation path of the disclosed system on an exemplary impedance having a high resistance and no reactance. Thus, the Smith chart 800 shows the impedance transformation of an exemplary high resistance and low reactance complex impedance. In Figure 8In the example shown, the point 801 represents a complex impedance value of 2,500 + 0j ohms, which is transformed by the arc suppression device as previously disclosed to an impedance value of approximately 17.7 + 0.1j ohms, as shown by the point 805. As shown, the curves 802, 803, and 804 each show the contribution of the terminals in the first and second shunt networks to the impedance transformation (e.g., curves 802, 804) and the contribution of the 90-degree π network impedance converter to the impedance transformation (curve 803).

[0065] In the embodiment shown, the load impedance in the first terminal (corresponding to curve 802) is approximately 130 - 1j ohms, and the load impedance in the second terminal (corresponding to curve 803) is also approximately 130 - 1j ohms. Additionally, in the embodiment shown, the impedance seen at the first shunt network is approximately 123.6 - 0.9j ohms, the impedance seen at the 90-degree π network impedance converter is approximately 20.3 + 0.2j ohms, and the impedance seen at the second shunt network is approximately 17.7 + 0.1j ohms.

[0066] It is noted that the resulting VSWR (2.849) and reflection coefficient (0.480 < 180°) of the transformed impedance are within the VSWR and reflection coefficient target ranges (e.g., 3:1 and 0.5, respectively). Additionally, according to the embodiment of the arc suppression device employing a 90-degree π network impedance converter, the impedance represented by the point 801 is transformed 90 degrees by the point 805.

[0067] Figure 9 is the Smith chart 900, which shows the impedance transformation path of the disclosed system on an example impedance with low resistance and no reactance. Thus, the Smith chart 900 shows the impedance transformation of an example low-resistance and low-reactance complex impedance according to the system and method of the present disclosure. In Figure 9 the example shown, the point 901 represents a complex impedance value of 1 + 0j, which is transformed by the arc suppression device as previously disclosed to an impedance value of approximately 123.4 - 1.1j ohms, as shown by the point 904. As shown, the curves 902, 903 each show the contribution of the terminals in the first shunt network to the impedance transformation (e.g., curve 903) and the contribution of the 90-degree π network impedance converter to the impedance transformation (curve 902). It is noted that in the example shown, compared to Figure 8 the impedance example shown in

[0068] In the illustrated embodiment, the load impedance in the first terminal (corresponding to curve 902) is approximately 130 - 1j ohms, and the load impedance in the second terminal (corresponding to curve 903) is approximately 130 - 1j ohms. Additionally, in the illustrated embodiment, the impedance presented at the first shunt network is approximately 1 + 0j ohms, the impedance presented at the 90-degree π network impedance transformer is approximately 2,420 - 97.2j ohms, and the impedance presented at the second shunt network is approximately 123.4 - 1.2j ohms.

[0069] Notably, the resulting VSWR (2.468) and reflection coefficient (0.425 < -0.52°) of the transformed impedance are within the VSWR and reflection coefficient target ranges (e.g., 3:1 and 0.5, respectively).

[0070] Figure 10 is the Smith chart 1000, which shows the impedance transformation path of the disclosed system on an example impedance with low resistance and inductive reactance. Thus, the Smith chart 1000 shows the impedance transformation of an example low-resistance and high positive-reactance complex impedance. In Figure 10 the example shown, point 1001 represents a complex impedance value of 1 + 50j ohms, which is transformed by the arc suppression device as previously disclosed into an impedance value of approximately 28.5 - 33.6j ohms, as shown by point 1005. As shown, curves 1002, 1003, and 1004 each show the contribution of the terminals in the first and second shunt networks to the impedance transformation (e.g., curves 1002, 1004) and the contribution of the 90-degree π network impedance transformer to the impedance transformation (curve 1003).

[0071] In the illustrated embodiment, the load impedance in the first terminal (corresponding to curve 1002) is approximately 130 - 1j ohms, and the load impedance in the second terminal (corresponding to curve 1004) is approximately 130 - 1j ohms. Additionally, in the illustrated embodiment, the impedance presented at the first shunt network is approximately 17.5 + 43.1j ohms, the impedance presented at the 90-degree π network impedance transformer is approximately 20.2 - 49.8j ohms, and the impedance presented at the second shunt network is approximately 28.5 - 33.6j ohms.

[0072] Notably, the resulting VSWR (2.749) and reflection coefficient (0.487 < -99°) of the transformed impedance are within the VSWR and reflection coefficient target ranges (e.g., 3:1 and 0.5, respectively). Additionally, according to the embodiment of the arc suppression device employing a 90-degree π network transformer, the impedance represented by point 1001 is transformed by ninety degrees to the impedance represented by point 1005.

[0073] Figure 11is a Smith chart that shows the impedance transformation path of the disclosed system on an example impedance with low resistance and capacitive reactance. Thus, the Smith chart 1100 shows the impedance transformation of a complex impedance with low resistance and high negative reactance. In Figure 11 In the example shown, the point 1101 represents a complex impedance value of 1 - 50j ohms, which is transformed by the arc suppression device as previously disclosed to an impedance value of approximately 29.0 + 33.8j ohms, as shown by the point 1105. As shown, the curves 1102, 1103, and 1104 each show the contribution of the terminal pairs in the first and second shunt networks to the impedance transformation (e.g., curves 1102, 1104) and the contribution of the 90-degree π network converter to the impedance transformation (curve 1103).

[0074] In the illustrated embodiment, the load impedance in the first terminal (corresponding to curve 1102) is approximately 130 - 1j, and the load impedance in the second terminal (corresponding to curve 1103) is approximately 130 - 1j. Additionally, in the illustrated embodiment, the impedance seen at the first shunt network is approximately 17.3 - 42.9j ohms, the impedance seen at the 90-degree π network impedance converter is approximately 20.4 + 50.2j ohms, and the impedance seen at the second shunt network is approximately 29.0 - 33.8j ohms.

[0075] The resulting VSWR (2.722) and reflection coefficient (0.469 < 99°) of the transformed impedance are within the VSWR and reflection coefficient target ranges (e.g., 3:1 and 0.5, respectively). Additionally, according to an embodiment of the arc suppression device employing a 90-degree π network impedance converter, the impedance represented by the point 1101 is transformed by ninety degrees to the impedance represented by the point 1105. It is worth noting that the curves 1102, 1103, and 1104 representing the impedance transformation associated with the elements within the arc suppression device, while quasi-symmetric, are the transposes of the impedance amplitudes and phase angles associated with the Figure 11 example shown.

[0076] Figure 12 is a flowchart 1200 of a method for suppressing arc events according to the systems and methods of the present disclosure. The flowchart 1200 begins at block 1201, which includes using an arc suppression device to determine whether the reflection coefficient presented by the device has increased by 0.5 or more. As previously mentioned, this can be achieved by an arc suppression device as Figure 2 depicted. Next, block 1202 includes using an arc suppression device as in the provided example such that the impedance presented to the RF generator results in a reflection coefficient of less than or equal to 0.5, regardless of the state of the plasma processing module.

[0077] In addition, in the example provided, according to block 1203, in response to a gamma change exceeding a predetermined degree (e.g., greater than 0.5 gamma offset in a short time period), the power delivered to the plasma chamber is reduced by at least 3 dB. As will be understood by those of ordinary skill in the art, a power reduction of at least 3 dB is approximately 50% of the power reduction. Thus, in many cases, a 50% power reduction is sufficient to extinguish a plasma arc event. There may be design variations that result in different amounts of power reduction by adjusting the value of the termination resistor. It is also possible that the trigger signal for the engage / disengage switch element is formulated based on the result of some change in operating parameters (such as current, voltage, phase angle, spectral content, or some combination of these factors), rather than being triggered solely by a sharp change in gamma.

[0078] Although the present disclosure has been described in detail, it should be understood that various changes, substitutions, and alterations can be made without departing from the spirit and scope of the present disclosure. With respect to the features of the present disclosure, any use of the words "or" and "and" indicates, as appropriate in the context, that examples can include any combination of the listed features.

[0079] Although the illustrative embodiments of the present application have been described in detail herein, it should be understood that the inventive concept can be otherwise implemented and employed differently, and the appended claims are intended to be construed to include such variations, unless limited by the prior art.

[0080] References throughout this specification to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrases "in one embodiment" or "in some embodiments" throughout this specification are not necessarily all referring to the same embodiment. Additionally, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0081] In the foregoing specification, detailed descriptions have been given with reference to specific exemplary embodiments. However, it is evident that various modifications and changes can be made thereto without departing from the broader spirit and scope of the present disclosure set forth in the appended claims. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.

Claims

1. A device comprising: First Network; Second Network; Each of the first network and the second network includes: a switching element that engages upon receiving a trigger signal; and a power dissipater engaged by the switching element for dissipating stored energy and delivered energy when the switching element is engaged; and An impedance transformer is coupled to the power dissipater to perform impedance transformation, wherein the impedance transformation reduces a reflection coefficient at an input end of the device when the switching elements of the first network and the switching elements of the second network are engaged with the power dissipater, the first network and the second network being symmetrically arranged with respect to the impedance transformer.

2. The apparatus of claim 1 , wherein the switching element comprises at least one of a PIN diode, a silicon carbide field effect transistor (“SiCFET”), a metal oxide semiconductor field effect transistor (“MOSFET”), an insulated gate bipolar transistor (“IGBT”), or a bipolar junction transistor (“BJT”).

3. The apparatus of claim 1, wherein each switch in the switching elements reacts to the trigger signal in the order of microseconds.

4. The apparatus of claim 1, wherein the impedance transformer is a 90-degree impedance transformer using a lumped element π network.

5. The apparatus of claim 1, wherein the impedance transformer is at least one of a coaxial transmission line, a broadside-coupled transmission line, an embedded transmission line, or a waveguide.

6. The apparatus of claim 1, wherein the power dissipater comprises a non-inductive resistive element.

7. The apparatus of claim 1, wherein the reflection coefficient is reduced to a range of 0-0.

5.

8. The device of claim 1, wherein the switch elements can be engaged in conjunction or actuated individually.

9. The apparatus of claim 1, wherein the trigger signal is a result of a change in reflection coefficient of at least 0.

5.

10. A matching network system, comprising: A matching network device comprising: a plurality of reactive elements; and a controller configured to provide a corresponding control signal to each of the actuating devices for the plurality of reactive elements, such that in response to the corresponding control signal provided thereto, each reactive element is actuated according to the control signal; and an arc suppression device comprising: First Network; Second Network; Each of the first network and the second network includes: a switching element that is engaged based on a trigger signal; and a power dissipater engaged by the switching element for dissipating stored energy and delivered energy when the switching element is engaged; and An impedance transformer is coupled to the power dissipater to perform impedance transformation, wherein the impedance transformation reduces a reflection coefficient at an input end of the device when the switching elements of the first network and the switching elements of the second network are engaged with the power dissipater, the first network and the second network being symmetrically arranged with respect to the impedance transformer. 11 . The matching network system according to claim 10 , wherein the trigger signal is a change in current, voltage or reflection coefficient exceeding a predetermined threshold within a period of time.

12. The matching network system as claimed in claim 10, wherein the switching element grounds the power dissipator.

13. The matching network system as claimed in claim 10, wherein the engagement of the arc suppression device reduces the power delivered to the plasma chamber by at least 3 dB.

14. A plasma generation system, comprising: a radio frequency (RF) generator; an arc suppression device coupled to the RF generator, the arc suppression device comprising: a first network; a second network; each of the first network and the second network comprising: a switching element that is engaged based on receiving a trigger signal; and a power dissipator engaged by the switching element for dissipating stored and delivered energy when the switching element is engaged; and an impedance transformer coupled to the power dissipator to perform impedance transformation, which reduces the reflection coefficient at the input end of the device when the switching element of the first network and the switching element of the second network are engaged with the power dissipator, and the first network and the second network are symmetrically arranged with respect to the impedance transformer; a matching network coupled to the RF generator; and a plasma chamber coupled to the matching network.

15. The plasma generation system as claimed in claim 14, wherein the trigger signal is provided by the RF generator to the arc suppression device.

16. The plasma generation system as claimed in claim 14, wherein the plasma chamber includes a sensor that determines when an arc event occurs and provides a trigger signal to the arc suppression device when an arc event has been detected.

17. The plasma generation system as claimed in claim 16, wherein the sensor is at least one of an optical sensor or an electrical sensor.

18. The plasma generation system as claimed in claim 14, wherein the trigger signal is a combination of a plurality of sensing signals distributed throughout the plasma generation system.

19. The plasma generation system as claimed in claim 14, wherein the impedance transformer also performs impedance transformation in combination with the dissipator to reduce the reflection coefficient at the input end of the system to less than 0.

5.

20. The plasma generation system as claimed in claim 14, further comprising a digital isolator coupled to the arc suppression device.

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