Semiconductor device and method of manufacturing the same
By introducing a relay conductor and a second insulating layer into the power semiconductor device, the partial discharge problem caused by the pores in the sealing resin is solved, thereby improving the reliability and durability of the device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ASTEMO LTD
- Filing Date
- 2020-06-16
- Publication Date
- 2026-05-19
AI Technical Summary
In existing power semiconductor devices, the sealing resin is prone to pores, which can lead to partial discharge and insulation failure under high voltage, affecting the reliability of the device.
A relay conductor and a second insulating layer are disposed between the surface electrode and the relay conductor of the semiconductor element, connected by a bonding layer, and filled with sealing resin to cover the pores, disperse the electric field, and suppress partial discharge.
It effectively suppresses partial discharge caused by the pores of the sealing resin, improving the reliability and durability of power semiconductor devices.
Smart Images
Figure CN114008775B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to semiconductor devices and methods for manufacturing the same. Background Technology
[0002] A power semiconductor device having a power conversion section including a drive motor, etc., has the following structure: a power semiconductor element is sandwiched between a pair of metal plates, and the semiconductor element is sealed by filling the space between the metal plates with resin. More specifically, a metal block is bonded to one electrode of the semiconductor element, the metal block is connected to one metal plate, and the other electrode of the semiconductor element is connected to another metal plate. The area of each metal plate is formed to be larger than the surface and back surfaces of the semiconductor element, and the semiconductor element is sealed by filling the space between the pair of metal plates with resin using a molding method such as transfer molding (for example, see Patent Document 1).
[0003] Existing technical documents
[0004] Patent documents
[0005] Patent Document 1: Japanese Patent Application Publication No. 2011-114176 Summary of the Invention
[0006] The technical problem that the invention aims to solve
[0007] Sealing resins formed using molding methods are prone to defects such as pores (voids). In power semiconductor devices, high voltages are applied to the power semiconductor elements. Therefore, if defects such as pores exist in the sealing resin, the electric field will concentrate in these defects, potentially causing partial discharge. If this partial discharge persists, the sealing resin may deteriorate, eventually leading to insulation failure and causing the power semiconductor device to malfunction.
[0008] Technical solutions adopted to solve technical problems
[0009] According to a first aspect of the present invention, a semiconductor device includes: a semiconductor element having a first insulating layer having an opening and a surface electrode exposed from the opening of the first insulating layer; a relay conductor bonded to the surface electrode; a bonding layer bonding the surface electrode to the relay conductor; a second insulating layer covering at least a portion of the first insulating layer and disposed at least grounded to the periphery of the bonding layer; a conductor connected to the relay conductor; and a sealing resin filling the space between the conductor and the second insulating layer.
[0010] According to a second aspect of the present invention, a semiconductor device includes: a plurality of semiconductor elements having a first insulating layer having an opening and a surface electrode exposed from the opening of the first insulating layer; a relay conductor bonded to the surface electrode of each semiconductor element; a bonding layer bonding the surface electrode to the relay conductor; a second insulating layer covering at least a portion of each first insulating layer and disposed at least grounded to the periphery of each bonding layer; and a conductor connecting the relay conductor.
[0011] According to a third aspect of the present invention, a method for manufacturing a semiconductor device includes: preparing a semiconductor element having a first insulating layer having an opening and a surface electrode exposed from the opening of the first insulating layer; bonding the surface electrode to a relay conductor using a bonding layer; providing a second insulating layer covering at least a portion of the first insulating layer and at least in contact with the periphery of the bonding layer; connecting a conductor to the relay conductor; and filling a sealing resin between the conductor and the second insulating layer.
[0012] Invention Effects
[0013] According to the present invention, the generation of partial discharge can be suppressed even in the presence of pores. Attached Figure Description
[0014] Figure 1 This is a cross-sectional view of Embodiment 1 of the semiconductor device of the present invention.
[0015] Figure 2 (A) and (B) are used to explain Figure 1 A cross-sectional view of the semiconductor device in each step of the manufacturing method of the semiconductor device 100 illustrated.
[0016] Figure 3 (A) and (B) are Figure 2 Cross-sectional views of the semiconductor devices used in subsequent processes.
[0017] Figure 4 This is a cross-sectional view of Embodiment 2 of the semiconductor device of the present invention.
[0018] Figure 5 These are cross-sectional views used to illustrate the effect of applying a high electric field to the pores present in the sealing resin and generating partial discharge. (A) is a cross-sectional view of the semiconductor device 100R of the comparative example, and (B) is a cross-sectional view of the semiconductor device of this embodiment.
[0019] Figure 6 This is an exploded perspective view of Embodiment 3 of the semiconductor device of the present invention.
[0020] Figure 7 yes Figure 6 The diagram shows an enlarged exploded perspective view of the semiconductor device.
[0021] Figure 8 yes Figure 6 The illustrated cross-sectional views of the semiconductor device are shown in (A) before resin sealing and (B) after resin sealing. Detailed Implementation
[0022] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. The following description and drawings are illustrative of the invention, and appropriate omissions and simplifications have been made for clarity. The present invention can be implemented in various other ways. Unless specifically limited, each structural element may be single or multiple.
[0023] To facilitate understanding of the invention, the positions, sizes, shapes, and extents of the structural elements shown in the accompanying drawings do not always represent their actual positions, sizes, shapes, and extents. Therefore, the invention is not necessarily limited to the positions, sizes, shapes, and extents disclosed in the accompanying drawings.
[0024] -Implementation Method 1-
[0025] The following is for reference Figures 1 to 3 The following describes Embodiment 1 of the present invention.
[0026] Figure 1 This is a cross-sectional view of Embodiment 1 of the semiconductor device of the present invention.
[0027] Semiconductor device 100 includes semiconductor element 10. Semiconductor element 10 is, for example, a SiC (silicon carbide) MOS FET (Metal-Oxide-Semiconductor Field-Effect Transistor). Semiconductor element 10 has a semiconductor substrate 11, a source electrode 12, a drain electrode 13, internal wiring 14, and a first insulating layer 15. Additionally, Figure 1 Although not shown in the figure, semiconductor element 10 has a gate electrode 17 (see reference). Figure 7 The semiconductor device 100 includes a semiconductor element 10, a relay conductor 21, a surface-side conductor 22, a back-side conductor 23, a second insulating layer 31, and a sealing resin 32.
[0028] The first insulating layer 15 is an insulating film provided to protect the impurity regions and internal wiring 14 formed inside the semiconductor substrate 11 for semiconductor device formation, and is formed of an inorganic material such as silicon oxide or silicon nitride. The first insulating layer 15 has an opening 15a (see also...). Figure 2(B) The source electrode 12 is formed to be slightly larger than the opening 15a of the first insulating layer 15, and the inner side of the peripheral portion of the source electrode 12 is exposed from the opening 15a of the first insulating layer 15. The first insulating layer 15 is formed, for example, of a resin such as polyimide or polybenzoxazole. The first insulating layer 15 is formed by the semiconductor device manufacturer, and its thickness is generally around several μm.
[0029] The relay conductor 21 has an area slightly smaller than the opening 15a of the first insulating layer 15, and is bonded to the entire surface of the portion of the source electrode 12 exposed from the opening 15a of the first insulating layer 15 via the bonding layer 41. The bonding layer 41 has an area approximately the same as that of the relay conductor 21. Therefore, a gap G is formed between the periphery of the bonding layer 41 and the periphery of the opening 15a of the first insulating layer 15 (see reference). Figure 2 (B)). The relay conductor 21 can be formed of copper-based metals. Alternatively, the relay conductor 21 can be formed using a covering material such as CIC (Copper Invar Copper). Invar (registered trademark) is an alloy of iron and nickel, a material with a low coefficient of thermal expansion. Therefore, by forming the relay conductor 21 with a material containing Invar, peeling from the sealing resin 32 can be suppressed even when the semiconductor element 10 reaches high temperatures during operation.
[0030] A second insulating layer 31 is formed on the first insulating layer 15. The second insulating layer 31 is not formed on the entire surface of the first insulating layer 15; only the peripheral portion of the first insulating layer 15 is exposed from the second insulating layer 31. The second insulating layer 31 also fills the gap G between the peripheral portion of the bonding layer 41 and the peripheral portion of the opening 15a of the first insulating layer 15, and is in contact with the peripheral portion of the bonding layer 41 and the peripheral portion of the region near the bonding layer 41 side of the relay conductor 21. The second insulating layer 31 is formed by coating using a potting method or printing method, as described later. The second insulating layer 31 is formed, for example, from a resin such as polyamide-imide, polyimide, polyetheramide-imide, or polyetheramide. The first insulating layer 15 and the second insulating layer 31 can be formed from the same resin. The second insulating layer 31 is approximately tens of μm thick, and is preferably thicker than the first insulating layer 15.
[0031] The surface-side conductor 22 has an area larger than the surface area of the semiconductor element 10, i.e., the area of the first insulating layer 15 in top view. The surface-side conductor 22 is bonded to the relay conductor 21 via a bonding layer 42. The bonding layer 42 has an area approximately the same as that of the relay conductor 21. The surface-side conductor 22 may be formed of a copper-based metal or an aluminum-based metal.
[0032] The back-side conductor 23 is bonded to the drain electrode 13 via a bonding layer 43. The drain electrode 13 is disposed on the back side opposite to the source electrode 12 of the semiconductor substrate 11. The back-side conductor 23 has the same area as the surface-side conductor 22. A sealing resin 32 is filled between the surface-side conductor 22 and the back-side conductor 23. That is, the peripheral side surfaces of the semiconductor element 10, the second insulating layer 31, and the peripheral side surfaces of the relay conductor 21 are sealed by the sealing resin 32. The back-side conductor 23 can be formed of copper-based or aluminum-based metals.
[0033] Solder or sintered metal materials can be used as bonding layers 41 to 43.
[0034] As the sealing resin 32, epoxy resin and the like can be used. Sealing based on sealing resin 32 can be applied by molding methods such as transfer molding, but it can also be applied by potting, screen printing, sealing printing, inkjet printing, heat transfer printing and other printing methods.
[0035] Next, the deterioration suppression effect of the sealing resin accompanying the presence of pores in the semiconductor device 100 of the above embodiment will be explained.
[0036] Figure 5 It is a cross-sectional view used to illustrate the effect of applying a high electric field to the pores present in the sealing resin and generating partial discharge. Figure 5 (A) is a cross-sectional view showing the pores generated in the sealing resin of the comparative example semiconductor device 100R. Figure 5 (B) is a cross-sectional view showing the pores generated in the sealing resin of the semiconductor device 100 of this embodiment.
[0037] Figure 5 The semiconductor device 100R of the comparative example illustrated in (A) does not have the relay conductor 21 of the semiconductor device 100 of this embodiment.
[0038] In the semiconductor device 100R, the surface-side conductor 22R has a protrusion 25 opposite to the portion of the source electrode 12 exposed from the opening 15a of the first insulating layer 15. The protrusion 25 is integrally formed with the surface-side conductor 22R. That is, after the protrusion 25 is bonded to the source electrode 12 by the bonding layer 41, the peripheral region of the gap G between the inner periphery of the opening 15a of the first insulating layer 15 and the bonding layer 41 is covered by the surface-side conductor 22R via the sealing resin 32.
[0039] Therefore, before filling the space between the surface-side conductor 22R and the back-side conductor 23 with the sealing resin 32, when the second insulating layer 31R is coated on the first insulating layer 15, the surface-side conductor 22R becomes an obstacle, making it difficult to form the second insulating layer 31R to connect with the periphery of the bonding layer 41 and the periphery of the protrusion 25. That is, the gap G between the inner periphery of the opening 15a of the first insulating layer 15 and the bonding layer 41 is neither covered by the first insulating layer 15 nor by the second insulating layer 31R.
[0040] in addition, Figure 5 In step (A), when filling the second insulating layer 31R before bonding the surface-side conductor 22R to the source electrode 12, a process is required to prevent the second insulating layer 31R from penetrating the area where the surface-side conductor 22R is bonded to the source electrode 12 (the surface-side conductor bonding area). Furthermore, in this process, a small gap G needs to be provided between the surface-side conductor bonding area of the source electrode 12 and the inner peripheral edge of the opening 15a of the first insulating layer 15. This small gap G cannot be fully filled by the insulating material, and the presence of pores A cannot be avoided. V The high electric field causes the sealant resin to deteriorate.
[0041] In MOSFETs, a high electric field is generated around the source electrode 12. Specifically, in SiC MOSFETs, this high electric field is approximately 10 times stronger than that of Si MOSFETs, leading to insulation failure. This can occur if pores A exist in the sealing resin 32 surrounding the source electrode 12. V The high electric field is concentrated in pore A. V Partial discharge may occur. If the partial discharge continues, the sealing resin 32 will deteriorate, eventually leading to insulation failure and causing the semiconductor element 10 to malfunction.
[0042] In particular, in the narrow space where the protrusion 25 engages with the source electrode 12, the sealing resin based on molding is difficult to fill, resulting in pores A. V The probability is relatively high.
[0043] The semiconductor device 100 of this embodiment, as shown in the figure Figure 5 As illustrated in (B), a relay conductor 21 is provided between the source electrode 12 and the surface-side conductor 22. Therefore, when the relay conductor 21 is bonded to the source electrode 12 using the bonding layer 41, before bonding the surface-side conductor 22 to the relay conductor 21, the second insulating layer 31 can be filled into the gap G between the periphery of the first insulating layer 15 and the bonding layer 41. If pores A exist in the sealing resin 32 when the gap G between the periphery of the first insulating layer 15 and the bonding layer 41 is covered by the second insulating layer 31,... VThe high electric field generated around the source electrode 12 is then divided and applied to the pore A. V The voltage and the voltage applied to the second insulating layer 31.
[0044] Applied to pores A, which act as an air layer V The voltage and the relative permittivity of the second insulating layer 31 relative to the air layer, and the pore A V The thickness of the first insulating layer is related to the ratio of the thickness of the second insulating layer 31 to the thickness of the second insulating layer 31. If the thickness of the second insulating layer 31 increases, the porosity A... V As the thickness decreases, it concentrates in pore A. V The voltage decreases. Therefore, by setting the thickness of the second insulating layer 31 to a predetermined thickness or more, the voltage applied to the pore A can be reduced. V The voltage is lower than the partial discharge initiation voltage. Therefore, if the second insulating layer 31 is set to a predetermined thickness or greater, then even if the surface-side conductor 22 is subsequently bonded to the relay conductor 21 using the bonding layer 42 and the space between the surface-side conductor 22 and the back-side conductor 23 is filled with sealing resin 32, the sealing resin 32 will not produce pores A. V It can also suppress the generation of partial discharge.
[0045] Next, the manufacturing method of the semiconductor device 100 will be described.
[0046] Figure 2 (A) Figure 2 (B) is used to explain Figure 1 The illustrated cross-sectional view of the semiconductor device in each step of the manufacturing method of the semiconductor device 100 is shown. Figure 3 (A) Figure 3 (B) is Figure 2 Cross-sectional views of the semiconductor devices used in subsequent processes.
[0047] First, a semiconductor element 10 is prepared. As described above, the semiconductor element 10 has a semiconductor substrate 11, a source electrode 12, a drain electrode 13, internal wiring 14, and a first insulating layer 15.
[0048] Then, as Figure 2 As illustrated in (A), the drain electrode 13 of the semiconductor element 10 is bonded to the back-side conductor 23 using a bonding layer 43. As described above, the bonding layer 43 can be solder or a sintered metal material. The sintered metal material is in powder or paste form and is sintered by heating. A sintered metal bonding paste containing copper and silver is preferably used as the sintered metal material. The bonding layer is positioned between the drain electrode 13 of the semiconductor element 10 and the back-side conductor 23, and bonded by thermoforming.
[0049] Next, as Figure 2As illustrated in (B), the source electrode 12 of the semiconductor element 10 is bonded to the relay conductor 21 using a bonding layer 41. The same material as the bonding layer 43 is used as the bonding layer 41.
[0050] A bonding layer 41 is positioned between the source electrode 12 and the relay conductor 21 of the semiconductor element 10 and bonded by thermoforming. The bonding layer 41, which bonds the source electrode 12 and the relay conductor 21 of the semiconductor element 10, is disposed within the opening 15a of the first insulating layer 15 of the semiconductor element 10. That is, the bonding layer 41 is smaller than the opening 15a of the first insulating layer 15 of the semiconductor element 10. Therefore, a gap G is formed between the periphery of the first insulating layer 15 and the bonding layer 41.
[0051] Figure 2 The process of (A) and Figure 2 The process (B) can be set as the reverse step. Alternatively, it can be performed in the same process. When performed in the same process, the bonding layer 43 is placed between the drain electrode 13 of the semiconductor element 10 and the back side conductor 23, and the bonding layer 41 is placed between the source electrode 12 of the semiconductor element 10 and the relay conductor 21, and the entire assembly is thermally bonded in this state.
[0052] Next, as Figure 3 As illustrated in (A), a second insulating layer 31 is applied onto the first insulating layer 15. The second insulating layer 31 is filled into the gap G between the periphery of the bonding layer 41 and the periphery of the opening 15a of the first insulating layer 15 (see Figure 1). Figure 2 The second insulating layer 31 is positioned to contact the periphery of the bonding layer 41 within (B). The second insulating layer 31 is configured to contact the periphery of the lower end of the relay conductor 21, in other words, the side of the bonding layer 41. The second insulating layer 31 can be formed using a potting method utilizing a distributor or a printing method. As a printing method, screen printing, sealing printing, inkjet printing, thermal transfer printing, etc., can be applied.
[0053] Next, as Figure 3 As shown in (B), the surface-side conductor 22 is bonded to the relay conductor 21 using a bonding layer 42. The same material as bonding layers 41 and 43 is used for bonding layer 42. Bonding layer 42 is positioned between the relay conductor 21 and the surface-side conductor 22, and bonding is performed using heat pressing.
[0054] Next, sealing resin 32 is filled between the surface-side conductor 22 and the back-side conductor 23. Thus, the peripheral surfaces of the semiconductor element 10, the second insulating layer 31, and the peripheral surfaces of the relay conductor 21 are sealed by the sealing resin 32. Figure 1The semiconductor device 100 shown in the figure. The sealing resin 32 is formed as described above using transfer molding, but potting or printing methods can also be used.
[0055] According to the above implementation method 1, the following effects are achieved.
[0056] (1) The semiconductor device 100 includes: a semiconductor element 10 having a first insulating layer 15 having an opening 15a and a source electrode (surface electrode) 12 exposed from the opening 15a of the first insulating layer 15; a relay conductor 21 bonded to the source electrode 12; a bonding layer 41 bonding the source electrode 12 to the relay conductor 21; a second insulating layer 31 covering at least a portion of the first insulating layer 15 and disposed at least grounded to the periphery of the bonding layer 41; a surface-side conductor (conductor) 22 connected to the relay conductor 21; and a sealing resin 32 filling the space between the surface-side conductor 22 and the second insulating layer 31. Thus, the source electrode 12 exposed from the opening 15a of the first insulating layer 15 is covered by the second insulating layer 31 disposed grounded to the periphery of the bonding layer 41. Therefore, even if the sealing resin 32 has pores A... V It can also suppress the generation of partial discharge and suppress the deterioration of sealing resin 32.
[0057] -Implementation Method 2-
[0058] Figure 4 This is a cross-sectional view of Embodiment 2 of the semiconductor device of the present invention.
[0059] The semiconductor device 100 of Embodiment 2 has the following structure: the second insulating layer 31a extends to the outer peripheral side of the semiconductor element 10 and is connected to the back side conductor 23.
[0060] In Embodiment 1, the second insulating layer 31 is formed only on the surface side of the semiconductor element 10 and does not extend to connect with the back-side conductor 23. In this configuration, when the surface-side conductor 22 is bonded to the relay conductor 21 using the bonding layer 42, the bonding layer 41 may melt due to heating during thermoforming, potentially causing a positional shift in the relay conductor 21. In Embodiment 2, the second insulating layer 31a extends to the position where it connects with the back-side conductor 23. Since the second insulating layer 31a connects with the relay conductor 21, even if the bonding layer 41 melts due to heating during thermoforming, the movement of the relay conductor 21 is limited by the second insulating layer 31a connected to the back-side conductor 23.
[0061] The other structures in Embodiment 2 are the same as those in Embodiment 1. The corresponding structures are labeled with the same reference numerals and the descriptions are omitted.
[0062] The same effect can be achieved in implementation method 2 as in implementation method 1.
[0063] Furthermore, according to Embodiment 2, the positional shift of the relay conductor 21 when the surface-side conductor 22 is bonded to the relay conductor 21 can be suppressed.
[0064] -Implementation Method 3-
[0065] Reference Figures 6 to 8 The third embodiment of the present invention will be described below.
[0066] Figure 6 This is an exploded perspective view of Embodiment 3 of the semiconductor device of the present invention.
[0067] Semiconductor device 200 includes four semiconductor devices 300, an outer surface-side conductor 222, and an outer back surface-side conductor 223. The four semiconductor devices 300 are spaced apart and arranged in a matrix in two rows in the left-right direction and two columns in the top-bottom direction. The outer surface-side conductor 222 and the outer back surface-side conductor 223 are each sized to cover all areas of the four semiconductor devices 300 arranged in the matrix. All four semiconductor devices 300 have the same structure.
[0068] Two semiconductor devices 300 each have an upper arm circuit, and the remaining two semiconductor devices 300 each have a lower arm circuit. Furthermore, the semiconductor devices 300 with upper arm circuits and the semiconductor devices 300 with lower arm circuits are connected in series to form an upper and lower arm series circuit. This can be used to construct a power conversion device that obtains AC outputs with different phases from the connection point of the upper and lower arm circuits.
[0069] Figure 7 yes Figure 6 The diagram shows an enlarged exploded perspective view of the semiconductor device. Figure 8 yes Figure 6 The illustrated cross-sectional view of the semiconductor device, Figure 8 (A) is a cross-sectional view before resin sealing. Figure 8 (B) is a cross-sectional view after resin sealing.
[0070] Semiconductor device 300 includes four semiconductor elements 10, a surface-side conductor 122, and a back-side conductor 123. The four semiconductor elements 10 are spaced apart and arranged in two rows in the left-right direction and two columns in the top-bottom direction to form a matrix. That is, semiconductor device 300 is configured as a 4-in-1 package. The surface-side conductor 122 and the back-side conductor 123 are each sized to cover all areas of the four semiconductor elements 10 arranged in the matrix.
[0071] All four semiconductor elements 10 have the same structure as the semiconductor element in Embodiment 1. That is, as... Figure 8As illustrated, the semiconductor element 10 has a semiconductor substrate 11, a source electrode 12, a drain electrode 13, internal wiring 14, and a first insulating layer 15. Figure 8 As illustrated, the relay conductor 21 is bonded to the source electrode 12 of each semiconductor element 10 via the bonding layer 41. Furthermore, a second insulating layer 31 is formed on the first insulating layer 15 of each semiconductor element 10, which is in contact with the periphery of the bonding layer 41 and the periphery of the region near the bonding layer 41 side of the relay conductor 21.
[0072] like Figure 7 As illustrated, the surface-side conductor 122 has a rectangular body covering four semiconductor elements 10, front ends of feet extending from the four corners of the rectangular body, and a sensing connection portion 131 protruding toward the back-side conductor 123. The sensing connection portion 131 has a square column shape and a larger cross-sectional area compared to the bonding wire. The reason for the larger cross-sectional area of the sensing connection portion 131 is to ensure the strength to withstand the loads acting on the surface-side conductor 122 and the back-side conductor 123, and to reduce the inductance.
[0073] The back-side conductor 123 is a component corresponding to the back-side conductor 23 in Embodiment 1, but in Embodiment 3, it has the dimensions to bond four semiconductor elements 10 via the bonding layer 43. In the back-side conductor 123, an insulating layer 151 is provided on all surfaces except the area where the four semiconductor elements 10 are bonded. The insulating layer 151 can be made of resin or ceramic.
[0074] A gate wiring 152 and a sensing wiring 153 are provided on an insulating layer 151 formed on the back side conductor 123. The gate wiring 152 and the sensing wiring 153 are connected to a control unit (not shown).
[0075] The control unit (not shown) applies a voltage to the source electrode 12 of the semiconductor element 10 via the gate wiring 152, using the connection between the control unit and the source electrode 12 of the semiconductor element 10 via the sensing wiring 153 as ground, i.e. as a reference potential. The reason for increasing the cross-sectional area of the sensing connection 131 is to reduce the inductance, but more precisely, it is to reduce the inductance in the connection between the control unit and the source electrode 12 of the semiconductor element 10 via the sensing wiring 153.
[0076] Reference Figure 7Gate wiring 152 is formed on an insulating layer 151 disposed on the back side conductor 123, between two pairs of semiconductor elements 10 separated on the left and right sides, in other words, at the center of the left and right sides of the back side conductor 123, extending along the vertical direction of the back side conductor 123. The gate electrode 17 of each semiconductor element 10 is connected to the gate wiring 152 via a bonding wire 161. Sensing wiring 153 is formed with a small gap between it and the gate wiring 152 and surrounds the outside of the gate wiring 152. Sensing wiring 153 has a portion extending along the vertical direction of the back side conductor 123, and a portion extending along the side surfaces of the upper and lower sides of the back side conductor 123 to near the corner of the back side conductor 123.
[0077] The sensing wiring 153 has sensing contact areas 153a on the lower end face of the sensing connection portion 131 of the contact surface side conductor 122 near each corner. The sensing contact areas 153a are part of the sensing wiring 153 and are not actually dividing lines indicating areas, but... Figure 7 In the diagram, for ease of understanding, the sensing contact area 153a is illustrated using a solid rectangular line. The surface-side conductor 122 passes through the bonding layer 42 (see reference). Figure 8 (a) and (b) are coupled to the source electrode 12 of each semiconductor element 10. Therefore, the sensing wiring 153 is connected to the source electrode 12 of each semiconductor element 10 via the surface-side conductor 122.
[0078] If the four semiconductor elements 10 are arranged close together, the heat released from each semiconductor element 10 is concentrated in a narrow area, and the back-side conductor 123 becomes hot. Therefore, as Figure 7 As shown, the four semiconductor elements 10 are arranged with a distance of more than a predetermined width between them to prevent heat concentration. However, if the semiconductor elements 10 are arranged with a distance of more than a predetermined width between them, the area of the back-side conductor 123, or in other words, the semiconductor device 300, becomes larger. Therefore, by wrapping the gate wiring 152 and the sensing wiring 153 back around the space separating the semiconductor elements 10, space can be used efficiently, and the area of the back-side conductor 123 can be reduced.
[0079] like Figure 7 and Figure 8 As illustrated, the sensing contact area 153a of the lower end face of the sensing connection portion 131 of the bonding surface side conductor 122 is disposed outside the rectangular peripheral region where four semiconductor elements 10 are arranged. Therefore, the inductance in the connection with the source electrode 12 of the semiconductor element 10 via the sensing wiring 153 can be reduced.
[0080] constitute Figure 6 The four semiconductor devices 300 of the illustrated semiconductor device 200 are as follows: Figure 8As illustrated in (a), it is disposed between the outer surface side conductor 222 and the outer back side conductor 223.
[0081] The surface-side conductor 122 of each semiconductor device 300 is bonded to the outer surface-side conductor 222 via bonding layer 44. The back-side conductor 123 of each semiconductor device 300 is bonded to the outer back-side conductor 223 via bonding layer 45. Bonding layers 44 and 45 can be formed using the same material as bonding layers 41 to 43.
[0082] Figure 8 The state illustrated in (a) is the state in which the four semiconductor devices 300 constituting the semiconductor device 200 are not filled with sealing resin 32. That is, each semiconductor element 10 and the second insulating layer 31 are not sealed by the sealing resin 32. However, a second insulating layer 31 is formed on the first insulating layer 15 of each semiconductor element 10, which is in contact with the periphery of the bonding layer 41 and the periphery of the region near the bonding layer 41 side of the relay conductor 21. Therefore, in this state, a high electric field application test can be performed on the source electrode 12. By applying a high electric field to the source electrode 12, it is possible to detect whether partial discharge occurs, whether the semiconductor element 10 is damaged, and whether its characteristics deteriorate, thereby removing defective products or performing repairs. As a result, productivity can be improved compared to inspection after resin sealing.
[0083] After a high electric field test, sealing resin 32 is filled between the outer surface conductor 222 and the outer back conductor 223, and the peripheral surfaces of each semiconductor element 10, the second insulating layer 31, and the relay conductor 21 are sealed with sealing resin 32. This allows for the formation of... Figure 8 (b) shows the semiconductor device 200.
[0084] High electric field application experiments can be conducted Figure 8 It can be carried out in state (b), and can be performed in state (b). Figure 8 It can be performed in state (a), or it can be done again in... Figure 8 It is carried out in the state of (b).
[0085] In embodiment 3, the following configuration is shown: the sensing wiring 153 and the source electrode 12 are connected via a sensing connection portion 131 integrally provided on the surface-side conductor 122. However, the sensing wiring 153 and the source electrode 12 can also be connected via a bonding wire.
[0086] In embodiment 3, the semiconductor device 300 is exemplified as a 4-in-1 package with four integrated arm circuits. However, the semiconductor device 300 can be a package with multiple integrated arm circuits, and can be widely used in N (N≥2)-in-1 packages.
[0087] In addition, in the above embodiments, the switching element is illustrated as a MOS FET.
[0088] However, other semiconductor devices such as IGBTs (Insulated Gate Bipolar Transistors) can be used to replace MOS FETs.
[0089] In the above embodiments, SiC (silicon carbide) MOS FETs are preferred as switching elements. However, in this invention, in addition to silicon carbide, it can also be applied to semiconductor devices using gallium nitride, gallium oxide, or diamond as the base material. Furthermore, this invention can also be applied to conventional Si MOS FETs.
[0090] Furthermore, although various embodiments and modifications have been described above, the present invention is not limited to these. Other embodiments conceived within the scope of the inventive concept are also included within the scope of the present invention.
[0091] Label Explanation
[0092] 10 Semiconductor Components
[0093] 12. Source electrode (surface electrode)
[0094] 13 Drain electrode (back electrode)
[0095] 15 First Insulation Layer
[0096] 15a Opening
[0097] 21 Relay conductor
[0098] 22 Surface-side conductor (conductor)
[0099] 23. Back side conductor (opposite conductor)
[0100] 31, 31a Second Insulation Layer
[0101] 32 Sealing resin
[0102] 41-45 Bonding layer
[0103] 100 Semiconductor Devices
[0104] 122 Surface-side conductor (conductor)
[0105] 123 Backside Conductor
[0106] 200 Semiconductor Devices
[0107] 222 Outer surface side conductor (outer conductor)
[0108] 223 Outer back side conductor
[0109] 300 Semiconductor Devices
[0110] A V Pores
[0111] G gap.
Claims
1. A semiconductor device, characterized in that, include: A semiconductor device having a first insulating layer with an opening and a surface electrode exposed from the opening of the first insulating layer; A relay conductor, which is coupled to the surface electrode; A bonding layer that bonds the surface electrode to the relay conductor; A second insulating layer, which covers at least a portion of the first insulating layer, is disposed at least in contact with the ground around the bonding layer; A conductor, which is connected to the relay conductor; as well as A sealing resin is used to fill the space between the conductor and the second insulating layer.
2. The semiconductor device as claimed in claim 1, characterized in that, A gap is provided between the periphery of the opening and the periphery of the bonding layer. The second insulating layer fills the gap.
3. The semiconductor device as claimed in claim 1, characterized in that, The second insulating layer is in contact with the periphery of at least the bonding layer side of the relay conductor.
4. The semiconductor device as claimed in claim 1, characterized in that, It also includes a bonding layer that bonds the conductor to the relay conductor.
5. The semiconductor device as claimed in claim 1, characterized in that, The conductor has an area that covers the entire first insulating layer of the semiconductor element. The sealing resin seals the area around the semiconductor element.
6. The semiconductor device as claimed in claim 1, characterized in that, The second insulating layer is made thicker than the first insulating layer.
7. The semiconductor device as claimed in claim 1, characterized in that, The relay conductor includes an inverter.
8. The semiconductor device as claimed in claim 1, characterized in that, The bonding layer is a sintered metal formed by sintering a metal bonding paste.
9. The semiconductor device as claimed in claim 1, characterized in that, The semiconductor element has a back electrode on the side opposite to the surface electrode. It also has opposing conductors connected to the back electrode. The second insulating layer is in contact with the opposing conductor.
10. The semiconductor device according to any one of claims 1 to 9, characterized in that, The semiconductor element uses any one of silicon carbide, gallium nitride, gallium oxide, and diamond as its base material.
11. A semiconductor device, characterized in that, include: A plurality of semiconductor elements, each of the semiconductor elements having a first insulating layer having an opening and a surface electrode exposed from the opening of the first insulating layer; A plurality of relay conductors, each of the relay conductors being coupled to the surface electrode of each of the semiconductor elements; Multiple bonding layers, each bonding layer bonding the surface electrode of each semiconductor element to each relay conductor; A plurality of second insulating layers, each second insulating layer covering at least a portion of the first insulating layer of each semiconductor element, and disposed at least in contact with the surrounding area of each bonding layer; A conductor that connects each of the relay conductors; as well as A sealing resin is used to fill the space between the conductor and the second insulating layer.
12. A semiconductor device, characterized in that, Having a plurality of semiconductor devices as described in claim 11, It also has an outer conductor for connecting the conductors of the plurality of said semiconductor devices.
13. A method for manufacturing a semiconductor device, characterized in that, Include: Prepare a semiconductor device having a first insulating layer with an opening and a surface electrode exposed from the opening of the first insulating layer; The surface electrode is bonded to the relay conductor using a bonding layer; A second insulating layer is provided, which covers at least a portion of the first insulating layer and is at least in contact with the periphery of the bonding layer; Connect the conductor to the relay conductor; as well as A sealing resin is filled between the conductor and the second insulating layer.