Motion vector of global motion constraint in inter prediction

By identifying the global motion model in the frame header and using the corresponding motion model for inter-frame prediction, the problem of high encoding and decoding complexity in existing technologies is solved, achieving more efficient video compression and quality optimization.

CN114026868BActive Publication Date: 2026-02-03DOLBY INTERNATIONAL AB
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Patent Information

Application Number
CN202080046912.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-04-25
Filing Date
2020-04-24
Publication Date
2026-02-03
Estimated Expiration
2040-04-24

AI Technical Summary

Technical Problem

Existing video coding technologies suffer from high encoding and decoding complexity and low compression efficiency when dealing with global and local motion, making it difficult to optimize the balance between video quality and data volume.

Method used

By identifying the global motion model in the frame header and using a motion model with a complexity less than or equal to the global motion model for inter-frame prediction, the complexity of the encoder and decoder is reduced, and the compression efficiency is improved.

Benefits of technology

It effectively reduces the complexity of encoders and decoders, improves video compression efficiency, and optimizes the balance between video quality and data volume.

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Abstract

A decoder comprising circuitry configured to: receive a bitstream; extract a frame header associated with a current frame, the frame header comprising a signal characterizing that global motion has been enabled, and a signal further characterizing parameters of a global motion model; decode the current frame, the decoding comprising, for each current block, using a motion model having a complexity less than or equal to a complexity of the global motion model. Related apparatuses, systems, techniques, and articles are also described.
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Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 838 563, filed April 25, 2019, entitled “GLOBAL MOTION CONSTRAINED MOTIONVECTOR IN INTER PREDICTION”, which is incorporated herein by reference in its entirety. Technical Field

[0003] This invention generally relates to the field of video compression. In particular, it relates to motion vectors with global motion constraints in inter-frame prediction. Background Technology

[0004] A video codec can include electronic circuitry or software that compresses and decompresses digital video. It can convert uncompressed video into a compressed format and vice versa. In the context of video compression, a device that compresses video (and / or performs some of its functions) is often referred to as an encoder, while a device that decompresses video (and / or performs some of its functions) is often referred to as a decoder.

[0005] The compressed data format can conform to standard video compression specifications. Compression may be lossy, meaning the compressed video lacks some information present in the original video. Because there isn't enough information to accurately reconstruct the original video, the result of compression may include: the quality of the decompressed video may be lower than the original uncompressed video.

[0006] There can be complex relationships between video quality, the amount of data used to represent the video (e.g., determined by bit rate), the complexity of encoding and decoding algorithms, sensitivity to data loss and errors, ease of editing, random access, end-to-end delay (e.g., latency), etc.

[0007] Motion compensation can include methods for predicting video frames or portions thereof by taking into account camera motion and / or the motion of objects in the video, given a reference frame (e.g., previous and / or future frames). It can be applied to the encoding and decoding of video data for video compression, for example, to encoding and decoding using the Motion Picture Experts Group (MPEG)-2 (also known as High-Level Video Coding (AVC) and H.264) standards. Motion compensation can describe an image based on the transformation from a reference image to the current image. The reference image can be earlier in time compared to the current image; or it can be future in time compared to the current image. Compression efficiency can be improved when images can be accurately synthesized from previously transmitted and / or stored images. SUMMARY

[0008] In an aspect, a decoder comprises circuitry configured to: receive a bitstream; extract a frame header associated with a current frame, the frame header comprising a signal characterizing that global motion has been enabled, and a signal further characterizing parameters of a motion model. The decoder decodes the current frame, the decoding comprising, for each current block, using a motion model having a complexity less than or equal to a complexity of the global motion model.

[0009] In another aspect, a method comprises receiving, by a decoder, a bitstream. The method comprises extracting a frame header associated with a current frame, the frame header comprising a signal characterizing that global motion has been enabled, and a signal further characterizing parameters of a motion model. The method comprises decoding the current frame, the decoding comprising, for each current block, using a motion model having a complexity less than or equal to a complexity of the global motion model.

[0010] The details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features and advantages of the subject matter described herein will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF DRAWINGS

[0011] To illustrate the invention, the accompanying drawings show aspects of one or more embodiments of the invention. It is to be understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown in the drawings, wherein:

[0012] Figure 3 is a process flow diagram in accordance with some example implementations of the current subject matter;

[0013] Figure 4 is a system block diagram of an example decoder in accordance with some example implementations of the current subject matter;

[0014] Figure 5 is a process flow diagram in accordance with some example implementations of the current subject matter;

[0015] Figure 6 is a system block diagram of an example decoder in accordance with some example implementations of the current subject matter;

[0016] Figure 1 is a diagram showing motion vectors for an example frame having global and local motion;

[0017] Figure 2 shows three example motion models that can be used for global motion, including their index values (0, 1, or 2); and,

[0018] Figure 7 is a block diagram of a computing system that can be used for implementing any one or more of the methodologies (and / or any portion thereof) disclosed herein.

[0019] The drawings are not necessarily to scale and certain details may have been omitted for the sake of clarity, or to prevent the disclosure from being unnecessarily obscured. Like reference numerals refer to like elements throughout the various drawings. DETAILED DESCRIPTION

[0020] Global motion in a video refers to motion that occurs in the entire frame. Global motion can be caused by camera motion; for example, camera panning and zooming can create motion in the frame that generally affects the entire frame. Motion present in a portion of a video can be referred to as local motion. Local motion can be caused by moving objects in a scene, for example, but not limited to, an object moving from left to right in a scene. A video can contain a combination of local and global motion. Some embodiments of the current subject matter can provide an efficient way to communicate global motion to a decoder, and an efficient way to use global motion vectors to improve compression efficiency.

[0021] Figure 1 is a diagram showing motion vectors of an example frame 100 with global and local motion. Frame 100 includes a plurality of pixel blocks, illustrated as squares, and their associated motion vectors, illustrated as arrows. Squares (e.g., pixel blocks) with arrows pointing up and to the left represent blocks with motion that can be considered global motion, while squares with arrows pointing in other directions, represented by 104, represent blocks with local motion. In the example shown, many blocks have the same global motion. Signaling the global motion in the frame header, such as a picture parameter set (PPS) or a sequence parameter set (SPS), and using the signaled global motion, the motion vector information required for the blocks can be reduced, resulting in improved prediction. Although the examples described below relate to determining and / or applying global or local motion vectors at the block level for illustrative purposes, global motion vectors can be determined and / or applied to any region of a frame and / or picture, including regions composed of multiple blocks, regions bounded by any geometric form (such as, but not limited to, regions bounded by geometric and / or exponential coding, where one or more straight lines and / or curves bounding the shape can be angled and / or curved), and / or the entire frame and / or picture. Although signaling is described herein as being performed at the frame level and / or in the frame header and / or parameter set of a frame, signaling can alternatively or additionally be performed at the sub-picture level, where a sub-picture can include any region of a frame and / or picture as described above. Figure 1 In the example shown, many blocks have the same global motion. Signaling the global motion in the frame header, such as a picture parameter set (PPS) or a sequence parameter set (SPS), and using the signaled global motion, the motion vector information required for the blocks can be reduced, resulting in improved prediction. Although the examples described below relate to determining and / or applying global or local motion vectors at the block level for illustrative purposes, global motion vectors can be determined and / or applied to any region of a frame and / or picture, including regions composed of multiple blocks, regions bounded by any geometric form (such as, but not limited to, regions bounded by geometric and / or exponential coding, where one or more straight lines and / or curves bounding the shape can be angled and / or curved), and / or the entire frame and / or picture. Although signaling is described herein as being performed at the frame level and / or in the frame header and / or parameter set of a frame, signaling can alternatively or additionally be performed at the sub-picture level, where a sub-picture can include any region of a frame and / or picture as described above.

[0022] As an example, and continuing with reference to Figure 1Simple translational motion can be described using a motion vector (MV) having two components MVx, MVy describing the displacement of a block and / or pixels in the current frame. More complex motion, such as rotation, scaling and warping, can be described using an affine motion vector; where, as used in this disclosure, an "affine motion vector" is a vector describing a uniform displacement of a set of pixels or points representing in a video picture and / or picture, e.g., a set of pixels representing a view of an object in a video moves and does not change appearance shape during the motion. Some video coding and / or decoding methods can use a 4-parameter or 6-parameter affine model for motion compensation in inter-picture coding.

[0023] For example, a six-parameter affine motion can be described as:

[0024] x' = ax + by + c

[0025] y' = dx + ey + f

[0026] A four-parameter affine motion can be described as:

[0027] x' = ax + by + c

[0028] y' = -bx + ay + f

[0029] where (x, y) and (x', y') are pixel positions in the current picture and the reference picture, respectively; a, b, c, d, e and f are parameters of the affine motion model.

[0030] Still referring to Figure 1 The parameters used to describe the affine motion can be used to signal to the decoder to apply affine motion compensation at the decoder. In some methods, the motion parameters can be explicitly signaled; or, signaled through translational control point motion vectors (CPMVs) from which the affine motion parameters are derived. Two control point motion vectors (CPMVs) can be used to derive the affine motion parameters of a four-parameter affine motion model, and three control point translational motion vectors (CPMVs) can be used to obtain the parameters of a six-parameter motion model. Signaling the affine motion parameters using control point motion vectors can allow the use of efficient motion vector coding methods to signal the affine motion parameters.

[0031] In some embodiments, continuing to refer to Figure 1Global motion signaling can be included in the frame header, e.g., PPS or SPS. Global motion can be picture-specific. The motion vector identified in the frame header of a picture can describe the motion relative to a previously decoded frame. In some implementations, the global motion can be translational or affine. The motion model used (e.g., the number of parameters, whether the model is affine, translational, or other) can also be identified in the frame header of the picture. Figure 2 Three example motion models 200 that can be used for global motion are shown, including their index values (0, 1, or 2).

[0032] Still referring to Figure 2 PPS can be used to identify parameters that can change between picture sequences. For parameters that remain consistent for a sequence of pictures, they can be identified in the sequence parameter set to reduce the size of the PPS and lower the video bitrate. An example picture parameter set (PPS) is shown in Table 1:

[0033]

[0034]

[0035]

[0036]

[0037]

[0038] An additional field can be added to the PPS to identify global motion. In the case of global motion, the presence of global motion parameters in a sequence of pictures can be identified in the SPS; the PPS can reference the SPS by SPS ID. In some decoding methods, the SPS can be modified by adding a field to identify the presence of global motion parameters in the SPS. For example, a one-bit field can be added to the SPS. If the bit global motion present is 1, global motion related parameters can be expected in the PPS; if the bit global motion present is 0, there can be no fields related to global motion parameters in the PPS. For example, the PPS in Table 1 can be extended to include the global motion present field, e.g., as shown in Table 2:

[0039]

[0040]

[0041] Similarly, PPS can include the pps_global_motion_parameters field in the frame, for example, as shown in Table 3:

[0042]

[0043] More specifically, PPS may include fields that characterize global motion parameters using control point motion vectors, for example, as shown in Table 4:

[0044]

[0045]

[0046] As a further non-limiting example, Table 5 below can represent exemplary SPS:

[0047]

[0048]

[0049]

[0050]

[0051]

[0052]

[0053]

[0054]

[0055]

[0056] The SPS table can be extended as described above to incorporate global motion presence indicators as shown in Table 6:

[0057]

[0058] Additional fields may be incorporated into the SPS to reflect additional indicators as described in this disclosure.

[0059] In one embodiment, still referencing Figure 2In PPS and / or SPS, the `sps_affine_enabled_flag` specifies whether affine-based motion compensation can be used for inter-frame prediction. If `sps_affine_enabled_flag` equals 0, the syntax is constrained so that affine-based motion compensation is not used in code-later video sequences (CLVS), and `inter_affine_flag` and `cu_affine_type_flag` are not required in the CLVS coding unit syntax. Otherwise (`sps_affine_enabled_flag` equals 1), affine-based motion compensation can be used in CLVS.

[0060] Continue to refer to Figure 2 The `sps_affine_enabled_flag` in PPS and / or SPS specifies whether motion compensation based on a 6-parameter affine model can be used for inter-frame prediction. If `sps_affine_enabled_flag` equals 0, the syntax can be constrained so that motion compensation based on a 6-parameter affine model is not used in CLVS, and `cu_affine_type_flag` may not exist in the CLVS coding unit syntax. Otherwise (`sps_affine_enabled_flag` equals 1), motion compensation based on a 6-parameter affine model can be used in CLVS. When `sps_affine_type_flag` does not exist, it can be inferred that its value is equal to 0.

[0061] Still refer to Figure 2 Translation CPMV can be identified in PPS. Control points can be predefined. For example, control point MV0 can be relative to the top left corner of the image, MV1 can be relative to the top right corner, and MV3 can be relative to the bottom left corner. Table 4 shows an example method for identifying CPMV data based on the motion model used.

[0062] In one exemplary embodiment, still referring to Figure 2, the array amvr_precision_idx can be identified in coding units, coding trees, etc. The array amvr_precision_idx can specify the resolution AmvrShift of the motion vector difference, which can be defined as a non - restrictive example shown in Table 7 below. The array indices x0, y0 can indicate: the position (x0, y0) of the upper - left luminance sample of the considered coding block relative to the upper - left luminance sample of the picture; when amvr_precision_idx[x0][y0] does not exist, it can be inferred that it is equal to 0. When inter_affine_flag[x0][y0] is equal to 0, the variables MvdL0[x0][y0][0], MvdL0[x0][y0][1], MvdL1[x0][y0][0], MvdL1[x0][y0][1] represent the modulation vector differences corresponding to the considered block, and these values can be modified by shifting them by AmvrShift, for example, using: MvdL0[x0][y0][0] = MvdL0[x0][y0][0] << AmvrShift;

[0063] MvdL0[x0][y0][1] = MvdL0[x0][y0][1] << AmvrShift;

[0064] MvdL1[x0][y0][0] = MvdL1[x0][y0][0] << AmvrShift; and,

[0065] MvdL1[x0][y0][1] = MvdL1[x0][y0][1] << AmvrShift. When inter_affine_flag[x0][y0] is equal to 1, the variables MvdCpL0[x0][y0][0][0], MvdCpL0[x0][y0][0][1], MvdCpL0[x0][y0][1][0], MvdCpL0[x0][y0][1][1], MvdCpL0[x0][y0][2][0] and MvdCpL0[x0][y0][2][1] can be modified by shifting, for example, as follows:

[0066] MvdCpL0[x0][y0][0][0] = MvdCpL0[x0][y0][0][0] << AmvrShift;

[0067] MvdCpL1[x0][y0][0][1] = MvdCpL1[x0][y0][0][1] << AmvrShift;

[0068] MvdCpL0[x0][y0][1][0] = MvdCpL0[x0][y0][1][0] << AmvrShift;

[0069] MvdCpL1[x0][y0][1][1] = MvdCpL1[x0][y0][1][1] << AmvrShift;

[0070] MvdCpL0[x0][y0][2][0] = MvdCpL0[x0][y0][2][0] << AmvrShift; and,

[0071] MvdCpL1[x0][y0][2][1] = MvdCpL1[x0][y0][2][1] << AmvrShift.

[0072]

[0073] Further refer to Figure 2 , the global motion may be relative to a previously encoded frame. When there is only one set of global motion parameters, the motion may be relative to the frame presented immediately before the current frame.

[0074] Continuing to refer to Figure 2 , the global motion may represent the main motion in a frame. Many blocks in the frame may have motions very similar to the global motion. Exceptional cases may be blocks with local motion. Keeping the block motion compensation compatible with the global motion can reduce the complexity of the encoder and the decoder and improve the compression efficiency.

[0075] In some embodiments, still referring to Figure 2 , if the global motion is identified in a frame header such as PPS or SPS, the motion model in SPS may be applied to all blocks in the picture. For example, if the global motion uses translational motion (e.g., motion model = 0), then all prediction units (PUs) in the frame may also be limited to translational motion (e.g., motion model = 0). In this case, the adaptive motion model may not be used. This can also be identified in the SPS using the use_gm_constrained_motion_models flag. When this flag is set to 1, the adaptive motion model may not be used in the decoder, and instead, a single motion model may be used for all PUs.

[0076] Still referring to Figure 2In some implementations of the present topic, motion signaling may not change across multiple PUs. Instead, a fixed motion model can be used by identifying the motion model once in the SPS. This approach can replace global motion. The use of a fixed motion model can be specified at the encoder to reduce complexity; for example, the encoder might be limited to a translation model, which may be advantageous for low-power devices (e.g., low-computation-power devices). For example, an affine motion model might not be used; this can be specified in the encoder profile. Such examples may be useful for real-time applications such as video conferencing, Internet of Things (IoT) infrastructure, security cameras, etc. By using a fixed motion model, it may be unnecessary to include redundant signaling in the bitstream.

[0077] Continue to refer to Figure 2 The current topic is not limited to coding techniques that utilize global motion, but can be applied to a wide range of coding techniques.

[0078] As mentioned above, and still referring to Global motion model Global motion can represent the main motion in a frame. Many blocks in a frame may have motions very similar to the global motion, except for blocks with local motion. Maintaining block motion compensation compatible with global motion can reduce encoder and decoder complexity and improve compression efficiency.

[0079] Still referencing Motion model for inter coding Instead of restricting the motion of each block to the same motion model (e.g., but not limited to the global motion model) identified in the frame header (e.g., PPS or SPS), the motion model applied to each block in the frame can be restricted to a similar motion model. Similar motion models may include those with the same or lower complexity. For example, the following three models are shown in the first column of Table 5 in ascending order of complexity.

[0080] Translation (MM=0) Translation 4-parameter affine (MM=1) Translation or 4-parameter affine 6-parameter affine (MM=2) Translation or 4-parameter affine or 6-parameter affine Figure 2 Figure 2

[0081] Still refer to Figure 3 The second column of Table 5 shows the motion models allowed for blocks used in inter-frame coding. For example, some implementations of the current topic may allow the PU to employ a motion model whose index is less than or equal to the index of the motion model for the global motion.

[0082] Continue to refer to Figure 3 Maintaining compatibility between the motion model and global motion allows the use of global motion control points as candidates for motion vector prediction. Global motion CPMV can represent motions similar to those of PU and serves as a good candidate for MV prediction.

[0083] Figure 4This is a flowchart illustrating an exemplary embodiment of the process of applying a similar motion model to the global motion model identified in the frame header.

[0084] In step 305, the decoder receives a bitstream. The current block may be included within the bitstream received by the decoder. The bitstream may include, for example, data found in the bitstream that serves as input to the decoder when data compression is used. The bitstream may include information required for decoding the video. Receiving the bitstream may include extracting and / or parsing blocks and associated signaling information from the bitstream. In some implementations, the current block may include: a coding tree unit (CTU), a coding unit (CU), and / or a prediction unit (PU).

[0085] In step 310, still refer to Figure 4 The frame header associated with the current frame can be extracted. This header includes signals indicating that global motion has been enabled and signals further characterizing the parameters of the motion model. In step 315, the current frame may be decoded. Decoding may include, for each current block, using a motion model with a complexity less than or equal to that of the global motion model.

[0086] Figure 5 This is a system block diagram illustrating an exemplary embodiment of a decoder 400 capable of decoding bitstreams, including motion models applied to a global motion model similar to a frame header identifier. The decoder 400 may include: an entropy decoder processor 404, an inverse quantization and inverse transform processor 408, a deblocking filter 412, a frame buffer 416, a motion compensation processor 420, and / or an intra-frame prediction processor 424.

[0087] During operation, still refer to Figure 5 The bitstream 428 may be received by decoder 400 and input to entropy decoder processor 404; entropy decoder processor 404 may decode a portion of the bitstream's entropy into quantization coefficients. The quantization coefficients may be provided to inverse quantization and inverse transform processor 408, which may perform inverse quantization and inverse transform to create a residual signal, which may be added to the output of motion compensation processor 420 or intra-frame prediction processor 424, depending on the processing mode. The output of motion compensation processor 420 and / or intra-frame prediction processor 424 may include block prediction based on previously decoded blocks. The sum of prediction and residual may be processed by deblocking filter 412 and stored in frame buffer 416.

[0088] Figure 6This is a flowchart illustrating an exemplary process 500 for video encoding based on aspects and applications of the current topic, and a motion model similar to a global motion model identified by a frame header. This process can reduce encoding complexity while improving compression efficiency. In step 505, the video frame may undergo initial block segmentation, for example, using a tree-structured macroblock segmentation scheme, which may include segmenting the image frame into CTUs and CUs.

[0089] In step 510, still refer to Figure 6 The global motion of the current block or frame may be determined. In step 515, the block may be encoded and included in the bitstream. Encoding may include setting flags in the frame header of all blocks of the frame to apply a model similar to the global motion model. For example, encoding may include utilizing inter-frame prediction and intra-frame prediction modes.

[0090] Figure 6 This is a system block diagram illustrating an exemplary embodiment of a decoder 600 capable of applying a motion model similar to a frame header identifier to a global motion model. The example video encoder 600 may receive input video 604, which may undergo initial segmentation and / or partitioning according to a processing scheme such as a tree-structured macroblock partitioning scheme (e.g., quadtree plus binary tree). Examples of a tree-structured macroblock partitioning scheme may include partitioning picture frames into large blocks called coding tree units (CTUs). In some implementations, each CTU may be further partitioned once or multiple times into several sub-blocks called coding units (CUs). The final result of this partitioning may include a set of sub-blocks that may be called prediction units (PUs). Transform units (TUs) may also be used.

[0091] Still refer to Figure 6 The example video encoder 600 may include: an intra-frame prediction processor 612, a motion estimation / compensation processor 612 (also known as an inter-frame prediction processor, which is capable of constructing a list of motion vector candidates, including adding individual global motion vector candidates to the list), a transform / quantization processor 616, an inverse quantization / inverse transform processor 620, a loop filter 624, a decoded image buffer 628, and / or an entropy coding processor 632. Bitstream parameters may be input to the entropy coding processor 632 to be included in the output bitstream 636.

[0092] In operation, still refer to Figure 6For each block of the input video 604 frame, it may be determined whether to process the block using intra-frame prediction or motion estimation / compensation. The block may be provided to either the intra-frame prediction processor 608 or the motion estimation / compensation processor 612. If the block is to be processed via intra-frame prediction, the intra-frame prediction processor 608 may perform processing to output predicted values. If the block is to be processed via motion estimation / compensation, the motion estimation / compensation processor 612 may perform processing, if applicable, including constructing a list of motion vector candidates (including adding individual global motion vector candidates to the list of motion vector candidates).

[0093] Still refer to Figure 6 The residual may be formed by subtracting the predicted value from the input video. The residual may be received by a transform / quantization processor 616, which performs transform processing, such as a discrete cosine transform (DCT), to produce quantizable coefficients. The quantization coefficients and any associated identification information may be provided to an entropy coding processor 632 for entropy coding and included in the output bitstream 636. The entropy coding processor 632 may support the encoding of identification information related to the current block. Furthermore, the quantization coefficients may be provided to an inverse quantization / inverse transform processor 620, which may reproduce pixels. These quantization coefficients may be combined with the predicted value and processed by a loop filter 624. The output of the loop filter 624 may be stored in a decoded image buffer 628 for use by a motion estimation / compensation processor 612, which is capable of constructing a motion vector candidate list, including adding individual global motion vector candidates to the motion vector candidate list.

[0094] Continue to refer to Figure 6 Although some variations have been described in detail above, other modifications or additions are possible. For example, in some implementations, the current block may include any symmetrical block (8x8, 16x16, 32x32, 64x64, 128x128, etc.) and any asymmetrical block (8x4, 16x8, etc.).

[0095] In some implementations, reference is still made to Figure 7 This could potentially implement a quadtree plus binary decision tree (QTBT). In QTBT, at the level of the encoding tree unit, the partitioning parameters of the QTBT can be dynamically derived to adapt to local characteristics without any propagation overhead. Subsequently, at the encoding unit level, the joint classifier decision tree structure can eliminate unnecessary iterations and control the risk of mispredictions. In some implementations, the LTR frame block update mode may be available as an additional option at each leaf node of the QTBT.

[0096] In some implementations, reference continues.​ Additional syntax elements may be identified at different levels of the bitstream. For example, an enable flag can be used for the entire sequence by including an enable flag encoded in the Sequence Parameter Set (SPS). Furthermore, CTU flags may be encoded at the Code Tree Unit (CTU) level.

[0097] It should be noted that any one or more aspects and embodiments described herein can be readily implemented using digital electronic circuits, integrated circuits, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), computer hardware, firmware, software, and / or combinations thereof, such as on one or more machines programmed according to the teachings of this specification (e.g., one or more computing devices used as user computing devices for electronic documents, one or more server devices such as document servers), as will be apparent to those skilled in the art of computers. These different aspects or features may include implementations in one or more computer programs and / or software that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be dedicated or general-purpose, coupled to receive data and instructions from a storage system, at least one input device, and at least one output device, and to transfer data and instructions to the storage system, at least one input device, and at least one output device. Based on the teachings of this disclosure, a skilled programmer can readily prepare appropriate software code, as will be apparent to those skilled in the art of software. The aspects and implementations of employing software and / or software modules discussed above may also include: appropriate hardware for assisting in the implementation of machine-executable instructions for the software and / or software modules.

[0098] Such software can be a computer program product employing a machine-readable storage medium. A machine-readable storage medium can be any medium capable of storing and / or encoding a sequence of instructions executable by a machine (e.g., a computing device) and causing the machine to perform any of the methods and / or embodiments described herein. Examples of machine-readable storage media include, but are not limited to: magnetic disks, optical disks (e.g., CDs, CD-Rs, DVDs, DVD-Rs, etc.), magneto-optical disks, read-only memory "ROM" devices, random access memory "RAM" devices, magnetic cards, optical cards, solid-state storage devices, EPROMs, EEPROMs, programmable logic devices (PLDs), and / or any combination thereof. As used herein, machine-readable media are intended to include: single media as well as collections of physically separate media, such as a set of optical disks combined with one or more hard disk drives and computer memory. As used herein, machine-readable storage media do not include temporary forms of signal transmission.

[0099] Such software may also include: information (e.g., data) carried as data signals on a data carrier (e.g., a carrier wave). For example, machine-executable information may be contained in the data carrier as data-carrying signals; in the data carrier, signals encode a sequence of instructions or a portion thereof for execution by a machine (e.g., a computing device) and encode any associated information (e.g., data structures and data) to enable the machine to perform any of the methods and / or embodiments described herein.

[0100] Examples of computing devices include, but are not limited to: e-book reading devices, computer workstations, terminal computers, server computers, handheld devices (e.g., tablets, smartphones, etc.), network devices, network routers, network switches, bridges, any machine capable of executing a sequence of instructions (which specify the actions the machine should take), and any combination thereof. In one example, a computing device may be included in and / or incorporated into an information kiosk.

[0101] ​ The illustration shows an embodiment of a computing device in an example form of a computer system 700, in which an instruction set may be executed to cause the control system to perform any or more aspects and / or methods of this disclosure. It is also contemplated that multiple computing devices may be used to implement a specially configured set of instructions to cause one or more devices to perform any or more aspects and / or methods of this disclosure. The computer system 700 includes a processor 704 and a memory 708, which communicate with each other and with other components via a bus 712. The bus 712 may include any of several types of bus architectures (using any of a variety of bus architectures), including but not limited to: a memory bus, a memory controller, a peripheral bus, a local bus, and any combination thereof.

[0102] Memory 708 may include various components (e.g., machine-readable media), including but not limited to random access memory components, read-only components, and any combination thereof. In one example, the basic input / output system 716 (BIOS) includes basic routines that facilitate the transfer of information between elements within the computer system 700, such as during startup; these basic routines may be stored in memory 708. Memory 708 may also include instructions (e.g., software) 720 stored in one or more machine-readable media; these instructions implement any or more aspects and / or methods of this disclosure. In another example, memory 708 may also include any number of program modules, including but not limited to: an operating system, one or more application programs, other program modules, program data, and any combination thereof.

[0103] Computer system 700 may also include storage device 724. Examples of storage devices (e.g., storage device 724) include, but are not limited to, hard disk drives, disk drives, optical disk drives combined with optical media, solid-state storage devices, and any combination thereof. Storage device 724 may be connected to bus 712 via a suitable interface (not shown). Example interfaces include, but are not limited to, SCSI, advanced technology attachment (ATA), serial ATA, universal serial bus (USB), IEEE 1394 (FIREWIRE), and any combination thereof. In one example, storage device 724 (or one or more components thereof) may removably interact with computer system 700 (e.g., via an external port connector (not shown)). In particular, storage device 724 and associated machine-readable medium 728 may provide non-volatile and / or volatile storage of machine-readable instructions, data structures, program modules, and / or other data for computer system 700. In one example, software 720 may reside wholly or partially within machine-readable medium 728. In another example, software 720 may reside entirely or partially within processor 704.

[0104] Computer system 700 may also include input device 732. In one example, a user of computer system 700 may input commands and / or other information into computer system 700 via input device 732. Examples of input device 732 include, but are not limited to: alphanumeric input devices (e.g., keyboard), pointing devices, joysticks, game controllers, audio input devices (e.g., microphones, voice response systems, etc.), cursor control devices (e.g., mice), touchpads, optical scanners, video capture devices (e.g., still cameras, camcorders), touchscreens, and any combination thereof. Input device 732 may be connected to bus 712 via any of a variety of interfaces (not shown), including but not limited to: serial interfaces, parallel interfaces, game ports, USB interfaces, firewire interfaces, direct interfaces connected to bus 712, and any combination thereof. Input device 732 may include a touchscreen interface, which may be part of or separate from display 736, as will be discussed further below. Input device 732 may be used as a user selection device for selecting one or more graphical representations within the graphical interface described above.

[0105] Users can also input commands and / or other information to computer system 700 via storage device 724 (e.g., removable disk drive, flash drive, etc.) and / or network interface device 740. Network interface devices, such as network interface device 740, can be used to connect computer system 700 to one or more networks (e.g., network 744) and one or more remote devices 748 connected to that network. Examples of network interface devices include, but are not limited to: network interface cards (e.g., mobile network interface cards, LAN cards), modems, and any combination thereof. Examples of networks include, but are not limited to: wide area networks (e.g., the Internet, corporate networks), local area networks (e.g., networks associated with offices, buildings, campuses, or other relatively small geographical areas), telephone networks, data networks associated with telephone / voice providers (e.g., mobile communication provider data and / or voice networks), direct connections between two computing devices, and any combination thereof. Networks, such as network 744, may employ wired and / or wireless communication modes. Typically, any network topology can be used. Information (e.g., data, software 720, etc.) can be transmitted to computer system 200 and / or transmitted out of computer system 700 via network interface device 740.

[0106] Computer system 700 may further include a video display adapter 752 for transmitting displayable images to a display device, such as display device 736. Examples of display devices include, but are not limited to, liquid crystal displays (LCDs), cathode ray tube displays (CRTs), plasma displays, light-emitting diode displays (LEDs), and any combination thereof. Display adapter 752 and display device 736 may be used in conjunction with processor 704 to provide a graphical representation of aspects of this disclosure. In addition to display devices, computer system 700 may include one or more other peripheral output devices, including, but not limited to, audio speakers, printers, and any combination thereof. These peripheral output devices may be connected to bus 712 via peripheral interface 756. Examples of peripheral interfaces include, but are not limited to, serial ports, USB connections, firewire connections, parallel connections, and any combination thereof.

[0107] The foregoing is a detailed description of illustrative embodiments of the present invention. Various modifications and additions can be made without departing from the spirit and scope of the invention. Features of each of the various embodiments described above can be suitably combined with features of other described embodiments to provide multiple feature combinations in associated new embodiments. Furthermore, while several individual embodiments have been described above, the description herein is merely an illustration of the application of the principles of the invention. Moreover, although specific methods herein may be illustrated and / or described as being performed in a particular order, the order is highly variable within the ordinary technical scope of implementing the embodiments disclosed herein. Therefore, this description is intended only as an example and does not otherwise limit the scope of the invention.

[0108] In the foregoing description and claims, phrases such as “at least one” or “one or more” may appear after a list of combinations of elements or features. The term “and / or” may also appear in a list of two or more elements or features. Unless implied or explicitly contradicted by the context in which it is used, such phrases are intended to mean any element or feature listed individually, or any listed element or feature combined with any other listed element or feature. For example, the phrases “at least one of A and B;”, “one or more of A and B;”, and “A and / or B” respectively mean “A alone, B alone, or A and B together.” A similar interpretation applies to lists containing three or more items. For example, the phrases “at least one of A, B, and C;”, “one or more of A, B, and C;”, and “A, B, and / or C” respectively mean “A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together.” Furthermore, the term “based on” as used in the foregoing and claims is intended to mean “at least partially based on,” allowing for the inclusion of features or elements not listed.

[0109] Depending on the desired configuration, the subject matter described herein can be embodied in systems, devices, methods, and / or articles. The embodiments set forth in the foregoing description do not represent all embodiments consistent with the subject matter described herein. Rather, they are merely some examples consistent with aspects related to the described subject matter. Although some variations have been described in detail above, other modifications or additions are possible. In particular, further features and / or variations may be provided in addition to those set forth herein. For example, the above embodiments may involve various combinations and sub-combinations of the disclosed features and / or combinations and sub-combinations of several further features described above. Furthermore, the logical flows depicted in the drawings and / or described herein do not necessarily need to be in the specific order or sequence shown to achieve the desired results. Other implementations may be within the scope of the following claims.

Claims

1. A decoder, the decoder comprising circuitry configured to: Receive a bit stream, the bit stream including an encoded image, the encoded image having a first region and a second region, the first region including a first consecutive plurality of encoded blocks, and the second region including a second consecutive plurality of encoded blocks; Extract a set of parameters associated with the encoded images in the bitstream from the bitstream, wherein the set of parameters includes signals characterizing that a global motion model has been enabled, the global motion model including an affine motion model that uses control point motion vectors; and, A motion model is used to decode the encoded image for each block, and the complexity of the motion model for each block is no greater than the complexity of the global motion model, wherein the complexity of the motion model is a function of the number of motion vectors required to decode the block; Specifically, the global motion model is used to decode each block of the first region in the encoded image, and one or both of the four-parameter affine motion model and the translational motion model are used to decode each block of the second region in the encoded image.

Citation Information

Patent Citations

  • Method and apparatus for global motion compensation in video coding system

    CN108293128A