Dynamic memory fusion and prefetching method

By using dynamic memory fusion and prefetching methods, the problem of insufficient mobile terminal memory was solved, improving system performance and interaction smoothness, enhancing the survivability of background apps, and reducing user latency.

CN114036076BActive Publication Date: 2026-05-19TIANJIN UNIV OF TECH & EDUCATION (TEACHER DEV CENT OF CHINA VOCATIONAL TRAINING & GUIDANCE)
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
TIANJIN UNIV OF TECH & EDUCATION (TEACHER DEV CENT OF CHINA VOCATIONAL TRAINING & GUIDANCE)
Filing Date
2021-10-05
Publication Date
2026-05-19

AI Technical Summary

Technical Problem

Insufficient memory on existing mobile terminals leads to app elimination, while memory fusion algorithms cause system performance degradation, user interaction lag, and resource scheduling stagnation.

Method used

A dynamic memory fusion and prefetching method is adopted. The memory fusion module dynamically compresses RAM memory and fused ROM storage, and the fusion prefetching module prefetches ROM data into RAM in advance, thereby improving the cache hit rate and reducing the latency overhead caused by disk I/O operations and CPU speed differences.

Benefits of technology

Significantly improves system stability and interaction smoothness, reduces user latency, enhances system performance and memory availability, and strengthens the survivability of background apps.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the field of memory management of mobile terminal equipment, and specifically provides a dynamic memory fusion and prefetching method. The method solves the problems of memory shortage, APP switching lag, background killing and user interaction delay caused by multi-task switching and background residence of the equipment. The memory fusion divides the memory into RAM main memory, a Swap compression area of the RAM, and a Swap area of the ROM (EEPROM); the RAM stores as much memory as possible, the ROM further provides memory expansion capability, and real-time memory merging is performed according to priorities. The application also provides a prefetch table based on time flow and a prefetching method of memory fusion, which maps irregular physical addresses into continuous structured prefetch addresses; the prefetch table provides a basis for memory fusion, and the free CPU performance is used to perform data prefetching in advance for the Swap of the ROM, so that the Cache hit rate is greatly improved, and the delay cost caused by the speed difference between the disk and the CPU is reduced. The application is suitable for dynamic management and optimization of the memory of a mobile terminal.
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Description

Technical Field

[0001] This invention relates to the field of memory management in mobile terminal devices, specifically to a dynamic memory fusion and prefetching method. Background Technology

[0002] With the rapid popularization of mobile terminal devices, primarily smartphones, the software ecosystem is becoming increasingly rich, with a constant stream of apps covering various aspects of people's lives. On the other hand, advancements in hardware, especially CPUs, have significantly increased the computing power of mobile terminals. This ultimately leads to a growing demand from users to constantly switch between various applications in real-world use, thus placing increasingly stringent requirements on the ability of apps to remain running in the background.

[0003] To address these issues, major device manufacturers have for many years relied on increasing physical RAM (Random Access Memory) as the most direct and fundamental solution. However, investigations have revealed that the increase in physical RAM is far from keeping pace with user demand. There are two main reasons for this: 1. The memory usage of various apps and operating systems is constantly increasing, and many applications, such as instant messaging software, require long-term memory access; 2. People's need to switch between apps daily is also continuously growing.

[0004] To further address memory constraints, major manufacturers have begun developing and implementing Linux-based memory compression methods: the mainstream methods are ZRAM and ZRAM+SWAP. Both trade "time" for "space," but the space gained by ZRAM is very limited. Huawei's latest ZRAM+SWAP method improves upon the former's limitations, but it causes significant system performance degradation during ROM write and read swap operations. The reasons are as follows: 1. CPU processing speed is far higher than RAM read operations; 2. The speed difference between RAM and I / O devices (flash memory) is also substantial. For example, in current mainstream commercial hardware combinations, DDR5 and UFS 3.1 constantly performing I / O operations significantly impair system performance, leading to unpleasant user experiences such as lag when switching background apps. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of existing mobile terminal memory shortages leading to APP kills and memory fusion algorithms causing system performance degradation, user interaction lag, and resource scheduling stagnation when using ROM swap space. To address these issues, a dynamic memory fusion and prefetching method is proposed. This method changes the original strategy of swapping memory when needed and reduces the time consumption of IO operations through prefetching, thereby greatly improving system performance, operational stability, and interaction smoothness.

[0006] The dynamic memory fusion and prefetching method consists of two modules: a memory fusion module and a fusion prefetching module.

[0007] The memory fusion module is used to dynamically compress RAM memory and fuse ROM storage as memory to solve the problem of insufficient system memory.

[0008] The integrated prefetch module is used to dynamically prefetch data stored in ROM and swap it to RAM in advance, which greatly improves the cache hit rate and reduces the latency overhead caused by the speed difference between the disk and the CPU.

[0009] Dynamic memory fusion and prefetching methods include both storage and retrieval aspects:

[0010] Mobile terminal storage steps:

[0011] Step 1: The system stores the data in the main memory area of ​​RAM.

[0012] Step 2: When the RAM main memory reaches the storage threshold, the data is compressed into the RAM Swap area according to the LRU strategy.

[0013] Step 3: When the storage capacity of the entire RAM reaches the storage threshold, the data in the RAM's Swap area is transferred to the ROM's Swap area according to the LRU strategy.

[0014] Step 4: When the storage of the entire memory system, namely RAM main memory, RAM Swap and ROM Swap, reaches the storage threshold, and the system needs free storage area, the processes in the ROM Swap area are disinfected according to the LRU policy until a free storage area that meets the system's request is generated.

[0015] Reading steps on the mobile terminal:

[0016] Step 1: The system requests data. If the data is in RAM main memory, the system returns the data directly.

[0017] Step 2: If the requested data is in the RAM Swap area, the main memory and the requested data are swapped using the LRU strategy.

[0018] Step 3: If the requested data is in the ROM Swap area, the RAM Swap data is transferred to the ROM Swap area using the LRU strategy.

[0019] Step 4: Then, using the LRU strategy, compress the RAM main memory data into the RAM Swap area.

[0020] Step 5: Finally, transfer the system request data from ROM to RAM main memory.

[0021] Step 6: Determine whether there is data that needs to be prefetched by checking the prefetch table. If so, repeat steps 3 and 4, and finally transfer the prefetched data to the Swap area of ​​RAM.

[0022] Compared with existing methods, the advantages of this invention are: it innovatively proposes a memory-integrated data prefetching method that utilizes the CPU's surplus computing power to prefetch ROM data into RAM during scheduling idle periods, thereby improving cache hit rate and reducing latency overhead caused by speed differences between disk I / O operations and the CPU. This invention can significantly improve system stability, enhance system performance, and reduce perceived user interaction stuttering and access latency. Attached Figure Description

[0023] To more clearly illustrate the design schemes in the embodiments of the present invention or existing methods, the accompanying drawings used in the description of the embodiments or existing methods will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0024] Figure 1 This is a diagram of the mobile terminal data interaction structure for the dynamic memory fusion and prefetching method of the present invention.

[0025] Figure 2 The flowchart shows the program that requests data from main RAM.

[0026] Figure 3 The flowchart shows the program that requests data in the Swap area of ​​RAM.

[0027] Figure 4 The flowchart shows the program that requests data in the Swap area of ​​ROM.

[0028] Figure 5 This is a flowchart of the fusion prefetching method, which is the core of this invention. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the specific embodiments of the present invention will be described in further detail and completely below with reference to the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. The following embodiments or drawings are used to illustrate the present invention, but are not intended to limit the scope of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0030] It should be noted that the "ROM" mentioned in this article refers to EEPROM, which is the mainstream flash memory solution currently available.

[0031] Please see Figure 1 , Figure 1 This is a basic hardware architecture and data flow diagram of the dynamic memory fusion and prefetching method of the present invention. The present invention is applied to... Figure 1 The mobile terminal hardware architecture shown includes a CPU, RAM, and ROM. This invention divides the RAM into main memory and a swap compression area, and allocates a certain space in the ROM as swap space.

[0032] Figure 1 In the diagram, when the CPU issues a data request instruction, it will address and sequentially schedule resource requests from RAM and ROM. The arrows in the diagram represent the detailed data flow execution strategies. These strategies will be explained in detail in terms of storage and retrieval.

[0033] The storage data flow of the present invention is as follows: When the CPU performs resource scheduling, it first loads the data into the RAM main memory area. As resource requests increase, when the RAM main memory of the mobile terminal device reaches the storage threshold, the CPU uses the least recently used criterion to determine the order of page reclamation.

[0034] According to the page reclamation strategy, the resources to be reclaimed are compressed and dumped to the RAM Swap compression area according to the compression ratio. When the RAM Swap reaches the storage threshold, the reclamation order is determined according to the Least Recently Used criterion.

[0035] According to the page reclamation policy, the resources that need to be reclaimed are dumped to the ROM's Swap.

[0036] The dynamic memory fusion and prefetching method of this invention schedules the resource read data stream as follows: (Refined) Figure 2 , Figure 3 , Figure 4 , Figure 5 The program flowchart will be used for detailed explanation.

[0037] Please see Figure 2 This embodiment includes the following steps:

[0038] 20. The CPU issues a data loading request.

[0039] 21. Look up the process page table and find the actual physical address based on the linear address of the requested data.

[0040] 22, 23. Access RAM main memory based on physical address, determine if the target data is stored in RAM main memory, and if no page fault occurs.

[0041] 24. Return the requested target data to the CPU.

[0042] 25. Data request cache hit successful, update and maintain LRU table.

[0043] Figure 3 30. If the data requested by the CPU is not in main RAM, see [reference needed]. Figure 3 Perform the following steps:

[0044] 31. Determine whether the target data is in the RAM's Swap compression area.

[0045] If proposition 31 is true, then proceed to step 32.

[0046] Specifically, if Formula 1 holds true: X - Y ≥ Q, where X is the current remaining space in RAM main memory, Y is the size of the requested target data, and Q is the remaining RAM storage threshold, then the target data is directly decompressed from the RAM's Swap compression area to RAM main memory. Conversely, if Formula 1 does not hold true, reclaimed pages are filtered according to the Least Recently Used (LRU) criterion, and these reclaimed pages are compressed into the RAM's Swap area. Formula 1 is then checked again, and this process is repeated until Formula 1 holds true. In this case, the target data in the RAM's Swap area is decompressed into RAM main memory. If the RAM's Swap area reaches the storage threshold during the loop, the data in the RAM's Swap area must be transferred to the ROM's Swap area according to the LRU criterion before the loop is executed.

[0047] Figure 4 40. If the data requested by the CPU is neither in main RAM nor in the RAM Swap area, see [reference needed]. Figure 4 Perform the following steps:

[0048] 41. Determine whether the target data is in the Swap area of ​​the ROM.

[0049] If proposition 41 is true, then statements 42, 43, and 44 are executed.

[0050] Specifically, RAM main memory pages M are selected for reclamation based on the Least Recently Used (LRU) criterion. M must satisfy Formula 2: M + X - Y > Q, where X is the current remaining space in RAM main memory, Y is the size of the requested target data, and Q is the RAM storage remaining threshold. RAM Swap pages N are selected for reclamation based on the LRU criterion. N must satisfy Formula 3: N + L - M × K > P, where L is the free capacity of RAM Swap, P is the RAM Swap area storage remaining threshold, and K is the compression ratio. N is sequentially transferred from the RAM Swap area to the ROM Swap, M is compressed from RAM main memory to RAM Swap, and the target data is transferred from the ROM Swap to RAM main memory.

[0051] It should be noted that the storage process for all data in this invention employs a real-time dynamic optimization mechanism. That is, when a user actively reclaims or kills a process, and the storage space occupied by that process becomes idle, data from lower-priority storage spaces will be transferred there. The storage space priority is: RAM main memory > RAM swap > ROM swap.

[0052] Specifically, in scenario 1, when the main memory process in RAM is killed, creating free storage space, if there is temporary data in RAM's Swap area, it will be automatically transferred to RAM's main memory according to the MRU policy. At this point, RAM's Swap area becomes free. If there is temporary data in ROM's Swap area, it will be transferred to RAM's Swap area according to the MRU policy. In scenario 2, when the data in RAM's Swap process is killed, causing RAM's Swap area to become free, if there is temporary data in ROM's Swap area, it will be transferred to RAM's Swap area according to the MRU policy. In scenario 3, when the process in ROM's Swap area is killed, other data will not be moved temporarily.

[0053] It should be noted that the present invention implements a real-time memory release mechanism for all storage processes, minimizing the unfriendly user experience caused by APP disinfection.

[0054] Specifically, in scenario 1, when a user actively terminates a process, the free memory after termination is migrated between modules according to the aforementioned real-time memory fusion mechanism. In scenario 2, when a user does not actively terminate a process, if the storage of the entire memory system—namely, RAM main memory, RAM Swap, and ROM Swap—reaches the storage threshold, and the system requires free storage space, processes in the ROM Swap area are terminated according to the LRU policy until a free storage area that satisfies the system's request is generated.

[0055] Figure 5 This is the core fusion prefetching process of the present invention.

[0056] 100. Generate a prefetch table by making the physical addresses continuous through time streams.

[0057] Specifically, the physical addresses of the data from apps running on mobile terminals are irregular, but user habits are related. The time stream is continuous, so a time stream is used to structure the prefetch addresses of the data. The prefetch table is a mapping from physical addresses to prefetch addresses. Based on the time stream—that is, the time when each physical address first appears—the prefetch physical addresses are sorted to generate consecutive prefetch addresses. The prefetch address interval is 1, increasing with the time stream.

[0058] The specific prefetch table maintenance algorithm is shown in Example 1: If the time stream is A, S, D, F, G, H, A, S, G, F, D, H, L, then the following prefetch table is generated: A corresponds to 60, S corresponds to 61, D corresponds to 62, F corresponds to 63, G corresponds to 64, H corresponds to 65, and L corresponds to 66.

[0059] .

[0060] 200. When the CPU requests data in the ROM Swap, after obtaining the target data, it increments the structure address of the target data by 1 according to the prefetch table to obtain the structure address of the prefetched data, and maps the structure address to the physical address; 400. It determines whether the physical address is in the ROM Swap; 500. If it is, it prefetches the prefetched data to the RAM Swap area; if it is not, it does not prefetch.

[0061] By prefetching, the idle performance of the mobile terminal is utilized; after prefetching, the cache hit rate is greatly improved, and the powerful computing power of the CPU is used to replace disk I / O operations with compression, reducing the latency overhead caused by the speed difference between disk I / O operations and the CPU.

[0062] It should be noted that the resource scheduling method for prefetching data is the same as that for target data.

[0063] In summary, the dynamic memory fusion and prefetching method significantly improves the memory availability of mobile terminals and enhances the survivability of background apps; the unique dynamic prefetching method also significantly reduces user latency and stuttering, allowing the performance of mobile terminals to be maximized.

[0064] Those skilled in the art will understand that the entire process or some steps described in this invention can be implemented through a program instruction set and related hardware. The program instruction set is stored in a storage medium readable by the mobile terminal, and when executed, it performs the various steps described in this invention.

[0065] Those skilled in the art will understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A dynamic memory fusion and prefetching method, applied to a memory system including a RAM main memory area, a RAM swap compression area, and a ROM swap area, characterized in that, Includes the following steps: Receive the target data read request sent by the CPU; If the target data is located in the RAM main memory area, the target data is directly returned to the CPU; If the target data is located in the RAM Swap compressed area, then determine whether XY≥Q is true, where X is the current remaining space in the RAM main memory area, Y is the size of the target data, and Q is the remaining threshold in the RAM main memory area. If XY≥Q is true, then the target data is decompressed from the RAM Swap compressed area to the RAM main memory area. If XY≥Q is not true, then according to the Least Recently Used (LRU) strategy, recycled pages are selected from the RAM main memory area and compressed to the RAM Swap compressed area until XY≥Q is true, and then the target data is decompressed from the RAM Swap compressed area to the RAM main memory area. During the process until XY≥Q is true, if the RAM Swap compressed area reaches the storage threshold, then according to the Least Recently Used (LRU) strategy, the data in the RAM Swap compressed area is first transferred to the ROM Swap area, and then the operation of selecting recycled pages and compressing is continued. If the target data is located in the ROM's Swap region, then the reclaimed page M in the RAM main memory region and the reclaimed page N in the RAM's Swap compressed region are selected according to the Least Recently Used strategy, such that M+XY>Q and N+LM*K>P, where L is the free capacity of the RAM's Swap compressed region, P is the remaining threshold of the RAM's Swap compressed region, and K is the compression ratio; then, the reclaimed page N is transferred from the RAM's Swap compressed region to the ROM's Swap region, the reclaimed page M is compressed from the RAM main memory region to the RAM's Swap compressed region, and the target data is transferred from the ROM's Swap region to the RAM main memory region; After the target data is transferred from the Swap region of ROM to the main memory region of RAM, the prefetch data is determined according to the prefetch table, which is a mapping table from physical address to structure address. The structure address corresponding to the target data is incremented by 1 to obtain the structure address corresponding to the prefetch data, and the physical address corresponding to the prefetch data is obtained by mapping the structure address corresponding to the prefetch data. When the physical address corresponding to the prefetch data is located in the Swap region of ROM, the prefetch data is prefetched to the Swap compression region of RAM.

2. The method according to claim 1, characterized in that, The prefetch table is generated according to the time stream; the time stream is the time sequence of the first occurrence of each physical address; each physical address is sorted according to the time stream and assigned consecutive structure addresses, with an interval of 1 between adjacent structure addresses, and the structure address increases with the time stream.