Adaptive read threshold voltage tracking with separate characterization on each side of the voltage distribution with respect to the distribution mean

Abstract

The present invention provides methods and apparatus for adaptive read threshold voltage tracking with separate characterizations on each side of a voltage distribution about a distribution mean. The read threshold voltage of a memory is adjusted by determining statistical characteristics of two adjacent memory ranks based at least in part on a type of statistical distribution of the memory ranks and a distribution of data values ​​read from cells using a plurality of read threshold voltages, wherein the statistical characteristics of the two adjacent memory ranks are independently characterized on both sides about at least one mean of the statistical distribution; calculating adjusted read threshold voltages associated with the two adjacent memory ranks using the statistical characteristics of the two adjacent memory ranks; and updating the read threshold voltage based on the adjusted read threshold voltage. The adjustment is optionally performed in response to one or more read errors.

Description

[0001] Divisional Application Information

[0002] This application is a divisional application of the invention patent application with application date of October 31, 2016, application number of "201610967648.5", and invention name of "Adaptive read threshold voltage tracking with separate characterization of distribution mean on each side of the voltage distribution".

[0003] The technical field relates generally to solid-state storage media, and more particularly to read threshold voltages for such solid-state storage media. Background Art

[0004] Solid-state storage devices use analog memory cells to store data. Each memory cell stores a storage value, such as an electrical voltage. The storage value represents the information stored in the memory cell. Many solid-state storage devices distinguish different binary values ​​that can be stored in the memory cell based on the read voltage level of the memory cell. The range of possible storage values ​​of each memory cell is usually divided into threshold regions, where each region is separated by a read threshold voltage and corresponds to one or more data bit values. Ideally, all memory cells in a given solid-state storage device have the same read threshold voltage for the stored logical bit value. However, in practice, in a probability distribution along the read threshold voltage axis similar to a Gaussian distribution (e.g., a "read threshold voltage distribution"), the read threshold voltage varies across cells.

[0005] In addition, solid-state storage devices can shift over time. For example, memory cell leakage, memory cell damage, and other disturbances to the memory cell can change the read voltage level of the memory cell. Therefore, the read threshold voltage can shift over time. The ratio of leakage and other disturbances can also increase with aging as the memory cell is used over time. If the read voltage level of the memory cell shifts beyond the read threshold voltage, a data error occurs because the value of the data read from the memory cell is different from the value of the data written to the memory cell.

[0006] A variety of techniques have been proposed or recommended for adapting to changes in read threshold voltage to maintain a desired performance level. Existing adaptive tracking algorithms are designed to track changes in solid-state storage channels and thus help maintain a set of updated channel parameters. The updated channel parameters are used, for example, to adjust the read threshold voltage.

[0007] U.S. Published Patent Application No. 2013 / 0343131, filed on June 26, 2012, entitled “Optimization of Read Thresholds for Non-Volatile Memory,” discloses techniques for adapting read threshold voltages, which is incorporated herein by reference. Although such existing adaptive tracking algorithms have helped improve the performance of solid-state storage devices, they are subject to one or more limitations that, if overcome, can further improve the reliability and performance of solid-state storage devices. For example, the techniques described in U.S. Published Patent Application No. 2013 / 0343131 assume that the gap between the default read threshold voltages of the solid-state storage device is known. Typically, the gap is a constant value that ensures a common conversion between various collected statistics. Although some solid-state storage vendors provide information about the gap, other vendors do not provide such information.

[0008] Therefore, there is a need for an improved technique for adapting read threshold voltages that estimates the gap between default read threshold voltages of solid-state storage devices and thereby improves decoding performance. There is a further need for a technique that separately characterizes each side of a given distribution with respect to the mean of the distribution, thereby calculating the read threshold voltage with improved stability. Summary of the invention

[0009] Illustrative embodiments of the present invention provide for adaptive read threshold voltage tracking with separate characterization on each side of a voltage distribution with respect to a distribution mean. In one embodiment, an exemplary method for adjusting a read threshold voltage of a memory includes: determining statistical characteristics of two adjacent memory ranks based at least in part on a type of statistical distribution of the memory ranks and a distribution of data values ​​read from cells using a plurality of read threshold voltages, wherein the statistical characteristics of the two adjacent memory ranks are independently characterized on both sides with respect to at least one mean of the statistical distribution; calculating adjusted read threshold voltages associated with the two adjacent memory ranks by using the statistical characteristics of the two adjacent memory ranks; and updating the read threshold voltage based on the adjusted read threshold voltage. The adjustment is optionally performed in response to one or more read errors.

[0010] In one or more exemplary embodiments, a statistical distribution of a memory rank is characterized on a first side by a first mean and a first standard deviation value and on a second side by a second mean and a second standard deviation value, wherein the first mean and the first standard deviation value are obtained from statistics on the first side, and wherein the second mean and the second standard deviation value are obtained from statistics on the second side.

[0011] In one or more exemplary embodiments, a statistical distribution of one memory rank is characterized about a single mean by the single mean and a first standard deviation value on a first side and by the single mean and a second standard deviation value on a second side. The method optionally further includes estimating a gap between two adjacent default read threshold voltages, and wherein the statistical characteristic of the two adjacent memory ranks is further based on the gap.

[0012] Depending on the characteristics of the flash memory device, the disclosed exemplary techniques for adapting the read threshold voltage with a gap estimate between default read threshold voltages and / or with a separate characterization on each side of the voltage distribution about the distribution mean can overcome one or more of the problems associated with the previously described conventional techniques. These and other features and advantages of the present invention will be more readily apparent from the accompanying drawings and the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 An exemplary solid-state storage memory system incorporating an exemplary controller-based read threshold voltage adjustment technique in accordance with at least one exemplary embodiment of the present invention is described;

[0014] Figure 2 Three exemplary read threshold voltages of an exemplary MLC solid-state storage device are illustrated;

[0015] Figures 3 to 6 is a flow chart illustrating an exemplary implementation of a read threshold voltage adjustment process according to an embodiment of the present invention; and

[0016] Figure 7 An exemplary processing platform that may be used to implement at least a portion of one or more embodiments of the present invention is described. DETAILED DESCRIPTION

[0017] Illustrative embodiments of the present invention will be described herein with reference to exemplary solid-state storage devices and associated controllers, read channels, and other processing devices. However, it should be understood that the present invention is not limited to the specific illustrative system and device configurations shown. Therefore, the term "solid-state storage device" as used herein is intended to be understood broadly so as to encompass, for example, flash memory devices.

[0018] As described above, the read threshold voltage varies across cells in a probability distribution along the read threshold voltage axis that resembles a Gaussian distribution (eg, a "read threshold voltage distribution"). Gaussian-like distributions can be characterized in a well-known manner by mean and standard deviation values ​​(ie, variance).

[0019] As will be described, in one or more illustrative embodiments, the present invention provides methods and apparatus for separately characterizing each side of a given distribution with respect to its mean, thereby calculating a read threshold voltage with improved stability. Separate characterization is necessary due to the fact that the voltage distribution after endurance and / or retention effects are asymmetric (i.e., each side of the distribution is different from each other).

[0020] According to an exemplary aspect of the invention, the memory ranks are characterized independently on two sides (often referred to as "tail regions") with respect to the means of the statistical distributions of the memory ranks. In an exemplary embodiment, two standard deviations and at least one mean are used to characterize each statistical distribution. This feature will improve performance because the distributions observed from the collected solid-state storage data show asymmetry with respect to their means. Among other advantages, characterizing the memory ranks independently on two sides with respect to the means provides a more accurate estimate of the intersection point where the distributions of two adjacent memory ranks intersect.

[0021] In this way, an improved log-likelihood ratio (LLR) distribution can be calculated for an exemplary soft low-density parity check (LDPC) decoder. As previously described, the LLR distribution can remain true for asymmetries in the underlying distribution. In addition, by characterizing the memory ranks independently on both sides with respect to the mean, the read threshold voltage can be calculated with improved stability.

[0022] According to another aspect of the present invention, in one or more illustrative embodiments, the gap between the default read threshold voltages is estimated. Therefore, an exemplary method and apparatus for adapting the read threshold voltage is provided by estimating the gap between two adjacent default read threshold voltages of a solid-state storage device. In some flash memory families, the gap between the default read threshold voltages cannot be directly calculated due to the lack of access to the actual voltage. The available readout value is usually an offset value normalized within the read window.

[0023] At least one exemplary embodiment provides flexibility in controlling the quality of the gap estimate. A high quality estimate will result in a reduced rate of successful estimates. Among other potential advantages, the gaps between default read threshold voltages estimated according to aspects of the invention allow for calculation of improved read threshold voltages and LLR distributions.

[0024] Figure 1 An exemplary solid-state storage memory system 100 incorporating an exemplary controller-based read threshold voltage adjustment technique according to at least one exemplary embodiment of the present invention is described. Figure 1 As shown in FIG, an exemplary solid state storage memory system 100 includes a solid state storage control system 110 and a solid state storage memory block 160 connected by an interface. The exemplary solid state storage control system 110 includes a solid state storage controller 120 and a read channel 125, typically on one or more integrated circuits.

[0025] It should be noted that the term "read channel" may also encompass a write channel. An exemplary read channel 125 includes a signal processing unit 130, an encoder / decoder block 140, and one or more buffers 145. In an alternative embodiment, the encoder / decoder block 140 and some buffers 145 may be implemented inside the solid-state storage controller 120. The encoder / decoder block 140 and the buffers 145 may be implemented using, for example, well-known commercially available techniques and / or products.

[0026] The exemplary signal processing unit 130 includes one or more processors for implementing the following (for example) in conjunction with Figure 3 and 4 and one or more read threshold voltage adjustment processes 135 as further discussed in the section entitled “Estimating Read Thresholds, Gap Values ​​(when needed), Mean and Standard Deviation”. The exemplary solid-state storage memory block 160 includes a memory array 170 and one or more buffers 110, which may each be implemented using well-known commercially available techniques and / or products.

[0027] Initial measures

[0028] Single-level cell (SLC) solid-state storage devices, for example, store one bit (or two possible memory states) per memory cell. On the other hand, multi-level cell (MLC) solid-state storage devices store two or more bits per memory cell (i.e., each cell has four or more programmable states). For a more detailed discussion of MLC solid-state storage devices, see, for example, U.S. Patent Application No. 12 / 920,407, filed on August 31, 2011, entitled “Methods and Apparatus for Storing Data in a Multi-Level Cell Flash Memory Device with Cross-Page Sectors, Multi-Page Coding and Per-Page Coding,” now U.S. Patent No. 8,724,381, which is incorporated herein by reference.

[0029] It is assumed that the pages of user data are sufficiently scrambled to have approximately equal numbers of binary ones and binary zeros. In applications where this condition cannot be guaranteed, a fixed (and empirically known) number of binary ones and zeros may be used, as will be apparent to one of ordinary skill in the art.

[0030] The inequality of a bit sequence is typically defined as the ratio of the number of binary ones to the length of the sequence. The number of binary ones in a bit sequence is typically referred to as the weight of the sequence. In attempting to describe the inequality metric in the context of soft read retries, consider SLC. As will be apparent to one of ordinary skill in the art, SLC is employed for convenience and the process is easily extended to MLC.

[0031] SLC stores a single bit x={0,1} in the form of charge, and the cell voltage (referred to as y) can be inferred through multiple read operations (usually referred to as soft read operations). In an exemplary model of an exemplary solid-state storage device channel, y, conditioned on x=1(0), is typically assigned a mean μ1(μ2) and a standard deviation σ1(σ2). It should be noted that for the soft voltage y, the soft read operation does not provide the actual voltage, but rather a voltage range with a maximum voltage and a minimum voltage. By REF For a single read operation (e.g., a hard read operation) under , the following two regions (or voltage ranges) are created:

[0032] y∈(-∞,V REF ),or

[0033] y∈(V REF ,∞).

[0034] By two read operations at voltages V1 and V2, three regions are created as follows:

[0035] y∈(-∞,V1], or

[0036] y∈(V1,V2], or

[0037] y∈(V2,∞).

[0038] Generally speaking, the number of regions is a number greater than the total number of read operations.

[0039] Figure 2 Three exemplary read threshold voltages for an exemplary MLC solid-state storage device are illustrated. The exemplary read threshold voltage axis is plotted with increasing positive voltages to the right. An absolute scale is not shown, and no reference point is determined, so the diagram applies more generally to non-volatile memories of larger populations.

[0040] exist Figure 2In the exemplary embodiment shown in FIG. 1 , for an exemplary Gray code mapping, three default (ie, nominal) read threshold voltages R01, R00, and R10 (also shown as V a 、V b and V c ) creates four corresponding regions (or states). Generally speaking, fast pages are read using read threshold voltages R01 and R10, and slow pages are read using read threshold voltage R00.

[0041] For the exemplary MLC media, Figure 2 The leftmost state 11 in (to the left of the read threshold voltage R01) is the erased state, and the exemplary NAND cell in the erased state typically carries a negative voltage. Figure 2 The three other states 01, 00, 10 to the right of the leftmost state in FIG. may span a voltage range from 0 V to (roughly) 5 V, respectively. The voltage range may vary significantly from manufacturer to manufacturer. Therefore, as will be apparent to one of ordinary skill in the art, the above ranges are for illustrative purposes only.

[0042] like Figure 2 As shown in , a default read threshold voltage default value R01 is used to distinguish state 11 from state 01. Typically, the default value R01 is referenced as offset 001 (or just offset 1 when the context is clear), and manufacturers allow a limited scan range for the default value R01. Figure 2 In the exemplary embodiment shown in , R01 can be assigned one of 101 possible offset values, with 50 offset values ​​to the left and right of R01 being the default value.

[0043] Default Read Threshold Voltage Default value R00 is the default read threshold voltage for state 01 and state 00. Typically, default value R00 is referenced as offset 000 (or just offset 0 when the context is clear), and manufacturers allow a limited scan range for default value R00. Figure 2 In the exemplary embodiment shown in , R00 can be assigned one of 101 possible offset values, with 50 offset values ​​to the left and right of R00 as a default value, similar to R01.

[0044] Default Read Threshold Voltage Default value R10 is the default read threshold voltage for state 00 and state 10. Typically, the default value R10 is referenced as offset 010 (or just offset 2 if the context is clear), and manufacturers allow a limited sweep range for the default value R10. Figure 2 In the exemplary embodiment shown in , R10 may be assigned one of 101 possible offset values, with a default value of 50 offset values ​​to the left and right of R10, similar to R01 and R00.

[0045] It should be noted that reference to an offset should not be construed as limiting the invention in its applicability to NAND solid state storage types that choose to use actual voltage values ​​instead. As will be apparent to one of ordinary skill in the art, the invention is not limited to voltage scan step units. It should be noted that Figure 2 The numbers and related discussions (eg, offsets 50 and 101) appearing in FIG. 1 are for illustrative purposes only and should not be construed as limitations of the present invention.

[0046] Figure 2 Also illustrated are distributions 210-11, 210-01, 210-00, and 210-10 associated with each state 11, 01, 00, 10, respectively. In general, each distribution 210 may be typically characterized by a mean (σ) and a standard deviation (μ). Figure 2 210 ). It should be noted that the mean and standard deviation values ​​corresponding to x=1 and x=0 depend on the quality of the channel and vary with channel disturbances (e.g., program / erase cycles (PEC)), data retention, and read disturbance. In terms of minimizing bit error rate, generally the best hard reads are placed at the intersection of two adjacent distributions 210, which are generally defined by their respective mean and standard deviation values. As discussed above, aspects of the present invention provide improved techniques for characterizing the distributions 210.

[0047] Figure 2 A first gap G1 defined as the distance between a default value R01 and a default value R00 (e.g., measured in volts or offset steps) is also illustrated. Similarly, a second gap G2 is defined as the distance between a default value R00 and a default value R10 (e.g., measured in volts or offset steps). As noted above, the adaptive tracking techniques described in U.S. Published Patent Application No. 2013 / 0343131, incorporated herein by reference, employ knowledge of such gaps G1 and G2. One or more exemplary aspects of the present disclosure provide an adaptive tracking algorithm that includes a gap estimation portion.

[0048] The exemplary adaptive tracking algorithm disclosed in U.S. Published Patent Application No. 2013 / 0343131 uses inequality values ​​observed from multiple reads (e.g., the fraction of ones output from a page read) to estimate the mean and standard deviation values ​​of the underlying cell voltage distribution 210. The disclosed adaptive tracking algorithm assumes that the underlying cell voltage distribution 210 is a Gaussian distribution and adaptively tracks the mean and standard deviation values ​​of the distribution 210. In addition, the disclosed adaptive tracking algorithm can calculate substantially optimal read threshold voltages R01, R00, and R10.

[0049] As discussed further below, if G1 and G2 are unknown, the adaptive tracking algorithm disclosed herein can estimate them, and one or more exemplary embodiments employ two separate operations of the tracking algorithm:

[0050] 1. The first operation aims to estimate the gaps G1 and G2. Generally, the gaps G1 and G2 are constant in all operating conditions of the solid-state storage device. Therefore, the first operation will track a sufficient number of pages (slow pages and fast pages) to obtain the estimated values ​​of the gaps G1 and G2.

[0051] 2. The second operation aims to estimate the mean, standard deviation and substantially optimal read threshold voltage. The gaps G1 and G2 estimated in the first operation are used as inputs in the second operation.

[0052] In one or more exemplary embodiments, the adaptive tracking algorithm disclosed herein is an offline mechanism designed to be executed, for example, periodically or upon request.

[0053] Estimate reading thresholds, intervals (if needed), mean and standard deviation

[0054] For one of states 11, 01, 00, 10 in a solid-state storage device such as an SLC, MLC, TLC (triple-level cell) or QLC (quadruple-level cell) device, the standard Q function can be expressed as follows:

[0055]

[0056] The mean (μ) and standard deviation (σ) are the parameters of the Gaussian distribution, and x is the variable. In addition, Θ i is the i-th reading position, and there are t readings in total (for example, in conjunction with the following Figure 3 For example, if the read operation is currently at an offset of -5, then equation (1) indicates the area to the left of the vertical line associated with the offset of -5. i is a quantity measured from a solid-state storage device using a read operation and is related to the number of ones in a page (commonly referred to as the observed inequality of the solid-state storage device). In general, θ i and p i is known, and μ and σ are the values ​​to be obtained.

[0057] By using a standard Q function or a look-up table (LUT) with index p i ), equation (1) can be converted into the following expression (often called the inverse Q function):

[0058]

[0059] where a is obtained from a Q table lookup which can be efficiently implemented by a binary tree search i .

[0060] Using t observations, a cost function can be used to estimate the desired mean and standard deviation by minimizing the cost function. In an exemplary implementation, the cost function can be expressed as follows, where w(s) is a known weight that may or may not depend on a(s).

[0061]

[0062] where w i is a known weight factor.

[0063] In general, at least two points (ie, observations) are needed to estimate the mean and standard deviation of a given distribution. If there are more than two observations, the multiple observations are optionally combined to obtain a single estimate of the mean and standard deviation.

[0064] Due to the limited range of the scan range, Θ i It can be located at the right tail area or the left tail area of ​​the given distribution 210. For example, for layer 1 of MLC, using V a Scanning the left tail of the distribution shows that the V b Scanning shows the right tail of the distribution. Assuming t l and t r Scans (observation results) correspond to Va and V b scan, (i.e., the number of left (1) readings and the number of right (r) readings), so t = t l +t r In addition, suppose G is Va With V b In this way, in at least one embodiment, the interval G ensures that the left tail region and the right tail region of the distribution are of the same proportion and can be combined. Figure 2 The offset 0 associated with the default read threshold voltage R00 in can be considered as the interval G1 plus step 0. In this case, the cost function of equation (3) can be separated for the readings of the left (1) tail region and the right (r) tail region as follows:

[0065]

[0066]

[0067] Where l is the number of readings in the left tail region, and r is the number of readings in the right tail region. a Offset Variation vs. V bThe mechanism associated with the offset change is included in equations (4) and (5) (e.g. Figure 2 ).

[0068] Typically, for an MLC device or a TLC device, the distribution corresponding to a particular memory layer is sensed from two directions. In other words, the right tail region is observed by scanning one read threshold voltage, and the left tail region is observed by scanning the other read threshold voltage. The statistics obtained by scanning the two tail regions can be processed in three ways, each of which is further discussed below:

[0069] Case I: Characterizing the right and left tail regions separately according to one aspect of the present invention without requiring the same mean. In this case, no interval value is required.

[0070] Case II: Combine the left and right tail statistics, and use known interval values ​​to estimate the mean and standard deviation of the distribution.

[0071] Case III: Characterizing the right and left tail regions separately according to one aspect of the invention, but with the same mean. The interval value may be known in advance. However, if the interval value is not known, it must first be estimated.

[0072] Case I: No interval value required

[0073] As noted above, according to one aspect of the present invention, the right tail region and the left tail region can be characterized separately without the restriction of having the same mean. In this case, the right tail region and the left tail region of the distribution are characterized independently of each other, and no interval value is required. The first mean and standard deviation pair corresponds to the left tail region, and the second mean and standard deviation pair corresponds to the right tail region. The cost function is established using equations (4) and (5): The example of equation (4) of the cost function has t l The readings (corresponding to the left tail region), and the example of the cost function of equation (5) has t r Reading (corresponding to the right tail area). The interval G in equation (5) can be set to zero.

[0074] Case II: Using the gap value when the gap value is known

[0075] As described above, the right tail statistics and the left tail statistics can be combined and the known gap values ​​used to estimate the mean and standard deviation of the distribution.

[0076] In one exemplary embodiment, the following set of equations is used to establish the cost function for minimization:

[0077]

[0078]

[0079]

[0080] Equations (6) and (7) are the cost functions for the left and right tail regions, respectively, using the gap value G, and equation (8) is used to estimate a single mean and standard deviation value pair.

[0081] Case IIIa: Characterizing the left and right tail regions separately when the gap value is known

[0082] In at least one exemplary embodiment, the left tail region is parameterized using a standard deviation that is different from the standard deviation value of the right tail region. However, the two tail regions are connected together with a single average parameter (i.e., two standard deviation values ​​are obtained for the left tail region and the right tail region, σ and σ, respectively). l and σ r , and a mean (μ, indicating the same center):

[0083]

[0084]

[0085]

[0086] Equations (9) and (10) are the cost functions for the left tail region and the right tail region, respectively, and equation (11) is used to estimate two standard deviation values ​​and one mean value.

[0087] Case IIIb: Characterizing the tail region alone when the gap value requires estimation

[0088] As mentioned above, in some cases, one or more gap values ​​are needed, but the gap values ​​may be unknown. The gap G can first be estimated using an equation based only on statistics from the left tail region (for example), thereby estimating the mean and standard deviation, as follows:

[0089]

[0090]

[0091] Equation (12) evaluates the statistics of the left tail region, and equation (13) is used to estimate the mean and standard deviation of the left tail region.

[0092] Thereafter, equations are built based only on statistics from the right tail region (for example) to estimate the mean and standard deviation values, as follows:

[0093]

[0094]

[0095] Equation (14) evaluates the statistics of the right tail region, and equation (15) is used to estimate the mean and standard deviation of the right tail region.

[0096] Since the same distribution is measured from the left and from the right (for example), the mean estimated from the left tail statistics should be equal to the mean estimated from the right tail statistics. Therefore, the gap G can be expressed as the difference between the left and right mean values, as follows:

[0097] G=μ L -μ R (16)

[0098] Figure 3 is a flow chart illustrating an exemplary implementation of a read threshold voltage adjustment process 300 according to one embodiment of the present invention. The exemplary read threshold voltage adjustment process 300 employs six exemplary regions 311 to 316:

[0099] 1. By default, the area 311 to the left of R01 corresponds to the right tail of the distribution of state 11.

[0100] 2. The region 312 to the right of the default R01 corresponds to the left tail of the distribution for state 01. Mean and standard deviation estimates from the left tail statistics are denoted using superscript L and subscript 1, where L denotes the left tail.

[0101] 3. The area 313 to the left of the default R00 corresponds to the right tail of the distribution for state 01. Mean and standard deviation estimates from the right tail statistics are denoted by superscript R and subscript 1, with R denoting the right tail.

[0102] 4. The region 314 to the right of the default R00 corresponds to the left tail of the distribution for state 00. The mean and standard deviation estimates of the statistics from the left tail are denoted using the superscript L and subscript 2.

[0103] 5. The region 315 to the left of default R10 corresponds to the right tail of the distribution for state 00. The mean and standard deviation estimates of the statistics from the right tail are denoted using the superscript R and subscript 2.

[0104] 6. The area 316 to the right of default R10 corresponds to the right tail of the distribution of state 10.

[0105] The exemplary read threshold voltage adjustment method 300 first collects disparity statistics by reading pages (slow pages and fast pages) at various offset locations. For example, in one exemplary embodiment, for slow pages, the disparity statistics are collected as follows:

[0106] Select a page and read its slow page at the selected offset value (ie, R00 = valid offset). Record the number of pages read or the number of inequalities. Figure 2 The example operation discussed reads the slow page at all 101 read threshold voltages / offsets and records the 101 corresponding disparity numbers.

[0107] Thereafter, the exemplary read threshold voltage adjustment process 300 collects disparity statistics by reading the fast page in a manner similar to the slow page.

[0108] like Figure 3 As shown in FIG. 3 , the exemplary read threshold voltage adjustment process 300 estimates the mean and standard deviation values ​​of the tail region of each region 311 to 316 using the inequality statistics collected for the corresponding region during step 320. For example, the statistics collected from region 312 are used to estimate (μ L 1, σ L 1), as described in published U.S. Patent Application No. 2013 / 0343131. Similarly, statistics collected from region 313 are used to estimate (μ R 1, σ R 1).

[0109] like Figure 3 As shown in FIG. 3 , the exemplary read threshold voltage adjustment process 300 estimates a default gap during step 330 . Figure 3 The following three flow possibilities in step 330 are shown:

[0110] Flow Possibility I: When the inequality statistics are valid (i.e., good enough), estimate (μ L 1(2) , σ L 1(2) ) and (μ R 1(2) , σ R 1(2) ). In this case, robust estimates of gaps G1 and G2 are obtained, as discussed further below in the section entitled "Gap Estimation".

[0111] Flow Possible II: However, due to lack of sufficient statistics, it may not be possible to estimate (μ L 1(2) , σ L 1(2) ) or (μ R 1(2) , σ R 1(2) )(exist Figure 3In this case, if some other condition is met, the gaps G1 and G2 can be estimated, as follows in conjunction with Figure 4 Further discussed.

[0112] Flow possibility III: If it is impossible to estimate (μ L 1(2) , σ L 1(2) ) and (μ R 1(2) , σ R 1(2) ), or both are invalid, then the gap G1 (or G2) cannot be estimated. If the gap G1 or G2 cannot be estimated, the exemplary read threshold voltage adjustment process 300 can be re-executed in a different set of pages.

[0113] Gap Estimation

[0114] For the flow possibility I, we obtain (μ L 1, σ L 1) and (μ R 1, σ R 1), and both are valid. In this case, the gap G1 is taken as the difference between the left and right average values ​​(μ L -μ R ), calculated using equation (16),

[0115] where μ is calculated L and μ R , as discussed above in the section entitled "Characterizing the Tail Region Separately When Gap Values ​​Require Estimation".

[0116] The gap G2 is calculated in a similar manner.

[0117] As mentioned above, for flow possibility II, due to the lack of sufficient statistics, it may not be possible to estimate (μ L 1(2) , σ L 1(2) ) or (μ R 1(2) , σ R 1(2) )(exist Figure 3 In this case, gaps G1 and G2 are estimated if some other condition is met.

[0118] Figure 4 FIG. 4 is a flow chart illustrating an exemplary implementation of a read threshold voltage adjustment process 400 employed by flow possibility II. The exemplary read threshold voltage adjustment process 400 is similar to Figure 3Six exemplary regions 411 to 416 are employed in the manner of regions 311 to 316 . Figure 4 The exemplary embodiment of the present invention assumes that the statistics (μ R 1(2) , σ R 1(2) ) is valid, while the statistics on the left (μ L 1(2) , σ L 1(2) ) is invalid.

[0119] The exemplary read threshold voltage adjustment process 400 estimates mean and standard deviation values ​​associated with regions 412 and 413 during step 420. During step 430, a test is performed to evaluate the validity of the statistics. If, for example, μ is determined during step 430 L 1 is invalid, and μ R 1 is valid, then the exemplary read threshold voltage adjustment process 400 processes one of the three possible flow branches in step 440 .

[0120] In step 440, the first two flow branches refer to "valid observations", which in at least one exemplary embodiment are defined as follows:

[0121] During several soft reads, Figure 3 Several inequality statistics observations are made in region 312 of . Due to noise in the system (e.g., noise from solid-state storage media and electronic devices), not all observations are reliable, and a pruning technique can be optionally used to select a subset of reliable observations from a batch. The pruned set of observations is called valid observations. Typically, the cardinality of the valid observation set is small and may be as small as 1 or 0.

[0122] During the first flow branch of step 440, if there is at least one valid observation value in the left tail region, then the one available valid observation value in the left tail region is used to estimate the gap G1. The standard deviation value is assigned as follows:

[0123]

[0124] In addition, the gap is estimated as follows:

[0125] Solving for x R .

[0126] G1=x L -x R

[0127] where x is the memory rank.

[0128] If more than one valid observation is available for the first flow branch, then the multiple resulting estimates of the gap G1 can be averaged. Thus, when the cardinality of the valid observation set is greater than 1, Figure 4 The exemplary read threshold voltage adjustment process 400 in employs an averaging technique. However, it is possible to devise other robust variations of this averaging technique (using well-known mathematical techniques).

[0129] If no valid observations exist on the left side, then an observation may be selected instead in the second flow branch of step 440. However, this approach may be more prone to errors than operating with valid observations. Therefore, during the second flow branch of step 440, according to a predefined condition, if (for example) a valid observation is not available on the left side, then an observation taken at the right edge of the left side is selected. Thereafter, the selected observation is used to estimate the gap G1. The standard deviation value is assigned as follows:

[0130]

[0131] During the third flow branch of step 440, if the first two flow branches are not possible, the standard deviation value is assigned as follows, and it is declared that the gap G1 cannot be estimated based on the data of the current page:

[0132] σ1=0.

[0133] Adjusted read threshold voltage

[0134] If the gaps G1 and G2 are previously known, or have been estimated using the techniques described herein, then the mean, standard deviation, and adjusted (e.g., optimal) read threshold voltages may also be estimated. Once the distribution 210 is characterized according to the techniques described herein, a given read threshold voltage R01, R00, R10 is obtained from the intersection point where the distributions of two adjacent levels 11, 01, 00, 10 cross.

[0135] Figure 5 is a flow chart illustrating an exemplary implementation of a read threshold voltage adjustment process 500 according to one embodiment of the present invention. The exemplary read threshold voltage adjustment process 500 uses a gap estimate to determine a read threshold voltage.

[0136] like Figure 5 As shown in Figure 1 The exemplary read threshold voltage adjustment process 500 begins when the exemplary solid-state storage control system 110 receives the trace call 502. The exemplary solid-state storage control system 110 may be implemented in, for example, firmware and hardware.

[0137] During step 505 a test is performed to determine whether the gaps G1 and G2 need to be estimated ( Figure 2 ). As described above, the gap can be obtained from the solid state storage memory 160 ( Figure 1 ) from the manufacturer of the product, or can be calculated as the difference between the average on the left and the average on the right, using equation (16).

[0138] If it is determined during step 505 that a gap estimate is needed, then during step 515, the gap estimation process 510 reads pages (slow pages and fast pages) from the solid-state storage memory 160 (e.g., SLC, MLC, or TLC memory) using multiple read threshold voltages (e.g., multiple offset locations).

[0139] During step 520, inequality statistics are calculated. As described above, for example, for slow pages, in one exemplary embodiment, inequality statistics are collected as follows. Select a page and read its slow page at the selected offset value (i.e., R00 = valid offset). Record the number of pages read or the inequality number. For the above combined Figure 2 The example operation discussed reads the slow page at all 101 read threshold voltages / offsets and records the 101 corresponding disparity numbers. Thereafter, disparity statistics are collected by reading the fast page in a manner similar to the slow page.

[0140] During step 525 , the gap value is estimated (eg, using equation (16)) and stored. Program control then proceeds to step 530 .

[0141] If it is determined during step 505 that gap estimation is not required, or gap has already been estimated using gap estimation process 510, then in step 530, a gap value is obtained. During step 540, a page is obtained from solid state storage memory 160 using multiple read threshold voltages (eg, multiple offset positions).

[0142] During step 550, inequality statistics are calculated in the manner described above for step 520. Then, during step 560, a read threshold voltage is estimated and, during step 570, the read threshold voltage is provided to Figure 1 As described above, once the distribution 210 ( Figure 2 ) is characterized, a given read threshold voltage R01, R00, R10 is obtained from the intersection point, at which the distributions of two adjacent levels 11, 01, 00, 10 intersect.

[0143] Figure 6is a flow chart illustrating an exemplary implementation of a read threshold voltage adjustment process 600 according to one embodiment of the present invention. The exemplary read threshold voltage adjustment process 600 determines the read threshold voltage without using a gap estimate.

[0144] like Figure 6 As shown in Figure 1 The exemplary solid-state storage control system 110 begins the exemplary read threshold voltage adjustment process 600 when receiving the trace call 602. The exemplary read threshold voltage adjustment process 600 first reads a page from the solid-state storage memory 160 (e.g., SLC, MLC, or TLC memory) using multiple read threshold voltages (e.g., multiple offset positions) during step 615.

[0145] During step 650, the Figure 5 In step 655, the estimated distribution 210 ( Figure 2 ) on the right and left sides of the R , σ R , μ L , σ L ), as above combined Figure 3 and 4 Then during step 660, a read threshold voltage is calculated and during step 670, the read threshold voltage is provided to Figure 1 As described above, once the distribution 210 ( Figure 2 ) is characterized, a given read threshold voltage R01, R00, R10 is obtained from the intersection point, at which the distributions of two adjacent levels 11, 01, 00, 10 intersect.

[0146] The gap between the default read threshold voltages is estimated

[0147] An exemplary method for adjusting a read threshold voltage of a memory includes: estimating a gap between two adjacent default read threshold voltages; determining statistical characteristics of the two adjacent memory ranks based at least in part on the type of statistical distribution of the memory ranks, reading a distribution of data values ​​from one or more cells using a plurality of read threshold voltage gaps; calculating an adjusted read threshold voltage associated with the two adjacent memory ranks by using the statistical characteristics of the two adjacent memory ranks; and updating the read threshold voltage with the adjusted read threshold voltage. The adjustment is optionally performed in response to one or more read errors.

[0148] In one or more exemplary embodiments, the gap is estimated based on one or more of: (i) a voltage difference between two adjacent default read threshold voltages and one or more of a number of offset steps; (ii) a difference between the mean values ​​of two adjacent memory ranks; and (iii) a difference between the mean values ​​of two adjacent memory ranks when the statistics of the distribution of data values ​​read from one or more cells are valid for both sides around at least one mean value of the statistical distribution.

[0149] In one or more exemplary embodiments, the gap is estimated when one or more of the following occurs: (i) for only one side of the statistical distribution, the mean is valid using one available valid observation for the other side of the statistical distribution; and (ii) for only one side of the statistical distribution, the mean is valid using the selected observation for the other side of the statistical distribution.

[0150] in conclusion

[0151] The above applications and associated embodiments should be considered illustrative only, and many other embodiments may be configured using the read threshold voltage adjustment techniques disclosed herein.

[0152] According to one or more embodiments, the methods and processes described herein may be implemented in a controller (eg, software, hardware, or any combination of the two).

[0153] For example, the methods and processes described herein may be stored in a memory as part of a firmware of a solid-state storage device and may be executed by a processor for performing the methods and processes described herein. The methods and processes described herein may alternatively or additionally be stored in a computer-readable medium accessible by a controller. In further embodiments, the methods and processes described herein may be implemented in a computing system external to the storage device and operably connected to the storage device, such as in a driver module of a host device connected to the storage device via, for example, an interface. The methods and processes described herein may further be stored in a memory or other computer-readable medium accessible by a computing system and may be executed by a processor of the computing system.

[0154] It should also be understood that the read threshold voltage adjustment techniques, as described herein, may be implemented at least in part in the form of one or more software programs stored in a memory and executed by a processor of a processing device (e.g., a computer). As previously mentioned, a memory or other storage device having such program code implemented therein is an example of what is more generally referred to herein as a "computer program product."

[0155] The disclosed read threshold voltage adjustment techniques may be implemented using one or more processing platforms. Thus, one or more of the processing modules or other components may each run on a computer, storage device, or other processing platform element. Such elements given may be viewed as examples of what is more generally referred to herein as a "processing device."

[0156] View now Figure 7 , illustrates one possible processing platform that can be used to implement at least a portion of one or more embodiments of the present invention. In this embodiment, processing platform 700 comprises at least a portion of a given system and includes at least one processing device, represented as 702-1, 702-2, 702-3 ... 702-D, which communicate with each other via a network 704. Network 704 may include any type of network, such as a wireless local area network (WAN), a local area network (LAN), a satellite network, a telephone or cable network, a cellular network, a wireless network (e.g., WiFi or WiMAX), or multiple portions or combinations of these and other types of networks.

[0157] The processing device 702-1 in the processing platform 700 includes a processor 710 coupled to a memory 712. The processor 710 may include a microprocessor, a microcontroller, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other types of processing circuits, as well as portions or combinations of such circuit elements, and the memory 712 may be viewed as an example of a "computer program product" having executable computer program code implemented therein, which may include random access memory (RAM), read-only memory (ROM), or other types of memory in any combination.

[0158] Also included in processing device 702-1 is network interface circuitry 714, which is used to interface the processing device with network 704 and other system components, and which may include a conventional transceiver.

[0159] It is assumed that another processing device 702 of the processing platform 700, if present, is configured in a manner similar to that shown for the processing device 702-1 in the figure.

[0160] Likewise, the specific processing platform 700 shown in the figure is presented only as an example, and the system shown may include additional or alternative processing platforms, as well as many different processing platforms in any combination, with each such platform including one or more computers, storage devices or other processing devices.

[0161] The multiple components of the system can be implemented together in Figure 7 The components may be implemented on a common processing platform of the type shown in , or each such element may be implemented on a separate processing platform.

[0162] As is known in the art, the methods and apparatus discussed herein may be distributed as an article of manufacture, which itself includes a computer-readable medium having computer-readable code means implemented thereon. The computer-readable program code means may be operated in conjunction with a computer system to perform all or some of the steps to perform the method or form the apparatus discussed herein. The computer-readable medium may be a tangible, recordable medium (e.g., a floppy disk, a hard drive, an optical disk, a memory card, a semiconductor device, a chip, an application-specific integrated circuit (ASIC)), or may be a transmission medium (e.g., a network including optical fibers, the World Wide Web, a cable, or a wireless channel using time division multiple access, code division multiple access, or other radio frequency channels). Any media known or well-developed that is suitable for use with a computer system to store information may be used. The computer-readable code means is any mechanism for allowing a computer to read instructions and data (e.g., magnetic changes on a magnetic medium or height changes on the surface of an optical disk).

[0163] It should be emphasized again that the above-described embodiments of the present invention are presented for illustrative purposes only. Many variations and other alternative embodiments may be used. For example, the techniques are applicable to various other types of solid-state storage devices that may benefit from the read threshold voltage adjustment process disclosed herein. Furthermore, the specific configuration of the processing device elements and the associated read threshold voltage adjustment techniques shown herein may vary in other embodiments. In addition, the multiple simplifying assumptions made throughout the above description of the exemplary embodiments should also be viewed as illustrative, rather than as requirements or limitations on the present invention. Many other alternative embodiments within the scope of the appended claims will be apparent to those skilled in the art.

Claims

1. A device comprising: A controller configured to perform the following steps to adjust a read threshold voltage of a memory, wherein the controller is different from the memory: estimating a gap between two adjacent default read threshold voltages using binary data of the memory; determining, using the controller, a distribution of data values ​​read from one or more cells using a plurality of discrete read threshold voltages associated with at least one of the two adjacent default read threshold voltages, and the gap, based at least in part on a type of statistical distribution of the memory ranks, the statistical characteristics comprising a mean and a standard deviation for each of at least two adjacent memory ranks of the memory, wherein each of the plurality of discrete read threshold voltages associated with a first default read threshold voltage of the two adjacent default read threshold voltages is obtained by applying a respective offset value to the first default read threshold voltage, wherein the respective offset value is relative to the first default read threshold voltage, wherein the first default read threshold voltage has a first set of non-zero offset values ​​that are independent of one another; calculating adjusted read threshold voltages associated with the two adjacent memory ranks by using the statistical characteristics of the two adjacent memory ranks; and The read threshold voltage is updated using the adjusted read threshold voltage.

2. The device according to claim 1, wherein: The gap is estimated using a voltage difference between the two adjacent default read threshold voltages and one or more of a number of offset steps.

3. The device according to claim 1, wherein: The gap is estimated based on a difference in means of the two adjacent memory ranks.

4. The device according to claim 1, wherein: The gap is estimated based on a difference in means of the two adjacent memory ranks when statistics of the distribution of data values ​​read from one or more cells are valid for both sides around at least one mean of the statistical distribution.

5. The device according to claim 1, wherein: When the statistics of the distribution of data values ​​read from one or more cells are invalid for both sides around at least one mean of the statistical distribution, the steps are re-performed for additional data values ​​read from the one or more cells.

6. The device according to claim 1, wherein: When the mean is only valid for one side of the statistical distribution, the gap is estimated using an available valid observation on the other side of the statistical distribution.

7. The device according to claim 6, wherein: The controller is further configured to average a plurality of gap estimates when more than one valid observation is available on the other side of the statistical distribution.

8. The device according to claim 1, wherein: When the mean is valid only for one side of the statistical distribution, selected observations of the one side of the statistical distribution are used for the other side of the statistical distribution to estimate the gap.

9. The device according to claim 1, wherein: The controller is further configured to re-estimate the gap.

10. The device according to claim 1, wherein: The statistical characteristics of the two adjacent memory ranks are characterized independently on both sides with respect to at least one mean of the statistical distribution.

11. The device according to claim 1, wherein: The type of statistical distribution is generally Gaussian.

12. The device according to claim 1, wherein: The distribution of data values ​​read from one or more cells is approximately an equal number of zeros and ones.

13. The device according to claim 1, wherein: The statistical characteristics of each of the two adjacent memory ranks include one or more mean values ​​and one or more standard deviation values.

14. The device according to claim 1, wherein: The adjusting is performed in response to one or more read errors.

15. The device according to claim 1, wherein: The gap is obtained using one or more inequality statistics.

16. A method for adjusting a read threshold voltage of a memory, comprising: estimating a gap between two adjacent default read threshold voltages; determining, using a controller different from the memory, a distribution of data values ​​read from one or more cells using a plurality of discrete read threshold voltages associated with at least one of the two adjacent default read threshold voltages, and the gap, statistical characteristics comprising a mean and a standard deviation for each of at least two adjacent memory ranks of the memory based at least in part on a type of statistical distribution of the memory ranks, wherein each of the plurality of discrete read threshold voltages associated with a first default read threshold voltage of the two adjacent default read threshold voltages is obtained by applying a corresponding offset value to the first default read threshold voltage, wherein the corresponding offset value is relative to the first default read threshold voltage, wherein the first default read threshold voltage has a first set of non-zero offset values ​​that are independent of each other; calculating adjusted read threshold voltages associated with the two adjacent memory ranks by using the statistical characteristics of the two adjacent memory ranks; and The read threshold voltage is updated using the adjusted read threshold voltage.

17. The method according to claim 16, wherein: The gap is estimated based on one or more of: (i) a voltage difference between the two adjacent default read threshold voltages and one or more of a number of offset steps; (ii) a difference between the means of the two adjacent memory ranks; and (iii) a difference between the means of the two adjacent memory ranks when the statistics of the distribution of data values ​​read from one or more cells are valid for both sides around at least one mean of the statistical distribution.

18. The method according to claim 16, wherein: The gap is estimated when one or more of the following occurs: (i) when the mean is only valid for one side of the statistical distribution, the gap is estimated using an available valid observation on the other side of the statistical distribution; and (ii) when the mean is only valid for one side of the statistical distribution, the gap is estimated using a selected observation on the one side of the statistical distribution for the other side of the statistical distribution.

19. A non-transitory machine-readable recordable storage medium, wherein one or more software programs implement the steps of the method according to claim 16 when executed by one or more processing devices.

20. A controller device for adjusting a read threshold voltage of a first memory, comprising: a second memory; and At least one processing device, coupled to the second memory, operative to perform the following steps: estimating a gap between two adjacent default read threshold voltages; determining, using the controller device different from the first memory, a distribution of data values ​​read from one or more cells using a plurality of discrete read threshold voltages associated with at least one of the two adjacent default read threshold voltages, and the gap, a statistical characteristic comprising a mean and a standard deviation for each of at least two adjacent memory ranks of the memory based at least in part on a type of statistical distribution of the ranks of the memory, wherein each of the plurality of discrete read threshold voltages associated with a first default read threshold voltage of the two adjacent default read threshold voltages is obtained by applying a respective offset value to the first default read threshold voltage, wherein the respective offset value is relative to the first default read threshold voltage, wherein the first default read threshold voltage has a first set of non-zero offset values ​​that are independent of one another; calculating adjusted read threshold voltages associated with the two adjacent memory ranks by using the statistical characteristics of the two adjacent memory ranks; and The read threshold voltage is updated using the adjusted read threshold voltage.

21. The apparatus according to claim 20, wherein: The gap is estimated based on one or more of: (i) a voltage difference between the two adjacent default read threshold voltages and one or more of a number of offset steps; (ii) a difference between the means of the two adjacent memory ranks; and (iii) a difference between the means of the two adjacent memory ranks when the statistics of the distribution of data values ​​read from one or more cells are valid for both sides around at least one mean of the statistical distribution.

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