An intelligent power module

By stacking the upper bridge power chip, lower bridge power chip and driver chip of the intelligent power module and optimizing the layout, the problems of large area and parasitic inductance are solved, and the module is miniaturized and performance is improved.

CN114078829BActive Publication Date: 2025-09-26GUANGDONG MIDEA WHITE HOME APPLIANCE TECH INNOVATION CENT CO LTD +1
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Patent Information

Application Number
CN202010852236.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-08-21
Publication Date
2025-09-26
Estimated Expiration
2040-08-21

AI Technical Summary

Technical Problem

Existing intelligent power modules occupy a large area and are prone to generating parasitic inductance, which affects working performance.

Method used

The upper bridge power chip, lower bridge power chip and driver chip are stacked on the substrate, and their layout on the substrate is optimized, including angle setting and overlapping design, to shorten the connection lines and reduce the area occupied by the chip and parasitic inductance.

Benefits of technology

The miniaturization of the intelligent power module and the improvement of working performance are achieved, the length of the drive circuit and the power circuit are reduced, and the parasitic inductance is reduced.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses an intelligent power module, comprising a substrate, a circuit wiring layer disposed on the substrate, and an upper bridge power chip, a lower bridge power chip, and a driver chip stacked on the circuit wiring layer. The lower bridge power chip is electrically connected to the upper bridge power chip, and the driver chip is electrically connected to the upper bridge power chip and the lower bridge power chip, respectively. By stacking the upper bridge power chip, the lower bridge power chip, and the driver chip of the intelligent power module on the substrate, the present invention can significantly reduce the area occupied by the intelligent power module, facilitating miniaturization of the intelligent power module. Furthermore, the present invention can shorten the drive circuit and power circuit, thereby reducing parasitic inductance and ensuring the operating performance of the intelligent power module.
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Description

Technical Field

[0001] The present invention relates to the technical field of power drive control, and in particular to an intelligent power module. Background Art

[0002] An Intelligent Power Module (IPM) is a power drive product that integrates power switching devices and drive circuits. It not only detects and protects against faults such as undervoltage, overcurrent, and overheating, but also outputs error signals to a control unit. This protects the IPM itself from damage in the event of a load failure or improper use. Consequently, IPMs have dominated the market with their high reliability, low loss, and low cost. They are particularly well-suited for use in motor drive converters and various inverter power supplies, making them ideal power electronics for variable-frequency speed regulation, metallurgical machinery, electric traction, servo drives, and variable-frequency home appliances.

[0003] The inventors of this application have found in their long-term research and development that Figure 1 As shown in FIG, the current intelligent power module generally includes multiple chips such as an upper bridge power chip 11 composed of a freewheeling diode 101 and an upper bridge arm switch tube 102, a lower bridge power chip 12 composed of a freewheeling diode 103 and a lower bridge arm switch tube 104, and a driver chip 13, which occupies a large area and is not conducive to the miniaturization of the intelligent power module. Figure 2 As shown in FIG, since multiple chips need to be arranged on a plane at a certain distance, the drive circuit and the power circuit will be longer, and the parasitic inductance generated will be larger, which will affect the working performance of the intelligent power module. Summary of the Invention

[0004] The present invention provides an intelligent power module to solve the technical problems in the prior art that the intelligent power module occupies a large area and is prone to generating parasitic inductance.

[0005] In order to solve the above technical problems, a technical solution adopted by the present invention is to provide an intelligent power module, including a substrate, a circuit wiring layer arranged on the substrate, and an upper bridge power chip, a lower bridge power chip and a driver chip stacked on the circuit wiring layer, the lower bridge power chip is electrically connected to the upper bridge power chip, and the driver chip is electrically connected to the upper bridge power chip and the lower bridge power chip respectively.

[0006] In a specific embodiment, the first of the upper bridge power chip and the lower bridge power chip, the second of the upper bridge power chip and the lower bridge power chip, and the driver chip are stacked in sequence in a direction away from the circuit wiring layer.

[0007] In a specific embodiment, an orthographic projection of the driver chip on the substrate falls within an orthographic projection of a second one of the upper-bridge power chip and the lower-bridge power chip on the substrate.

[0008] In a specific embodiment, an orthographic projection of the upper bridge power chip on the substrate at least partially overlaps with an orthographic projection of the lower bridge power chip on the substrate.

[0009] In a specific embodiment, the length direction of the upper bridge power chip and the length direction of the lower bridge power chip are arranged at an angle.

[0010] In a specific embodiment, the length direction of the first one of the upper bridge power chip and the lower bridge power chip is arranged along the length direction of the substrate, and the length direction of the second one of the upper bridge power chip and the lower bridge power chip is arranged along the width direction of the substrate.

[0011] In a specific embodiment, the orthographic projection of a short side of the second of the upper bridge power chip and the lower bridge power chip on the substrate falls within the orthographic projection of the first of the upper bridge power chip and the lower bridge power chip on the substrate, and is spaced apart from the orthographic projection of the long side of the first of the upper bridge power chip and the lower bridge power chip on the substrate.

[0012] In a specific embodiment, the orthographic projection of the driver chip on the substrate falls within an overlapping area of ​​the orthographic projection of the upper bridge power chip on the substrate and the orthographic projection of the lower bridge power chip on the substrate.

[0013] In a specific embodiment, the intelligent power module further includes a conductive carrier, which is disposed between the upper bridge power chip and the lower bridge power chip and is used to electrically connect the upper bridge power chip and the lower bridge power chip.

[0014] In a specific embodiment, the upper bridge power chip includes an electrically connected first freewheeling diode and an upper bridge arm switch tube, the lower bridge power chip includes an electrically connected second freewheeling diode and a lower bridge arm switch tube, the upper bridge power chip and the lower bridge power chip are RC-IGBT chips, MOSFET chips or HEMT chips, and the driver chip is an HVIC chip.

[0015] The present invention can greatly reduce the area occupied by the intelligent power module by stacking the upper bridge power chip, lower bridge power chip and driver chip of the intelligent power module on a substrate, which is conducive to the miniaturization of the intelligent power module. It can also shorten the drive circuit and power circuit, thereby reducing parasitic inductance and ensuring the working performance of the intelligent power module. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:

[0017] Figure 1 It is a structural diagram of an intelligent power module in the prior art;

[0018] Figure 2 It is a circuit diagram of an intelligent power module in the prior art;

[0019] Figure 3 1 is a schematic structural diagram of an embodiment of an intelligent power module of the present invention;

[0020] Figure 4 1 is a circuit diagram of an embodiment of an intelligent power module of the present invention. DETAILED DESCRIPTION

[0021] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0022] The terms "first" and "second" in this application are only used for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. In the description of this application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically limited. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices. The term "and / or" is merely an association relationship that describes associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0023] See also Figure 3 and Figure 4The embodiment of the intelligent power module 10 of the present invention includes a substrate 100, a circuit wiring layer 200 arranged on the substrate 100, and an upper bridge power chip 300, a lower bridge power chip 400 and a driver chip 500 stacked on the circuit wiring layer 200. The lower bridge power chip 400 is electrically connected to the upper bridge power chip 300, and the driver chip 500 is electrically connected to the upper bridge power chip 300 and the lower bridge power chip 400 respectively.

[0024] The embodiment of the present invention can greatly reduce the area occupied by the intelligent power module 10 by stacking the upper bridge power chip 300, the lower bridge power chip 400 and the driver chip 500 of the intelligent power module 10 on the substrate 100, which is conducive to the miniaturization of the intelligent power module 10. It can also shorten the drive circuit and the power circuit, thereby reducing parasitic inductance and ensuring the working performance of the intelligent power module 10.

[0025] The first of the upper bridge power chip 300 and the lower bridge power chip 400 , the second of the upper bridge power chip 300 and the lower bridge power chip 400 , and the driver chip 500 are stacked in sequence in a direction away from the circuit wiring layer 200 .

[0026] In this embodiment, the number of upper bridge power chips 300, lower bridge power chips 400 and driver chips 500 is three respectively. Each corresponding upper bridge power chip 300, lower bridge power chip 400 and driver chip 500 is stacked in sequence in a direction away from the circuit wiring layer 200. The three upper bridge power chips 300 are arranged at the bottom layer and can be directly electrically connected to each other through the circuit wiring layer; and the three lower bridge power chips 400 are electrically connected through the conductive wire 430. Its layout is reasonable and can simplify the connection structure between the three upper bridge power chips 300 and the three lower bridge power chips 400. By dividing the driver chip 500 into three, the comparison Figure 2 and Figure 4 , which can reduce the distance between the driver chip 500 and the corresponding connection lines (not marked in the figure) of the upper bridge power chip 300 and the lower bridge power chip 400, thereby shortening the driving loop and reducing parasitic inductance.

[0027] In other embodiments, the driver chip 500 can also be set on the bottom layer, that is, the driver chip 500 is set on the circuit wiring layer 200, the lower bridge power chip 400 is set on the driver chip 500, and the upper bridge power chip 300 is set on the lower bridge power chip 400. The connection method is similar to the above-mentioned embodiment in which the upper bridge power chip 300 is placed on the bottom layer, and will not be repeated here.

[0028] In this embodiment, the orthographic projection of the driver chip 500 on the substrate 100 falls within the orthographic projection of the second of the upper bridge power chip 300 and the lower bridge power chip 400 on the substrate 100, which can reduce the space occupied by the second of the upper bridge power chip 300 and the lower bridge power chip 400 and the driver chip 500 at the same time, and reserve sufficient space for the connecting line (i.e., the conductive line 430) connecting the upper bridge power chip 300 and the second of the lower bridge power chip 400.

[0029] Among them, the orthographic projection of the upper bridge power chip 300 on the substrate 100 at least partially overlaps with the orthographic projection of the lower bridge power chip 400 on the substrate 100, which can reserve space for the connection point between the first of the upper bridge power chip 300 and the lower bridge power chip 400 for connecting to other chips.

[0030] In this embodiment, the length direction of the upper bridge power chip 300 and the length direction of the lower bridge power chip 400 are set at an angle, for example, they can be set perpendicular to each other, so that the layout between the upper bridge power chip 300 and the lower bridge power chip 400 is more reasonable, while reserving space for the connection point, occupying a smaller area, which is conducive to the miniaturization of the intelligent power module, and makes the distance of the connecting line between the upper bridge power chip 300 and the lower bridge power chip 400 shorter, thereby shortening the power loop and reducing parasitic inductance.

[0031] In this embodiment, the upper bridge power chip 300 is arranged in a rectangular shape, and the extension direction of the longer side of the upper bridge power chip 300 is defined as the length direction of the upper bridge power chip 300. The definition of the length direction below is similar to it and will not be repeated here.

[0032] In this embodiment, the length direction of the first of the upper bridge power chip 300 and the lower bridge power chip 400 is set along the length direction of the substrate 100, and the length direction of the second of the upper bridge power chip 300 and the lower bridge power chip 400 is set along the width direction of the substrate 100. This can make the coordination layout of the upper bridge power chip 300, the lower bridge power chip 400 and the substrate 100 more reasonable, and the size of the substrate 100 is smaller, which is conducive to the miniaturization of the intelligent power module.

[0033] In this embodiment, the orthographic projection of a short side of the second of the upper bridge power chip 300 and the lower bridge power chip 400 on the substrate 100 falls within the orthographic projection of the first of the upper bridge power chip 300 and the lower bridge power chip 400 on the substrate 100, and is spaced apart from the orthographic projection of the long side of the first of the upper bridge power chip 300 and the lower bridge power chip 400 on the substrate 100. This ensures that the upper bridge power chip 300 and the lower bridge power chip 400 are stacked to reduce the occupied area while reserving space for connection points for connecting with other chips for the upper bridge power chip 300 and the first of the lower bridge power chip 400.

[0034] In this embodiment, the orthographic projection of the driver chip 500 on the substrate 100 falls within the overlapping area of ​​the orthographic projection of the upper bridge power chip 300 on the substrate 100 and the orthographic projection of the lower bridge power chip 400 on the substrate 100, which can reduce the space occupied by the upper bridge power chip 300, the lower bridge power chip 400 and the driver chip 500 at the same time, and reserve sufficient space for the connecting line (i.e., the conductive line 430) connecting the upper bridge power chip 300 and the lower bridge power chip 400; and can minimize the distance between the driver chip 500 and the upper bridge power chip 300 and the lower bridge power chip 400 at the same time, thereby reducing the distance between the driver chip 500 and the connecting lines between the upper bridge power chip 300 and the lower bridge power chip 400, shortening the driving loop, and thus reducing parasitic inductance.

[0035] In this embodiment, the intelligent power module 10 may further include a conductive carrier 600, which is arranged between the upper bridge power chip 300 and the lower bridge power chip 400, and is used to electrically connect the upper bridge power chip 300 and the lower bridge power chip 400. Electrical connection through the conductive carrier 600 can avoid the problems of complex winding of connecting wires, short circuits that are prone to occur during routing, and high reliability.

[0036] In this embodiment, the upper bridge power chip 300 includes an electrically connected first freewheeling diode 310 and an upper bridge arm switch tube 320, and the lower bridge power chip 400 includes an electrically connected second freewheeling diode 410 and a lower bridge arm switch tube 420. The upper bridge power chip 300 and the lower bridge power chip 400 can be RC-IGBT (Reverse-Conducting Insulated Gate Bipolar Transistor) chips, MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) chips or HEMT (High Electron Mobility Transistor) chips, etc., and the driver chip 500 can be an HVIC (High Voltage Integrated Circuit) chip.

[0037] In this embodiment, the cathode of the first freewheeling diode 310 is electrically connected to the collector of the upper-arm switching transistor 320, the anode of the first freewheeling diode 310 is electrically connected to the emitter of the upper-arm switching transistor 320, and the collectors of the three upper-arm switching transistors 320 are electrically connected via the circuit wiring layer 200. The cathode of the second freewheeling diode 410 is electrically connected to the collector of the lower-arm switching transistor 420, the anode of the second freewheeling diode 410 is electrically connected to the emitter of the lower-arm switching transistor 420, the collector of the lower-arm switching transistor 420 is electrically connected to the emitter of the corresponding upper-arm switching transistor 320 via the conductive carrier 600, and the emitters of the three lower-arm switching transistors 420 are electrically connected via a conductive wire 430.

[0038] In this embodiment, the driver chip 500 is electrically connected to the gate of the upper-arm switch tube 320 and the gate of the lower-arm switch tube 420 , respectively.

[0039] In this embodiment, the three upper bridge arm switching tubes 320 serve as upper bridge arm switching tubes for U phase, V phase and W phase respectively, and the three lower bridge arm switching tubes 420 serve as lower bridge arm switching tubes for U phase, V phase and W phase respectively.

[0040] In this embodiment, the substrate 100 may be made of metal. The intelligent power module 10 further includes an insulating layer 700 . The insulating layer 700 is disposed between the substrate 100 and the circuit wiring layer 200 .

[0041] In other embodiments, the substrate 100 may also be made of a non-conductive material, and the circuit wiring layer 200 is directly disposed on the substrate 100 , which is not limited here.

[0042] In this embodiment, the intelligent power module 10 may further include a package (not shown in the figure), which is used to package the upper bridge power chip 300 , the lower bridge power chip 400 , and the driver chip 500 on the substrate 100 .

[0043] In this embodiment, the intelligent power module 10 may further include a lead 210 . The lead 210 is connected to the circuit wiring layer 200 and extends outside the package body for electrically connecting the intelligent power module 10 to other modules.

[0044] The above description is only an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An intelligent power module, characterized in that: It includes a substrate, a circuit wiring layer arranged on the substrate, and an upper bridge power chip, a lower bridge power chip and a driver chip stacked on the circuit wiring layer, the lower bridge power chip is electrically connected to the upper bridge power chip, and the driver chip is electrically connected to the upper bridge power chip and the lower bridge power chip respectively; the number of the upper bridge power chip, the lower bridge power chip and the driver chip is multiple; each corresponding upper bridge power chip, the lower bridge power chip and the driver chip are stacked in sequence in a direction away from the circuit wiring layer, the multiple upper bridge power chips are electrically connected to each other through the circuit wiring layer, and the multiple lower bridge power chips are electrically connected to each other through conductive wires; or each corresponding lower bridge power chip, the upper bridge power chip and the driver chip are stacked in sequence in a direction away from the circuit wiring layer, the multiple lower bridge power chips are electrically connected to each other through the circuit wiring layer, and the multiple upper bridge power chips are electrically connected to each other through conductive wires.

2. The intelligent power module according to claim 1, characterized in that: When each corresponding upper bridge power chip, the lower bridge power chip and the driver chip are stacked in sequence in a direction away from the circuit wiring layer, the orthographic projection of each driver chip on the substrate falls within the orthographic projection of each corresponding lower bridge power chip on the substrate; when each corresponding lower bridge power chip, the upper bridge power chip and the driver chip are stacked in sequence in a direction away from the circuit wiring layer, the orthographic projection of each driver chip on the substrate falls within the orthographic projection of each corresponding upper bridge power chip on the substrate.

3. The intelligent power module according to claim 1, wherein: The orthographic projection of the upper bridge power chip on the substrate at least partially overlaps with the orthographic projection of the lower bridge power chip on the substrate.

4. The intelligent power module according to claim 3, characterized in that: The length direction of the upper bridge power chip and the length direction of the lower bridge power chip form an angle.

5. The intelligent power module according to claim 3, characterized in that: When each corresponding upper bridge power chip, the lower bridge power chip and the driver chip are stacked in sequence in a direction away from the circuit wiring layer, the length direction of the upper bridge power chip is set along the length direction of the substrate, and the length direction of the lower bridge power chip is set along the width direction of the substrate; when each corresponding lower bridge power chip, the upper bridge power chip and the driver chip are stacked in sequence in a direction away from the circuit wiring layer, the length direction of the lower bridge power chip is set along the length direction of the substrate, and the length direction of the upper bridge power chip is set along the width direction of the substrate.

6. The intelligent power module according to claim 3, characterized in that: When each corresponding upper bridge power chip, the lower bridge power chip and the driver chip are stacked in sequence in a direction away from the circuit wiring layer, the orthographic projection of a short side of each lower bridge power chip on the substrate falls within the orthographic projection of each corresponding upper bridge power chip on the substrate, and is spaced apart from the orthographic projection of the long side of each corresponding upper bridge power chip on the substrate; when each corresponding lower bridge power chip, the upper bridge power chip and the driver chip are stacked in sequence in a direction away from the circuit wiring layer, the orthographic projection of a short side of each upper bridge power chip on the substrate falls within the orthographic projection of each corresponding lower bridge power chip on the substrate, and is spaced apart from the orthographic projection of the long side of each corresponding lower bridge power chip on the substrate.

7. The intelligent power module according to claim 3, characterized in that: The orthographic projection of the driver chip on the substrate falls within an overlapping area of ​​the orthographic projection of the upper bridge power chip on the substrate and the orthographic projection of the lower bridge power chip on the substrate.

8. The intelligent power module according to claim 1, wherein: The intelligent power module further includes a conductive carrier, which is disposed between the upper bridge power chip and the lower bridge power chip and is used to electrically connect the upper bridge power chip and the lower bridge power chip.

9. The intelligent power module according to claim 1, characterized in that: The upper bridge power chip includes an electrically connected first freewheeling diode and an upper bridge arm switch tube, the lower bridge power chip includes an electrically connected second freewheeling diode and a lower bridge arm switch tube, the upper bridge power chip and the lower bridge power chip are RC-IGBT chips, MOSFET chips or HEMT chips, and the driver chip is an HVIC chip.

Citation Information

Patent Citations

  • Stacked die power converter

    US20140061884A1