Optoelectronic device and method of forming the same

Abstract

Various embodiments of the invention are directed to image sensors with passivation layers for dark current reduction. A device layer is on a substrate. Further, a cap layer is on the device layer. The cap layer and the device layer and the substrate are semiconductor materials, and the device layer has a smaller bandgap than the cap layer and the substrate. For example, the cap layer and the substrate can be silicon, while the device layer can be germanium or include germanium. A photodetector is in the device layer and the cap layer, and a passivation layer is on the cap layer. The passivation layer includes a high-k dielectric material and causes formation of a dipole moment along a top surface of the cap layer. Embodiments of the invention also relate to optoelectronic devices and methods of forming the same.

Description

Technical Field

[0001] Embodiments of the present invention relate to optoelectronic devices and methods for forming the same. Background Technology

[0002] Silicon photonic devices can be fabricated using existing semiconductor manufacturing techniques, and because silicon is already used as the substrate for most integrated circuits, it is possible to create hybrid devices in which optical and electronic components are integrated into a single microchip. Therefore, many electronics manufacturers and academic research groups are actively researching silicon photonics as a tool to track Moore's Law by using optical interconnects to provide faster data transfer between and within microchips. Summary of the Invention

[0003] An embodiment of the present invention provides an optoelectronic device, comprising: a substrate; a germanium photodiode region extending into an upper surface of the substrate, wherein the germanium photodiode region has a curved upper surface extending beyond the upper surface of the substrate; and a silicon cap located above the curved upper surface of the germanium photodiode region, wherein there is no oxide between the curved upper surface of the germanium photodiode region and the upper surface of the silicon cap.

[0004] Another embodiment of the present invention provides a method for forming an optoelectronic device, comprising: forming a trench in a substrate; placing the substrate including the trench in a chamber, and epitaxially growing a germanium layer having a curved upper surface in the trench in the chamber, and epitaxially growing a silicon cap layer in situ above the germanium layer in the chamber.

[0005] Another embodiment of the present invention provides a method for forming an optoelectronic device, comprising: receiving a substrate; forming a shallow trench isolation region surrounding an active region in the substrate; forming a doped region in the substrate; forming an oxide layer above an upper surface of the substrate and above the shallow trench isolation region; etching the substrate to form trenches or recesses in the active region; epitaxially growing a germanium layer to partially or completely fill the trenches or recesses; and epitaxially forming a silicon cap layer on the germanium layer, wherein the silicon cap layer is formed in situ in a cluster tool, the germanium layer being grown in the cluster tool without exposing the germanium layer to the surrounding environment of the cluster tool. Attached Figure Description

[0006] The various aspects of the invention can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industrial practice, the various components are not drawn to scale. In fact, for clarity of discussion, the dimensions of the various components may be arbitrarily increased or decreased.

[0007] Figure 1Examples of optoelectronic devices according to some embodiments are shown.

[0008] Figure 2 The diagram illustrates the relationship between [various embodiments] and [other embodiments]. Figure 1 An illustration of a portion of a consistent optoelectronic device.

[0009] Figure 3 It shows the relationship with Figure 2 The illustrations show some embodiments consistent with the three-dimensional diagrams corresponding to germanium photodiodes.

[0010] Figure 4 It shows the relationship with Figure 3 Top views of some embodiments of a consistent germanium photodiode.

[0011] Figure 5A and Figure 5B It shows Figure 4 Cross-sectional views of various embodiments of germanium photodiodes.

[0012] Figure 6A and Figure 6B It shows Figure 4 Various cross-sectional views of some other embodiments of germanium photodiodes.

[0013] Figure 7A and Figure 7B It shows Figure 4 Cross-sectional views of various embodiments of germanium photodiodes.

[0014] Figure 8A and Figure 8B It shows Figure 4 Cross-sectional views of various embodiments of germanium photodiodes.

[0015] Figure 9 Another cross-sectional view of a photodiode according to some embodiments is shown.

[0016] Figures 10 to 19 A series of cross-sectional views according to some embodiments are shown, which together illustrate a method for manufacturing a photodiode.

[0017] Figure 20 It shows Figures 10 to 19 Block diagrams of some embodiments of the method. Detailed Implementation

[0018] This invention provides numerous different embodiments or instances for implementing various features of the invention. Specific examples of components and arrangements are described below to simplify the invention. Of course, these are merely examples and not intended to be limiting. For example, in the following description, forming a first component above or on a second component can include embodiments where the first and second components are in direct contact, and can also include embodiments where an additional component can be formed between the first and second components, thereby allowing the first and second components to not be in direct contact. Furthermore, reference numerals and / or letters may be repeated in various examples. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the individual embodiments and / or configurations discussed.

[0019] Furthermore, for ease of description, spatial relative terms such as “below,” “under,” “lower,” “above,” and “upper” may be used herein to describe the relationship between one element or component and another, as shown in the figures. In addition to the orientations shown in the figures, spatial relative terms are intended to include different orientations of the device during use or operation. The device may be positioned in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein may be interpreted accordingly.

[0020] Optical fibers and waveguides include a core and a cladding or substrate that at least partially surrounds the core. The core has a core refractive index n1, and the cladding has a cladding reflectivity n0, whereby the core refractive index is higher than the cladding reflectivity. Therefore, when a light beam is coupled to an optical fiber or waveguide (e.g., when the beam is guided to the end of the optical fiber or waveguide), the beam is confined within the core by total internal reflection as the beam propagates along the length of the optical fiber or waveguide.

[0021] In some cases, the core comprises silicon, and the cladding comprises silica or silicon dioxide. A photodiode can be formed along the length of the waveguide in a germanium photodiode region located at a predetermined position to measure or detect light at that position. Some aspects of the invention recognize that preventing oxidation of the uppermost surface of the germanium photodiode region is advantageous, as such oxidation leads to an increase in dark current in the final device. In an alternative approach, a silicon nitride cap is formed above the upper surface of the germanium photodiode region to reduce or prevent such oxidation. However, partly due to the hardness of silicon nitride, the silicon nitride cap is susceptible to voids during manufacturing, which can lead to oxidation of the underlying germanium and / or chemical etching of the underlying germanium during the manufacturing process. Therefore, some aspects of the invention provide a silicon cap above the germanium photodiode region to eliminate or reduce oxidation. The silicon cap is formed in situ with the germanium photodiode region, thereby preventing oxidation of the upper surface of the germanium photodiode region. Furthermore, since the hardness of the silicon cap is less than that of silicon nitride, the silicon cap is less susceptible to voids and tends to reduce dark current compared to the method using a silicon nitride cap. Finally, in some embodiments, the in-situ process for forming the germanium photodiode region and the silicon cap above the germanium photodiode region can save photomasks compared to some alternative methods.

[0022] refer to Figure 1 As can be seen from some embodiments, an optoelectronic device 100 includes a germanium photodiode with a silicon cap. It will be understood that... Figure 1 The optoelectronic device 100 shown is merely an example, and the optoelectronic device according to the invention can take any number of forms, including waveguides, splitters, modulators, demodulators, couplers, decouplers, multiplexers, demultiplexers, transmitters, receivers, and many other applications. The illustrated optoelectronic device 100 includes a series of optical paths included in the waveguide, for example, a first optical path 102 and a second optical path 104. At various locations, the optical paths can be parallel to each other (see arrow 106), branch off from each other (see arrow 108), or merge with each other (see arrow 110) to facilitate desired functionality—again. Figure 1 This is just an example.

[0023] Figure 2 It shows Figure 1A more detailed view of the insertion portion of the optoelectronic device 100, which includes a first optical path 102 and a second optical path 104. A photodiode 200 is disposed at a first predetermined position on the first optical path 102, and another photodiode 202 is disposed at another predetermined position on the second optical path 104. The photodiodes 200 are coupled to two conductive metal pads, such as bonding pads. More specifically, a first metal line 208 couples the cathode of the photodiode 200 to the first metal pad 204, and a second metal line 210 couples the anode of the photodiode 200 to the second metal pad 206.

[0024] Figure 3 It shows Figure 2 A three-dimensional / solid sectional view of the portion corresponding to photodiode 200. From Figure 3 It is understood that the optical path (e.g., the first optical path 102) can be disposed on a substrate 300 such as a silicon-on-insulator (SOI) substrate or a bulk silicon substrate. In the illustrated embodiment, the substrate 300 is an SOI substrate, which includes: a processing substrate 302 comprising monocrystalline silicon; an insulating layer 304 comprising silicon dioxide; and a device layer 306 comprising silicon. A germanium photodiode region 309 is also embedded in the substrate 300. Thus, the first optical path 102 includes a silicon-containing core 308 and a germanium photodiode region 309 extending along the axis of the first optical path. A cladding typically comprising silicon or silicon dioxide surrounds the core 308 and the germanium photodiode region 309. Thus, the cladding includes an oxide layer 310 (e.g., a silicon dioxide layer) disposed above the upper surface of the core 308 and around the sidewalls of the core 308, and an insulating layer 304 disposed below the bottom surface of the core 308. The insulating layer 304 is disposed below the bottom surface of the core 308. The photodiode 200 can be completely or partially disposed within the germanium photodiode region 309 and coupled to the end of the core 308 of the first optical path 102. The photodiode 200 can measure or detect light at a predetermined position.

[0025] To establish photodiode 200, germanium photodiode region 309 includes an n-type germanium region 312 and a p-type germanium region 314, and in the illustrated embodiment, it further includes an intrinsic germanium region 316 separating the n-type germanium region 312 and the p-type germanium region 314 to establish a pin germanium photodiode. In other embodiments, the intrinsic germanium region 316 may be omitted, and the n-type germanium region 312 may directly contact the p-type germanium region 314 at a pn junction. A first set of one or more contacts 318 extends downward from the first metal line 208 to an n-type silicon region ohmically coupled to the n-type germanium region 312 (e.g., coupled to the cathode of photodiode 200) to couple a first metal pad 206 to the anode of photodiode 200. A second set of one or more contacts 320 extends downward from the second metal line 210 to a p-type silicon region ohmically coupled to the p-type germanium region 314 (e.g., coupled to the anode of photodiode) to couple a second metal pad 206 to the anode of photodiode 200. The core 308 may be widened or tapered at the end of the germanium photodiode region 309 to surround the outer edge of the germanium photodiode region 309, and the cladding surrounds the edge of the widened silicon core to facilitate total internal reflection through the waveguide.

[0026] Figure 4 A top view of the germanium photodiode 200 is shown, and it is compared with... Figure 3 Some embodiments are consistent; and now with Figure 4 Simultaneously described Figures 5A to 5B The following are shown respectively along such Figure 4 The top view shows a cross-sectional view of the width and length of the germanium photodiode 200.

[0027] like Figure 4 and Figures 5A to 5BAs shown, the germanium photodiode 200 includes an n-type region 502, a p-type region 504, and an intrinsic region 506 separating the n-type region 502 and the p-type region 504 to form a pin photodiode. In other embodiments, the intrinsic region 506 may be omitted, and the n-type region 502 may directly contact the p-type region 504 at the pn junction. The n-type region 502 may include an n-type contact region 508 located directly below the contact 320, a lateral n-type region 510 extending below the shallow trench isolation (STI) structure 540, and an n-type photodiode region 512 (which may include an n-type germanium region 312 and an n-type silicon region 514). The p-type region 504 may include a p-type contact region 516 located directly below the contact 318, a lateral p-type region 518 extending below the STI structure 540, and a p-type photodiode region 520 (which may include a p-type germanium region 314 and a p-type silicon region 522). The intrinsic germanium region 316 separates the n-type germanium region 312 and the p-type germanium region 314, and the intrinsic silicon region 524 separates the lateral n-type region 510 and the lateral p-type region 518, thereby establishing a pin photodiode. In some embodiments, the length d of the germanium photodiode region... A The width d of the germanium photodiode region ranges from approximately 5 micrometers to approximately 50 micrometers, and in some cases is 15 micrometers. In some embodiments, the width d of the germanium photodiode region... B From d A approximately 1 / 50 to equal d A Within the range; and in some embodiments, it is 0.5 micrometers.

[0028] As light travels along the first optical path within core 308, it reaches a first predetermined position of the germanium photodiode 200 at a certain point. When a photon of sufficient energy strikes the germanium photodiode 200, it generates electron-hole pairs. This mechanism is also known as the internal photoelectric effect. If absorption occurs in the depletion region of the junction, or a diffusion length away from the junction, these carriers are purged from the junction by the built-in electric field of the depletion region. Therefore, holes (p-) move toward the p-type anode (and toward the p-type contact region 516), and electrons (n-) move toward the n-type cathode (and toward the n-type contact region 508), generating a photocurrent whose amplitude is proportional to the light intensity. The total current through the germanium photodiode 200 is the sum of the dark current (the current generated in the absence of light) and the photocurrent; therefore, the dark current should be minimized to maximize the device's sensitivity.

[0029] As in Figure 5AAs can be seen, the germanium photodiode region 309 has a substantially flat or horizontal lower surface, vertical or substantially vertical sidewalls, and a curved upper surface. A silicon cap 526 is disposed above the germanium photodiode region 309, and there is no oxidation between the curved upper surface of the germanium photodiode region 309 and the lower surface of the silicon cap 526. This absence of oxidation is due to the fact that the silicon cap 526 is formed in situ with the germanium photodiode region 309 within a cluster tooling, thereby preventing oxidation of the upper surface of the germanium photodiode region 309. Furthermore, the silicon cap 526 relatively inhibits the formation of voids, and therefore, compared to the alternative method of using a silicon nitride cap, prevents subsequent damage during manufacturing, thus tending to reduce dark current. In some embodiments, the thickness of the silicon cap 526 is in the range of 100 angstroms to 1000 angstroms. The silicon cap 526 has a lower surface and an upper surface, the outer corner of the lower surface intersecting the upper surface of the device layer 306, and the outer corner of the upper surface intersecting the upper surface of the oxide layer 310. Figure 5B As shown, in some embodiments, the silicon cap 526 extends continuously above the germanium photodiode region and has a substantially uniform thickness along the length of the germanium photodiode region. Therefore, the curved lower surface of the silicon cap coincides with the curved upper surface of the germanium photodiode region.

[0030] A protective oxide layer 530 is disposed above the silicon cap 526 and has an outer edge extending outward beyond the outer wall of the germanium photodiode region 309 and laterally extending above the upper surface of the oxide layer 310. In some embodiments, the protective oxide layer 530 is a low-k dielectric, but the protective oxide layer 530 may also be silicon dioxide, silicon nitride, silicon oxynitride, or other suitable dielectric materials.

[0031] Figures 6A to 6B An alternative embodiment is shown in which the germanium photodiode region 309 has a substantially circular upper surface comprising (111) facets, (311) facets, and (100) facets that together approximate a circular surface. In some cases, the (111) and (311) facets are present because the inner sidewalls of the oxide layer 310 restrict the epitaxial and selective growth of the germanium photodiode region 309. Because the growth rate of the (100) facets is higher than that of the (311) and (111) facets; and the growth rate of the (311) facets is higher than that of the (111) facets, selective germanium growth results in… Figure 14B It has a roughly circular surface.

[0032] Figures 7A to 7BAnother embodiment is shown, wherein the germanium photodiode region 309 has a substantially flat or horizontal lower surface, vertical or substantially vertical sidewalls, and a curved upper surface. A silicon cap 526 is again disposed above the germanium photodiode region 309, and there is no oxidation between the curved upper surface of the germanium photodiode region 309 and the lower surface of the silicon cap 526. Furthermore, an interface layer 528 comprising silicon and germanium is disposed between the curved upper surface of the germanium photodiode region 309 and the lower surface of the silicon cap 526. In some embodiments, the thickness of the silicon and germanium in the interface layer 528 ranges from about 3% to about 50% of the thickness of the silicon cap 526. In some embodiments, the thickness of the silicon and germanium is in the range of 30 angstroms to 50 angstroms. In some alternative embodiments, the thickness of the silicon and germanium is greater than 0 angstroms and less than 30 angstroms. Furthermore, in some embodiments, the atomic percentage of germanium in the interface layer 528 is greater than 0% and less than or equal to 50%. In some embodiments, the interface layer 528 has a substantially constant atomic ratio of silicon to germanium over its entire thickness—for example, the atomic ratio of silicon to germanium may be 1:1 from the upper surface of the germanium photodiode region 309 to the lower surface of the silicon cap 526.

[0033] Figures 8A to 8B Another embodiment is shown, wherein the interface layer 528 comprises silicon germanium. Figures 7A to 7B In contrast, the interface layer 528 has a substantially constant atomic ratio of silicon to germanium throughout its entire thickness, while... Figures 8A to 8B The atomic ratio of silicon to germanium is graded across the thickness of the interface layer 528. Therefore, in Figures 8A to 8B In this embodiment, the atomic percentage of silicon ranges from approximately 0% near the bottom to approximately 100% at the top, and the atomic percentage of silicon can increase linearly over this thickness (and the percentage of germanium can decrease accordingly). In other embodiments, the atomic percentage of silicon can increase according to a quadratic function, an exponential function, or another continuous function that varies continuously over the thickness (and the percentage of germanium can decrease accordingly); this is because continuous functions tend to control lattice strain and are also possible in providing a better crystal structure than discrete, stepwise compositional variations. Furthermore, in some embodiments, the atomic percentages of silicon and germanium range from approximately 100% near the bottom to approximately 0% at the top, and exhibit an increase in the atomic percentage of silicon over this thickness. In some cases, the thickness of the interface layer 528 is approximately equal to the thickness of the silicon cap 526; however, the thickness of the interface layer 528 can also be greater than or less than the thickness of the silicon cap 526. In some embodiments, the thickness of the interface layer 528 is in the range of 150 angstroms to 1000 angstroms.

[0034] Figure 9 Another example is shown, illustrating some details of how the germanium photodiode region 309, oxide layer 310, and silicon cap 526 intersect each other in an embodiment. (See example...) Figure 9 As shown, in some embodiments, the peripheral region of the germanium photodiode region 309 may be undercut from the inner sidewall of the oxide layer 310 (see 902). This is due to the process of forming the germanium photodiode region 309, which involves etching a trench in the substrate that slightly undercuts the oxide layer 310, and then epitaxially and selectively growing the germanium photodiode region 309 inside and outside the trench. Due to the etching, the upper surface and inner sidewall of the oxide layer 310 may also have rounded corners 904. The central region of the germanium photodiode region 309 has an upper surface that rises above the upper surface of the oxide layer 310, and a silicon cap 526 is disposed above the germanium photodiode region 309. In some embodiments, the thickness of the silicon cap 526 ranges from 75% to 125% of the thickness of the oxide layer 310, and in some cases has the same thickness as the oxide layer 310 (±5%). The lower surface of the central region of the silicon cap 526 rises above the upper surface of the oxide layer 310. A protective oxide layer 530 is disposed above the silicon cap and has an outer edge of approximately 50% between the outer edge of the germanium photodiode region and the inner edge of the STI structure 540.

[0035] refer to Figures 10 to 18 A series of cross-sectional views 1000-1800 are provided for some embodiments of methods for forming optoelectronic devices, wherein a silicon cap layer is disposed above a germanium photodiode to reduce dark current.

[0036] like Figure 10 As shown in cross-sectional view 1000, a substrate 300 is provided. The substrate 300 can be, for example, a bulk substrate of single-crystal silicon or some other suitable type of substrate, such as an SOI substrate. In some embodiments, the substrate 300 is undoped. In other embodiments, the substrate 300 is doped with p-type or n-type dopants. The substrate 300 is patterned to form shallow trench isolation (STI) regions extending into the upper surface of the substrate. Patterning to form the STI regions may include: 1) depositing a hard mask layer over the substrate 300; 2) patterning the hard mask layer by a photolithography / etching process; and 3) performing etching on the substrate 300 with the hard mask layer in place. The hard mask layer can be, for example, or include silicon nitride, undoped silicate glass (USG), and / or some other suitable dielectric. The trenches are filled with an insulating material, such as silicon dioxide or a low-k dielectric material. Optionally, a chemical mechanical planarization (CMP) operation is performed to make the upper surface of the STI region flush with the upper surface of the substrate 300.

[0037] like Figure 11As shown in cross-sectional view 1100, p-type regions and n-type regions are formed in substrate 300. In some embodiments, the formation includes: selectively performing ion implantation on substrate 300 to form p-type contact regions 516; selectively performing ion implantation on substrate 300 to form lateral p-type regions 518; selectively performing ion implantation on substrate 300 to form n-type contact regions 508; and selectively performing ion implantation on substrate 300 to form lateral n-type regions 510.

[0038] like Figure 12 As shown in cross-sectional view 1200, an oxide layer 310 is then formed above the upper surface of the substrate 300. The oxide layer 310 can be formed by thermal oxidation, spin coating, atomic layer deposition, or plasma deposition. In some embodiments, the oxide layer is a silicon dioxide layer, but it can also be a low-k dielectric or another suitable dielectric.

[0039] As shown in cross-sectional view 1300, the substrate 300 is then patterned to form a groove or trench 1302. Patterning to form the trench 1302 includes: depositing a hard mask layer 1304 over the substrate 300; patterning the hard mask layer 1304 by a photolithography / etching process; and performing etching on the substrate 300 with the hard mask layer 1304 in place. The hard mask layer 1304 may be, for example, or include silicon nitride, undoped silicate glass (USG), and / or some other suitable dielectric. In alternative embodiments, the patterning of the trench 1302 is performed by some other suitable patterning process. In some embodiments, the etching may undercut the inner sidewalls of the oxide layer 310 (see line 1306), so that the inner edge of the oxide layer 310 hangs over the outermost edge of the trench 1302.

[0040] As respectively by Figures 14A to 14B As shown in cross-sectional views 1400A-1400B, germanium regions 1402 are epitaxially grown to fill trenches 1302 (see example). Figure 13 Because the germanium region 1402 is epitaxially grown, it is chosen to grow only on silicon and outward from the exposed surface of the substrate 300 in the trench 1302. Furthermore, since the hard mask layer 1304 covers the substrate 300 outside the trench 1302, the germanium region 1402 is fully or substantially positioned within the trench 1302. However, in alternative embodiments, other suitable materials are also applicable. Additionally, in some embodiments, the germanium region 1402 has a smaller bandgap than the substrate 300. In some embodiments, the germanium region 1402 may have a generally circular upper surface, in some cases without acute angles or comprising a plurality of flat facets that collectively approximate a circular surface. For example, Figure 14A A germanium region 1402 with a circular upper surface is shown, which has no sharp angles. Figure 14B A germanium region 1402 with (111), (311), and (100) facets is shown, which together approximate a circular surface. In some cases, the (111) and (311) facets are due to the inner sidewalls of the oxide layer 310 defining the uppermost portion of the trench 1302, and the fact that germanium is selectively grown on the substrate 300 rather than on the oxide layer 310. Because the growth rate of the (100) facets is higher than that of the (311) and (111) facets; and the growth rate of the (311) facets is higher than that of the (111) facets, selectively grown germanium produces Figure 14B A roughly circular surface. Regardless of whether the upper surface is circular, and as... Figure 14A Does it not have an acute angle, or is it as shown? Figure 14B The diagram shows several flat planes, and the roughly circular upper surface ultimately helps to promote total internal reflection of light within the germanium photodiode region.

[0041] like Figures 15A to 15B Cross-sectional views 1500A-1500B and Figures 16A to 16C As shown in cross-sectional views 1600A-1600C, a cap layer is epitaxially grown on the generally circular upper surface of the germanium region 1402, covering the generally circular upper surface of the germanium region 1402. The cap layer may include a silicon cap layer 1602 located above the circular upper surface of the germanium region 1402 (see...). Figures 16A to 16C ), and may optionally include an interface layer 528 located between the silicon cap layer 1602 and the germanium region 1402 (see Figures 15A to 15BFurthermore, an epitaxial cap layer is grown on the germanium region 1402, rather than on the hard mask layer 1104. Therefore, the cap layer is positioned to the germanium region 1402 via a self-aligned process, saving photomasks compared to some other methods. Moreover, the cap layer is grown in situ with the germanium region 1402 (meaning the cap layer is formed in the same cluster tooling as the germanium region 1402, or even in the same chamber within the cluster tooling, without exposing the substrate and germanium region to the surrounding environment outside the cluster tooling), providing excellent protection for the substrate and germanium region from environmental influences. This in-situ treatment helps prevent oxidation of the circular upper surface of the germanium region 1402, which would increase the dark current in the resulting germanium photodiode. Therefore, this in-situ treatment of the germanium region 1402, the optional silicon-germanium interface layer 1502, and the silicon cap layer 1602 results in no oxidation between the circular upper surface of the germanium region 1402 and the uppermost surface of the silicon cap layer 1602. In some aspects, this in-situ treatment exhibits a significant reduction in dark current compared to other methods that do not employ this in-situ treatment. For example, in some embodiments, a germanium photodiode with a silicon cap is formed through in-situ treatment, exhibiting an input power of 0.2 milliwatts (mW), a bandwidth of 60 GHz, an output current of 214 microamps, and a dark current of less than 20 nanoamps (nA) when an applied voltage of -2 volts is applied, representing a dark current reduction of more than 20 times compared to other methods. This reduction in dark current is attributed to the lack of oxide on the upper surface of the germanium region 1402, resulting in a lower interface charge compared to the presence of oxide, thus providing a significant improvement over other methods.

[0042] More specifically, in Figure 15A In this process, a silicon-germanium interface layer 1502 is formed on the circular upper surface of the germanium region 1402. The silicon-germanium interface layer 1502 can be formed in situ with the germanium region 1402 via an epitaxial growth process. Figure 15A In this process, the silicon-germanium interface layer 1502 can have a constant atomic ratio throughout its entire thickness, or it can have a silicon-germanium atomic ratio that varies throughout its thickness. Figure 15B In this embodiment, the silicon-germanium interface layer 1502 has facets conforming to the facets in the underlying germanium region 1402; and may have a constant atomic ratio throughout its thickness, or may have a varying atomic ratio of silicon to germanium throughout its thickness. In some embodiments, the silicon-germanium interface layer 1502 may be formed by introducing a silicon-germanium precursor into the chamber to grow silicon-germanium on the outer surface of the germanium region 1402, and its thickness may range from 30 angstroms to 50 angstroms. In some alternative embodiments, the silicon-germanium interface layer 1502 may be formed by introducing a silicon precursor to react with the germanium in the germanium region 1402, and the thickness of the silicon-germanium interface layer 1502 may be greater than 0 angstroms and less than 30 angstroms.

[0043] exist Figures 16A to 16CIn this process, a silicon cap layer 1602 is formed over the germanium region 1402. Again, the silicon cap layer 1602 is epitaxially and selectively formed in situ together with the germanium region 1402 and the silicon-germanium interface layer 1502 (if present). More specifically, following... Figures 15A to 15B of Figures 16A to 16B In this process, the silicon cap layer 1602 is formed above the silicon-germanium interface layer 1502. Figure 16C In this configuration, the silicon cap layer 1602 is formed directly over the germanium region 1402 without an intermediate silicon-germanium interface layer. The silicon cap layer 1602 protects the germanium region 1402 from damage during subsequent processing. For example, a subsequent wet cleaning process can use an acid with a high etch rate for the germanium region 1402 but a low etch rate for the silicon cap layer 1602. Thus, the germanium region 1402 will suffer significant crystal damage and / or corrosion, but the silicon cap layer 1602 will not be damaged or corroded. By preventing corrosion and / or crystal damage, leakage current is reduced.

[0044] like Figure 17 The cross-sectional view of 1700 is shown (followed by...). Figure 16A Begin, but you can also follow. Figures 16B to 16C The germanium photodiode region 1402 and silicon cap 526 are doped to form the germanium photodiode region 309. In the illustrated embodiment, the germanium photodiode region 309 includes a pin photodiode, but in other embodiments, it may include a PN photodiode. The pin photodiode includes a p-type photodiode region 520 and an N-type photodiode region 512. To perform this doping, the substrate is removed from the cluster tool in which the germanium region 1402 and the cap layer are formed, and the substrate is typically exposed to the surrounding environment of the wafer fab during transfer to the ion implantation tool in which the doping is performed. Therefore, the top of the silicon cap layer 1602 may be oxidized at this time, but the circular upper surface of the underlying germanium photodiode region 309 remains unoxidized to keep the dark current at a reduced level.

[0045] like Figure 18As shown in cross-sectional view 1800, a protective oxide layer 530 is formed directly on the silicon cap 526, and the protective oxide layer 530 is formed above the inner edge of the oxide layer 310 closest to the germanium photodiode region 309. In some embodiments, the protective oxide layer 530 comprises silicon oxide, and / or a high-k dielectric material with a dielectric constant exceeding 3.9, 10, or some other suitable value. Deposition can be performed, for example, by atomic layer deposition (ALD), vapor deposition, or some other suitable deposition process. In some embodiments, the protective oxide layer 530 is a metal oxide. However, other suitable materials are also possible. In some embodiments, the protective oxide layer 530 is or includes aluminum oxide (e.g., Al2O3), titanium oxide (e.g., TiO2), tantalum oxide (e.g., Ta2O5), hafnium oxide (HfO2), zirconium oxide (e.g., ZrO2), magnesium oxide (e.g., MgO), some other suitable high-k dielectric, or any combination thereof. In some embodiments, the protective oxide layer 530 has a thickness of about 1-10 nanometers, about 1-5 nanometers, about 5-10 nanometers, or some other suitable value.

[0046] like Figure 19 As shown in cross-sectional view 1900, contacts 320 and 318 are formed to connect contact areas 508 and 516 to metal wires 210 and 208, respectively. In some embodiments, the metal contacts and metal wires include copper, aluminum, nickel, lead and / or tungsten, and other metals.

[0047] Figure 20 Some embodiments of a method 2000 for manufacturing optoelectronic devices, according to some examples, are shown. Although referenced... Figures 10 to 19 The aforementioned cross-sectional diagram mentions Figure 20 Examples, but will be understood, in Figures 10 to 19 The structure shown is not limited to method 2000, but can be used independently of it. Furthermore, although method 2000 is described as a series of actions, it will be understood that the order of the actions (and / or portions of those actions) can be changed in other embodiments. For example, although... Figure 20 The diagram illustrates forming a photodetector by implanting dopant into a germanium layer in action 2016. However, in some embodiments, dopant may be implanted after 2018 or before 2014, and other doping regions in 2004 may be performed at other times in method 2000. Furthermore, although... Figure 20 A specific series of actions is shown, but some actions shown and / or described may be omitted in other embodiments. Furthermore, other embodiments may include actions not shown in... Figure 20 Additional actions shown and / or described in the text.

[0048] At action 2002, the substrate is patterned to form a shallow trench isolation (STI) region surrounding the active region. In some embodiments, action 2020 can be combined with... Figure 10 Consistent.

[0049] At action 2004, a doped region is formed in the substrate. In some embodiments, action 2004 can be combined with... Figure 11 Consistent.

[0050] At action 2006, an oxide layer is formed above the upper surface of the substrate and above the STI region. In some embodiments, action 2006 may be combined with... Figure 12 Consistent.

[0051] At action 2008, the substrate is etched to form trenches or recesses in the active region. In some embodiments, action 2008 may be combined with... Figure 13 Consistent.

[0052] In step 2010, a germanium layer is epitaxially grown to partially or completely fill the trenches or recesses. In some embodiments, action 2010 can be combined with... Figures 14A to 14B Consistent.

[0053] In optional action 2012, a silicon-germanium layer is formed in situ on the germanium layer using the same clustering tools as those used for growing the germanium layer. In some embodiments, action 2012 can be combined with... Figures 15A to 15B Consistent. Box 2011 indicates that these actions can be performed in situ within the same cluster tools.

[0054] At action 2014, a silicon cap layer is grown in situ on the germanium layer and / or the silicon-germanium layer using the same clustering tools as those used for growing the germanium layer. In some embodiments, action 2014 can be combined with... Figures 16A to 16C Consistent.

[0055] At action 2016, a photodiode is formed by implanting a dopant into the germanium layer. In some embodiments, action 2016 can be combined with... Figure 17 Consistent.

[0056] At action 2018, a protective oxide layer is formed over the silicon cap layer. In some embodiments, action 2018 may be combined with... Figure 18 Consistent.

[0057] At action 2020, a contact is formed to the photodiode. In some embodiments, action 2020 may be related to... Figure 19 Consistent.

[0058] In some embodiments, the present invention relates to an optoelectronic device comprising: a substrate; and a germanium photodiode region extending into an upper surface of the substrate. The germanium photodiode region has a curved upper surface extending beyond the upper surface of the substrate. A silicon cap is located above the curved upper surface of the germanium photodiode region, and no oxide exists between the curved upper surface of the germanium photodiode region and the upper surface of the silicon cap.

[0059] The aforementioned optoelectronic device further includes a silicon-germanium interface layer disposed above the silicon cap, which separates the curved upper surface of the germanium photodiode region from the lower surface of the silicon cap.

[0060] The aforementioned optoelectronic device further includes a silicon-germanium interface layer disposed above the silicon cap, which separates the curved upper surface of the germanium photodiode region from the lower surface of the silicon cap, wherein the silicon-germanium interface layer has a constant atomic ratio of silicon to germanium over its entire thickness.

[0061] The aforementioned optoelectronic device further includes: a silicon-germanium interface layer disposed above the silicon cap, which separates the curved upper surface of the germanium photodiode region from the lower surface of the silicon cap. The silicon-germanium interface layer has a varying atomic ratio of silicon to germanium in terms of its thickness. The atomic ratio of silicon to germanium has a first value near the germanium photodiode region and a second value near the silicon cap, wherein the second value is greater than the first value.

[0062] The aforementioned optoelectronic device further includes a protective oxide layer disposed above the silicon cap, the protective oxide layer having a curved upper surface above the silicon cap.

[0063] The aforementioned optoelectronic device further includes: a protective oxide layer disposed above the silicon cap, the protective oxide layer having a curved upper surface above the silicon cap, wherein the protective oxide layer has a central region located above the germanium photodiode region, and has an outer edge extending laterally above the upper surface of the substrate beyond the outer wall of the germanium photodiode region.

[0064] The aforementioned optoelectronic device further includes: a protective oxide layer disposed above the silicon cap, the protective oxide layer having a curved upper surface above the silicon cap; and an isolation structure comprising an oxide extending from the upper surface of the substrate on the opposite side of the germanium photodiode region.

[0065] The aforementioned optoelectronic device further includes: a protective oxide layer disposed above the silicon cap, the protective oxide layer having a curved upper surface above the silicon cap; an isolation structure comprising an oxide extending from the upper surface of the substrate on the opposite side of the germanium photodiode region; a p-type region located on a first side of the germanium photodiode region and at a first position laterally extending beyond the first outermost wall of the isolation structure from the germanium photodiode region; and an n-type region located on a second side of the germanium photodiode region and at a second position laterally extending beyond the second outermost wall of the isolation structure from the germanium photodiode region; wherein the p-type region, the n-type region, and the germanium photodiode region form a pn photodiode or a pin photodiode.

[0066] Other embodiments relate to a method. In this method, trenches are formed in a substrate, and the substrate including the trenches is placed in a chamber. Inside the chamber, a germanium layer is epitaxially grown in the trench to have a curved upper surface, and a silicon cap layer is epitaxially grown in situ above the germanium layer inside the chamber.

[0067] The above method also includes forming a protective oxide layer over the silicon cap layer.

[0068] In the above method, the curved upper surface of the germanium layer is in direct contact with the curved lower surface of the silicon cap layer, and the curved lower surface of the silicon cap layer coincides with the curved upper surface of the germanium layer.

[0069] The above method further includes: forming a silicon-germanium layer on the germanium layer before forming the silicon cap layer, wherein the silicon-germanium layer is formed in situ in the chamber in which the germanium layer is grown.

[0070] The above method further includes: forming a silicon-germanium layer on the germanium layer before forming the silicon cap layer, wherein the silicon-germanium layer is formed in situ in the chamber in which the germanium layer is grown, wherein the silicon-germanium layer has a curved lower surface that coincides with and is in direct contact with the curved upper surface of the germanium layer.

[0071] The above method further includes: forming a silicon-germanium layer on the germanium layer before forming the silicon cap layer, wherein the silicon-germanium layer is formed in situ in the chamber in which the germanium layer is grown, wherein the silicon-germanium layer has a curved lower surface that coincides with and is in direct contact with the curved upper surface of the germanium layer, wherein the silicon cap layer has a curved lower surface that coincides with and is in direct contact with the curved upper surface of the silicon-germanium layer.

[0072] Other embodiments relate to a method. In this method, a substrate is received, and shallow trench isolation regions are formed to surround an active region in the substrate. Doped regions are formed in the substrate, and an oxide layer is formed above the upper surface of the substrate and above the shallow trench isolation regions. The substrate is etched to form trenches or recesses in the active regions, and a germanium layer is epitaxially grown to partially or completely fill the trenches or recesses. A silicon cap layer is then epitaxially formed on the germanium layer. The silicon cap layer is formed in situ in a cluster tool in which the germanium layer is grown without exposing the germanium layer to the surrounding environment of the cluster tool.

[0073] In the above method, the silicon cap layer is grown such that the outer edge of the upper surface of the silicon cap layer intersects with the upper surface of the oxide layer.

[0074] The above method further includes: forming a silicon-germanium interface layer on the germanium layer before forming the silicon cap layer, wherein the silicon-germanium interface layer is formed in situ in a cluster tool for growing the germanium layer.

[0075] The above method further includes: forming a silicon-germanium interface layer on the germanium layer before forming the silicon cap layer, wherein the silicon-germanium interface layer is formed in situ in a cluster tool for growing the germanium layer, wherein the silicon-germanium interface layer has a constant atomic ratio of silicon to germanium over its entire thickness.

[0076] The above method further includes: forming a silicon-germanium interface layer on the germanium layer before forming the silicon cap layer, wherein the silicon-germanium interface layer is formed in situ in a cluster tool for growing the germanium layer, wherein the silicon-germanium interface layer has a varying atomic ratio of silicon to germanium over its thickness, wherein the atomic ratio of silicon to germanium has a first value near the germanium layer and a second value near the silicon cap layer, the second value being greater than the first value.

[0077] The above method further includes: implanting a dopant into the germanium layer to form a photodiode; and after implanting the dopant, forming a protective oxide layer over the silicon cap layer.

[0078] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand aspects of the invention. Those skilled in the art should understand that they can readily use this invention as a basis to design or modify other processes and structures for implementing the same purposes and / or achieving the same advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent configurations do not depart from the spirit and scope of the invention, and that various changes, substitutions, and modifications can be made herein without departing from the spirit and scope of the invention.

Claims

1. An optoelectronic device, comprising: Substrate; A germanium photodiode region extends into the upper surface of the substrate, wherein the germanium photodiode region has a curved upper surface that extends beyond the upper surface of the substrate; A silicon cap is located above the curved upper surface of the germanium photodiode region, wherein there is no oxide between the curved upper surface of the germanium photodiode region and the upper surface of the silicon cap, wherein the p-type region and the n-type region are located on opposite sides of the germanium photodiode region, and wherein the silicon cap covers the curved portion of the curved upper surface of the germanium photodiode region; and A silicon-germanium interface layer is disposed above the germanium photodiode region and separates the curved upper surface of the germanium photodiode region from the lower surface of the silicon cap. The silicon-germanium interface layer has a varying atomic ratio of silicon to germanium over its thickness. The atomic ratio of silicon to germanium has a first value near the germanium photodiode region and a second value near the silicon cap, wherein the second value is greater than the first value.

2. The optoelectronic device according to claim 1, wherein, The percentage of silicon atoms increases linearly in the direction from the germanium photodiode region to the silicon cap.

3. The optoelectronic device according to claim 1, wherein, The thickness of the silicon-germanium interface layer is equal to the thickness of the silicon cap.

4. The optoelectronic device according to claim 1, wherein, The thickness of the silicon-germanium interface layer is greater than the thickness of the silicon cap.

5. The optoelectronic device according to claim 1, further comprising: A protective oxide layer is disposed above the silicon cap, the protective oxide layer having a curved upper surface above the silicon cap.

6. The optoelectronic device according to claim 5, wherein, The protective oxide layer has a central region located above the germanium photodiode region and an outer edge extending laterally above the upper surface of the substrate beyond the outer wall of the germanium photodiode region.

7. The optoelectronic device according to claim 5, further comprising: An isolation structure comprising an oxide extending from the upper surface of the substrate on the opposite side of the germanium photodiode region.

8. The optoelectronic device according to claim 7, wherein, The p-type region is located on the first side of the germanium photodiode region, and at the first position on the first outermost wall of the isolation structure furthest from the germanium photodiode region; and The n-type region is located on the second side of the germanium photodiode region, and at a second position that extends laterally beyond the second outermost wall of the isolation structure furthest from the germanium photodiode region; and Specifically, the p-type region, the n-type region, and the germanium photodiode region form a pn photodiode or a pin photodiode.

9. A method for forming an optoelectronic device, comprising: Trenches are formed in the substrate; as well as The substrate, including the trench, is placed in a chamber, and a germanium layer having a curved upper surface is epitaxially grown in the trench within the chamber, and a silicon cap layer is epitaxially grown in situ above the germanium layer within the chamber. The method further includes: Forming isolation structures, p-type regions, and n-type regions. The isolation structure extends from the opposite side of the germanium layer into the upper surface of the substrate. The p-type region is located on the first side of the germanium layer, and at a first position laterally extending beyond the first outermost wall of the isolation structure, furthest from the germanium layer; and The n-type region is located on the second side of the germanium layer, and at a second position that extends laterally beyond the second outermost wall of the isolation structure, furthest from the germanium layer. Prior to forming the silicon cap layer, a silicon-germanium layer is formed on top of the germanium layer, wherein the silicon-germanium layer is formed in situ within the chamber where the germanium layer is grown. Wherein, the silicon-germanium layer has a varying atomic ratio of silicon to germanium along its thickness, wherein the atomic ratio of silicon to germanium has a first value near the germanium layer and a second value near the silicon cap layer, the second value being greater than the first value.

10. The method of claim 9, further comprising: A protective oxide layer is formed over the silicon cap layer.

11. The method according to claim 9, wherein, The curved upper surface of the germanium layer is in direct contact with the curved lower surface of the silicon cap layer, and the curved lower surface of the silicon cap layer is consistent with the curved upper surface of the germanium layer.

12. The method according to claim 9, wherein, The percentage of silicon atoms increases linearly in the direction from the germanium layer to the silicon cap layer.

13. The method according to claim 9, wherein, The silicon-germanium layer has a curved lower surface that coincides with and is in direct contact with the curved upper surface of the germanium layer.

14. The method according to claim 13, wherein, The silicon cap layer has a curved lower surface, which coincides with and is in direct contact with the curved upper surface of the silicon-germanium layer.

15. A method for forming an optoelectronic device, comprising: Receiving substrate; A shallow trench isolation region is formed, the shallow trench isolation region surrounding the active region in the substrate; A doped region is formed in the substrate; An oxide layer is formed above the upper surface of the substrate and above the shallow trench isolation region; The substrate is etched to form a second trench or recess in the active region; An epitaxial germanium layer is grown to partially or completely fill the second trench or recess; as well as A silicon cap layer is epitaxially formed on the germanium layer, wherein the silicon cap layer is formed in situ within a cluster tool, wherein the germanium layer is grown within the cluster tool without exposing the germanium layer to the surrounding environment of the cluster tool. Before forming the silicon cap layer, a silicon-germanium interface layer is formed on the germanium layer, wherein the silicon-germanium interface layer is formed in situ in a cluster tool for growing the germanium layer, and the silicon-germanium interface layer has a varying atomic ratio of silicon to germanium over its thickness, wherein the atomic ratio of silicon to germanium has a first value near the germanium layer and a second value near the silicon cap layer, the second value being greater than the first value.

16. The method according to claim 15, wherein, The silicon cap layer is grown such that the outer edge of the upper surface of the silicon cap layer intersects with the upper surface of the oxide layer.

17. The method according to claim 15, wherein, The percentage of silicon atoms increases linearly in the direction from the germanium layer to the silicon cap layer.

18. The method according to claim 15, wherein, The thickness of the silicon-germanium interface layer is equal to the thickness of the silicon cap layer.

19. The method according to claim 15, wherein, The thickness of the silicon-germanium interface layer is greater than the thickness of the silicon cap layer.

20. The method of claim 15, further comprising: Dopant is implanted into the germanium layer to form a photodiode; as well as After the dopant is implanted, a protective oxide layer is formed over the silicon cap layer.

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