A midpoint clamped three-level circuit and control method

Abstract

The present application provides a midpoint clamped three-level circuit and control method, by judging the polarity of the current modulation wave, when the modulation wave is in the positive half-wave and receives a trigger signal, the first switch tube, the third switch tube and the fourth switch tube are controlled to be turned off, and the second switch tube is controlled to maintain the current on state, wherein the second switch tube is turned off after a preset time and the inductor current is less than or equal to the current preset value; when the modulation wave is in the negative half-wave and receives a trigger signal, the first switch tube, the second switch tube and the fourth switch tube are controlled to be turned off, and the third switch tube is controlled to maintain the current on state, wherein the third switch tube is turned off after a preset time and the inductor current is less than or equal to the current preset value. The present application solves the problem of uneven voltage distribution of internal and external switch tubes after the midpoint clamped three-level circuit fails and is shut down, so that both the internal and external tubes can select switch tubes with lower withstand voltage values.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a mid-point clamped three-level circuit and a control method. Background Art

[0002] High-power multi-level inverters have been increasingly widely used in actual industrial production in recent years, and three-level inverters are one of the most widely used ones.

[0003] At present, the control of the midpoint clamped three-level inverter mostly only considers the control strategy of ensuring that the outer tube is turned off first and the inner tube is turned off later, and the difference in the turn-off time of the inner and outer tubes is generally a few microseconds. However, after the midpoint clamped three-level circuit is turned off, the inductor, capacitor, etc. in the circuit form a freewheeling oscillation, causing the voltage borne by the switch tube in the circuit to exceed the normal operating voltage, and even reach twice or more of the normal operating voltage. The existing solution is generally to replace the switch tube with a higher withstand voltage value. Therefore, the inner tube will generally choose a switch tube with a higher withstand voltage value than the outer tube to ensure that the inner tube will not be damaged due to uneven voltage division.

[0004] However, the prior art cannot solve the problem of uneven voltage distribution between the inner and outer tubes of the midpoint clamped three-level circuit after it is turned off. Summary of the invention

[0005] The present application provides a midpoint clamped three-level circuit and a control method to solve the problem of uneven distribution of maximum voltages of internal and external switch tubes during a freewheeling oscillation process after the midpoint clamped three-level circuit is turned off.

[0006] In a first aspect, the present application provides a control method for a midpoint clamped three-level circuit, the circuit comprising a first switch tube, a second switch tube, a third switch tube, and a fourth switch tube connected in series, wherein a midpoint of the second switch tube and the third switch tube is connected to an output end through an inductor; the method comprises:

[0007] Determine the polarity of the current modulation wave;

[0008] When the modulated wave is in a positive half-wave and a trigger signal is received, the first switch tube, the third switch tube and the fourth switch tube are controlled to be turned off, and the second switch tube is controlled to maintain the current on state, wherein the second switch tube is turned off when a preset time has passed and the inductor current is less than or equal to a preset current value;

[0009] When the modulated wave is in a negative half-wave and a trigger signal is received, the first switch tube, the second switch tube and the fourth switch tube are controlled to be turned off, and the third switch tube is controlled to maintain the current on state, wherein the third switch tube is turned off after a preset time and when the inductor current is less than or equal to a preset current value.

[0010] Optionally, the current preset value is set to zero.

[0011] Optionally, the preset time duration is calculated and set according to the output port voltage and the inductance value.

[0012] Optionally, the calculation formula for the preset duration is:

[0013] T delay =L*ΔI / V o

[0014] Where, T delay is the preset duration; ΔI is the difference between the instantaneous current at the moment of fault and the preset current value; V o is the instantaneous voltage at the output port; L is the inductance value.

[0015] Optionally, the preset duration is set to at least one switching cycle.

[0016] Optionally, the trigger signal is a current limiting CBC (cycle-by-cycle current limiting) signal or a fault protection signal.

[0017] Optionally, the control method further includes: implementing drive blocking of each switch tube by hardware or software.

[0018] Optionally, the first switch tube, the second switch tube, the third switch tube and the fourth switch tube are fully-controlled switches, and the fully-controlled switches include MOSFET, IGBT, SiC transistor and GaN transistor.

[0019] In a second aspect, the present application provides a midpoint clamped three-level circuit, comprising:

[0020] A first switch tube, a second switch tube, a third switch tube, and a fourth switch tube connected in series;

[0021] A first capacitor and a second capacitor, wherein the first end of the first switch tube is connected to the first end of the first capacitor, and the second end of the fourth switch tube is connected to the second end of the second capacitor;

[0022] a first diode and a second diode, wherein the cathode of the first diode is connected to the connection midpoint of the first switch tube and the second switch tube, the anode of the second diode is connected to the connection midpoint of the third switch tube and the fourth switch tube, and the anode of the first diode and the cathode of the second diode are connected to the connection midpoint of the first capacitor and the second capacitor;

[0023] An inductor, wherein a midpoint of the second switch tube and the third switch tube is connected to an output end through the inductor;

[0024] A controller, the controller is electrically connected to the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube to control the opening and closing of the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube; wherein,

[0025] The controller determines the polarity of the current modulation wave; and

[0026] When the controller determines that the modulated wave is in a positive half-wave and receives a trigger signal, the controller controls the first switch tube, the third switch tube, and the fourth switch tube to be turned off, and controls the second switch tube to maintain the current on state, wherein the controller turns off the second switch tube when a preset time has passed and the inductor current is less than or equal to a preset current value;

[0027] When the controller determines that the modulated wave is in the negative half-wave and receives a trigger signal, it controls the first switch tube, the second switch tube and the fourth switch tube to be turned off, and controls the third switch tube to maintain the current on state, wherein the controller turns off the third switch tube after a preset time and when the inductor current is less than or equal to a preset current value.

[0028] Optionally, the controller sets the current preset value to zero.

[0029] Optionally, the controller calculates and sets the preset time length according to the output port voltage and the inductance value.

[0030] Optionally, the calculation formula for the preset duration is:

[0031] T delay =L*ΔI / V o

[0032] Where, T delay is the preset duration; ΔI is the difference between the instantaneous current at the moment of fault and the preset current value; V o is the instantaneous voltage at the output port; L is the inductance value.

[0033] Optionally, the controller sets the preset duration to at least one switching cycle.

[0034] Optionally, the trigger signal is a current limiting CBC (cycle-by-cycle current limiting) signal or a fault protection signal.

[0035] Optionally, the controller is a digital controller or an analog controller, and the controller implements the drive blocking of each switch tube by hardware or software.

[0036] Optionally, the first switch tube, the second switch tube, the third switch tube and the fourth switch tube are fully-controlled switches, and the fully-controlled switches include MOSFET, IGBT, SiC transistor and GaN transistor.

[0037] The present application provides a midpoint clamped three-level circuit and control method, by judging the polarity of the current modulation wave, when the modulation wave is in the positive half-wave and receives a trigger signal, the first switch tube, the third switch tube and the fourth switch tube are controlled to be turned off, and the second switch tube is controlled to maintain the on state, wherein the second switch tube is turned off after a preset time and the inductor current is less than or equal to the current preset value; when the modulation wave is in the negative half-wave and receives a trigger signal, the first switch tube, the second switch tube and the fourth switch tube are controlled to be turned off, and the third switch tube is controlled to maintain the on state, wherein the third switch tube is turned off after a preset time and the inductor current is less than or equal to the current preset value. The solution provided by the present application solves the problem of uneven voltage distribution of internal and external switch tubes after the midpoint clamped three-level circuit fails and is shut down, so that both the internal and external tubes can select switch tubes with lower withstand voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the present application or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0039] Figure 1 A schematic diagram of a midpoint clamped three-level circuit according to an embodiment of the present application;

[0040] Figure 2a-2c This is a circuit analysis diagram of the output current of the midpoint clamped three-level circuit in the prior art participating in the resonance, resulting in uneven voltage division between the inner and outer tubes;

[0041] Figure 3 The waveform diagrams of voltage and current at various stages of the subsequent current oscillation after the midpoint clamped three-level circuit is fault-shutdown in the prior art;

[0042] Figure 4 A schematic diagram of the system structure of a midpoint clamped three-level circuit provided in an embodiment of the present application;

[0043] Figure 5 A schematic flow chart of a control method for a mid-point clamped three-level circuit provided in one embodiment of the present application;

[0044] Figure 6 A schematic diagram of a driving waveform of a mid-point clamped three-level circuit provided in an embodiment of the present application when it is working normally;

[0045] Figure 7 A schematic diagram of current freewheeling of a mid-point clamped three-level circuit provided in an embodiment of the present application when the modulation wave is in the positive half-wave after being shut down by a fault;

[0046] Figure 8 The voltage and current waveform diagrams of each stage of the follow-up oscillation of the mid-point clamped three-level circuit provided in an embodiment of the present application after fault shutdown;

[0047] Fig. 9 A schematic diagram of the structure of an electronic device provided in this application. DETAILED DESCRIPTION

[0048] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work, including but not limited to the combination of multiple embodiments, belong to the scope of protection of this application.

[0049] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0050] The midpoint clamped three-level circuit has been widely used in the field of power electronics. For example, it can be used as an inverter to convert DC power into AC power. Of course, in other embodiments, the midpoint clamped three-level circuit can also be used as a DC-DC converter to convert DC power into DC power. The present case is not limited to this. Figure 1 Schematic diagram of a midpoint clamped three-level circuit according to an embodiment of the present application. Figure 1As shown, the midpoint clamped three-level circuit includes a bridge arm circuit, which is divided into an upper bridge arm and a lower bridge arm, the upper bridge arm includes a first switch tube Q1 and a second switch tube Q2, and the lower bridge arm includes a third switch tube Q3 and a fourth switch tube Q4. It also includes a first capacitor Cbus1 and a second capacitor Cbus2, the first switch tube Q1 is connected to the first end of the first capacitor Cbus1, and the fourth switch tube Q4 is connected to the second end of the second capacitor Cbus2. Further, it also includes a first diode D1 and a second diode D2, the cathode of the first diode D1 is connected to the connection midpoint of the first switch tube Q1 and the second switch tube Q2, the anode of the second diode D2 is connected to the connection midpoint of the third switch tube Q3 and the fourth switch tube Q4, and the anode of the first diode D1 and the cathode of the second diode D2 are connected to the connection midpoint of the first capacitor Cbus1 and the second capacitor Cbus2, that is, the neutral point N. Among them, the first switch tube Q1 and the fourth switch tube Q4 are generally called outer tubes, and the second switch tube Q2 and the third switch tube Q3 are called inner tubes. The first capacitor Cbus1 and the second capacitor Cbus2 bear the DC bus voltage Vbus respectively. Generally, the neutral point N potential is defined as 0, that is, the zero potential point. The potential of the first end of the first capacitor Cbus1 is +Vbus, and the potential of the second end of the second capacitor Cbus2 is -Vbus, that is, the voltage of the upper and lower busbars of the entire circuit is 2Vbus. In some embodiments, the midpoint clamped three-level circuit can be used as an inverter, and the connection midpoint of the second switch tube Q2 and the third switch tube Q3 is connected to the power grid through the inductor L to realize the conversion of the DC power on the first and second capacitors into AC power.

[0051] It should be noted that in this case Figure 1 The midpoint clamped three-level circuit is used as a single-phase inverter. In other embodiments, it can also be used in a three-phase inverter, for example, including three Figure 1 The bridge arms shown in the figure have a midpoint connected to a phase of the power grid via an inductor. In other embodiments, Figure 1 The midpoint clamped three-level circuit shown in can also be used as a part of a DC converter.

[0052] When the inverter is working normally, the maximum voltage that each switch tube bears is Vbus, and it cannot withstand the voltage 2Vbus on the entire DC power bus. Generally, when the inverter stops working due to a fault, due to the differences in the parasitic parameters of the components in the hardware circuit, the actual shutdown time of the inner and outer tubes may be different. When the outer tube is turned off before the inner tube, due to the action of the clamping diode D1 or D2, the maximum withstand voltage of the outer tube Q1 or Q4 is Vbus, which is half of the DC power bus voltage. When the inner tube is turned off before the outer tube, the inner tube Q2 or Q3 may withstand the voltage of the entire power bus, that is, 2Vbus, which may cause damage to the switch tube. Therefore, when shutting down the inverter, it is necessary to ensure that the outer tube is turned off first and the inner tube is turned off later. Generally, the existing control technology is to control the inner tube to be turned off after the outer tube with a delay of up to a few microseconds.

[0053] However, even if the four switches Q1 to Q4 of the inverter are normally turned off in the above manner, after being turned off, due to the presence of the inductor L, the first capacitor Cbus1 and the second capacitor Cbus2 in the circuit, there will be a freewheeling oscillation process in the circuit, that is, the current of the inductor L will first gradually drop to zero, and then reverse, resonating with the parasitic capacitance of the four switches and the clamping diode. During this whole process, the voltage of the inner and outer tubes will be unevenly divided. In severe cases, the maximum voltage drop of the inner tube will exceed the withstand voltage of the inner tube, thereby damaging the inner tube.

[0054] Combine the following Figure 2a-2c and Figure 3 To illustrate how the voltage division of the inner and outer tubes is uneven after all the switch tubes are turned off in the prior art, the modulation wave at the output end of the single-phase bridge arm is greater than 0 as an example.

[0055] Figure 2a-2c This is a circuit analysis diagram of the output current of the midpoint clamped three-level circuit in the prior art participating in the resonance, resulting in uneven voltage division between the inner and outer tubes, wherein the components marked with dotted lines indicate that the components are in the off state at this stage. Figure 3 The voltage and current detection diagrams of each stage of the follow-up oscillation after the single-phase bridge arm is shut down provided in this application. Figure 2a As shown, when the modulation wave is greater than 0, the inverter needs to be shut down urgently due to a fault. After the controller controls all the switch tubes Q1 to Q4 to be turned off, that is, after the shutdown is completed according to the principle of shutting down the outer tube first and the inner tube later, the current of the inductor L (bridge arm output current) is continued through the anti-parallel diodes of the third switch tube Q3 and the fourth switch tube Q4 of the lower bridge arm, and the voltage of the parasitic capacitors C3 and C4 of the third switch tube Q3 and the fourth switch tube Q4 is zero. At this time, the voltage of the parasitic capacitor C6 of the second diode D2 is Vbus. Then the inductor current gradually decreases to zero. This process is called stage one, as shown in FIG. Figure 3In the stage 1 shown in FIG, after all the switch tubes are turned off, the inductor current 303 continues to decrease until it decreases to 0. This stage is stage 1.

[0056] like Figure 2b As shown, when the inductor current is reduced to zero, since the voltage at point a output by the bridge arm is -Vbus, and Vo is greater than zero, the inductor L is subjected to a reverse voltage, causing the inductor current to increase in the reverse direction, and the lower bridge arm no longer has current passing through the reverse-parallel diode. At this time, the inductor current reversely charges the parasitic capacitors C1 and C2 of the first switch tube Q1 and the second switch tube Q2 of the upper bridge arm, and the voltages of C1 and C2 begin to decrease from Vbus. At the same time, the inductor current charges the parasitic capacitors C3 and C4 of the third switch tube Q3 and the fourth switch tube Q4, and the voltages of C3 and C4 increase from zero relative to the second terminal potential -Vbus of the second capacitor Cbus2. At the same time, the current also flows through the parasitic capacitor C6 of the second diode D2, and the voltage of C6 decreases from Vbus (or, the anode potential of the second diode D2 increases from zero relative to the voltage of -Vbus). Since the current charging C4 and C6 will pass through C3, it is equivalent to connecting capacitors C4 and C6 in parallel and then in series with capacitor C3. Assuming that the parameters of C3 and C4 are the same, the voltage of C3 will be higher than that of C4, resulting in uneven voltage division between the inner and outer tubes. This stage is called stage 2. Figure 3 As shown, in stage 2, the voltage 301 of the switch tube Q3 and the voltage 302 of the switch tube Q4 rise rapidly due to reverse charging, and the voltage 301 of C3 will eventually reach about 400V, and the voltage 302 of C4 will eventually reach about 300V. It can be seen that the maximum voltage distribution of the two is very uneven. It should be noted that Figure 3 It is the voltage measured under certain actual conditions. Its purpose is to illustrate the problem of uneven distribution, rather than to limit the actual voltage value of Q3 and Q4.

[0057] Further, such as Figure 2c As shown, when capacitors C1 and C2 are reversely charged and the voltage drops to zero, the anti-parallel diodes of the first switch tube Q1 and the second switch tube Q2 are turned on, and the inductor current continues to flow through the upper bridge arm. This stage is called stage three. Figure 3 As shown, during the entire stage three process, the voltage 301 of the switch tube Q3 and the voltage 302 of the switch tube Q4 are basically maintained at the highest level, which is also the worst period of uneven distribution of the switch tubes. The voltage 301 of the inner tube Q3 is significantly higher than the voltage 302 of the outer tube Q4. In addition, the larger the capacitance C6 of the clamping diode D2, or the higher the bus voltage, the greater the difference between the inner and outer tubes, and the higher the risk of overvoltage damage to the inner tube.

[0058] The existing processing method generally selects a switch tube with a higher withstand voltage as the inner tube, so that the inner tube will not be damaged by overvoltage due to uneven voltage distribution. However, the inner tube selected by this method is more expensive, that is, the cost performance is not as good as the inner tube with a low withstand voltage, which makes the cost of the inverter higher, and this processing method does not solve the problem of uneven voltage distribution from the root.

[0059] After deeply analyzing the problem of uneven voltage division between the inner and outer tubes in stage three, the present application creatively proposes to change the circuit direction of the freewheeling current by turning off the switch tube without changing the original circuit structure or replacing the switch tube with a higher withstand voltage value for the inner tube, thereby achieving the purpose of even voltage division between the inner and outer tubes. This will be described below in conjunction with specific embodiments.

[0060] Figure 4 Schematic diagram of the system structure of the midpoint clamped three-level circuit provided in the embodiment of the present application. Figure 4 As shown, it includes a controller 41 and a mid-point clamping three-level circuit 42.

[0061] The midpoint clamp three-level circuit 42 and Figure 1 The same, specifically includes: a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, and a fourth switch tube Q4 connected in series; a first capacitor Cbus1 and a second capacitor Cbus2, the first end of the first switch tube Q1 is connected to the first end of the first capacitor Cbus1, and the second end of the fourth switch tube Q4 is connected to the second end of the second capacitor Cbus2; a first diode D1 and a second diode D2, the cathode of the first diode D1 is connected to the connection midpoint of the first switch tube Q1 and the second switch tube Q2, the anode of the second diode D2 is connected to the connection midpoint of the third switch tube Q3 and the fourth switch tube Q4, and the anode of the first diode D1 and the cathode of the second diode D2 are connected to the connection midpoint of the first capacitor Cbus1 and the second capacitor Cbus2; an inductor L, the midpoint of the second switch tube Q2 and the third switch tube Q3 is connected to the power grid through the inductor L; a controller 41, the controller 41 is connected to the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, and the fourth switch tube Q4, and controls them to be turned on and off.

[0062] In some embodiments, when a fault occurs, the controller 41 determines the polarity of the current modulation wave; and when the controller 41 determines that the modulation wave is in the positive half-wave and receives a trigger signal, the first switch tube Q1, the third switch tube Q3 and the fourth switch tube Q4 are controlled to be turned off, and the second switch tube Q2 is controlled to maintain the current on state, wherein the controller turns off the second switch tube Q2 after a preset time and the inductor current is less than a preset current value; when the controller 41 determines that the modulation wave is in the negative half-wave and receives a trigger signal, the first switch tube Q1, the second switch tube Q2 and the fourth switch tube Q4 are controlled to be turned off, and the third switch tube Q3 is controlled to maintain the current on state, wherein the controller 41 turns off the third switch tube Q3 after a preset time and the inductor current is less than a preset current value.

[0063] It should be noted that the number of the midpoint clamped three-level circuits 42 may also be multiple. For example, three bridge arm structures correspond to three-phase alternating current. Those skilled in the art may select the number of bridge arm structures 42 according to actual conditions, and the present application does not limit the number of bridge arm structures 42.

[0064] Optionally, the first switch tube Q1, the second switch tube Q2, the third switch tube Q3 and the fourth switch tube Q4 can be, for example, MOSFET tubes, IGBT tubes, SiC transistors, GaN transistors or other fully controlled switches. Or they can be equivalent switch tubes formed by connecting multiple power switch tubes in parallel, such as Q1 is formed by connecting two MOSFET tubes in parallel. Parallel switch tubes can reduce the current of a single switch tube, so that a switch tube with a smaller current resistance value can be selected to reduce costs.

[0065] In a possible design, the controller may be a digital controller or an analog controller, and the controller implements the drive blocking of each switch tube by hardware or software. For example, the controller is a DSP (Digital Signal Processing), and the DSP implements the drive blocking of each switch tube by trip zone (programmable control fault zone).

[0066] Figure 5 FIG. 4 is a flow chart of a control method for a midpoint clamped three-level circuit provided in an embodiment of the present application. The controller 41 is capable of executing Figure 5 The control method of the midpoint clamped three-level circuit is shown in FIG. Figure 5 As shown, the specific steps of the method include:

[0067] S501, determine the polarity of the current modulation wave.

[0068] In this step, the controller detects whether the modulation wave is in the positive half cycle or the negative half cycle of the sine wave, because in the control strategy of the midpoint clamped three-level inverter, such as the SVPWM (Space Vector Pulse Width Modulation) control algorithm, it is necessary to Figure 4 The four switch tubes Q1 to Q4 shown adopt different control timing states to obtain an AC sine wave.

[0069] Figure 6 Schematic diagram of a driving scheme of a midpoint clamped three-level inverter provided in an embodiment of the present application. Figure 6 As shown, the right side is the PWM wave corresponding to the four switching tubes, and the gray background part is the working state of the four switching tubes when the modulation wave 61 is in the positive half cycle, that is, in this period, the first switching tube Q1 and the third switching tube Q3 are complementarily turned on, the second switching tube Q2 is always turned on, and the fourth switching tube Q4 is always turned off; correspondingly, when the modulation wave 61 is in the negative half cycle, Q2 and Q4 are complementarily turned on, Q3 is always turned on, and Q1 is always turned off.

[0070] Therefore, when it is determined that a fault has occurred, the controller must first identify the polarity of the modulation wave 61 to determine the next control object.

[0071] S5021. When the modulated wave is in the positive half-wave and a trigger signal is received, the first switch tube Q1, the third switch tube Q3 and the fourth switch tube Q4 are controlled to be turned off, and the second switch tube Q2 is controlled to maintain the current on state.

[0072] In this step, when the controller receives the trigger signal, if the controller detects that the modulation wave is in the positive half-wave, that is, the modulation wave is positive, the switch tubes Q1, Q3 and Q4 are immediately turned off, but Q2 remains on.

[0073] It should be noted that the trigger signal may include: a current limiting CBC (Cycle-by-Cycle current limiting) signal or other fault protection signals. In some embodiments, when the controller receives a fault protection signal, after executing the control method of the embodiment of the present application, the inverter will no longer be immediately restored to a normal working state; however, when the controller receives a current limiting CBC signal, when executing the control method of the embodiment of the present application, when the output current drops to a preset current limiting value, the inverter can be restored to a normal working state.

[0074] Specifically, taking the controller as DSP as an example, the DSP controller generates a modulation wave Vr, which is converted into a driving signal of the switch tube through PWM modulation, and the drive blocking of each switch tube or the on and off of each switch tube is realized by configuring the trip zone (programmable control fault zone) of the DSP. After the DSP controller receives the trigger signal, i.e., the fault protection signal or the current limiting CBC signal, the DSP controller turns off Q1, Q3 and Q4 by configuring the trip zone (programmable control fault zone), while maintaining the on state of Q2.

[0075] It should be noted that the modulation wave signal can be a voltage signal or a current signal, or even other types of signals, and this case does not limit this. For example, the inverter includes a VSI (voltage source inverter) voltage-type inverter and a CSI (current source inverter) current-type inverter. Different inverters may have slightly different modulation wave signals, but they are all included in the protection scope of the present invention. The modulation wave signal in the present invention is only an example, and the protection scope of the present invention is not limited to this. Any technician familiar with the technical field can easily change or replace it within the technical scope disclosed in the present invention, and it should be covered in the protection scope of the present invention. For example, since the modulation wave is basically consistent with the grid voltage phase, in some embodiments, it can even be controlled by judging the positive and negative of the grid voltage.

[0076] S503 , when a preset time period has passed and the inductor current is less than or equal to a preset current value, turn off the second switch tube Q2 .

[0077] In this step, the controller turns off the second switch tube Q2 after a preset period of time, and at this time the current of the inductor L is less than or equal to a preset current value. Optionally, the preset current value may be zero.

[0078] In one possible design, the controller can o And the inductance value L is calculated to set the preset time.

[0079] Optionally, the preset time length can be calculated based on the differential relationship between the voltage and current of the inductor L. The voltage V L It can be expressed by formula (1), which is as follows:

[0080]

[0081] Wherein, L is the inductance value of the inductor.

[0082] The inductor current changes from the moment the controller receives the trigger signal to the moment the inductor current changes to the preset current value, for example, the preset current value is 0. Since the second switch tube Q2 remains on, the inductor current freewheeling loop passes through Q2, and the level of point a where the inductor is connected to the bridge arm is 0, that is, the potential of point N, and the output voltage V o , for example, the grid voltage can be expressed by formula (2), which is as follows:

[0083] V o =V ac sinωt (2)

[0084] Among them, V ac is the maximum value of the grid voltage.

[0085] Assuming that the inductance value L is constant, the change of the power grid in a short period of time can be ignored, that is, the voltage is considered constant. Then, by combining formula (1) and formula (2), we can get the preset time length T delay It can be expressed by formula (3), which is as follows:

[0086] T delay =L*ΔI / V o (3)

[0087] Among them, T delay is the preset duration; ΔI is the difference between the instantaneous current at the moment of fault and the preset current value; V o is the instantaneous voltage at the output port; L is the inductance value.

[0088] Specifically, for example, after the DSP controller calculates the preset time length using formula (3), it starts the timer. When the timer reaches the preset time length, it turns off the second switch tube Q2 by setting a trip zone (programmable control fault zone).

[0089] Further optionally, the preset duration can also be set to a fixed value. The time for the inductor current to drop to the preset current value under actual testing of various working conditions can be used to calculate the maximum value, and use this as the preset duration. In some embodiments, for example, the switching cycle of the circuit is set to 50us. If the inductor current can drop to the preset current value within a 50us switching cycle, the preset duration can be set to 50us. This can save the controller's computing time and computing resources, and facilitate the fast and efficient realization of the internal and external switch tube voltage control. In other embodiments, the preset duration can be set to a switching cycle or longer.

[0090] S5022: When the modulated wave is in the negative half-wave and a trigger signal is received, the first switch tube Q1, the second switch tube Q2 and the fourth switch tube Q4 are controlled to be turned off, and the third switch tube Q3 is controlled to maintain the current on state.

[0091] S504 , when a preset time period has passed and the inductor current is less than or equal to a preset current value, turn off the third switch tube Q3 .

[0092] S5022~S504 are the control methods of the modulation wave in the negative half-wave corresponding to S5021~S503. The principles and terminology are similar to those of S5021~S503 and will not be repeated here.

[0093] This embodiment provides a midpoint clamped three-level circuit and control method, by judging the polarity of the current modulation wave, when the modulation wave is in the positive half-wave and receives a trigger signal, the first switch tube, the third switch tube and the fourth switch tube are controlled to be turned off, and the second switch tube is controlled to maintain the current on state, wherein the second switch tube is turned off after a preset time and the inductor current is less than the current preset value; when the modulation wave is in the negative half-wave and receives a trigger signal, the first switch tube, the second switch tube and the fourth switch tube are controlled to be turned off, and the third switch tube is controlled to maintain the current on state, wherein the third switch tube is turned off after a preset time and the inductor current is less than the current preset value. The problem of uneven maximum voltage distribution of the internal and external switch tubes after the midpoint clamped three-level inverter is turned off is solved. The internal and external tubes can use switch tubes with the same lower withstand voltage value, reducing costs and improving the technical effect of cost performance.

[0094] In order to illustrate the principle of the control method of the present application for equally dividing the voltage between the inner and outer tubes in the freewheeling oscillation stage after the midpoint clamped three-level circuit 42 is shut down due to a fault, the following is combined with Figure 7 and Figure 8 Provide detailed explanation.

[0095] Figure 7 A schematic diagram of the freewheeling of the modulation wave in the positive half-wave of the midpoint clamped three-level circuit provided in an embodiment of the present application after the fault shutdown. Figure 7 As shown, the Figure 5 After the control method shown in the figure, the direction of the inductor current changes. Specifically, when the modulation wave is greater than zero, according to Figure 6 In the driving scheme of the midpoint clamp circuit shown in the figure, the switch tubes Q1 and Q3 are turned on complementary, Q2 is turned on, and Q4 is turned off. Figure 5In the control method shown, if the modulation wave is greater than zero, when the trigger signal is received, the PWM signals of the switch tubes Q1 and Q3 are configured to be turned off, and Q2 and Q4 are not processed, because Q4 is originally turned off at this time, and Q2 is originally turned on. Therefore, when a fault occurs, that is, when the controller receives the trigger signal, for the two switch tubes in the upper bridge arm, the outer tube Q1 is immediately turned off, and Q2 remains on. For the two switch tubes in the lower bridge arm, the inner tube Q3 is immediately turned off, and the outer tube Q4 is originally in the off state. Therefore, the state of the inner tube being turned off and the outer tube being turned on will not occur, that is, the switch tube in the first moment of the fault will not be in a state where a single tube bears the entire bus voltage due to timing problems. As Figure 7 As shown, after a fault or current limiting occurs, that is, after the controller receives a trigger signal, only one inner tube is turned on, that is, Q2 is turned on, and the other switch tubes are turned off. In the embodiment of the present application, the inductor current no longer flows through the lower bridge arm, but flows through the switch tube Q2. Then, the potential of the bridge arm point a is clamped to zero instead of Figure 2b In the -Vbus. Figure 7 In the figure, capacitors C6 and C3 are connected in parallel and then divided with C4, that is, Vc6 = Vc3, Vc3 + Vc4 = Vbus. Generally speaking, the capacitance of C6 / / C3 is greater than that of C4, so the voltage of C4 is greater than that of C3. When the follow-up current gradually decreases to zero after a period of time, and reversely charges C3, C4, and C6, since the starting voltage of C4 is greater than that of C3, the voltage of C4 will reach Vbus first, and then the clamping diode D2 will be turned on, and the voltage of C4 will be clamped at Vbus. When the current continues to flow through the upper bridge arm, the voltages of C3 and C4 are equal.

[0096] Figure 8 This is a voltage and current detection diagram of each stage of the follow-up oscillation after the midpoint clamped three-level circuit is fault-shutdown provided in an embodiment of the present application. Figure 8 As shown in the figure, the process of the inductor current 803 dropping to 0 lasts for about 32 microseconds. During this process, the switch tube Q2 is always on. However, the prior art ensures that after the internal tube is turned off, Q2 is generally turned off after a delay of only a few microseconds. Since Q2 is always on in this case, Figure 7 The C6 and C3 in the figure are connected in parallel, and then connected in series with C4 to divide the voltage. In this way, at the beginning of the freewheeling, according to Figure 7 From the circuit analysis, we can know that the voltage 802 of C4 and the voltage 801 of C3 are not zero at the initial time, but there is a certain difference, such as Figure 8The starting value of the voltage 802 of C4 is shown to be about 240V, while the starting value of the voltage 801 of C3 is about 110V. However, due to the effect of the clamping diode, the voltage 801 of C3 and the voltage 802 of C4 are finally stabilized at about 350V, which greatly reduces the problem of uneven distribution between the two compared to the prior art. In this way, both the inner tube and the outer tube can use switching tubes with lower withstand voltage values, thereby reducing the cost of the midpoint clamped three-level circuit and improving the cost performance of the inner tube. In addition, the control method of the present application does not change the circuit topology structure, and only needs to add the control method described in the present application to the control logic of the controller.

[0097] Fig. 9 This is a schematic diagram of the structure of an electronic device provided in this application. Fig. 9 As shown, the electronic device 900 may include:

[0098] At least one processor 901 and a memory 902 . Fig. 9 An electronic device is shown using a processor as an example.

[0099] The memory 902 is used to store programs. Specifically, the programs may include program codes, and the program codes include computer operation instructions.

[0100] The memory 902 may include a high-speed RAM memory, and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory.

[0101] The processor 901 is used to execute the computer-executable instructions stored in the memory 902 to implement the methods described in the above method embodiments.

[0102] The processor 901 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.

[0103] Optionally, the memory 902 can be independent or integrated with the processor 901. When the memory 902 is a device independent of the processor 901, the electronic device 900 may further include: a bus 903 for connecting the processor 901 and the memory 902. The bus may be an industry standard architecture (ISA) bus, a peripheral component interconnect (PCI) bus, or an extended industry standard architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, etc., but it does not mean that there is only one bus or one type of bus.

[0104] Optionally, in a specific implementation, if the memory 902 and the processor 901 are integrated on a chip, the memory 902 and the processor 901 can communicate through an internal interface.

[0105] The present application also provides a computer-readable storage medium, which may include: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, and other media that can store program codes. Specifically, the computer-readable storage medium stores program instructions, and the program instructions are used for the methods in the above-mentioned embodiments.

[0106] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A control method for a midpoint clamped three-level circuit, characterized in that: The circuit comprises a first switch tube, a second switch tube, a third switch tube, and a fourth switch tube connected in series, wherein the midpoint of the second switch tube and the third switch tube is connected to the output end through an inductor; the method comprises: Determine the polarity of the current modulation wave; When the modulated wave is in a positive half-wave and a trigger signal is received, the first switch tube, the third switch tube and the fourth switch tube are controlled to be turned off, and the second switch tube is controlled to maintain the current on state, wherein the second switch tube is turned off when a preset time has passed and the inductor current is less than or equal to a preset current value; When the modulated wave is in a negative half-wave and a trigger signal is received, the first switch tube, the second switch tube and the fourth switch tube are controlled to be turned off, and the third switch tube is controlled to maintain the current on state, wherein the third switch tube is turned off after a preset time and when the inductor current is less than or equal to a preset current value.

2. The control method according to claim 1, characterized in that: The current preset value is set to zero.

3. The control method according to claim 1, characterized in that: The preset time length is calculated and set according to the output port voltage and the inductance value.

4. The control method according to claim 3, characterized in that: The calculation formula of the preset duration is: T delay =L*ΔI / V o Where, T delay The preset duration; ΔI is the difference between the instantaneous current at the moment of fault and the preset current value; V o is the instantaneous voltage at the output port; L is the inductance value.

5. The control method according to claim 1, characterized in that: The preset duration is set to at least one switching cycle.

6. The control method according to claim 1, characterized in that: The trigger signal is a current limiting CBC (cycle-by-cycle current limiting) signal or a fault protection signal.

7. The control method according to claim 1, characterized in that: Also includes: The drive blocking of each switch tube is realized by hardware or software.

8. The control method according to claim 7, characterized in that: The first switch tube, the second switch tube, the third switch tube and the fourth switch tube are fully controlled switches, and the fully controlled switches include MOSFET, IGBT, SiC transistor and GaN transistor.

9. A midpoint clamped three-level circuit, characterized in that: include: A first switch tube, a second switch tube, a third switch tube, and a fourth switch tube connected in series; A first capacitor and a second capacitor, wherein the first end of the first switch tube is connected to the first end of the first capacitor, and the second end of the fourth switch tube is connected to the second end of the second capacitor; a first diode and a second diode, wherein the cathode of the first diode is connected to the connection midpoint of the first switch tube and the second switch tube, the anode of the second diode is connected to the connection midpoint of the third switch tube and the fourth switch tube, and the anode of the first diode and the cathode of the second diode are connected to the connection midpoint of the first capacitor and the second capacitor; An inductor, wherein a midpoint of the second switch tube and the third switch tube is connected to an output end through the inductor; A controller, the controller is electrically connected to the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube to control the opening and closing of the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube; wherein, The controller determines the polarity of the current modulation wave; and When the controller determines that the modulated wave is in a positive half-wave and receives a trigger signal, the controller controls the first switch tube, the third switch tube, and the fourth switch tube to be turned off, and controls the second switch tube to maintain the current on state, wherein the controller turns off the second switch tube when a preset time has passed and the inductor current is less than or equal to a preset current value; When the controller determines that the modulated wave is in the negative half-wave and receives a trigger signal, it controls the first switch tube, the second switch tube and the fourth switch tube to be turned off, and controls the third switch tube to maintain the current on state, wherein the controller turns off the third switch tube after a preset time and when the inductor current is less than or equal to a preset current value.

10. The circuit according to claim 9, characterized in that The controller sets the current preset value to zero.

11. The circuit according to claim 9, characterized in that The controller calculates and sets the preset time length according to the output port voltage and the inductance value.

12. The circuit according to claim 11, characterized in that The calculation formula of the preset duration is: T delay =L*ΔI / V o Where, T delay The preset duration; ΔI is the difference between the instantaneous current at the moment of fault and the preset current value; V o is the instantaneous voltage at the output port; L is the inductance value.

13. The circuit according to claim 9, characterized in that The controller sets the preset time length to at least one switching cycle.

14. The circuit according to claim 9, characterized in that The trigger signal is a current limiting CBC (cycle-by-cycle current limiting) signal or a fault protection signal.

15. The circuit according to claim 9, characterized in that The controller is a digital controller or an analog controller, and the controller implements the drive blocking of each switch tube by hardware or software.

16. The circuit according to claim 9, characterized in that The first switch tube, the second switch tube, the third switch tube and the fourth switch tube are fully controlled switches, and the fully controlled switches include MOSFET, IGBT, SiC transistor and GaN transistor.

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