Signal decoding method, apparatus, and electronic device

Abstract

The embodiment of the present application provides a signal decoding method, device and electronic equipment, when signal decoding is performed, a first coherent integration corresponding to a first branch of a pilot component in a to-be-tracked signal and a second coherent integration corresponding to a second branch of the to-be-tracked signal, and a third coherent integration corresponding to the first branch of a data component in the to-be-tracked signal and a fourth coherent integration corresponding to the second branch of the to-be-tracked signal can be acquired respectively; and according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, a navigation message is determined from the data component to decode the data component, avoiding the dependence on a previous coherent accumulation result and a previous decoding result, so that even if a previous decoding error of the navigation message, the whole bit stream will not be reversed, thereby effectively improving the accuracy of the decoding result.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data processing, and particularly relates to a signal decoding method and device and electronic equipment. BACKGROUND

[0002] In a global navigation satellite system (GNSS) signal, part of the signal is a double-component signal, and the double component includes a data component and a pilot component. The data component includes navigation messages, and the pilot component does not include navigation messages.

[0003] The process of stripping the navigation messages from the data component in the double-component signal can be recorded as signal decoding. Signal decoding plays a crucial role in many signal scenarios, such as signal tracking scenarios, navigation positioning scenarios, and the like. Therefore, how to decode the data component in the double-component signal is a problem to be solved by those skilled in the art. SUMMARY

[0004] Embodiments of the present application provide a signal decoding method, device and electronic equipment, which realize decoding of the data component in the double-component signal and improve the accuracy of the decoding result.

[0005] In a first aspect, the embodiments of the present application provide a signal decoding method, which can include:

[0006] Respectively acquiring a first coherent integration corresponding to a first branch of a pilot component in a to-be-tracked signal and a second coherent integration corresponding to a second branch of the pilot component, and a third coherent integration corresponding to a first branch of a data component in the to-be-tracked signal and a fourth coherent integration corresponding to a second branch of the data component.

[0007] According to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, a navigation message is determined from the data component to decode the data component.

[0008] In a possible implementation manner, the determining of the navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration includes:

[0009] A first product between the first coherent integration and the third coherent integration is determined, and a second product between the second coherent integration and the fourth coherent integration is determined.

[0010] According to the first product and the second product, the navigation message is determined from the data component.

[0011] In a possible implementation, the determining the navigation message from the data component according to the first product and the second product comprises:

[0012] determining the navigation message from the data component according to a sum of the first product and the second product.

[0013] In a possible implementation, the determining the navigation message from the data component according to the sum of the first product and the second product comprises:

[0014] if the sum is greater than or equal to 0, determining a 0 bit in the data component as the navigation message; or if the sum is less than 0, determining a 1 bit in the data component as the navigation message.

[0015] In a possible implementation, the determining the navigation message from the data component according to the first product and the second product comprises:

[0016] determining a first sum of the first coherent integration and the third coherent integration, and a first difference of the first coherent integration and the third coherent integration.

[0017] determining a second sum of the second coherent integration and the fourth coherent integration, and a second difference of the second coherent integration and the fourth coherent integration.

[0018] determining the navigation message from the data component according to the first sum, the first difference, the second sum and the second difference.

[0019] In a possible implementation, the determining the navigation message from the data component according to the first sum, the first difference, the second sum and the second difference comprises:

[0020] respectively determining absolute values corresponding to the first sum, the first difference, the second sum and the second difference, to obtain a first absolute sum, a first absolute difference, a second absolute sum and a second absolute difference.

[0021] determining a difference between a sum of the first absolute value and the second absolute value and a sum of the first absolute difference and the second absolute difference.

[0022] determining the navigation message from the data component according to the difference.

[0023] In a possible implementation, the determining the navigation message from the data component according to the difference comprises:

[0024] if the difference value is greater than or equal to 0, determining a 0 bit in the data component as the navigation message;

[0025] if the difference value is less than 0, determining a 1 bit in the data component as the navigation message.

[0026] In a possible implementation, the determining the navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration comprises:

[0027] determining a first arctangent function of the first coherent integration and the second coherent integration, and a second arctangent function of the third coherent integration and the fourth coherent integration.

[0028] determining the navigation message from the data component according to the first arctangent function and the second arctangent function.

[0029] In a possible implementation, the determining the navigation message from the data component according to the first arctangent function and the second arctangent function comprises:

[0030] determining a first value based on the first arctangent function, and determining a second value based on the second arctangent function.

[0031] performing a modulo operation on a difference value of the first value and the second value and a preset value to obtain an operation value.

[0032] determining the navigation message from the data component according to the operation value.

[0033] In a possible implementation, the signal decoding method further comprises:

[0034] determining a target data component in the data component other than the navigation message.

[0035] obtaining a fifth coherent integration corresponding to a first branch and a sixth coherent integration corresponding to a second branch corresponding to the target data component.

[0036] performing loop tracking according to the first coherent integration, the second coherent integration, the fifth coherent integration and the sixth coherent integration.

[0037] In a possible implementation, the performing loop tracking according to the first coherent integration, the second coherent integration, the fifth coherent integration and the sixth coherent integration comprises:

[0038] determining a first non-coherent accumulation result of the first coherent accumulation result and the second coherent accumulation result.

[0039] determining a first non-coherent accumulation result of the first coherent accumulation result and the second coherent accumulation result.

[0040] performing loop tracking according to the non-coherent accumulation result.

[0041] In a second aspect, an embodiment of the present application further provides a signal decoding apparatus, which can include:

[0042] an obtaining unit, configured to respectively obtain a first coherent integration corresponding to a first branch of a pilot component in a to-be-tracked signal and a second coherent integration corresponding to a second branch of the pilot component, and a third coherent integration corresponding to the first branch of a data component in the to-be-tracked signal and a fourth coherent integration corresponding to the second branch of the data component.

[0043] a processing unit, configured to determine a navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, so as to decode the data component.

[0044] In a possible implementation manner, the processing unit includes a first processing module and a second processing module.

[0045] The first processing module is configured to determine a first product between the first coherent integration and the third coherent integration, and determine a second product between the second coherent integration and the fourth coherent integration.

[0046] The second processing module is configured to determine the navigation message from the data component according to the first product and the second product.

[0047] In a possible implementation manner, the second processing module is specifically configured to determine the navigation message from the data component according to a sum of the first product and the second product.

[0048] In a possible implementation manner, the second module unit is specifically configured to determine a 0 bit in the data component as the navigation message if the sum is greater than or equal to 0, and determine a 1 bit in the data component as the navigation message if the sum is less than 0.

[0049] In a possible implementation manner, the processing unit further includes a third processing module, a fourth processing module and a fifth processing module.

[0050] The third processing module is configured to determine a first sum of the first coherent integration and the third coherent integration, and a first difference between the first coherent integration and the third coherent integration.

[0051] The fourth processing module is configured to determine a second sum of the second coherent integration and the fourth coherent integration, and a second difference between the second coherent integration and the fourth coherent integration.

[0052] The fifth processing module is configured to determine the navigation message from the data component according to the first sum, the first difference, the second sum and the second difference.

[0053] In a possible implementation, the fifth processing module is specifically configured to determine an absolute value of each of the first sum, the first difference, the second sum and the second difference respectively, to obtain a first absolute value sum, a first absolute value difference, a second absolute value sum and a second absolute value difference; determine a difference between a sum of the first absolute value and the second absolute value and a sum of the first absolute value difference and the second absolute value difference; and determine the navigation message from the data component according to the difference.

[0054] In a possible implementation, the fifth processing module is specifically configured to determine a 0 bit in the data component as the navigation message if the difference is greater than or equal to 0, or determine a 1 bit in the data component as the navigation message if the difference is less than 0.

[0055] In a possible implementation, the processing unit further includes a sixth processing module and a seventh processing module.

[0056] The sixth processing module is configured to determine a first arctangent function of the first coherent integration and the second coherent integration, and a second arctangent function of the third coherent integration and the fourth coherent integration.

[0057] The seventh processing module is configured to determine the navigation message from the data component according to the first arctangent function and the second arctangent function.

[0058] In a possible implementation, the seventh processing module is specifically configured to determine a first value based on the first arctangent function, and determine a second value based on the second arctangent function; perform a modulo operation on a difference between the first value and the second value and a preset value to obtain an operation value; and determine the navigation message from the data component according to the operation value.

[0059] In a possible implementation, the apparatus further includes a determination unit and a tracking unit.

[0060] The determining unit is configured to determine a target data component in the data components other than the navigation message.

[0061] The acquisition unit is further configured to acquire a fifth coherent integration corresponding to a first branch and a sixth coherent integration corresponding to a second branch of the target data component.

[0062] The tracking unit is configured to perform loop tracking according to the first coherent integration, the second coherent integration, the fifth coherent integration, and the sixth coherent integration.

[0063] In a possible implementation, the tracking unit includes a first tracking module, a second tracking module, and a third tracking module.

[0064] The first tracking module is configured to determine a first coherent accumulation result of the first coherent integration and the fifth coherent integration, and determine a second coherent accumulation result of the second coherent integration and the sixth coherent integration.

[0065] The second tracking module is configured to determine a non-coherent accumulation result of the first coherent accumulation result and the second coherent accumulation result.

[0066] The third tracking module is configured to perform loop tracking according to the non-coherent accumulation result.

[0067] In a third aspect, an embodiment of the present application further provides a chip, which can include a memory and a processor.

[0068] The memory is configured to store a computer program.

[0069] The processor is configured to implement the signal decoding method according to any possible implementation manner of the first aspect when the computer program is executed.

[0070] In a fourth aspect, an embodiment of the present application further provides a chip module, which can include a memory and a processor.

[0071] The memory is configured to store a computer program.

[0072] The processor is configured to implement the signal decoding method according to any possible implementation manner of the first aspect when the computer program is executed.

[0073] In a fifth aspect, an embodiment of the present application further provides an electronic device, including a processor and a memory.

[0074] The memory is configured to store a computer program.

[0075] The processor is configured to read the computer program stored in the memory and execute the signal decoding method according to the computer program in the memory.

[0076] In a sixth aspect, the embodiments of the present application further provide a computer readable storage medium, which stores computer execution instructions, and when a processor executes the computer execution instructions, the signal decoding method according to any possible implementation manner of the first aspect is implemented.

[0077] In a seventh aspect, the embodiments of the present application further provide a computer program product, which comprises a computer program, and when the computer program is executed by a processor, the signal decoding method according to any possible implementation manner of the first aspect is implemented.

[0078] Therefore, the signal decoding method, the device and the electronic equipment provided by the embodiments of the present application can respectively acquire the first coherent integration corresponding to the first branch of the pilot component and the second coherent integration corresponding to the second branch of the pilot component in the to-be-tracked signal, and the third coherent integration corresponding to the first branch of the data component and the fourth coherent integration corresponding to the second branch of the data component in the to-be-tracked signal, and determine the navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, so as to decode the data component, avoid the dependence on the previous coherent accumulation result and the previous decoding result, so that even if the previous decoding error of the navigation message, the whole bit stream will not be reversed, thereby effectively improving the accuracy of the decoding result. BRIEF DESCRIPTION OF DRAWINGS

[0079] Figure 1 A flowchart of a signal decoding method provided by the embodiments of the present application is shown in the figure;

[0080] Figure 2 A frame diagram of a signal decoding method provided by the embodiments of the present application is shown in the figure;

[0081] Figure 3 A diagram showing a 90-degree phase difference between a pilot component and a data component provided by the embodiments of the present application is shown in the figure;

[0082] Figure 4 A diagram showing a pilot component and a data component provided by the embodiments of the present application is shown in the figure;

[0083] Figure 5 Another diagram showing a pilot component and a data component provided by the embodiments of the present application is shown in the figure;

[0084] Figure 6 A flowchart of a method for loop tracking based on decoding combination provided by the embodiments of the present application is shown in the figure;

[0085] Figure 7 A framework diagram for loop tracking based on joint decoding results is provided for an embodiment of the present application.

[0086] Figure 8 A structural diagram of a signal decoding device is provided for an embodiment of the present application.

[0087] Figure 9 A structural diagram of an electronic device is provided for an embodiment of the present application.

[0088] The specific embodiments of the present disclosure have been shown through the above-described drawings, and will be described in more detail hereinafter. These drawings and the written description are not intended to restrict the scope of the present disclosure by any means, but to illustrate the concept of the present disclosure to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0089] The exemplary embodiments will be described in detail herein with reference to the attached drawings. In the following description, the same numbers are used to indicate the same elements throughout the several views. The following exemplary embodiments are described with reference to the figures. The embodiments described herein are merely examples in accordance with aspects of the present disclosure as detailed in the appended claims.

[0090] In the embodiments of the present application, "at least one" means one or more, and "multiple" means two or more. The association relationship of "and / or" between the associated objects indicates that there can be three relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. In the textual description of the present application, the character " / " generally represents an "or" relationship between the associated objects before and after it.

[0091] The technical solutions provided by the embodiments of the present application can be applied to the joint tracking scenario of GNSS signals of data components and pilot components. It can be used in GNSS-related chips, chip modules, and GNSS receiver terminals, as well as GNSS software receivers. Generally, when tracking a two-component signal, the pilot component and the data component in the two-component signal are first captured, and data decoding is performed after stripping the pseudo code and the secondary code. At present, the Frequency Lock Loop (FLL) loop decoding algorithm is mainly used to decode the data component in the two-component signal. GNSS belongs to a code division multiple access system. The underlying pseudo code realizes spread spectrum and code division multiple access, the secondary code modulated on the pseudo code period can be used for bit synchronization, and the navigation text modulated on the secondary code period.

[0092] The decoding process includes: under the FLL loop, the carrier phase is not locked, and the signal energy is usually distributed on the I branch and the Q branch, but when decoding the data component in the double-component signal, the previous coherent accumulation result of the data component on the I branch, the previous coherent accumulation result of the data component on the Q branch, the current coherent accumulation result of the data component on the I branch and the current coherent accumulation result of the data component on the Q branch are obtained; and the dot product between the four coherent accumulation results is determined, which can be seen from the following formula 1, and then whether the sign inversion occurs is judged according to the sign of the dot product to decode the data component. Wherein, the accumulation time length of the coherent accumulation result is the same as the time length of the navigation text bit, and the secondary code has been stripped.

[0093] Dot = CurI * PreI + CurQ * PreQ Formula 1

[0094] Wherein, Dot represents the dot product between the previous coherent accumulation result and the current coherent accumulation result, if Dot>0, the current decoding result CurBit is the same as the previous decoding result PreBit, otherwise, CurBit = 1-PreBit, the values of CurBit and PreBit are 0 or 1, CurI represents the current coherent accumulation result of the data component on the I branch, PreI represents the previous coherent accumulation result of the data component on the I branch, CurQ represents the current coherent accumulation result of the data component on the Q branch, and PreQ represents the previous coherent accumulation result of the data component on the Q branch.

[0095] However, when decoding the data component based on the dot product, the previous coherent accumulation result of the data component on the I branch, the previous coherent accumulation result of the data component on the Q branch and the previous decoding result need to be combined, so when the previous decoding of the navigation text has an error, even if the current decoding has no error, the reverse result will be obtained; the next decoding depends on the current decoding result, and in the case of no error, the reverse result will continue to be obtained until the error occurs again after several times, and the reverse becomes positive, thereby causing the reverse of the entire bit stream between the two errors.

[0096] In order to improve the accuracy of the decoding result, when decoding the data component, in order to avoid the dependence on the previous decoding result, considering that the pilot component and the data component are time-synchronized, the coherent accumulation result of the pilot component can be used as a reference, and the coherent accumulation result of the pilot component is combined to decode the data component. Even if the previous decoding of the navigation text has an error, it will not cause the problem of reversing the entire bit stream, thereby improving the accuracy of the decoding result.

[0097] Based on the technical concept, the embodiment of the present application provides a signal decoding method. In the following, the signal decoding method provided by the present application will be described in detail through specific embodiments. It can be understood that the following several specific embodiments can be combined with each other, and the same or similar concepts or processes can not be described in detail in some embodiments.

[0098] Figure 1 A flowchart of a signal decoding method provided by the embodiment of the present application is shown in the figure. The signal decoding method can be executed by software and / or hardware device, for example, the hardware device can be a signal decoding device. For example, please refer to Figure 1 The signal decoding method can include the following steps:

[0099] S101, respectively acquiring a first coherent integration corresponding to a first branch of a pilot component in a to-be-tracked signal and a second coherent integration corresponding to a second branch of the to-be-tracked signal, and a third coherent integration corresponding to a first branch of a data component in the to-be-tracked signal and a fourth coherent integration corresponding to a second branch of the to-be-tracked signal.

[0100] For example, when tracking the to-be-tracked signal, please refer to Figure 2 The signal decoding method can include the following steps: Figure 2 A framework diagram of a signal decoding method provided by the embodiment of the present application is shown in the figure. Since the pilot component is not modulated by the navigation text, there is no influence of bit inversion, so the pilot component in the to-be-tracked signal can be captured first. Since the precision of the Doppler and code phase tracking loop parameters used when tracking the pilot component is low, the captured pilot component needs to be further tracked to improve the accuracy of the pilot component. When the pilot component is stably tracked, bit synchronization can be performed. Although the pilot component does not need to be modulated by the navigation bit, it needs to be stripped of the secondary code. Bit synchronization of the pilot channel can confirm the starting position of the secondary code period. After completing bit synchronization, secondary code stripping can be realized, and long-time coherent accumulation across the bit boundary can be performed.

[0101] Since the pilot component and the data component are time-synchronized, the pilot component can be synchronized and tracked using the Doppler and code phase tracking loop parameters with high precision. When the pilot component completes bit synchronization, the data component can be activated using the above tracking loop parameters. After the data component is stripped of the secondary code, the navigation text decoding can be performed.

[0102] After the synchronization tracking of the pilot component and the data component is implemented by using the dual-component pilot, the first coherent integration corresponding to the first branch of the pilot component and the second coherent integration corresponding to the second branch of the pilot component in the to-be-tracked signal, and the third coherent integration corresponding to the first branch of the data component and the fourth coherent integration corresponding to the second branch of the data component in the to-be-tracked signal can be obtained. Thus, the joint coding can be performed based on the first coherent integration and the second coherent integration corresponding to the pilot component, and the third coherent integration and the fourth coherent integration corresponding to the data component. For example, the first branch can be the I branch or the Q branch. When the first branch is the I branch, the second branch is the Q branch. When the first branch is the Q branch, the second branch is the I branch. The actual requirement can be set.

[0103] It should be noted that, in the embodiment of the present application, the time length of the coherent integration is the time length of 1-bit navigation text on the data component. In addition, it can be understood that, in order to improve the accuracy of the decoding result, in the embodiment of the present application, when the first coherent integration corresponding to the first branch of the pilot component and the second coherent integration corresponding to the second branch of the pilot component, and the third coherent integration corresponding to the first branch of the data component and the fourth coherent integration corresponding to the second branch of the data component are obtained respectively, the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration have been stripped of the secondary code, and the influence of the 90-degree phase difference between the pilot component and the data component has been stripped.

[0104] For example, when the influence of the phase difference between the pilot component and the data component is stripped, the pilot component is taken as an example, which is 90 degrees ahead of the data component. For details, refer to FIG. 1. Figure 3 Figure 3 A schematic diagram of the 90-degree phase difference between the pilot component and the data component provided by the embodiment of the present application can be taken as a reference. The data component is taken as a reference, and the pilot vector is counterclockwise rotated by 90 degrees, that is, pi / 2. When calculating, it can be assumed that the pilot vector before rotation is e jθ = cosθ + j sinθ = I pilot-pre +jQ pilot-pre ; wherein, I pilot-pre represents the coherent integration of the pilot component on the I branch before stripping, Q pilot-pre represents the coherent integration of the pilot component on the Q branch before stripping. The corresponding rotation calculation is as follows:

[0105]

[0106] If the pilot vector after stripping the phase difference is I pilot +jQ pilot , I pilot represents the coherent integration of the pilot component on the I branch before stripping, Q pilot represents the coherent integration of the pilot component on the Q branch before stripping, then in the embodiment of the present application, I pilot ​= Q pilot-pre , Q pilot = -I pilot-pre , thereby eliminating the influence of the 90-degree phase difference between the pilot component and the data component.

[0107] Considering that the pilot component and the data component are time-synchronized, the coherent accumulation result of the pilot component can be taken as a reference. After the first coherent integration, the second coherent integration, the third coherent integration, and the fourth coherent integration are obtained, the pilot component corresponding first coherent integration and the second coherent integration are combined to decode the data component, that is, the following S102 is performed:

[0108] S102, according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, determine the navigation text from the data component to decode the data component.

[0109] For example, when determining the navigation text from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, at least three possible implementation manners can be included:

[0110] In one possible implementation manner, the first product between the first coherent integration and the third coherent integration can be determined first, and the second product between the second coherent integration and the fourth coherent integration can be determined; and according to the first product and the second product, the navigation text is determined from the data component.

[0111] For example, when determining the navigation text from the data component according to the first product and the second product, the navigation text can be determined from the data component according to the sum of the first product and the second product. Assuming that the first branch is the I branch and the second branch is the Q branch, refer to the following formula 2:

[0112] Dot = I data * I pilot + Q data * Q pilot Formula 2

[0113] Wherein, Dot represents the sum, I data represents the third coherent integration corresponding to the I branch of the data component, I pilot represents the first coherent integration corresponding to the I branch of the pilot component, Q data represents the fourth coherent integration corresponding to the Q branch of the data component, Q pilot represents the second coherent integration corresponding to the I branch of the pilot component.

[0114] For example, when determining the navigation text from the data component according to the sum of the first product and the second product, if the sum is greater than or equal to 0, it means that the data component and the pilot component are in phase, which can be seen from Figure 4 Figure 4 ​A data component and a pilot component diagram provided by an embodiment of the present application, then the 0 bit in the data component can be determined as the navigation message, and it can be understood that the data component and the pilot component do not coincide due to noise and Doppler residual; on the contrary, if and is less than 0, it indicates that the data component and the pilot component are reversed, which can be seen from Figure 5 , Figure 5 Another data component and pilot component diagram provided by an embodiment of the present application, then the 1 bit in the data component can be determined as the navigation message, so that the navigation message can be separated from the data component, and the decoding of the data component is realized.

[0115] In another possible implementation, a first sum of the first coherent integration and the third coherent integration, and a first difference of the first coherent integration and the third coherent integration can be determined first; and a second sum of the second coherent integration and the fourth coherent integration, and a second difference of the second coherent integration and the fourth coherent integration can be determined; then the navigation message can be determined from the data component according to the first sum, the first difference, the second sum and the second difference.

[0116] For example, when the navigation message is determined from the data component according to the first sum, the first difference, the second sum and the second difference, the absolute values of the first sum, the first difference, the second sum and the second difference can be determined respectively first, to obtain a first absolute value sum, a first absolute value difference, a second absolute value sum and a second absolute value difference; and a difference value between the sum of the first absolute value and the second absolute value, and the sum of the first absolute value difference and the second absolute value difference can be determined; then the navigation message can be determined from the data component according to the difference value. Assuming that the first branch is an I branch, and the second branch is a Q branch, which can be seen from the following formula 3:

[0117] Delta1 = (I pilot + I data | + |Q pilot + Q data |) - (I pilot - I data | + |Q pilot - Q data |) Formula 3

[0118] Wherein, Delta1 is a difference value between the sum of the first absolute value difference and the second absolute value difference, I data represents the third coherent integration corresponding to the I branch of the data component, I pilot represents the first coherent integration corresponding to the I branch of the pilot component, Q data represents the fourth coherent integration corresponding to the Q branch of the data component, Q pilot represents the second coherent integration corresponding to the I branch of the pilot component.

[0119] For example, when the navigation message is determined from the data component according to the difference value, if the difference value is greater than or equal to 0, the 0 bit in the data component can be determined as the navigation message; if the difference value is less than 0, the 1 bit in the data component can be determined as the navigation message, so that the navigation message can be stripped from the data component, and the decoding of the data component is realized.

[0120] In another possible implementation, the first arctangent function of the first coherent integration and the second coherent integration, and the second arctangent function of the third coherent integration and the fourth coherent integration can be determined first; and the navigation message can be determined from the data component according to the first arctangent function and the second arctangent function.

[0121] For example, when the navigation message is determined from the data component according to the first arctangent function and the second arctangent function, a first value can be determined based on the first arctangent function, and a second value can be determined based on the second arctangent function; and a difference value of the first value and the second value and a preset value can be subjected to a modulo operation to obtain an operation value; and the navigation message can be determined from the data component according to the operation value. Assuming that the first branch is an I branch and the second branch is a Q branch, the following formula 4 can be referred to:

[0122] α = atan 2 (I pilot ,Q pilot )

[0123] β = atan 2 (I data ,Q data ) Formula 4

[0124] Delta2 = mod ((α - β), 2π)

[0125] Wherein, atan 2 (x, y) is a function defined based on an arctangent function , α represents the first value, β represents the second value, and Delta2 represents the operation value. The function value range of atan 2 (x, y) is (-π, π], and mod (x, n) is a modulo operation, which can be defined as:

[0126] mod (x, n) = x + k * n, k is an integer that makes 0 ≤ x + k * n < n.

[0127] For example, when the navigation message is determined from the data component according to the operation value, if , the 1 bit in the data component can be determined as the navigation message, otherwise the 0 bit in the data component can be determined as the navigation message, so that the navigation message can be stripped from the data component, and the decoding of the data component is realized.

[0128] Wherein,

[0129] It should be noted that, considering the signal characteristics in the actual scenario, it is difficult to occur the scenario of I data = Q data = 0, and / or, I pilot = Q pilot = 0. If it occurs, it indicates that the current signal is weak or the system is abnormal, and the decoding calculation is not performed.

[0130] According to the simulation results, under the FLL tracking loop, the decoding performance of the technical solution of the present application is significantly better than the decoding algorithm under the FLL loop; and under the phase lock loop (PLL) tracking loop and the FLL+PLL tracking loop, the performance of the method is slightly better than the decoding algorithm under the PLL loop in the strong dynamic scenario.

[0131] It can be seen that, in the embodiment of the present application, when decoding the signal, the first coherent integration corresponding to the first branch and the second coherent integration corresponding to the second branch of the pilot component in the to-be-tracked signal, and the third coherent integration corresponding to the first branch and the fourth coherent integration corresponding to the second branch of the data component in the to-be-tracked signal can be obtained; and the navigation message is determined from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, so as to decode the data component, avoiding the dependence on the previous coherent accumulation result and the previous decoding result, so that even if the previous decoding error of the navigation message, the whole bit stream will not be reversed, thereby effectively improving the accuracy of the decoding result.

[0132] It can be understood that, when synchronously tracking the data component and the pilot component, it is necessary to ensure that there is no delay between the two branches of the tracking, and the Doppler and code phase and other tracking loop parameters are consistent. In addition, if the signal decoding method provided by the embodiment of the present application is implemented by hardware or software, attention should be paid to the timing relationship between the two data components and the pilot component, so as to ensure that the data component and the pilot component are completed after the coherent integration is completed. If the receiver hardware is implemented, the decoding software is implemented, the interrupt can be reported after the coherent integration of the data component and the pilot component is completed, and the software reads the coherent integration and decodes the data component in the interrupt.

[0133] Based on the above Figure 1 The embodiment shown in the above, after determining the navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, and realizing the dual-component joint decoding, the loop tracking can be further performed based on the joint decoding result. Next, the embodiment two shown in the following Figure 6 will be described in detail.

[0134] It can be understood that the signal decoding method based on joint decoding provided in the present application can be applied to joint tracking of any GNSS signal having data components and pilot components, can realize navigation message stripping of the data components without data assistance, and is suitable for any type of tracking loop, such as a frequency-locked loop or a phase-locked loop.

[0135] Figure 6 A flowchart of a method for loop tracking based on decoding combination provided in an embodiment of the present application, which can also be executed by a software and / or a hardware device, for example, the hardware device can be a signal decoding device. For example, refer to Figure 6 The method for loop tracking based on decoding combination can include the following steps:

[0136] S601, determining a target data component in the data components except for the navigation message.

[0137] Based on the above Figure 1 After joint decoding based on the technical solution shown in the above and stripping the navigation message from the data components, the data component in the data components except for the navigation message can be determined, and in order to distinguish, the data component here can be a target data component.

[0138] After obtaining the target data component, loop tracking can be performed in combination with the target data component. For example, refer to Figure 7 The method for loop tracking based on decoding combination can include the following steps: Figure 7 A framework diagram of a method for loop tracking based on joint decoding results provided in an embodiment of the present application can first acquire a fifth coherent integration corresponding to a first branch and a sixth coherent integration corresponding to a second branch of the target data component, and perform loop tracking in combination with a first coherent integration and a second coherent integration corresponding to the pilot component.

[0139] S602, acquiring a fifth coherent integration corresponding to a first branch and a sixth coherent integration corresponding to a second branch of the target data component.

[0140] For example, when acquiring the fifth coherent integration corresponding to the first branch and the sixth coherent integration corresponding to the second branch of the target data component, if the navigation message is 1 bit, the fifth coherent integration is the opposite number of the third coherent integration, and the sixth coherent integration is the opposite number of the fourth coherent integration; if the navigation message is 0 bit, the fifth coherent integration is equal to the third coherent integration, and the sixth coherent integration is equal to the fourth coherent integration.

[0141] S603, performing loop tracking according to the first coherent integration, the second coherent integration, the fifth coherent integration, and the sixth coherent integration.

[0142] For example, when loop tracking is performed according to the first coherent integration, the second coherent integration, the fifth coherent integration and the sixth coherent integration, the first coherent accumulation result of the first coherent integration and the fifth coherent integration can be determined first, and the second coherent accumulation result of the second coherent integration and the sixth coherent integration can be determined; and the non-coherent accumulation result of the first coherent accumulation result and the second coherent accumulation result can be determined; then loop tracking is performed according to the non-coherent accumulation result, so that the accuracy of the loop tracking result is improved.

[0143] For example, when the first coherent accumulation result of the first coherent integration and the fifth coherent integration is determined, the sum of the first coherent integration and the fifth coherent integration is directly determined as the first coherent accumulation result, so that the first coherent accumulation result is obtained.

[0144] For example, when the second coherent accumulation result of the second coherent integration and the sixth coherent integration is determined, the sum of the second coherent integration and the sixth coherent integration is directly determined as the second coherent accumulation result, so that the second coherent accumulation result is obtained.

[0145] It can be understood that after the first coherent accumulation result and the second coherent accumulation result are obtained respectively, since the gain of coherent accumulation can not meet the performance requirement, the first coherent accumulation result and the second coherent accumulation result can be further non-coherently accumulated. For example, when the first coherent accumulation result and the second coherent accumulation result are non-coherently accumulated, the sum of the I branch and the Q branch is 1, and a common calculation formula can be seen from the following formula 5 or formula 6:

[0146] NCS = NCS_pre + I^2 + Q^2 Formula 5

[0147] NCS = NCS_pre + sqrt(I^2 + Q^2) Formula 6

[0148] In the above formula 5 and formula 6, NCS represents the non-coherent accumulation result of the first coherent accumulation result and the second coherent accumulation result, I represents the first coherent accumulation result, Q represents the second coherent accumulation result, and NCS_pre is the non-coherent accumulation result before this accumulation. The non-coherent accumulation result is determined by the above formula 5 or 6, and the advantage is that the non-coherent accumulation result is a non-negative result obtained by square calculation, and is not affected by the sign, but has square loss. The square loss is obtained from the noise, and after the noise is squared, the mean value is no longer 0.

[0149] Thus, after obtaining the coherent accumulation result or the non-coherent accumulation result, frequency discrimination and phase discrimination calculation can be performed according to the non-coherent accumulation result, and the current Doppler error and pseudo-code phase error can be estimated. Due to the existence of noise, the estimation error is inaccurate and will jitter around the true value. Therefore, the error can be fed back to the parameters of the tracking loop, specifically the Doppler in the down-conversion process and the code frequency or code phase in the despreading process, and the loop is adjusted and continues to track, which is repeatedly cycled to ensure that the dual-component signal can still be locked when the Doppler and delay of the received dual-component signal change.

[0150] It should be noted that, generally, the carrier loop uses an FLL loop or an FLL loop assisted by a PLL loop; the code loop uses a DLL loop; the PLL loop uses the coherent calculation result for phase discrimination, and the DLL loop uses the non-coherent accumulation result for phase discrimination. The FLL loop can use the coherent accumulation result or the non-coherent accumulation result for frequency discrimination according to different frequency discrimination formulas.

[0151] When tracking the signal, the joint decoding method is first used to strip the navigation message from the data component, and the joint tracking of the data component and the pilot component is realized according to the joint decoding result. When the data-to-pilot energy ratio is 1:1, compared with the method of tracking the pilot branch alone, the CN0 of the strong signal (CN0 >= 25 dB) can be improved by 3 dB by using the technical solution of the present application; the CN0 of the weak signal (CN0 < 25 dB) can be improved by 0 dB to 3 dB by using the technical solution of the present application, although it is affected by the decoding bit error rate. When the data-to-pilot energy ratio is other values, the CN0 improvement needs to be converted according to the energy dispersion degree, which will not be described herein. Generally, the strong signal refers to the signal with CN0 greater than or equal to 25 dB, and the weak signal refers to the signal with CN0 less than 25 dB.

[0152] Taking the GPS L5 signal as an example, when the GPS L5 signal is a strong signal, the bit error rate of the decoding method is almost 0, and even without any prior information of the navigation message, the navigation message on the data component can be correctly stripped. When the GPS L5 signal is a weak signal, the bit error rate changes with the signal strength, and the lower the signal strength, the higher the bit error rate.

[0153] It can be seen that, in the embodiment of the application, when signal tracking is performed, the joint decoding method is first used to strip the navigation message from the data component and determine the target data component in the data component except the navigation message; then the first coherent integration corresponding to the pilot component and the second coherent integration, and the fifth coherent integration corresponding to the target data component in the data component except the navigation message and the sixth coherent integration are used for loop tracking. In this way, the loop tracking is performed based on the joint decoding result, which avoids the dependence on the previous coherent accumulation result and the previous decoding result. Thus, even if the previous decoding error of the navigation message, the whole bit stream will not be reversed, thereby effectively improving the accuracy of the loop tracking.

[0154] Figure 8 A structural schematic diagram of a signal decoding device 80 provided in the embodiment of the application is shown in the figure, and an example is shown in the figure. Figure 8 The signal decoding device 80 can include:

[0155] The acquisition unit 801 is configured to acquire the first coherent integration corresponding to the first branch and the second coherent integration corresponding to the second branch of the pilot component in the to-be-tracked signal, and acquire the third coherent integration corresponding to the first branch and the fourth coherent integration corresponding to the second branch of the data component in the to-be-tracked signal.

[0156] The processing unit 802 is configured to determine the navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, and decode the data component.

[0157] Optionally, the processing unit 802 includes a first processing module and a second processing module.

[0158] The first processing module is configured to determine a first product between the first coherent integration and the third coherent integration, and determine a second product between the second coherent integration and the fourth coherent integration.

[0159] The second processing module is configured to determine the navigation message from the data component according to the first product and the second product.

[0160] Optionally, the second processing module is specifically configured to determine the navigation message from the data component according to a sum of the first product and the second product.

[0161] Optionally, the second module unit is specifically configured to determine 0 bits in the data component as the navigation message if the sum is greater than or equal to 0, and determine 1 bits in the data component as the navigation message if the sum is less than 0.

[0162] Optionally, the processing unit 802 further includes a third processing module, a fourth processing module and a fifth processing module.

[0163] The third processing module is configured to determine a first sum of the first coherent integration and the third coherent integration, and a first difference between the first coherent integration and the third coherent integration.

[0164] The fourth processing module is configured to determine a second sum of the second coherent integration and the fourth coherent integration, and a second difference between the second coherent integration and the fourth coherent integration.

[0165] The fifth processing module is configured to determine the navigation message from the data component according to the first sum, the first difference, the second sum and the second difference.

[0166] Optionally, the fifth processing module is specifically configured to determine an absolute value of the first sum, an absolute value of the first difference, an absolute value of the second sum and an absolute value of the second difference respectively, to obtain a first absolute value sum, a first absolute value difference, a second absolute value sum and a second absolute value difference; determine a difference between the first absolute value sum and the second absolute value sum, and between the first absolute value difference and the second absolute value difference; and determine the navigation message from the data component according to the difference.

[0167] Optionally, the fifth processing module is specifically configured to determine a 0 bit in the data component as the navigation message if the difference is greater than or equal to 0, or determine a 1 bit in the data component as the navigation message if the difference is less than 0.

[0168] Optionally, the processing unit 802 further includes a sixth processing module and a seventh processing module.

[0169] The sixth processing module is configured to determine a first arctangent function of the first coherent integration and the second coherent integration, and a second arctangent function of the third coherent integration and the fourth coherent integration.

[0170] The seventh processing module is configured to determine the navigation message from the data component according to the first arctangent function and the second arctangent function.

[0171] Optionally, the seventh processing module is specifically configured to determine a first value based on the first arctangent function, and determine a second value based on the second arctangent function; perform a modulo operation on a difference between the first value and the second value and a preset value to obtain an operation value; and determine the navigation message from the data component according to the operation value.

[0172] Optionally, the signal decoding apparatus 80 further includes a determination unit 803 and a tracking unit 804.

[0173] The determination unit 803 is configured to determine a target data component in the data component except for the navigation message.

[0174] The acquisition unit 801 is further configured to acquire a fifth coherent integration corresponding to the first branch and a sixth coherent integration corresponding to the second branch corresponding to the target data component.

[0175] The tracking unit 804 is configured to perform loop tracking according to the first coherent integration, the second coherent integration, the fifth coherent integration and the sixth coherent integration.

[0176] Optionally, the tracking unit 804 includes a first tracking module, a second tracking module and a third tracking module.

[0177] The first tracking module is configured to determine a first coherent accumulation result of the first coherent integration and the fifth coherent integration, and determine a second coherent accumulation result of the second coherent integration and the sixth coherent integration.

[0178] The second tracking module is configured to determine a non-coherent accumulation result of the first coherent accumulation result and the second coherent accumulation result.

[0179] The third tracking module is configured to perform loop tracking according to the non-coherent accumulation result.

[0180] The signal decoding apparatus 80 provided by the embodiments of the present application can execute the technical solutions of the signal decoding method in any of the above embodiments, and the implementation principles and beneficial effects thereof are similar to those of the signal decoding method. For details, refer to the implementation principles and beneficial effects of the signal decoding method, which will not be described here again.

[0181] The embodiments of the present application provide a chip, which can include a memory and a processor; the memory is configured to store a computer program.

[0182] The processor is configured to implement the signal decoding method as described in the above embodiments when the computer program is executed, and the implementation principles and beneficial effects thereof are similar to those of the signal decoding method. For details, refer to the implementation principles and beneficial effects of the signal decoding method, which will not be described here again.

[0183] The embodiments of the present application also provide a chip module, which can include a memory and a processor; the memory is configured to store a computer program.

[0184] The processor is configured to implement the signal decoding method as described in the above embodiments when the computer program is executed, and the implementation principles and beneficial effects thereof are similar to those of the signal decoding method. For details, refer to the implementation principles and beneficial effects of the signal decoding method, which will not be described here again.

[0185] Figure 9 A structural schematic diagram of an electronic device 90 provided by the embodiments of the present application is shown in FIG. 8. Figure 9 As shown in the figure, the electronic device 90 can include a processor 901 and a memory 902; wherein,

[0186] The memory 902 is configured to store a computer program.

[0187] The processor 901 is configured to read the computer program stored in the memory 902, and execute the signal decoding method according to the computer program in the memory 902.

[0188] Optionally, the memory 902 can be independent or integrated with the processor 901. When the memory 902 is independent of the processor 901, the electronic device 90 further includes a bus for connecting the memory 902 and the processor 901.

[0189] Optionally, the embodiment further includes a communication interface, which can be connected with the processor 901 through the bus. The processor 901 can control the communication interface to realize the functions of acquiring and sending of the electronic device 90.

[0190] The electronic device 90 shown in the embodiment of the present application can execute the signal decoding method, and the implementation principle and beneficial effects thereof are similar to those of the signal decoding method. For details, refer to the implementation principle and beneficial effects of the signal decoding method, which will not be described here.

[0191] The embodiment of the present application further provides a computer readable storage medium, which stores computer execution instructions. When the processor executes the computer execution instructions, the signal decoding method is realized. The implementation principle and beneficial effects thereof are similar to those of the signal decoding method. For details, refer to the implementation principle and beneficial effects of the signal decoding method, which will not be described here.

[0192] The embodiment of the present application further provides a computer program product, which includes a computer program. When the processor executes the computer program, the signal decoding method is realized. The implementation principle and beneficial effects thereof are similar to those of the signal decoding method. For details, refer to the implementation principle and beneficial effects of the signal decoding method, which will not be described here.

[0193] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other manners. For example, the apparatus embodiment described above is only schematic, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or components shown or discussed can be indirect coupling or communication connection through some interfaces, apparatuses or units, which can be electrical, mechanical or other forms.

[0194] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme. In addition, the functional units in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present alone, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of hardware plus software function unit.

[0195] The integrated module realized in the form of software function module can be stored in a computer readable storage medium. The software function module is stored in a storage medium, including a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to execute part of the steps of the method of each embodiment of the present application.

[0196] It should be understood that the above processor can be a central processing unit (English: Central Processing Unit, CPU for short), and can also be other general-purpose processors, digital signal processors (English: Digital Signal Processor, DSP for short), application specific integrated circuits (English: Application Specific Integrated Circuit, ASIC for short), etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in combination with the application can be directly embodied as hardware processor execution or executed by hardware and software modules in the processor.

[0197] The memory can include a high-speed RAM memory, and can also include a non-volatile storage NVM, for example at least one disk memory, and can also be a U disk, a mobile hard disk, a read-only memory, a magnetic disk or an optical disk, etc.

[0198] The bus can be an industry standard architecture (Industry Standard Architecture, ISA) bus, a peripheral component (Peripheral Component, PCI) bus or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For the convenience of representation, the bus in the drawings of the present application does not limit only one bus or one type of bus.

[0199] The computer readable storage medium described above can be realized by any type of volatile or nonvolatile storage devices or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk. The storage medium can be any available medium that can be accessed by a general or special purpose computer.

[0200] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A signal decoding method characterized by, The method comprises the following steps: respectively acquiring a first coherent integration corresponding to a first branch and a second coherent integration corresponding to a second branch of a pilot component in a to-be-tracked signal, and a third coherent integration corresponding to the first branch and a fourth coherent integration corresponding to the second branch of a data component in the to-be-tracked signal; determining a navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, so as to decode the data component; the step of determining the navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration comprises the following steps: determining a first product between the first coherent integration and the third coherent integration, and determining a second product between the second coherent integration and the fourth coherent integration; determining a sum of the first product and the second product; if the sum is greater than or equal to 0, determining a 0 bit in the data component as the navigation message; if the sum is less than 0, determining a 1 bit in the data component as the navigation message; or, determining a first sum of the first coherent integration and the third coherent integration, and a first difference between the first coherent integration and the third coherent integration; determining a second sum of the second coherent integration and the fourth coherent integration, and a second difference between the second coherent integration and the fourth coherent integration; respectively determining absolute values corresponding to the first sum, the first difference, the second sum and the second difference, to obtain a first absolute value sum, a first absolute value difference, a second absolute value sum and a second absolute value difference; determining a difference between a sum of the first absolute value sum and the second absolute value sum and a sum of the first absolute value difference and the second absolute value difference; if the difference is greater than or equal to 0, determining a 0 bit in the data component as the navigation message; if the difference is less than 0, determining a 1 bit in the data component as the navigation message; or, determining a first arctangent function of the first coherent integration and the second coherent integration, and a second arctangent function of the third coherent integration and the fourth coherent integration; determining a first numerical value based on the first arctangent function, and determining a second numerical value based on the second arctangent function; performing a modulo operation on a difference between the first numerical value and the second numerical value and a preset value to obtain an operation value; determining the navigation message from the data component according to the operation value; determining a target data component in the data component except the navigation message; acquiring a fifth coherent integration corresponding to the first branch and a sixth coherent integration corresponding to the second branch of the target data component; determining a first coherent accumulation result of the first coherent integration and the fifth coherent integration, and determining a second coherent accumulation result of the second coherent integration and the sixth coherent integration; determining a non-coherent accumulation result of the first coherent accumulation result and the second coherent accumulation result; performing loop tracking according to the non-coherent accumulation result.

2. The signal decoding method according to claim 1, characterized by, The determining the first coherent accumulation result of the first coherent integration and the fifth coherent integration, and the second coherent accumulation result of the second coherent integration and the sixth coherent integration comprises: The sum of the first coherent integration and the fifth coherent integration is determined as the first coherent accumulation result, and the sum of the second coherent integration and the sixth coherent integration is determined as the second coherent accumulation result.

3. A signal decoding apparatus characterized by comprising: Comprise: The acquisition unit is used for respectively acquiring a first coherent integration corresponding to a first branch and a second coherent integration corresponding to a second branch of a pilot component in a to-be-tracked signal, and a third coherent integration corresponding to the first branch and a fourth coherent integration corresponding to the second branch of a data component in the to-be-tracked signal; The processing unit is used for determining a navigation message from the data component according to the first coherent integration, the second coherent integration, the third coherent integration and the fourth coherent integration, so as to decode the data component; The processing unit comprises a first processing module and a second processing module; The first processing module is used for determining a first product between the first coherent integration and the third coherent integration, and determining a second product between the second coherent integration and the fourth coherent integration; The second processing module is used for determining a sum of the first product and the second product; if the sum is greater than or equal to 0, a 0 bit in the data component is determined as the navigation message; If the sum is less than 0, a 1 bit in the data component is determined as the navigation message; Or, the processing unit further comprises a third processing module, a fourth processing module and a fifth processing module; The third processing module is used for determining a first sum of the first coherent integration and the third coherent integration, and a first difference between the first coherent integration and the third coherent integration; The fourth processing module is used for determining a second sum of the second coherent integration and the fourth coherent integration, and a second difference between the second coherent integration and the fourth coherent integration; The fifth processing module is used for respectively determining absolute values corresponding to the first sum, the first difference, the second sum and the second difference, to obtain a first absolute sum, a first absolute difference, a second absolute sum and a second absolute difference; Determining a difference between a sum of the first absolute sum and the second absolute sum and a sum of the first absolute difference and the second absolute difference; If the difference is greater than or equal to 0, a 0 bit in the data component is determined as the navigation message; If the difference is less than 0, a 1 bit in the data component is determined as the navigation message; Or, the processing unit further comprises a sixth processing module and a seventh processing module; The sixth processing module is used for determining a first arctangent function of the first coherent integration and the second coherent integration, and a second arctangent function of the third coherent integration and the fourth coherent integration; The seventh processing module is used for determining a first sum of the first arctangent function and the second arctangent function, and a second sum of the first absolute sum and the second absolute sum; if the first sum is greater than or equal to 0, a 0 bit in the data component is determined as the navigation message; if the first sum is less than 0, a 1 bit in the data component is determined as the navigation message. The seventh processing module is configured to determine a first numerical value based on the first inverse tangent function and a second numerical value based on the second inverse tangent function, perform a modulo operation on a difference between the first numerical value and the second numerical value and a preset value to obtain an operation value, and determine the navigation message from the data components according to the operation value. The signal decoding apparatus further includes a determining unit and a tracking unit. The determining unit is configured to determine a target data component in the data components other than the navigation message. The obtaining unit is further configured to obtain a fifth coherent integration corresponding to a first branch and a sixth coherent integration corresponding to a second branch of the target data component. The tracking unit is configured to determine a first coherent accumulation result of the first coherent integration and the fifth coherent integration, and determine a second coherent accumulation result of the second coherent integration and the sixth coherent integration. Determine a non-coherent accumulation result of the first coherent accumulation result and the second coherent accumulation result. Perform loop tracking according to the non-coherent accumulation result.

4. A chip, characterized by Comprise: A memory and a processor; The memory is configured to store a computer program; The processor is configured to implement the signal decoding method of claim 1 or 2 when the computer program is executed.

5. A chip module, characterized by Comprise: A memory and a processor; The memory is configured to store a computer program; The processor is configured to implement the signal decoding method of claim 1 or 2 when the computer program is executed.

6. An electronic device, comprising: Comprise a processor and a memory; wherein, The memory is configured to store a computer program; The processor is configured to read the computer program stored in the memory, and execute the signal decoding method of claim 1 or 2 according to the computer program in the memory.

7. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer execution instructions, and when the processor executes the computer execution instructions, the signal decoding method of claim 1 or 2 is realized.

8. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor, and the signal decoding method of claim 1 or 2 is realized.

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