Pixel voltage control circuit, display, and electronic device

Abstract

The application relates to the technical field of display screens, in particular to a pixel voltage control circuit, a display and electronic equipment. The circuit integrates multiple transmission channels in an integrated chip by adding an integrated circuit, and sends a unified square wave signal and a starting signal through the IC chip to perform voltage control input on the integrated chip, so that voltage input on the pixel unit is realized, and the technical problem that each column of pixels needs to be connected with the IC chip through a transmission channel and the cost is high is effectively solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display screen, in particular to a pixel voltage control circuit, a display and an electronic device. BACKGROUND

[0002] The current full screen has become mainstream, and further improving the screen ratio is the direction pursued by major manufacturers. The current mainstream design is to use COF technology to transfer the position of the IC chip from the top of the LCD to the top of the FPC, thereby reducing the width of the gap under the LCD and achieving a higher full screen. However, the FPC line used by COF is relatively thin, and the process precision is high. When charging control is performed on the pixels in the display screen, generally one column of pixels is connected to the IC chip through one transmission channel, which is relatively high in cost. SUMMARY

[0003] The main purpose of the present application is to provide a pixel voltage control circuit, a display and an electronic device, which aims to solve the technical problem that each column of pixels needs to be connected to the IC chip through one transmission channel, which is relatively high in cost.

[0004] To achieve the above-mentioned purpose, the present application provides a pixel voltage control circuit, which comprises a control unit, a processing unit and a pixel unit connected in sequence.

[0005] The control unit is configured to generate a first start signal and transmit the first start signal to the processing unit.

[0006] The control unit is further configured to generate a first square wave signal and transmit the first square wave signal to the processing unit.

[0007] The control unit is further configured to generate a second square wave signal and transmit the second square wave signal to the processing unit.

[0008] The control unit is further configured to provide an input voltage signal to the processing unit.

[0009] The processing unit is configured to receive the first start signal, the first control signal, the second control signal and the input voltage signal, and generate an output voltage signal to the pixel unit.

[0010] The pixel unit is configured to receive the output voltage signal and charge according to the output voltage signal.

[0011] Optionally, the control unit comprises a control chip, and the control chip is mounted on a flexible circuit board.

[0012] The first output end, the second output end, the third output end and the fourth output end of the control chip are connected with the processing unit respectively.

[0013] Optionally, the processing unit comprises a first processing unit, a second processing unit and a third processing unit;

[0014] The first processing unit is connected with the first output end of the control chip, the second output end of the control chip, the third output end of the control chip, the fourth output end of the control chip, the second processing unit and the pixel unit respectively; the second processing unit is connected with the first processing unit, the second output end of the control chip, the third output end of the control chip, the fourth output end of the control chip and the third processing unit respectively;

[0015] The first processing unit is configured to receive a first start signal, the first square wave signal, the second square wave signal and the voltage signal;

[0016] The first processing unit is further configured to generate a first output voltage signal and transmit the first output voltage signal to the pixel unit;

[0017] The first processing unit is further configured to generate a second start signal and transmit the second start signal to the second processing unit;

[0018] The second processing unit is configured to receive a second start signal, the first square wave signal, the second square wave signal and the voltage signal;

[0019] The second processing unit is further configured to generate a second output voltage signal and transmit the second output voltage signal to the pixel unit;

[0020] The second processing unit is further configured to generate a third start signal and transmit the third start signal to the third processing unit;

[0021] The third processing unit is configured to receive a third start signal, the first square wave signal, the second square wave signal and the voltage signal;

[0022] The third processing unit is further configured to generate a third output voltage signal and transmit the third output voltage signal to the pixel unit.

[0023] Optionally, the first processing unit comprises a first integrated chip;

[0024] The enable end of the first integrated chip is connected with the first output end of the control chip, the first control end of the first integrated chip is connected with the second output end of the control chip, the second control end of the first integrated chip is connected with the third output end of the control chip, the voltage input end of the first integrated chip is connected with the fourth output end of the control chip, the signal output end of the first integrated unit is connected with the second processing unit, and the voltage output end of the first integrated chip is connected with the pixel unit.

[0025] Optionally, the second processing unit comprises a second integrated chip.

[0026] The enable end of the second integrated chip is connected with the signal output end of the first integrated chip, the first control end of the second integrated chip is connected with the second output end of the control chip, the second control end of the second integrated chip is connected with the third output end of the control chip, the voltage input end of the second integrated chip is connected with the fourth output end of the control chip, the signal output end of the second integrated unit is connected with the third processing unit, and the voltage output end of the second integrated chip is connected with the pixel unit.

[0027] Optionally, the third processing unit comprises a third integrated chip.

[0028] The enable end of the third integrated chip is connected with the signal output end of the second integrated chip, the first control end of the third integrated chip is connected with the second output end of the control chip, the second control end of the third integrated chip is connected with the third output end of the control chip, the voltage input end of the third integrated chip is connected with the fourth output end of the control chip, and the voltage output end of the third integrated chip is connected with the pixel unit.

[0029] Optionally, when the enable ends of the first integrated chip, the second integrated chip and the third integrated chip receive a high-level signal, voltage output signals are determined according to the first square wave signal, the second square wave signal and the voltage signal.

[0030] Optionally, the pixel unit comprises a first pixel unit, a second pixel unit and a third pixel unit, the source electrode of the first pixel unit is connected with the voltage output end of the first integrated chip, the source electrode of the second pixel unit is connected with the voltage output end of the second integrated chip, and the source electrode of the third pixel unit is connected with the voltage output end of the third integrated chip.

[0031] The first pixel unit is configured to receive the first output voltage signal and charge according to the first output voltage signal.

[0032] The second pixel unit is configured to receive the second output voltage signal and charge according to the second output voltage signal.

[0033] The third pixel unit is configured to receive the third output voltage signal and charge according to the third output voltage signal.

[0034] In addition, to achieve the above object, the present application further provides a display, characterized in that the display comprises the pixel voltage control circuit as described above.

[0035] In addition, to achieve the above object, the present application further provides an electronic device, characterized in that the electronic device comprises the pixel voltage control circuit as described above.

[0036] The present application provides a pixel voltage control circuit, which comprises a control unit, a processing unit and a pixel unit connected in sequence; the control unit is configured to generate a first start signal and transmit the first start signal to the processing unit; the control unit is further configured to generate a first square wave signal and transmit the first square wave signal to the processing unit; the control unit is further configured to generate a second square wave signal and transmit the second square wave signal to the processing unit; the control unit is further configured to provide an input voltage signal to the processing unit; the processing unit is configured to receive the first start signal, the first control signal, the second control signal and the input voltage signal, and generate an output voltage signal to the pixel unit; and the pixel unit is configured to receive the output voltage signal and charge according to the output voltage signal. The circuit integrates multiple transmission channels in an integrated chip by increasing an integrated circuit, and sends a unified square wave signal and a start signal through an IC chip to perform voltage control input on the integrated chip, so as to realize voltage input on the pixel unit, and effectively solve the technical problem of high cost caused by the fact that each column of pixels needs to be connected to an IC chip through a transmission channel. BRIEF DESCRIPTION OF DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from the drawings shown without creative labor.

[0038] Figure 1 The structure schematic diagram of the first embodiment of the pixel voltage control circuit of the present application;

[0039] Figure 2 The circuit schematic diagram of the first embodiment of the pixel voltage control circuit of the present application;

[0040] Figure 3 Structure diagram of the second embodiment of the pixel voltage control circuit of the present application;

[0041] Figure 4 Circuit diagram of the second embodiment of the pixel voltage control circuit of the present application.

[0042] Brief Description of the Drawings:

[0043] Reference Name Reference Name 10 Control unit 303 Third pixel unit 20 Processing unit U1 Control chip 30 Pixel unit U2 First integrated chip 201 First processing unit U3 Second integrated chip 202 Second processing unit U4 Third integrated chip 203 Third processing unit P1 First pixel 301 First pixel unit P2 Second pixel 302 Second pixel unit P3 Third pixel

[0044] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0045] It should be understood that the specific embodiments described herein merely set forth preferred combinations of components and / or other features, and that the scope of the application is not limited to such specific embodiments.

[0046] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0047] It should be noted that all the directionality indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present application are only used to explain the relative position relationship, movement condition, etc. between components in a certain specific posture (as shown in the accompanying drawings), and if the specific posture changes, the directionality indications also change accordingly.

[0048] In addition, the descriptions involving “first”, “second” and the like in the present application are only for the purpose of description, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features. Therefore, the features limited by “first” and “second” can explicitly or implicitly include at least one of the features. In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the fact that a person of ordinary skill in the art can realize it, and when the combination of technical solutions appears to be contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, and is also not within the scope of protection claimed by the present application.

[0049] Reference Figure 1 , Figure 2 , Figure 1 Structure diagram of the first embodiment of the pixel voltage control circuit of the present application; Figure 2 Circuit diagram of the first embodiment of the pixel voltage control circuit of the present application;

[0050] The pixel voltage control circuit comprises a control unit 10, a processing unit 20 and a pixel unit 30 connected in sequence.

[0051] It should be understood that, as smart devices now increasingly pursue full-screen proportion, but the traditional technology of pressing the chip on the liquid crystal panel occupies a part of the display screen space, therefore, in the present application, the position of the pressed chip is changed from the liquid crystal panel to the flexible printed circuit (FPC), so as to reduce the width of the additional frame under the liquid crystal panel and achieve a higher proportion of high-screen, but the production capacity of the flexible printed circuit is limited and the cost is high, so the connection channel between the chip and the pixel unit 30 can be reduced to reduce the cost.

[0052] The control unit 10 is configured to generate a first start signal and transmit the first start signal to the processing unit 20.

[0053] The control unit 10 is further configured to generate a first square wave signal and transmit the first square wave signal to the processing unit 20.

[0054] The control unit 10 is further configured to generate a second square wave signal and transmit the second square wave signal to the processing unit 20.

[0055] The control unit 10 is further configured to provide an input voltage signal to the processing unit 20.

[0056] The processing unit 20 is configured to receive the first start signal, the first control signal, the second control signal and the input voltage signal, and generate an output voltage signal to the pixel unit 30.

[0057] The pixel unit 30 is configured to receive the output voltage signal and charge according to the output voltage signal.

[0058] It is easy to understand that, in the voltage control of a single pixel unit 30, the processing unit 20 can charge and control the voltage of the pixel unit 30 through the output voltage signal, wherein the processing unit 20 generates the output voltage signal through the first start signal, the first square wave signal, the second square wave signal and the input voltage signal transmitted by the control unit 10, so as to realize the control of the pixel unit 30.

[0059] In the embodiment, the circuit integrates multiple transmission channels in an integrated chip by increasing the integrated circuit, and inputs the voltage of the integrated chip through the uniform square wave signal and the start signal sent by the IC chip, so as to realize the voltage input of the pixel unit, effectively solving the technical problem of high cost that each column of pixels needs to be connected to the IC chip through a transmission channel.

[0060] Based on the first embodiment of the pixel voltage control circuit of the present application, the second embodiment of the pixel voltage control circuit of the present application is proposed, which is described with reference to Figure 3 、 Figure 4 , Figure 3 The structure diagram of the second embodiment of the pixel voltage control circuit of the present application is shown in FIG. 2. Figure 4 The circuit diagram of the second embodiment of the pixel voltage control circuit of the present application is shown in FIG. 3.

[0061] In the embodiment, the control unit 10 comprises a control chip U1 installed on a flexible circuit board, wherein the first output end, the second output end, the third output end and the fourth output end of the control chip U1 are connected with the processing unit 20 respectively.

[0062] It can be understood that the first output end transmits a first start signal for providing the processing unit 20 with a start signal, and the processing unit 20 will run only when receiving the start signal. In the embodiment, the first start signal can be a high-level signal; the second output end transmits a first square wave signal, wherein the first square wave signal can be a square wave signal with a fixed frequency; the third output end transmits a second square wave signal, wherein the second square wave signal can be a square wave signal following the control variation duty ratio; and the fourth output end transmits an input voltage signal for providing the processing unit 20 with a power supply.

[0063] Further, the processing unit 20 comprises a first processing unit 201, a second processing unit 202 and a third processing unit 203.

[0064] The first processing unit 201 is connected with the first output end of the control chip U1, the second output end of the control chip U1, the third output end of the control chip U1, the fourth output end of the control chip U1, the second processing unit 202 and the pixel unit 30 respectively; the second processing unit 202 is connected with the first processing unit 201, the second output end of the control chip U1, the third output end of the control chip U1, the fourth output end of the control chip U1 and the third processing unit 203 respectively;

[0065] The first processing unit 201 is configured to receive the first start signal, the first square wave signal, the second square wave signal and the voltage signal.

[0066] The first processing unit 201 is further configured to generate a first output voltage signal and transmit the first output voltage signal to the pixel unit 30.

[0067] The first processing unit 201 is further configured to generate a second starting signal and transmit the second starting signal to the second processing unit 202.

[0068] The second processing unit 202 is configured to receive the second starting signal, the first square wave signal, the second square wave signal and the voltage signal.

[0069] The second processing unit 202 is further configured to generate a second output voltage signal and transmit the second output voltage signal to the pixel unit 30.

[0070] The second processing unit 202 is further configured to generate a third starting signal and transmit the third starting signal to the third processing unit 203.

[0071] The third processing unit 203 is configured to receive the third starting signal, the first square wave signal, the second square wave signal and the voltage signal.

[0072] The third processing unit 203 is further configured to generate a third output voltage signal and transmit the third output voltage signal to the pixel unit 30.

[0073] It can be understood that, since there are three pixels in one pixel unit 30, three processing units 20 can be used to realize the operation control of one pixel unit 30, wherein the starting signal of the first processing unit 201 is transmitted by the control chip U1, the first processing unit 201 determines the signal duty cycle by combining the first square wave signal and the second square wave signal when receiving the first starting signal transmitted by the control chip U1, to determine the voltage drop, and the input voltage signal is stepped down based on the voltage drop and output to the pixel unit 30, to realize the control of the pixel unit 30.

[0074] In addition, when the first processing unit 201 is normally operated, a second starting signal is also generated and transmitted to the second processing unit 202, and the level value of the second starting signal is the same as that of the control chip U1.

[0075] It can be easily understood that, when the second processing unit 202 receives the second starting signal transmitted by the first processing unit 201, the signal duty cycle is determined by combining the first square wave signal and the second square wave signal, to determine the voltage drop, and the input voltage signal is stepped down based on the voltage drop and output to the pixel unit 30, to realize the control of the pixel unit 30 and generate a third starting signal transmitted to the third processing unit 203.

[0076] In addition, the third processing unit 203 determines the signal duty cycle by combining the first square wave signal and the second square wave signal to determine the voltage pressure drop when receiving the third start signal transmitted by the second processing unit 202, reduces the input voltage signal based on the voltage pressure drop, and outputs to the pixel unit 30 to realize the control of the pixel unit 30.

[0077] In a specific implementation, the first processing unit 201, the second processing unit 202, and the third processing unit 203 described above can be an integrated chip, and the integrated chip has a plurality of data interfaces.

[0078] It should be noted that the first processing unit 201 includes a first integrated chip U2.

[0079] The enable end of the first integrated chip U2 is connected with the first output end of the control chip U1, the first control end of the first integrated chip U2 is connected with the second output end of the control chip U1, the second control end of the first integrated chip U2 is connected with the third output end of the control chip U1, the voltage input end of the first integrated chip U2 is connected with the fourth output end of the control chip U1, the signal output end of the first integrated unit is connected with the second processing unit 202, and the voltage output end of the first integrated chip U2 is connected with the pixel unit 30.

[0080] The second processing unit 202 includes a second integrated chip U3.

[0081] The enable end of the second integrated chip U3 is connected with the signal output end of the first integrated chip U2, the first control end of the second integrated chip U3 is connected with the second output end of the control chip U1, the second control end of the second integrated chip U3 is connected with the third output end of the control chip U1, the voltage input end of the second integrated chip U3 is connected with the fourth output end of the control chip U1, the signal output end of the second integrated unit is connected with the third processing unit 203, and the voltage output end of the second integrated chip U3 is connected with the pixel unit 30.

[0082] The third processing unit 203 includes a third integrated chip U4.

[0083] The enable end of the third integrated chip U4 is connected with the signal output end of the second integrated chip U3, the first control end of the third integrated chip U4 is connected with the second output end of the control chip U1, the second control end of the third integrated chip U4 is connected with the third output end of the control chip U1, the voltage input end of the third integrated chip U4 is connected with the fourth output end of the control chip U1, and the voltage output end of the third integrated chip U4 is connected with the pixel unit 30.

[0084] In a specific implementation, the enable terminal of the first integrated chip U2 receives a first start signal, the first control terminal of the first integrated chip U2 receives a first square wave signal, the second control terminal of the first integrated chip U2 receives a second square wave signal, and the voltage input terminal of the first integrated chip U2 receives an input voltage signal transmitted by the control chip U1.

[0085] In addition, the enable terminal of the second integrated chip U3 receives a second start signal, the first control terminal of the second integrated chip U3 receives the first square wave signal, the second control terminal of the second integrated chip U3 receives the second square wave signal, and the voltage input terminal of the second integrated chip U3 receives the input voltage signal transmitted by the control chip U1.

[0086] Meanwhile, the enable terminal of the third integrated chip U4 receives a third start signal, the first control terminal of the third integrated chip U4 receives the first square wave signal, the second control terminal of the third integrated chip U4 receives the second square wave signal, and the voltage input terminal of the third integrated chip U4 receives the input voltage signal transmitted by the control chip U1.

[0087] In addition, when the enable terminals of the first integrated chip U2, the second integrated chip U3, and the third integrated chip U4 receive a high-level signal, the voltage output signal is determined according to the first square wave signal, the second square wave signal, and the voltage signal.

[0088] In a specific implementation, when the enable terminal of the integrated chip is at a high level, the duty cycle is determined according to the square wave signals of the first control terminal and the second control terminal to determine the voltage drop, so as to realize the voltage reduction of the input voltage signal of the fourth input terminal, output a voltage signal lower than the input voltage signal from the output terminal of the integrated chip, and output a start signal to provide a start signal for the next processing unit 20, which is the same as the start signal input by the control chip U1 in voltage value.

[0089] The pixel unit 30 includes a first pixel unit 301, a second pixel unit 302, and a third pixel unit 303; the source electrode of the first pixel unit 301 is connected to the voltage output terminal of the first integrated chip U2, the source electrode of the second pixel unit 302 is connected to the voltage output terminal of the second integrated chip U3, and the source electrode of the third pixel unit 303 is connected to the voltage output terminal of the third integrated chip U4.

[0090] The first pixel unit 301 is configured to receive the first output voltage signal and charge according to the first output voltage signal.

[0091] The second pixel unit 302 is configured to receive the second output voltage signal and charge according to the second output voltage signal.

[0092] The third pixel unit 303 is configured to receive the third output voltage signal and charge according to the third output voltage signal.

[0093] It can be understood that, since there are three color pixel columns, for example, red, green and blue, in one pixel unit 30, when each pixel column is controlled, the first output voltage signal output by the first processing unit 201, the second output voltage signal output by the second processing unit 202 and the third output voltage signal output by the third processing unit 203 can be used respectively.

[0094] In addition, in order to achieve the above-mentioned purpose, the present application further provides a display, which comprises the pixel voltage control circuit as described above.

[0095] In addition, in order to achieve the above-mentioned purpose, the present application further provides an electronic device, which comprises the pixel voltage control circuit as described above.

[0096] Since the electronic device adopts all the technical solutions of the above-mentioned embodiments, it has all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be repeated here.

[0097] It should be understood that the above is only for illustration, and does not constitute any limitation on the technical solutions of the present application. In specific applications, those skilled in the art can set it up according to the needs, and the present application does not limit it.

[0098] It should be noted that the above-described workflow is only illustrative and does not limit the scope of protection of the present application. In actual application, those skilled in the art can select part or all of them to achieve the purpose of the embodiment, which is not limited here.

[0099] In addition, technical details not described in detail in the present embodiment can be referred to the pixel voltage control circuit provided by any embodiment of the present application, which will not be repeated here.

[0100] In addition, it should be noted that in this paper, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or system including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such process, method, article or system. Without more limitation, the element defined by the sentence "including a" does not exclude the existence of other identical elements in the process, method, article or system including the element.

[0101] The above-mentioned embodiment numbers of the present application are only for description, not representing the advantages and disadvantages of the embodiments.

[0102] The above merely provides the preferred embodiments of the present application, and is not intended to limit the patent scope of the present application. Any equivalent structure or equivalent flowchart transformation, or direct or indirect application in other related technical fields, which is made based on the contents of the present application specification and drawings, shall be included in the patent protection scope of the present application.

Claims

1. A pixel voltage control circuit, characterized by, The pixel voltage control circuit comprises a control unit, a processing unit and a pixel unit connected in sequence; The control unit is configured to generate a first start signal and transmit the first start signal to the processing unit; The control unit is further configured to generate a first square wave signal and transmit the first square wave signal to the processing unit; The control unit is further configured to generate a second square wave signal and transmit the second square wave signal to the processing unit; The control unit is further configured to provide an input voltage signal to the processing unit; The processing unit comprises a first processing unit, a second processing unit and a third processing unit, wherein: The first processing unit is configured to receive the first start signal, the first square wave signal, the second square wave signal and the input voltage signal, generate a first output voltage signal and transmit the first output voltage signal to the pixel unit, and generate a second start signal and transmit the second start signal to the second processing unit; The second processing unit is configured to receive the second start signal, the first square wave signal, the second square wave signal and the input voltage signal, generate a second output voltage signal and transmit the second output voltage signal to the pixel unit, and generate a third start signal and transmit the third start signal to the third processing unit; The third processing unit is configured to receive the third start signal, the first square wave signal, the second square wave signal and the input voltage signal, generate a third output voltage signal and transmit the third output voltage signal to the pixel unit; The pixel unit is configured to receive the output voltage signal of the processing unit and charge according to the output voltage signal.

2. The pixel voltage control circuit of claim 1, wherein, The control unit comprises a control chip mounted on a flexible circuit board; The first output end, the second output end, the third output end and the fourth output end of the control chip are connected with the processing unit respectively.

3. The pixel voltage control circuit of claim 2, wherein, The processing unit comprises a first processing unit, a second processing unit and a third processing unit; The first processing unit is connected with the first output end of the control chip, the second output end of the control chip, the third output end of the control chip, the fourth output end of the control chip, the second processing unit and the pixel unit respectively; the second processing unit is connected with the first processing unit, the second output end of the control chip, the third output end of the control chip, the fourth output end of the control chip and the third processing unit respectively.

4. The pixel voltage control circuit of claim 3, wherein, The first processing unit comprises a first integrated chip; The enable end of the first integrated chip is connected with the first output end of the control chip, the first control end of the first integrated chip is connected with the second output end of the control chip, the second control end of the first integrated chip is connected with the third output end of the control chip, the voltage input end of the first integrated chip is connected with the fourth output end of the control chip, the signal output end of the first integrated chip is connected with the second processing unit, and the voltage output end of the first integrated chip is connected with the pixel unit.

5. The pixel voltage control circuit of claim 4, wherein, The second processing unit comprises a second integrated chip; The enable end of the second integrated chip is connected with the signal output end of the first integrated chip, the first control end of the second integrated chip is connected with the second output end of the control chip, the second control end of the second integrated chip is connected with the third output end of the control chip, the voltage input end of the second integrated chip is connected with the fourth output end of the control chip, the signal output end of the second integrated chip is connected with the third processing unit, and the voltage output end of the second integrated chip is connected with the pixel unit.

6. The pixel voltage control circuit of claim 5, wherein, The third integrated chip is arranged in the third processing unit. The enable end of the third integrated chip is connected with the signal output end of the second integrated chip, the first control end of the third integrated chip is connected with the second output end of the control chip, the second control end of the third integrated chip is connected with the third output end of the control chip, the voltage input end of the third integrated chip is connected with the fourth output end of the control chip, and the voltage output end of the third integrated chip is connected with the pixel unit.

7. The pixel voltage control circuit of claim 6, wherein, When the enable ends of the first integrated chip, the second integrated chip and the third integrated chip receive a high-level signal, voltage output signals are determined according to the first square wave signal, the second square wave signal and the voltage signal.

8. The pixel voltage control circuit of claim 7, wherein, The pixel unit comprises a first pixel unit, a second pixel unit and a third pixel unit, the source of the first pixel unit is connected with the voltage output end of the first integrated chip, the source of the second pixel unit is connected with the voltage output end of the second integrated chip, and the source of the third pixel unit is connected with the voltage output end of the third integrated chip. The first pixel unit is configured to receive the first output voltage signal and charge according to the first output voltage signal. The second pixel unit is configured to receive the second output voltage signal and charge according to the second output voltage signal. The third pixel unit is configured to receive the third output voltage signal and charge according to the third output voltage signal.

9. A display, characterized by The display comprises the pixel voltage control circuit according to any one of claims 1-8.

10. An electronic device, comprising: The electronic device comprises the pixel voltage control circuit according to any one of claims 1-8.

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