Electronic packaging structure, manufacturing method of electronic packaging structure, and electronic device

Abstract

Embodiments of the present application provide an electronic packaging structure, a manufacturing method of the electronic packaging structure, and an electronic device. Among them, the electronic packaging structure includes: a substrate, a functional chip, a packaging layer, and a redistribution layer. The functional chip is disposed on the substrate and electrically connected to the substrate. The packaging layer is formed on the substrate and covers the functional chip. A wiring trench is formed in the packaging layer. The redistribution layer includes a covering layer and a first electrical connection portion. In the wiring trench, the substrate and / or the functional chip are electrically connected to the first electrical connection portion through wire bonding. The covering layer fills the wiring trench, and the first electrical connection portion is exposed on the surface of the covering layer. Embodiments of the present application provide a solution for the electronic packaging structure to be electrically connected to an external circuit. By directly leading out the electrical connection portion to the outer surface of the packaging structure using the wire bonding process, it has the characteristic of simple process.

Description

Technical Field

[0001] Embodiments of the present application relate to the technical field of chip packaging, and more specifically, the present application relates to an electronic packaging structure, a manufacturing method of the electronic packaging structure, and an electronic device. Background Art

[0002] With the rapid development of electronic technology, various electronic products emerge in an endless stream, and the functions of electronic products are increasing, and the requirements for chip size are also getting higher and higher. In the packaging process of some high-performance chips, the redistribution layer (RDL) is usually formed by using the redistribution technology to adjust the output and input positions of components.

[0003] SIP packaging (System In a Package system-level packaging) integrates multiple functional chips, such as processor, memory and other functional chips, in a single package body to realize a basically complete function. In recent years, SIP packaging structures have been widely used in various types of electronic products. In related technologies, when the SIP packaging structure is electrically connected to an external circuit, the main solution is the combination of ball in mold and laser ablation. The existing solution requires electrically connecting the functional chips on the PCB board first, then adding the ball mounting process (i.e., the SBM process), and then grinding and thinning the packaging layer on the PCB board to expose the solder balls. In addition to the cumbersome steps, the multi-step process also takes a long time.

[0004] Therefore, it is necessary to provide an improved electronic packaging structure to solve at least the above problems. Summary of the Invention

[0005] The purpose of the present application is to provide a new technical solution for an electronic packaging structure, a manufacturing method of the electronic packaging structure, and an electronic device.

[0006] In a first aspect, the present application provides an electronic packaging structure. The electronic packaging structure includes:

[0007] A substrate;

[0008] A functional chip, which is disposed on the substrate and electrically connected to the substrate;

[0009] A packaging layer, which is formed on the substrate and covers the functional chip, and wiring grooves are formed on the packaging layer; and

[0010] A rewiring layer, the rewiring layer includes a covering layer and a first electrical connection portion. In the wiring trench, the substrate and / or the functional chip are electrically connected to the first electrical connection portion through wire bonding. The covering layer fills the wiring trench, and the first electrical connection portion is exposed on the surface of the covering layer.

[0011] Optionally, the rewiring layer further includes a second electrical connection portion, and the second electrical connection portion is disposed in the wiring trench and embedded in the covering layer;

[0012] The second electrical connection portion is electrically connected between the substrate and the first electrical connection portion through wire bonding, or is electrically connected between the functional chip and the first electrical connection portion.

[0013] Optionally, a stepped structure is formed inside the wiring trench, and the stepped structure includes a first stepped layer and a second stepped layer located below the first stepped layer;

[0014] The second electrical connection portion is disposed on the second stepped layer;

[0015] The first electrical connection portion is disposed on the first stepped layer.

[0016] Optionally, the second electrical connection portion is a via pad.

[0017] Optionally, the first electrical connection portion is an input / output pad.

[0018] Optionally, the surface of the covering layer is flush with the surface of the encapsulation layer.

[0019] Optionally, the encapsulation layer and the covering layer are made of the same material.

[0020] Optionally, the functional chip is provided as one or more, and the functional chip is a high-frequency chip.

[0021] Optionally, the wiring trench is formed by laser.

[0022] In a second aspect, the present application provides a method for manufacturing an electronic packaging structure. The method for manufacturing the electronic packaging structure includes:

[0023] Providing a substrate, arranging functional chips on the substrate, and electrically connecting the functional chips to the substrate through wire bonding;

[0024] Forming an encapsulation layer covering the functional chips on the substrate;

[0025] Remove a part of the encapsulation layer at the position where the functional chip is wire-bonded to the substrate lead to form a wiring trench, and disconnect the lead that electrically connects the functional chip and the substrate;

[0026] Electrically connect the substrate and / or the functional chip to the first electrical connection part in the wiring trench by means of secondary wire bonding; and

[0027] Fill the wiring trench with encapsulation material to form a covering layer that covers the lead, and expose the first electrical connection part on the surface of the covering layer to form a rewiring layer.

[0028] Optionally, in the step of performing secondary wire bonding in the wiring trench, it further includes:

[0029] Introduce a second electrical connection part into the wiring trench, electrically connect the second electrical connection part to at least one of the substrate and the functional chip by means of wire bonding, and then electrically connect the second electrical connection part to the first electrical connection part by means of wire bonding.

[0030] In a third aspect, the present application provides an electronic device. The electronic device includes: the electronic packaging structure as described above.

[0031] The beneficial effects of the embodiments of the present application are as follows:

[0032] The embodiments of the present application provide a solution for electrically connecting an electronic packaging structure to an external circuit. By using the method of wire bonding to lead out the electrical connection part to the surface of the electronic packaging structure, and then fixing the position of the lead through the encapsulation process to form a rewiring layer, it can better realize the rewiring of each functional chip and the like in the electronic packaging process. The solution provided by the embodiments of the present application can realize multi-layer lead distribution, and can also simplify the manufacturing process of chip packaging, and reduce manufacturing time and manufacturing costs.

[0033] Through the following detailed description of the exemplary embodiments of the present specification with reference to the accompanying drawings, other features and advantages of the present specification will become clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The drawings incorporated in the specification and constituting a part of the specification illustrate embodiments of the present specification, and together with the description are used to explain the principles of the present specification.

[0035] Figures 1 to 5 It is a flowchart of a method for manufacturing a SIP packaging structure provided by an embodiment of the present application.

[0036] Reference numerals:

[0037] 1. Substrate; 2. Functional chip; 3. Encapsulation layer; 4. Wiring groove; 5. Cover layer; 6. First electrical connection part; 7. Second electrical connection part. Detailed implementation manners

[0038] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. It should be noted that: unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present application.

[0039] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way a limitation on the present application or its application or use.

[0040] Technologies and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such technologies and devices should be regarded as part of the specification.

[0041] In all the examples shown and discussed herein, any specific values should be construed as merely exemplary and not as a limitation. Thus, other examples of the exemplary embodiments may have different values.

[0042] It should be noted that: like reference numerals and letters denote like items in the following drawings, and thus, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.

[0043] According to an embodiment of the present application, an electronic packaging structure is provided.

[0044] The electronic packaging structure is, for example, a SIP package.

[0045] The SIP package structure may be a system-level package well-known in the field of electronic devices. For example, a package body of communication chips such as WiFi and Bluetooth, etc. Of course, it may also be other types of functional chips, which are not listed in detail herein.

[0046] The electronic packaging structure provided by the embodiments of the present application can be applied to various types of electronic devices.

[0047] Among them, the electronic device may be, for example, a headphone, a microphone, a speaker, a sound system, a television, a smart phone, etc., which are not listed in detail herein.

[0048] Figures 1 to 5 The schematic diagram of the manufacturing process of the electronic packaging structure provided by the embodiments of the present application is shown. Among them Figure 5 What is shown is a specific structural form of the manufactured electronic packaging structure, and the electronic packaging structure provided by the embodiments of the present application is not limited to this structural form.

[0049] The following in combination withFigures 1 to 5 A more detailed description is provided for the electronic packaging structure according to the embodiments of the present application.

[0050] The electronic packaging structure provided by the embodiments of the present application, as Figures 1 to 5 shown, includes: a substrate 1, a functional chip 2, a packaging layer 3, and a redistribution layer;

[0051] The functional chip 2 is disposed on the substrate 1 and electrically connected to the substrate 1;

[0052] The packaging layer 3 is formed on the substrate 1 and covers the functional chip 2. A wiring trench 4 is formed on the packaging layer 3;

[0053] The redistribution layer includes a covering layer 5 and a first electrical connection portion 6. The substrate 1 and / or the functional chip 2 are electrically connected to the first electrical connection portion 6 by wire bonding in the wiring trench 4. The covering layer 5 fills the wiring trench 4, and the first electrical connection portion 6 is exposed on the surface of the covering layer 5.

[0054] That is to say, in the solution provided by the embodiments of the present application, the first electrical connection portion 6 is led out by adopting the wire bonding method. The first electrical connection portion 6 can be used to establish an electrical connection relationship with an external circuit or an electrical signal. That is, the first electrical connection portion 6 led out by wire bonding can be equivalent to an electrical connector for electrically connecting the entire electronic packaging structure to an external circuit. In this way, the electronic packaging structure can be conveniently electrically connected to an external circuit through the first electrical connection portion 6.

[0055] The embodiments of the present application provide a solution for electrically connecting an electronic packaging structure to an external circuit, in which a wire bonding method is adopted to lead out an electrical connection portion for external connection to replace the traditional ball in mold + laser ablation solution. The process in the embodiments of the present application is relatively simple.

[0056] In the solution provided by the embodiments of the present application, the first electrical connection portion 6 is led out to the surface of the electronic packaging structure by adopting the wire bonding process, and then the position of the wire is fixed by using a packaging process (i.e., molding), thus forming a redistribution layer, which can better realize the redistribution of each functional chip and the like in the packaging process. The solution provided by the embodiments of the present application can realize multi-layer wire distribution, simplify the manufacturing process of chip packaging, and reduce manufacturing time and manufacturing costs.

[0057] Wherein, the substrate 1 is, for example, a printed circuit board PCB.

[0058] The substrate 1 is a support for the functional chip 2 and also a carrier for the electrical connection of the functional chip 2.

[0059] Among them, the functional chip 2 is, for example, a high-frequency chip.

[0060] Furthermore, the functional chip 2 is, for example, an RF radio frequency chip, a GPS positioning chip, a DRAM memory chip, a Bluetooth chip, etc. And the functional chip 2 is electrically connected to the substrate 1, for example, by means of metal wire bonding.

[0061] The functional chip 2 includes, but is not limited to, high-frequency chips of the above types. That is to say, the functional chip 2 can also be other types of chips. Those skilled in the art can flexibly set the type of the functional chip 2 according to needs, and the present application does not make specific limitations here.

[0062] Among them, the encapsulation layer 3 can be formed on the substrate 1 by using materials and processes well-known to those skilled in the art to encapsulate each functional chip 2 on the substrate 1.

[0063] The materials of the encapsulation layer 3 include, but are not limited to, polymer materials such as injection plastics, etc.

[0064] Among them, the first electrical connection part 6 can be used as the overall input end / output end of the electronic packaging structure to provide the transmission of power supply, signals, grounding, etc.

[0065] In the solution provided by the embodiment of the present application, a wiring groove 4 is opened on the encapsulation layer 3.

[0066] It should be noted that as Figure 2 shown, the wiring groove 4 is located at the position of wire bonding between the functional chip 2 and the substrate 1. That is to say, the wiring groove 4 is opened at the position where the wires for electrical connection between the functional chip 2 and the substrate 1 are located for re-wiring. After that, through the second wire bonding process in the wiring groove 4, multi-layer wire distribution can be achieved. It can be seen that the purpose of opening the wiring groove 4 on the encapsulation layer 3 is to provide a basis for subsequent re-wiring.

[0067] In addition, when performing the second wire bonding process in the wiring groove 4, for example, the wires for electrical connection between the functional chip 2 and the substrate 1 can be broken first, and then the wires are bonded to the first electrical connection part 6. It should be noted that the first electrical connection part 6 is not arranged inside the wiring groove 4.

[0068] After completing the wire bonding to lead out the first electrical connection part 6, an encapsulation material is filled into the wiring groove 4 to form the covering layer 5. The covering layer 5 can fix the positions of the wires. The covering layer 5 is equivalent to performing secondary encapsulation.

[0069] In some examples of the present application, such as Figure 4 and Figure 5 as shown, the rewiring layer further includes a second electrical connection portion 7, and the second electrical connection portion 7 is disposed in the wiring trench 4 and embedded in the covering layer 5; the second electrical connection portion 7 is electrically connected between the substrate 1 and the first electrical connection portion 6 or between the functional chip 2 and the first electrical connection portion 6 through wire bonding.

[0070] That is to say, in the solution provided by the embodiment of the present application, the second electrical connection portion 7 is further introduced during the formation of the rewiring layer. The involved process is: first, at least one of the functional chip 2 and the substrate 1 is electrically connected to the introduced second electrical connection portion 7 through wire bonding, and then the second electrical connection portion 7 is electrically connected to the first electrical connection portion 6 through wire bonding. After that, the wiring trench 4 is filled with a packaging material, that is, a secondary packaging process is performed, and thus the covering layer 5 can be formed. It should be noted that the second electrical connection portion 7 is embedded in the covering layer 5, while the first electrical connection portion 6 is exposed on the surface of the covering layer 5.

[0071] In some examples of the present application, such as Figure 2 and Figure 3 as shown, a stepped structure is formed inside the wiring trench 4, and the stepped structure includes a first stepped layer and a second stepped layer located below the first stepped layer; the second electrical connection portion 7 is disposed on the second stepped layer; the first electrical connection portion 6 is disposed on the first stepped layer.

[0072] In the solution provided by the embodiment of the present application, by reasonably arranging the structural form inside the wiring trench 4, it is helpful to reasonably arrange the positions of the electrical connection structures required for rewiring, so as to smoothly lead out the first electrical connection portion 6 to the outside of the electronic packaging structure as an I / O terminal through the second electrical connection portion 7 by wire bonding.

[0073] In some examples of the present application, the wiring trench 4 can be formed by laser.

[0074] That is, the wiring trench 4 is formed by using the Laser trench process. That is to say, the wiring trench 4 can be formed on the packaging layer 3 through, for example, laser drilling technology. It should be noted that the wiring trench 4 does not penetrate the packaging layer 3.

[0075] Among them, the wiring trench 4 is, for example, disposed in a direction perpendicular to the substrate 1.

[0076] In addition, forming the wiring trench 4 by means of laser has the advantages of high speed, and the inner wall surface of the formed wiring trench is flat and has no burrs, etc.

[0077] In some examples of the present application, the second electrical connection portion 7 is a transfer pad.

[0078] That is to say, the second electrical connection portion 7 is used as an electrical transfer member. The first electrical connection portion 6 can be led out to the surface of the covering layer 5 by means of the second electrical connection portion 7.

[0079] In some examples of the present application, the first electrical connection portion 6 is an input / output pad.

[0080] That is to say, the first electrical connection portion 6 serves as the I / O end of the electronic packaging structure.

[0081] Such as Figure 4 and Figure 5 As shown, the second electrical connection portion 7 can lead out the first electrical connection portion 6 to the side away from the substrate 1 by means of a lead / wire in a wire bonding manner. In such a case, the first electrical connection portion 6 serves as the input / output end (I / O end) of the entire electronic packaging structure, and the second electrical connection portion 7 is used as an electrical transfer member.

[0082] It should be noted that the types of the first electrical connection portion 6 and the second electrical connection portion 7 can be pads, or can be in the form of conductive sheets (such as metal sheets, etc.). Those skilled in the art can flexibly adjust according to specific situations, and the present application does not make specific limitations thereto.

[0083] In some examples of the present application, such as Figure 5 As shown, the surface of the covering layer 5 is flush with the surface of the encapsulation layer 3. This makes the formed electronic packaging structure have a better appearance and is also easy to assemble.

[0084] In some examples of the present application, the encapsulation layer 3 and the covering layer 5 are made of the same material.

[0085] For example, the covering layer 5 includes but is not limited to polymer materials such as injection-molded plastics, etc.

[0086] Of course, the material of the covering layer 5 can also be different from that of the encapsulation layer 3. Those skilled in the art can adjust according to specific situations, and the present application does not make specific limitations herein.

[0087] In some examples of the present application, the functional chip 2 is provided as one or more.

[0088] Optionally, the functional chip 2 is a high-frequency chip. That is to say, each of the functional chips 2 arranged on the substrate 1 can be a high-frequency chip.

[0089] For example, the functional chip 2 can be an RF radio frequency chip, a GPS positioning chip, a DRAM memory chip, a Bluetooth chip, etc.

[0090] Of course, the functional chip 2 includes but is not limited to the high-frequency chips of the above types.

[0091] According to another embodiment of the present application, a manufacturing method of an electronic packaging structure is provided, which can be used to manufacture the above-mentioned electronic packaging structure.

[0092] Figures 1 to 5 The flowchart of the manufacturing method of the electronic packaging structure is shown.

[0093] The following combines Figures 1 to 5 to describe in detail the manufacturing method of the electronic packaging structure provided by the embodiments of the present application.

[0094] A manufacturing method of an electronic packaging structure provided by an embodiment of the present application includes the following steps:

[0095] Step S1: As Figure 1 shown, provide a substrate 1, arrange the functional chip 2 on the substrate 1, and electrically connect the functional chip 2 to the substrate 1 by wire bonding.

[0096] That is to say, step 1 is a wire bonding process, and its purpose is to electrically connect the functional chip 2 to the substrate 1.

[0097] For example, continue to refer to Figure 1 , solder pads are provided on the functional chip 2, and solder pads are also provided on the substrate 1. The two solder pads can be electrically connected by leads / wires, thereby realizing electrical conduction between the functional chip 2 and the substrate 1.

[0098] Step S2: As Figure 2 shown, form a packaging layer 3 covering the functional chip 2 on the substrate 1.

[0099] That is to say, after completing step 1, then a packaging structure, that is, the above-mentioned packaging layer 3, should be provided on the substrate 1. That is, step 2 is a packaging process (i.e., molding).

[0100] The packaging layer 3 can be used to package the functional chip 2 on the substrate 1, and can play a role in protecting the functional chip 2. Moreover, after this packaging process (molding), the lead positions between the functional chip 2 and the substrate 1 can also be fixed.

[0101] Step 3: As Figure 3As shown, part of the encapsulation layer 3 is removed at the position where the functional chip 2 is wire-bonded to the substrate 1 to form a wiring trench 4, and the wires for electrically connecting the functional chip 2 and the substrate 1 are disconnected.

[0102] That is to say, in step 3, grooving is performed at the position where the wires for electrically connecting the functional chip 2 and the substrate 1 are located.

[0103] The design of the wiring trench 4 provides a basis for subsequent rewiring.

[0104] Step 4: As Figure 4 shown, the substrate 1 and / or the functional chip 2 are electrically connected to the first electrical connection part 6 by means of secondary wire bonding in the wiring trench 4.

[0105] That is to say, after the wiring trench 4 is formed, the wire bonding process is continued, which helps to realize multi-layer wire distribution in the subsequent process. That is, step 4 can actually be regarded as a secondary wire bonding process (Second Wire Bonding).

[0106] Step 5: As Figure 5 shown, encapsulating material is filled into the wiring trench 4 to form a covering layer 5 that covers the wires, and the first electrical connection part 6 is exposed on the surface of the covering layer 5 to form a rewiring layer.

[0107] Among them, the first electrical connection part 6 is, for example, equivalent to the I / O end of the entire electronic packaging structure, and can be used for electrical connection with an external circuit.

[0108] Among them, the encapsulating material can be used to wrap wires / wire bonds connecting the first electrical connection part 6, etc., and thus the rewiring layer can be formed.

[0109] In the manufacturing method provided by the embodiments of the present application, the first electrical connection part 6 is led out by wire bonding. The first electrical connection part 6 is far from the substrate 1 and exposed on the surface of the electronic packaging structure. Among them, the wire position is fixed by a secondary encapsulation process, and multi-layer wire distribution can be realized.

[0110] The solution provided by the embodiments of the present application can save the manufacturing cost of forming a rewiring layer in chip packaging, and can simplify the manufacturing process of chip packaging.

[0111] In the traditional redistribution layer (RDL) solution, in order to minimize the I / O terminal density of the package structure, various sputtering and deposition methods are often used, which are usually completed in a wafer fab, resulting in high equipment costs. The solution of this application can directly complete the redistribution layer solution using low-cost WB equipment, overcoming the defects of traditional technologies.

[0112] In the step of removing part of the encapsulation layer 3, the wiring trench 4 can be formed, for example, by laser. That is, the Laser trench process is adopted.

[0113] That is to say, the wiring trench 4 can be formed on the encapsulation layer 3 by, for example, laser drilling technology.

[0114] It should be noted that the wiring trench 4 does not penetrate the encapsulation layer 3. The wiring trench 4 is, for example, arranged in a direction perpendicular to the substrate 1.

[0115] In addition, forming the trench by laser has the advantages of high speed, and the inner wall surface of the formed trench is flat and has no burrs.

[0116] In some examples of this application, in the step of performing secondary wire bonding in the wiring trench, the following steps are further included:

[0117] As Figures 3 to 5 shown, a second electrical connection portion 7 is introduced into the wiring trench 4, the second electrical connection portion 7 is electrically connected to at least one of the substrate 1 and the functional chip 2 by wire bonding, and then the second electrical connection portion 7 is electrically connected to the first electrical connection portion 6 by wire bonding.

[0118] That is to say, when the first electrical connection portion 6 is led out by wire bonding, the first electrical connection portion 6 can also be led out to the surface of the covering layer 5 through the second electrical connection portion 7 as an electrical adapter. Among them, the second electrical connection portion 7 is set as a transfer pad and is connected with leads / wire bonds; the first electrical connection portion 6 is set as an input / output pad, which serves as an I / O terminal.

[0119] As Figure 5 shown, the surface of the finally formed redistribution layer should be flush with the surface of the previously formed encapsulation layer 3. In this way, the appearance of the electronic package is better.

[0120] According to another embodiment of this application, an electronic device is further provided.

[0121] The electronic device includes the electronic packaging structure described in any one of the above. The electronic device is, for example, a smart phone, a tablet computer, a wearable device, etc., and the present application does not limit this.

[0122] In the above embodiments, the differences between the embodiments are mainly described. As long as the different optimization features between the embodiments are not contradictory, they can be combined to form a better embodiment. For the sake of brevity of the text, they will not be elaborated here.

[0123] Although some specific embodiments of the present invention have been described in detail by way of examples, those skilled in the art should understand that the above examples are only for illustration and not for limiting the scope of the present invention. Those skilled in the art should understand that the above embodiments can be modified without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. An electronic packaging structure, characterized in that, comprising: a substrate (1); a functional chip (2), the functional chip (2) being disposed on the substrate (1); a packaging layer (3), the packaging layer (3) being formed on the substrate (1) and covering the functional chip (2), a wiring trench (4) being formed on the packaging layer (3), and a lead bonded between the functional chip (2) and the substrate (1) being disconnected by the wiring trench (4); and a redistribution layer, the redistribution layer comprising a covering layer (5) and a first electrical connection portion (6), in the wiring trench (4), two lead ends are respectively led out to the first electrical connection portion (6) through wire bonding, the substrate (1) and / or the functional chip (2) are electrically connected to the first electrical connection portion (6), the covering layer (5) fills the wiring trench (4), and the first electrical connection portion (6) is exposed on the surface of the covering layer (5).

2. The electronic packaging structure according to claim 1, characterized in that, the redistribution layer further comprises a second electrical connection portion (7), the second electrical connection portion (7) being disposed at the lead end disconnected by the wiring trench (4) and embedded in the covering layer (5); the second electrical connection portion (7) is electrically connected between the substrate (1) and the first electrical connection portion (6) or between the functional chip (2) and the first electrical connection portion (6) through wire bonding.

3. The electronic packaging structure according to claim 2, characterized in that, a stepped structure is formed inside the wiring trench (4), the stepped structure comprising a first stepped layer and a second stepped layer located below the first stepped layer; the second electrical connection portion (7) is disposed on the second stepped layer; the first electrical connection portion (6) is disposed on the first stepped layer.

4. The electronic packaging structure according to claim 2 or 3, characterized in that, the second electrical connection portion (7) is a via pad.

5. The electronic packaging structure according to any one of claims 1-3, characterized in that, the first electrical connection portion (6) is an input / output pad.

6. The electronic packaging structure according to claim 1, characterized in that, the surface of the covering layer (5) is flush with the surface of the packaging layer (3).

7. The electronic packaging structure according to claim 1, characterized in that, the packaging layer (3) and the covering layer (5) are made of the same material.

8. The electronic packaging structure according to claim 1, characterized in that, the functional chip (2) is provided as one or more, and the functional chip (2) is a high-frequency chip.

9. The electronic packaging structure according to claim 1, characterized in that, the wiring trench (4) is formed by a laser method.

10. A manufacturing method of an electronic packaging structure according to any one of claims 1-9, characterized in that, comprising: providing a substrate, arranging functional chips on the substrate, and electrically connecting the functional chips to the substrate by wire bonding; Form a packaging layer on the substrate to cover the functional chip; Remove a part of the packaging layer at the position where the functional chip is wire-bonded to the substrate leads to form a wiring trench, and the wiring trench disconnects the leads for the electrical connection between the functional chip and the substrate; In the wiring trench, respectively lead out the two disconnected lead ends to the first electrical connection part on the surface of the packaging layer by wire bonding, so as to electrically connect the substrate and / or the functional chip with the first electrical connection part by means of secondary wire bonding in the wiring trench; And Fill the wiring trench with a packaging material to form a covering layer covering the leads, and expose the first electrical connection part on the surface of the covering layer to form a redistribution layer.

11. The manufacturing method of the electronic packaging structure according to claim 9, characterized in that, In the step of performing secondary wire bonding in the wiring trench, it further includes: Introduce a second electrical connection part at the lead end disconnected in the wiring trench, electrically connect the second electrical connection part with at least one of the substrate and the functional chip by wire bonding, and then electrically connect the second electrical connection part with the first electrical connection part by wire bonding.

12. An electronic device, characterized in that, comprises: The electronic packaging structure according to any one of claims 1-9.

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