An anti-radiation circuit based on power detection

Abstract

The present invention belongs to the field of anti-radiation technology, specifically an anti-radiation circuit based on power detection. The anti-radiation circuit of the present invention is composed of an amplifier, a power detection module, a control circuit, and a bias circuit connected end to end to form a feedback loop; the control circuit is also connected to a memory; under the action of radiation, the output signal of the amplifier is detected according to the power detection module, and the bias signal of the optimal working state corresponding to the current actual power is read through the lookup table stored in the memory by the control circuit, and the bias circuit is controlled according to the optimal bias control signal, and the bias voltage or current of the amplifier is adjusted through the bias circuit to adjust the circuit performance back to the optimal state. Through a feedback loop, the influence of the total radiation dose effect is reduced, and circuit-level radiation reinforcement of the total dose effect is achieved. The present invention can be integrated and portable, and the working state of the amplifier can be adjusted in real time to enhance the anti-radiation characteristics of the circuit.

Description

Technical Field

[0001] The present invention belongs to the technical field of radiation resistance, and in particular relates to an radiation resistance circuit based on power detection. Background Art

[0002] Humanity's thirst for space exploration is innate. The curiosity to understand ourselves and explore the unknown has driven us to explore outer space. For millennia, humanity has yearned to unlock the mysteries of the universe, to understand the laws governing the movement and evolution of celestial bodies, and to apply this knowledge to every aspect of human existence. Space exploration not only provides a mirror for self-reflection but also allows us to explore aspirations and fantasies about the future. From the Apollo program's manned lunar landings to Tianwen-1's journey to Mars, from Wan Hu of the Ming Dynasty to Chang'e-1's successful lunar landing, humanity has tirelessly left its mark on space.

[0003] Human exploration in space is inseparable from the support of spacecraft. Integrated circuits, as the brains of spacecraft, are the information processing center for electronic systems such as communications, data acquisition and processing, target identification and locking, energy harvesting, unmanned control, and real-time emergency response. Modern spacecraft are inseparable from integrated circuits. Therefore, the performance and functionality of integrated circuits have become one of the most important parameters for measuring spacecraft performance. However, the complex space environment is exposed to a variety of cosmic rays, which can damage electronic devices, affect the performance of electronic systems, and even cause malfunctions.

[0004] Space radiation comes from charged ions in space, the intensity of which is closely related to solar activity. It primarily originates from Earth's radiation belts, solar cosmic rays, and galactic cosmic rays. It also includes the solar wind, auroral radiation, solar X-rays, and a broad spectrum of electromagnetic radiation. It primarily consists of high-energy protons, high-energy electrons, X-rays, neutrons, and gamma rays. These high-energy charged particles are destructive to humans, materials, and components, impacting space flight safety. The accumulation of ionizing radiation in electronic systems can lead to degradation of device parameters. This phenomenon, known as total ionizing dose (TID), is the primary mode of radiation exposure affecting analog, RF, and millimeter-wave circuits. TID occurs primarily through two mechanisms: ionization, where the energy of the incident particles is absorbed by the ionized atoms of the material being irradiated; and atomic displacement, where atoms struck by high-energy ions are displaced from their original positions in the crystal lattice, creating lattice defects. This is a permanent effect that will change the characteristics of the device over time, affecting the performance of electronic equipment and even causing failure. Therefore, integrated circuits used in aerospace applications need to be designed for radiation hardening to withstand the effects of space radiation and avoid spacecraft anomalies.

[0005] At present, integrated circuit technology has entered the deep submicron and even nanometer era, and the radiation resistance of devices has also been enhanced accordingly. However, in the process of human exploration towards Mars and even other galaxies, spacecraft are facing an increasingly complex and unpredictable cosmic environment, so the circuits still need to be radiation hardened.

[0006] Common radiation hardening methods include process-level radiation hardening, transistor-level radiation hardening, and circuit-level radiation hardening. Process-level radiation hardening is to use special production processes in the integrated circuit manufacturing process to reduce the radiation sensitivity of semiconductor devices and improve radiation resistance; transistor-level radiation hardening is to use special transistor layouts to reduce parasitic transistors generated by radiation, reduce leakage current, and avoid the influence of total radiation dose effects, such as ring gates and H-shaped gates. Figure 1 As shown; circuit-level radiation hardening uses special circuit design methods to avoid deterioration of circuit performance, such as redundant circuit design. Summary of the Invention

[0007] The purpose of the present invention is to provide an anti-radiation circuit based on power detection to solve the problem that under the effect of total radiation dose, the threshold voltage and carrier mobility of the transistor change, thereby deteriorating the performance of the circuit.

[0008] The power detection-based radiation protection circuit provided by the present invention includes an amplifier, a power detection module, a memory, a control circuit, and a bias circuit. The amplifier, the power detection module, the control circuit, and the bias circuit are connected end to end to form a feedback loop. The control circuit is also connected to the memory.

[0009] The amplifier is used to realize the amplification function of the circuit, generate an output signal for a given input signal, and realize signal amplification;

[0010] The power detection module is used to detect the output power of the amplifier; and output the detection value to the control circuit;

[0011] The memory is used to store a pre-set irradiation-power-optimal bias control bit lookup table, which is used to compare the bias information required for the amplifier to operate in the optimal working state under the current irradiation, and output the bias information to the control circuit, which controls the bias circuit;

[0012] The control circuit reads the optimal power and the corresponding bias value from the lookup table in the memory according to the actual power value generated by the power detection, and controls and adjusts the parameters of the bias module according to the read optimal bias to restore the performance and function of the amplifier under the current total irradiation dose effect;

[0013] The bias circuit generates an output voltage or current according to the optimal bias control information of the control circuit, controls the bias state of the amplifier, and corrects the output power of the amplifier, so that the amplifier can operate at the optimal operating point under the current irradiation, thereby realizing the irradiation hardening design.

[0014] The working process of the circuit is as follows: under the action of radiation, the power detection module detects the output signal of the amplifier and outputs the detection value to the control circuit; the control circuit reads the bias signal of the optimal working state corresponding to the current actual power from the lookup table stored in the memory, and controls the bias circuit according to the optimal bias control signal. The bias circuit adjusts the bias voltage or current of the amplifier to restore the circuit performance to the optimal state. Through a feedback loop, the impact of the total radiation dose effect is reduced, thereby realizing circuit-level radiation hardening.

[0015] Amplifiers are used to achieve circuit amplification functions. Under the influence of the total radiation dose, ionization and atomic displacement will affect the oxidation trap charges on the surface and body of the transistor device, changing the carrier mobility of the transistor channel and causing the threshold voltage to drift. The transistor performance will change, and parameters such as transconductance, DC characteristics, and small signal characteristics will shift. The performance of the amplifier will deteriorate, the output power will change, and even the function will become abnormal.

[0016] Furthermore, the power detection module can detect its own parameters that change with the total dose effect, and can also detect the output power of the amplifier. The change in this parameter is due to the change in the total irradiation dose, which causes the carrier mobility and threshold voltage of the transistor to change, thereby generating back-gate parasitic transistors and side-wall parasitic transistors, resulting in a change in the transconductance value of the transistor and a change in the output power.

[0017] The power detection module can be implemented on-chip or using discrete components.

[0018] Furthermore, the control circuit is used to query the optimal bias information from the lookup table in the memory according to the change of the amplifier power signal detected by the power detection module, and output the parameter value to the bias circuit to suppress the performance deviation of the parameter under the action of the total radiation dose, adjust the performance of the amplifier back to the optimal performance, and realize circuit-level radiation reinforcement.

[0019] Furthermore, the amplifier can be a single module or multiple modules; the amplifier can be used in analog circuit modules, digital circuit modules, and PA, LNA, and oscillator modules in RF / millimeter wave transceivers, including but not limited to the modules listed, and other modules can also be used; the amplifier can be used for voltage / current / power signal input and output.

[0020] Furthermore, the power detection module, memory and control circuit may be separate sub-modules, or a single circuit may realize the functions of the above three modules.

[0021] Furthermore, each module can be manufactured using a CMOS process, a BiCMOS process, a GeSi process, or a GaAs process, including but not limited to the processes listed above; transistors can be manufactured using bipolar transistors, junction field-effect transistors, or MOSFETs.

[0022] The present invention implements circuit-level radiation reinforcement for circuit modules through a radiation-resistant circuit design based on power detection. According to the power parameters that change with the total radiation dose, a lookup table is used to adjust the bias circuit and restore the circuit performance to a working state.

[0023] Compared with the existing technology, the present invention has the following significant advantages: the traditional circuit-level radiation hardening method adopts an off-chip spectrum modulation method, detects the output spectrum of the amplifier, performs computer-assisted spectrum analysis, and controls the DC bias unit to adjust the amplifier working state, thereby reducing the impact of the total dose effect on the circuit performance; however, this method requires a large spectrum analysis instrument and computer-assisted calculation, cannot be implemented on a single board for radiation hardening, and has a certain delay, and cannot adjust the amplifier working state in real time to correct the amplifier's circuit performance; the present invention adopts a power detection method, which can achieve integration and portability while adjusting the amplifier working state in real time to enhance the circuit's radiation resistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 Circuit diagram for radiation hardening of ring-gate and H-gate transistors.

[0025] Figure 2 This is a diagram of the anti-radiation circuit based on power detection of the present invention.

[0026] Figure 3 This is a diagram of an embodiment of a low-noise amplifier anti-radiation circuit based on power detection according to the present invention. DETAILED DESCRIPTION

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0028] The present invention proposes an anti-radiation circuit based on power detection. According to the parameters that change with the total radiation dose, the circuit performance is adjusted back to the working state through a power detection and lookup table control loop.

[0029] The anti-radiation circuit diagram based on power detection designed by the present invention is as follows: Figure 2 As shown, the system includes: an amplifier 100, a power detection module 110, a memory 120, a control circuit 130, and a bias circuit 140. The amplifier 100 is used to implement the circuit function, generating an output signal based on a given input signal to achieve signal amplification; the power detection module 110 is used to detect the actual output power of the amplifier 100; the memory 120 is used to store a pre-set lookup table for comparing the current actual power with the bias that should be corrected; the control circuit 130 reads the optimal power and corresponding bias value from the lookup table in the memory 120 based on the actual power value generated by the power detection module 120, and controls and adjusts the parameters of the bias circuit 140 based on the read optimal bias to restore the performance and function of the amplifier 100 under the current total radiation dose effect.

[0030] The present invention detects the actual output power of the amplifier 100 according to the power detection module 110 under the action of radiation. The control circuit 130 reads the optimal power and the corresponding bias value from the lookup table in the memory 120 according to the actual power value generated by the power detection module 110, and controls and adjusts the parameters of the bias circuit 140 according to the read optimal bias to restore the performance and function of the amplifier 100 under the current total radiation dose effect, reduce the impact of the total radiation dose effect, and realize circuit-level radiation hardening.

[0031] like Figure 3 FIG. 1 is an example of an embodiment of the anti-radiation circuit based on power detection of the present invention, which is applied to a low noise amplifier LNA in a radio frequency / millimeter wave receiver. Figure 3 The LNA 100 in Figure 2The specific implementation method of the amplifier 100 in the LNA can also be implemented using a cascade connection. The drain of the first common-source NMOS transistor M1 and the source of the second common-gate NMOS transistor M2 are cascaded to form the LNA core cascode structure, which is used to achieve power amplification of the input signal. The drain of the first common-source NMOS transistor M1 is connected in series with a negative feedback inductor Ls to ground. The negative feedback inductor Ls is used to generate the real part of the equivalent input impedance seen from the gate of the first common-source NMOS transistor M1 for impedance matching. The gate of the first common-source NMOS transistor M1 is connected in series with an inductor Lg and a capacitor Cin. The inductor Lg is used to achieve impedance matching of the imaginary part of the input impedance, and the capacitor Cin is used to block DC signals and pass AC signals. The drain of the second common-gate NMOS transistor M2 is connected to the power supply VDD connected in series with the inductor Ld. The power supply VDD provides the DC power supply voltage. At the same time, the second common-gate NMOS transistor M2 outputs the amplified signal to the next stage through the DC blocking capacitor Cout. The bias signal for the gate of the second common-source NMOS transistor M1 is provided by bias circuit 140, while the bias signal for the gate of the second common-gate NMOS transistor M2 is provided by the power supply voltage. The operating state of LNA 100 varies with radiation exposure, and bias circuit 140 controls the bias state of LNA 100, ensuring that the entire LNA 100 operates in the optimal state for the current radiation environment.

[0032] In the present invention, Figure 2 The power detection module 110 in Figure 3 The detection capacitor Cl is connected to the output signal terminal, that is, the output terminal of the DC blocking capacitor Cout of the LNA100. The detection capacitor Cl reads the charge value that changes with the output signal power of the LNA100 and transmits the charge value to the control circuit, which calculates the power value based on the charge change.

[0033] In the present invention, Figure 3 The control circuit and memory are implemented on FPGA. Figure 2 Specific implementations of the memory and control circuit. The control circuit on the FPGA receives charge change information from the detection capacitor and calculates the power value of the LNA 100 under the current irradiation based on the charge change information. The control circuit queries the lookup table in the memory for optimal bias information based on the actual power value, and the memory feeds back the optimal bias information to the control circuit. The memory implemented on the FPGA stores a lookup table that compares irradiation, power, and optimal bias. This optimal bias information is the bias information that optimizes the operation of the LNA 100 under the current irradiation. Based on the optimal bias information obtained from the memory, the control circuit controls the adjustable resistor Rf in the bias circuit, thereby controlling the operating state of the LNA 100.

[0034] In the present invention, Figure 3 The bias circuit in Figure 2In a specific embodiment of the bias circuit, the bias circuit 140 is a constant transconductance bias structure. The gate terminal of the fourth NMOS transistor M4 reads the voltage information of the drain terminal of the third NMOS transistor M3. The source terminal of the fourth NMOS transistor M4 is connected to the ground, and the drain terminal of the fourth NMOS transistor M4 is connected to the drain terminal of the sixth PMOS transistor M6. The gate terminal of the sixth PMOS transistor M6 is connected to the drain terminal, and the gate terminal of the sixth PMOS transistor M6 is connected to the gate terminal of the fifth PMOS transistor M5 to form a self-bias structure. The source terminal of the sixth PMOS transistor M6 is connected to the power supply voltage VDD, which is equivalent to providing power supply bias. The source terminal of the fifth PMOS transistor M5 is connected to the power supply voltage VDD, which is equivalent to providing power supply bias. The drain terminal of the fifth PMOS transistor M5 is connected to the adjustable resistor Rf, and this terminal is connected to the third NMOS transistor M The bias circuit 140 comprises a first NMOS transistor M3 and a second NMOS transistor M4. The first NMOS transistor M3 has a source connected to ground, a drain connected to the adjustable resistor Rf, and the gate of the fourth NMOS transistor M4. The gate of the third NMOS transistor M3 is connected to the gate of the first common-source NMOS transistor M1 in the LNA 100, thereby controlling the bias of the first common-source NMOS transistor M1 and adjusting the operating state of the LNA 100. The adjustable resistor Rf is controlled by a control circuit on the FPGA and changes according to information from the control circuit. One end of the adjustable resistor Rf is connected to the drain of the fifth PMOS transistor M5, and the other end is connected to the gate of the fourth NMOS transistor M4 and the drain of the third NMOS transistor M3. The entire bias circuit 140 implements a constant transconductance bias and is controlled by the control circuit to adjust the bias of the LNA 100.

[0035] The entire low-noise amplifier anti-radiation circuit based on power detection works as follows:

[0036] like Figure 3As shown, as the external radiation dose gradually increases, the total dose effect affects the carrier mobility and threshold voltage of the first common-source NMOS transistor M1 and the second common-gate NMOS transistor M2 in LNA 100, causing changes in the operating state of the first common-source NMOS transistor M1 and the second common-gate NMOS transistor M2 under the current bias. LNA 100 deviates from its optimal operating state. A detection capacitor detects the charge change under the influence of the radiation dose and outputs this change to a control circuit implemented in an FPGA. The control circuit calculates the current actual power value of LNA 100 based on the charge and capacitance values and outputs this power value to a memory implemented in the FPGA. The memory stores a comparison table of radiation dose, power value, and optimal bias. The control circuit uses the optimal bias value found in the memory comparison table based on the current actual power to control the resistance value of adjustable resistor Rf in bias circuit 140, thereby changing the bias circuit's operating state. The adjusted bias circuit 140 controls the bias of the first common-source NMOS transistor M1 in the LNA 100 through the third NMOS transistor M3, thereby correcting the operating state of the LNA 100, thereby enabling the LNA 100 to operate in the optimal operating state under the current radiation, thereby realizing a circuit-level radiation hardening design based on power detection.

[0037] In summary, the present invention designs a radiation-hardened circuit based on power detection. Based on the power value detected as a function of the total radiation dose, a feedback loop is used to adjust the circuit performance to the optimal operating state under the current radiation exposure, thereby achieving circuit-level radiation hardening.

[0038] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A radiation-resistant circuit based on power detection, characterized in that: include: An amplifier (100), a power detection module (110), a memory (120), a control circuit (130), and a bias circuit (140); the amplifier (100), the power detection module (110), the control circuit (130), and the bias circuit (140) are connected end to end in sequence to form a feedback loop, and the control circuit (130) is also connected to the memory (120), wherein: The amplifier (100) is used to realize the amplification function of the circuit; The power detection module (110) is used to detect the output power of the amplifier (100); and output the detection value to the control circuit (130); The memory (120) is used to store a pre-set irradiation-power-optimal bias control bit lookup table, the lookup table being used to compare bias information required for the amplifier (100) to operate in an optimal working state under current irradiation, and output the bias information to the control circuit (130), which controls the bias circuit; The control circuit (130) reads the optimal power and the corresponding bias value from the lookup table in the memory (120) according to the actual power value generated by the power detection module (110), and controls and adjusts the parameters of the bias circuit (140) according to the read optimal bias to restore the performance and function of the amplifier under the current total irradiation dose effect; The bias circuit (140) generates an output voltage or current according to the optimal bias control information of the control circuit (130), controls the bias state of the amplifier (100), and corrects the output power of the amplifier (100), so that the amplifier (100) can also operate at an optimal operating point under current irradiation, thereby realizing an irradiation hardening design; The power detection module (110) detects its own parameters that change with the total dose effect. The change in the parameters is due to the change in the total irradiation dose, which causes the carrier mobility and threshold voltage of the transistor to change, thereby generating back-gate parasitic transistors and side-wall parasitic transistors, causing the transconductance value of the transistor to change and the output power to change.

2. The anti-radiation circuit based on power detection according to claim 1, characterized in that: The power detection module is implemented on-chip or using discrete components.

3. The anti-radiation circuit based on power detection according to claim 1, characterized in that: Corresponding to a radio frequency / millimeter wave receiver, the amplifier 100 uses a low-noise amplifier (LNA) on a radio frequency / millimeter wave receiver. The drain end of the first common-source NMOS transistor M1 and the source end of the second common-gate NMOS transistor M2 of the LNA are cascaded to form a cascode structure at the core of the LNA, which is used to achieve power amplification of the input signal. The source end of the first common-source NMOS transistor M1 is connected in series with a negative feedback inductor Ls to ground. The negative feedback inductor Ls is used to generate the real part of the equivalent input impedance viewed from the gate end of the first common-source NMOS transistor M1 for impedance matching. The gate end of the first common-source NMOS transistor M1 is connected in series with an inductor Lg and a capacitor Cin. The inductor Lg is used to achieve the impedance of the imaginary part of the input impedance. The capacitor Cin is used to realize the function of isolating DC signals and passing AC signals; the drain end of the second common-gate NMOS transistor M2 is connected to the power supply VDD in series with the inductor Ld, and the power supply VDD provides a DC power supply voltage. At the same time, the second common-gate NMOS transistor M2 outputs the amplified signal to the next stage through the DC isolation capacitor Cout; the bias signal of the gate end of the second common-source NMOS transistor M1 is provided by the bias circuit (140), and the bias signal of the gate end of the second common-gate NMOS transistor M2 is provided by the power supply voltage; the working state of the LNA changes under the influence of radiation, and the bias circuit (140) can control the bias state of the LNA so that the entire LNA works in the optimal working state under the current radiation environment.

4. The anti-radiation circuit based on power detection according to claim 3, characterized in that: The power detection module (110) is implemented by a detection capacitor Cl, which is connected to the output signal end, that is, the output end of the DC blocking capacitor Cout of the LNA; the detection capacitor Cl reads a charge value that changes with the output signal power of the LNA, and transmits the charge value to the control circuit (130), and calculates the power value based on the change in charge.

5. The anti-radiation circuit based on power detection according to claim 4, characterized in that: The memory (120) and the control circuit (130) are implemented on an FPGA; the control circuit on the FPGA receives charge change information from the detection capacitor and calculates the power value of the LNA under current irradiation based on the charge change information; the control circuit queries the lookup table in the memory for optimal bias information based on the actual power value, and the memory feeds back the optimal bias information to the control circuit; A lookup table of irradiation-power-optimal bias is stored in a memory implemented on the FPGA, where the optimal bias information is bias information that enables the LNA to work best under the current irradiation; The control circuit controls the adjustable resistor Rf in the bias circuit according to the optimal bias information obtained from the memory, thereby controlling the working state of the LNA.

6. The anti-radiation circuit based on power detection according to claim 5, characterized in that: The bias circuit (140) adopts a constant transconductance bias structure; wherein, the gate end of the fourth NMOS transistor M4 reads the voltage information of the drain end of the third NMOS transistor M3, the source end of the fourth NMOS transistor M4 is connected to the ground, and the drain end of the fourth NMOS transistor M4 is connected to the drain end of the sixth PMOS transistor M6; the gate end of the sixth PMOS transistor M6 is connected to the drain end, and the gate end of the sixth PMOS transistor M6 is connected to the gate end of the fifth PMOS transistor M5 to form a self-bias structure, the source end of the sixth PMOS transistor M6 is connected to the power supply voltage VDD, which is equivalent to providing power supply bias; the source end of the fifth PMOS transistor M5 is connected to the power supply voltage VDD, which is equivalent to providing power supply bias, the drain end of the fifth PMOS transistor M5 is connected to the adjustable resistor Rf, and the drain end of the fifth PMOS transistor M5 is connected to the gate end of the third NMOS transistor M3; The source end of the third NMOS transistor M3 is connected to the ground, the drain end of the third NMOS transistor M3 is connected to the adjustable resistor Rf and the gate end of the fourth NMOS transistor M4, and the gate end of the third NMOS transistor M3 is connected to the gate end of the first common source NMOS transistor M1 in the LNA, and is used to control the bias of the first common source NMOS transistor M1, realize the bias control of the LNA, and adjust the working state of the amplifier; the adjustable resistor Rf is controlled by the control circuit (130) on the FPGA, and the resistance Rf is changed according to the information of the control circuit (130); one end of the adjustable resistor Rf is connected to the drain end of the fifth PMOS transistor M5, and the other end is connected to the gate end of the fourth NMOS transistor M4 and the drain end of the third NMOS transistor M3; the entire bias circuit (140) realizes a constant transconductance bias and is controlled by the control circuit (130) to realize the adjustment of the LNA bias.

Images