Method for manufacturing image display device and image display device

Abstract

A manufacturing method of an image display device and an image display device are provided. The manufacturing method of the image display device of an embodiment has: a step of preparing a second substrate for growing a semiconductor layer including a light-emitting layer on a first substrate; a step of preparing a third substrate including a circuit including a circuit element formed on a light-transmissive substrate, a first insulating film covering the circuit, and a conductive layer including a portion having light reflectivity formed on the first insulating film; a step of joining the semiconductor layer and the third substrate; a step of forming a light-emitting element from the semiconductor layer; a step of forming a second insulating film covering the conductive layer, the light-emitting element, and the first insulating film; a step of forming a through hole penetrating the first insulating film and the second insulating film; and a step of electrically connecting the light-emitting element and the circuit element via the through hole.

Description

Technical Field

[0001] The embodiments of the present invention relate to a method for manufacturing an image display device and an image display device. Background Technology

[0002] There is a desire to achieve thin image display devices with high brightness, wide viewing angles, high contrast, and low power consumption. In response to these market demands, display devices utilizing self-emissive elements are being developed.

[0003] As self-emissive elements, display devices using finely crafted micro-LEDs are anticipated. A method for manufacturing such devices has been described that sequentially transfers individually formed micro-LEDs onto a driving circuit. However, as high-definition displays such as Full HD, 4K, and 8K become more sophisticated and the number of micro-LEDs increases, the transfer process, which involves forming a large number of micro-LEDs individually and sequentially transferring them onto a substrate containing driving circuitry, requires a significant amount of time. Furthermore, issues such as poor connections between the micro-LEDs and the driving circuitry may arise, leading to a decrease in yield.

[0004] The following technique is known: growing a semiconductor layer including a light-emitting layer on a Si substrate, forming electrodes on the semiconductor layer, and then attaching it to a circuit board on which a driving circuit is formed (e.g., Patent Document 1).

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2002-141492 Summary of the Invention

[0008] The technical problem that the invention aims to solve

[0009] One embodiment of the present invention provides a method for manufacturing an image display device that shortens the transfer process of the light-emitting element and improves the yield.

[0010] Technical solutions for solving technical problems

[0011] A method for manufacturing an image display device according to one embodiment of the present invention includes: a step of preparing a second substrate on a first substrate for growing a semiconductor layer including a light-emitting layer; a step of preparing a third substrate, the third substrate including: a circuit including circuit elements formed on a light-transmitting substrate, a first insulating film covering the circuit, and a conductive layer including a light-reflective portion formed on the first insulating film; a step of bonding the semiconductor layer to the third substrate; a step of forming a light-emitting element from the semiconductor layer; a step of forming a second insulating film covering the conductive layer, the light-emitting element, and the first insulating film; a step of forming a through-hole penetrating the first insulating film and the second insulating film; and a step of electrically connecting the light-emitting element and the circuit elements through the through-hole. The light-emitting element is disposed on the portion. The outer periphery of the portion, viewed from above, includes the outer periphery of the light-emitting element projected onto the portion.

[0012] An image display device according to one embodiment of the present invention includes: a light-transmitting substrate having a first surface; a circuit element disposed on the first surface; a first wiring layer electrically connected to the circuit element; a first insulating film covering the circuit element and the first wiring layer on the first surface; a conductive layer including a light-reflective portion disposed on the first insulating film; a first light-emitting element disposed on and electrically connected to the portion; a second insulating film covering at least a portion of the first light-emitting element, the conductive layer, and the first insulating film; a second wiring layer disposed on the second insulating film and electrically connected to a surface of the first light-emitting element including a light-emitting surface facing one side of the first insulating film; and a first through-hole penetrating the first insulating film and the second insulating film and electrically connecting the first wiring layer and the second wiring layer. The outer periphery of the portion, when viewed from above, includes the outer periphery of the first light-emitting element projected onto the portion.

[0013] An image display device according to one embodiment of the present invention includes: a substrate having a first surface and being flexible; a circuit element disposed on the first surface; a first wiring layer electrically connected to the circuit element; a first insulating film covering the circuit element and the first wiring layer on the first surface; a conductive layer including a light-reflective portion disposed on the first insulating film; a first light-emitting element disposed on and electrically connected to the portion; a second insulating film covering at least a portion of the first light-emitting element, the conductive layer, and the first insulating film; a second wiring layer disposed on the second insulating film and electrically connected to a surface of the first light-emitting element including a light-emitting surface facing one side of the first insulating film; and a first through-hole penetrating the first insulating film and the second insulating film and electrically connecting the first wiring layer and the second wiring layer. The outer periphery of the portion, when viewed from above, includes the outer periphery of the first light-emitting element projected onto the portion.

[0014] An image display device according to one embodiment of the present invention includes: a light-transmitting substrate having a first surface; a plurality of transistors disposed on the first surface; a first wiring layer electrically connected to the plurality of transistors; a first insulating film covering the plurality of transistors and the first wiring layer on the first surface; a conductive layer including a light-reflective portion disposed on the first insulating film; a first semiconductor layer of a first conductivity type disposed on and electrically connected to the portion; a light-emitting layer disposed on the first semiconductor layer; a second semiconductor layer of a second conductivity type disposed on the light-emitting layer and different from the first conductivity type; a second insulating film covering the first insulating film, the light-emitting layer, and the first semiconductor layer, and covering at least a portion of the second semiconductor layer; a second wiring layer connected to light-transmitting electrodes disposed on a plurality of light-emitting surfaces of the second semiconductor layer, respectively exposed from the second insulating film corresponding to the plurality of transistors; and a plurality of through holes penetrating the first insulating film and the second insulating film and electrically connecting wiring of the first wiring layer and wiring of the second wiring layer. The outer periphery of the portion, when viewed from above, includes all the outer peripheries of the first semiconductor layer, the light-emitting layer, and the second semiconductor layer projected onto the portion.

[0015] The effects of the invention

[0016] According to one embodiment of the present invention, a method for manufacturing an image display device can be realized that shortens the transfer process of the light-emitting element and improves the yield. Attached Figure Description

[0017] Figure 1 This is a schematic cross-sectional view illustrating a portion of the image display device according to the first embodiment.

[0018] Figure 2A This is a schematic cross-sectional view illustrating a portion of a variation of the image display device according to the first embodiment.

[0019] Figure 2B This is a schematic cross-sectional view illustrating a portion of a variation of the image display device according to the first embodiment.

[0020] Figure 3 This is a schematic block diagram illustrating the image display device of the first embodiment.

[0021] Figure 4 This is a schematic top view illustrating a portion of the image display device according to the first embodiment.

[0022] Figure 5A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0023] Figure 5B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0024] Figure 6A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0025] Figure 6B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0026] Figure 6C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0027] Figure 7A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0028] Figure 7B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0029] Figure 8A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0030] Figure 8B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0031] Figure 9A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0032] Figure 9B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0033] Figure 10A This is a schematic cross-sectional view illustrating a manufacturing method of a modified example of the image display device according to the first embodiment.

[0034] Figure 10B This is a schematic cross-sectional view illustrating a manufacturing method of a modified example of the image display device according to the first embodiment.

[0035] Figure 11A This is a schematic cross-sectional view illustrating a manufacturing method of a modified example of the image display device according to the first embodiment.

[0036] Figure 11B This is a schematic cross-sectional view illustrating a manufacturing method of a modified example of the image display device according to the first embodiment.

[0037] Figure 12This is a schematic perspective view illustrating a method for manufacturing an image display device according to the first embodiment.

[0038] Figure 13 This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0039] Figure 14A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0040] Figure 14B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0041] Figure 14C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0042] Figure 14D This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0043] Figure 15 This is a schematic cross-sectional view illustrating a portion of the image display device according to the second embodiment.

[0044] Figure 16A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the second embodiment.

[0045] Figure 16B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the second embodiment.

[0046] Figure 16C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the second embodiment.

[0047] Figure 17 This is a schematic cross-sectional view illustrating a portion of the image display device according to the third embodiment.

[0048] Figure 18 This is a schematic block diagram illustrating the image display device according to the third embodiment.

[0049] Figure 19A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0050] Figure 19B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0051] Figure 20A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0052] Figure 20B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0053] Figure 21A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0054] Figure 21B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0055] Figure 21C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0056] Figure 22 This is a schematic cross-sectional view illustrating a portion of the image display device according to the fourth embodiment.

[0057] Figure 23A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the fourth embodiment.

[0058] Figure 23B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the fourth embodiment.

[0059] Figure 24 This is a schematic cross-sectional view illustrating a portion of the image display device according to the fifth embodiment.

[0060] Figure 25A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the fifth embodiment.

[0061] Figure 25B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the fifth embodiment.

[0062] Figure 26A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the fifth embodiment.

[0063] Figure 26B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the fifth embodiment.

[0064] Figure 27 This is a schematic cross-sectional view of a portion of an image display device illustrating a variation of the fifth embodiment.

[0065] Figure 28A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a modified example of the fifth embodiment.

[0066] Figure 28B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a modified example of the fifth embodiment.

[0067] Figure 29 This is a graph illustrating the characteristics of a pixel LED element.

[0068] Figure 30 This is a block diagram illustrating the image display device according to the sixth embodiment.

[0069] Figure 31 This is a block diagram illustrating a modified example of the sixth embodiment of an image display device.

[0070] Figure 32 This is a perspective view schematically illustrating the image display device of the first to fifth embodiments and the above-described modifications. Detailed Implementation

[0071] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0072] It should be noted that the accompanying drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the sizes between parts, etc., may not be the same as the actual situation. In addition, even when showing the same part, the dimensions and ratios between them may sometimes be shown differently depending on the accompanying drawings.

[0073] It should be noted that in this application specification and various figures, the same reference numerals are used for the main components that are the same as the components described in the figures, and detailed descriptions are appropriately omitted.

[0074] (First Implementation)

[0075] Figure 1 This is a schematic cross-sectional view of a portion of an image display device illustrating an embodiment.

[0076] Figure 1 The structure of the sub-pixels 20 of the image display device according to this embodiment is schematically shown. The pixels 10 constituting the image displayed in the image display device are composed of a plurality of sub-pixels 20.

[0077] The following explanation sometimes uses a three-dimensional coordinate system of XYZ. Subpixels 20 are arranged on a two-dimensional plane. This two-dimensional plane with the subpixels 20 arranged is the XY plane. The subpixels 20 are arranged along the X-axis and the Y-axis. Figure 1 Indicates what follows. Figure 4 The vector section along line A-A' is a sectional view formed by connecting sections from multiple planes perpendicular to the XY plane. This is also shown in other accompanying figures. Figure 1 As shown, in the cross-sectional view of multiple planes perpendicular to the XY plane, the X and Y axes are not illustrated; instead, the Z axis, which is perpendicular to the XY plane, is shown. That is, in the above figure, the plane perpendicular to the Z axis is considered the XY plane.

[0078] Sub-pixel 20 has a light-emitting surface 153S that is approximately parallel to the XY plane. The light-emitting surface 153S emits light mainly in the positive direction of the Z-axis, which is orthogonal to the XY plane.

[0079] like Figure 1 As shown, the sub-pixel 20 of the image display device includes: a substrate 102, a transistor 103, a first wiring layer 110, a first interlayer insulating film 112, a light-emitting element 150, a second interlayer insulating film 156, a conductive layer 130, a plurality of through holes 161d and 161k, and a second wiring layer 160.

[0080] In this embodiment, the substrate 102 on which the circuit element including the transistor 103 is formed is a light-transmitting substrate, such as a glass substrate. The substrate 102 has a first surface 102a, on which a thin-film transistor (TFT) is formed as the transistor 103. The light-emitting element 150 is driven by the TFT formed on the glass substrate. The process of forming the circuit element including the TFT on a large glass substrate has been established for manufacturing liquid crystal panels, organic EL panels, etc., and has the advantage of utilizing existing equipment.

[0081] Sub-pixel 20 also has a color filter 180. The color filter (wavelength conversion component) 180 is disposed on the surface resin layer 170 via a transparent thin film adhesive layer 188. The surface resin layer 170 is disposed on the interlayer insulating film 156 and the wiring layer 160.

[0082] Transistor 103 is formed on a TFT lower layer film 106 formed on the first surface 102a of substrate 102. The TFT lower layer film 106 is provided for the purpose of ensuring flatness during the formation of transistor 103 and protecting the TFT channel 104 of transistor 103 from contamination during heat treatment. The TFT lower layer film 106 is, for example, SiO2.

[0083] On substrate 102, in addition to the transistor 103 driving the light-emitting element 150, other circuit elements such as transistors and capacitors are formed, and circuit 101 is constituted by wiring, etc. For example, transistor 103 corresponds to the following described later. Figure 3 The driving transistor 26 shown is used as a circuit element, in addition to the selection transistor 24 and capacitor 28.

[0084] Below, circuit 101 includes: TFT channel 104, insulating layer 105, insulating film 108, vias 111s and 111d, and wiring layer 110. Including substrate 102, TFT lower layer film 106, circuit 101, and other major structural components such as interlayer insulating film 112, it is sometimes referred to as circuit board 100.

[0085] In this example, transistor 103 is a p-channel TFT. Transistor 103 includes a TFT channel 104 and a gate 107. The TFT is preferably formed using a low-temperature polysilicon (LTPS) process. The TFT channel 104 is a region of polycrystalline Si formed on substrate 102, which is polycrystalline and activated by annealing the region, which is originally formed as amorphous Si, using laser irradiation. TFTs formed using the LTPS process have sufficiently high mobility.

[0086] The TFT channel 104 includes regions 104s, 104i, and 104d. Regions 104s, 104i, and 104d are all disposed on the lower TFT film 106. Region 104i is disposed between regions 104s and 104d. Regions 104s and 104d are doped with p-type impurities such as boron (B+) or boron fluoride ions (BF2+) and are ohmically connected to vias 111s and 111d.

[0087] Gate 107 is disposed on TFT channel 104 via insulating layer 105. Insulating layer 105 is disposed to insulate TFT channel 104 from gate 107 and from other adjacent circuit elements. When a potential lower than that of region 104s is applied to gate 107, the current flowing between regions 104s and 104d can be controlled by forming a channel in region 104i.

[0088] The insulating layer 105 is, for example, SiO2. The insulating layer 105 may also be a multilayer insulating layer containing SiO2, Si3N4, etc., depending on the area it covers.

[0089] The gate 107 is, for example, polycrystalline Si. The polycrystalline Si film of the gate 107 can be manufactured using a conventional CVD process.

[0090] In this example, the gate 107 and the insulating layer 105 are covered by an insulating film 108. The insulating film 108 is, for example, SiO2, Si3N4, etc. The insulating film 108 is used as a planarization film for forming the wiring layer 110. The insulating film 108 is, for example, a multilayer insulating film containing SiO2, Si3N4, etc.

[0091] Through-holes 111s and 111d are provided to penetrate the insulating film 108. A first wiring layer 110 is formed on the insulating film 108. The first wiring layer 110 includes multiple wirings with different potentials, including wirings 110s and 110d. Figure 1 In subsequent sectional views of the wiring layer, for the purpose of labeling, the label of the wiring layer will be indicated next to a wiring included in the wiring layer.

[0092] Through holes 111s and 111d are respectively set between wiring 110s and 110d and area 104s and 104d, and are electrically connected to them.

[0093] In this example, wiring 110s connects the source region of transistor 103, i.e., region 104s, to the region described later. Figure 3 The power line 3 shown is electrically connected. As described later, wiring 110d is electrically connected to the p-type semiconductor layer 153 on the light-emitting surface 153S side of the light-emitting element 150 via via 161d and wiring 160a.

[0094] The wiring layer 110 and the vias 111s and 111d are formed, for example, from Al, an alloy of Al, or a laminate of Al and Ti. For example, in an Al and Ti laminate, Al is laminated on a thin film of Ti, and then Ti is laminated on Al.

[0095] An interlayer insulating film 112 is provided on the insulating film 108 and the wiring layer 110. The interlayer insulating film (first insulating film) 112 is, for example, an organic insulating film such as PSG (Phosphorus Silicon Glass) or BPSG (Boron Phosphorus Silicon Glass). The interlayer insulating film 112 is provided to achieve uniform bonding during wafer bonding. The interlayer insulating film 112 also serves as a protective film for the surface of the circuit board 100.

[0096] A conductive layer 130 is disposed on the interlayer insulating film 112. The conductive layer 130 includes a light reflector (partial) 130a. A light reflector 130a is disposed for each sub-pixel, and the plurality of light reflectors 130a are not connected to each other on the conductive layer 130. In this example, as described later, the plurality of light reflectors 130a are connected to a ground wire via a via 161k and a wiring 160k.

[0097] The conductive layer 130 includes a light reflector 130a, which is formed of a material with high conductivity. The conductive layer 130 and the light reflector 130a may contain, for example, Ti, Al, or an alloy of Ti and Sn. They may also contain Cu, V, or noble metals with higher light reflectivity such as Ag and Pt. Because the light reflector 130a is formed of the aforementioned metal material with high conductivity, the light-emitting element 150 is electrically connected to the circuit 101 with low resistance.

[0098] The outer periphery of the light reflector 130a, viewed from above in the XY plane, includes the outer periphery when the light-emitting element 150 is projected from above the Z-axis, i.e., viewed from above in the XY plane. By appropriately selecting the material of the light reflector 130a, the scattered light from the light-emitting element 150 can be reflected towards the light-emitting surface 153S, thereby improving the luminous efficiency.

[0099] The light reflector 130a can reflect the scattered light from the light-emitting element 150 downwards toward the light-emitting surface 153S, preventing it from reaching the transistor 103. By blocking the scattered light from the light-emitting element 150 downwards with the light reflector 130a, light can be suppressed from reaching the transistor 103, and malfunction of the transistor 103 can also be prevented.

[0100] The light-emitting element 150 includes an n-type semiconductor layer (first semiconductor layer) 151, a light-emitting layer 152, and a p-type semiconductor layer (second semiconductor layer) 153. The n-type semiconductor layer 151, the light-emitting layer 152, and the p-type semiconductor layer 153 are laminated sequentially from the interlayer insulating film 112 side to the light-emitting surface 153S side.

[0101] The light-emitting element 150, when viewed from above in the XY plane, has a roughly square or rectangular shape, but the corners can also be rounded. The light-emitting element 150 can also have an elliptical or circular shape when viewed from above in the XY plane. By appropriately selecting the shape and arrangement of the light-emitting element when viewed from above, the degree of design freedom is increased.

[0102] Light-emitting element 150, for example, is suitable for use with In X Al Y Ga 1-X-Y Nitride semiconductors such as N (0≦X, 0≦Y, X+Y<1). In one embodiment of the present invention, the light-emitting element 150 is a so-called blue light-emitting diode, and the wavelength of the light emitted by the light-emitting element 150 is, for example, about 467nm±20nm. The wavelength of the light emitted by the light-emitting element 150 can also be about 410nm±20nm, a blue-violet light. The wavelength of the light emitted by the light-emitting element 150 is not limited to the above values ​​and can be any appropriate value.

[0103] The second interlayer insulating film 156 covers the first interlayer insulating film 112, the conductive layer 130, and the light-emitting element 150. The interlayer insulating film 156 is formed, for example, from a transparent organic insulating material. As a transparent resin material, silicone-based resins such as SOG (Spin On Glass) and phenolic varnish-type phenolic resins can be used. The interlayer insulating film 156 can also be, for example, a SiO2 film formed by ALD (Atomic Layer Deposition) or CVD. By covering the light-emitting element 150 and the conductive layer 130, the interlayer insulating film 156 protects the light-emitting element and conductive layer from the influence of the surrounding environment, such as dust and humidity. The interlayer insulating film 156 also serves to insulate the light-emitting element and conductive layer from other conductive materials. The surface of the interlayer insulating film 156 only needs to have a flatness sufficient to form a wiring layer 160 on the interlayer insulating film 156.

[0104] A through hole 161k is provided through the second interlayer insulating film 156. One end of the through hole 161k is connected to the light reflector 130a.

[0105] Through-hole 161d is provided to penetrate the interlayer insulating films 112 and 156. One end of through-hole 161d is connected to wiring 110d.

[0106] A wiring layer 160 is disposed on an interlayer insulating film 156. The wiring layer 160 includes wirings 160a and 160k. Wiring 160a is connected to a p-type semiconductor layer 153 via a contact hole opening in the interlayer insulating film 156. That is, wiring 160a is electrically connected to the p-type semiconductor layer 153 on a portion of the surface including the light-emitting surface 153S. The surface including the light-emitting surface 153S and the light-emitting surface 153S are, for example, on the same plane.

[0107] The other end of wiring 160a is connected to via 161d. Therefore, the p-type semiconductor layer 153 is electrically connected to the drain of transistor 103, i.e., region 104d, via wiring 160a, via 161d, and wiring 110d.

[0108] The other end of wiring 160k is connected to through-hole 161k. Wiring 160k is related to the following... Figure 3 The grounding wire 4 shown is connected. Therefore, the n-type semiconductor layer 151 is connected to the grounding wire 4 via the light reflector 130a, the via 161k, and the wiring 160k.

[0109] The surface resin layer 170 covers the second interlayer insulating film 156 and the second wiring layer 160. The surface resin layer 170 is a transparent resin that protects the interlayer insulating film 156 and the wiring layer 160 and provides a planarized surface for bonding the color filter 180.

[0110] The color filter 180 includes a light-blocking portion 181 and a color conversion portion 182. The color conversion portion 182 is positioned directly above the light-emitting surface 153S of the light-emitting element 150, according to the shape of the light-emitting surface 153S. In the color filter 180, the portion other than the color conversion portion 182 constitutes the light-blocking portion 181. The light-blocking portion 181 is a so-called black matrix, reducing blurring caused by color mixing of light emitted from the adjacent color conversion portion 182, thus enabling the display of a clear image.

[0111] The color conversion unit 182 can be one or two layers. Figure 1 This indicates a two-layer section. Whether the color conversion unit 182 has one or two layers depends on the color, i.e., the wavelength, of the light emitted by the sub-pixel 20. When the emitted color of the sub-pixel 20 is red or green, the color conversion unit 182 is preferably two layers: a color conversion layer 183 and a filter layer 184, which will be described later. When the emitted color of the sub-pixel 20 is blue, it is preferably one layer.

[0112] In the case where the color conversion section 182 has two layers, the first layer, which is closer to the light-emitting element 150, is the color conversion layer 183, and the second layer is the filter layer 184. That is, the filter layer 184 is laminated on the color conversion layer 183.

[0113] The color conversion layer 183 is a layer that converts the wavelength of light emitted by the light-emitting element 150 to a desired wavelength. In the case of a sub-pixel 20 emitting red light, the wavelength of light emitted by the light-emitting element 150, 467nm ± 20nm, is converted, for example, to light with a wavelength of approximately 630nm ± 20nm. In the case of a sub-pixel 20 emitting green light, the wavelength of light emitted by the light-emitting element 150, 467nm ± 20nm, is converted, for example, to light with a wavelength of approximately 532nm ± 20nm.

[0114] The filter layer 184 blocks the wavelength component of blue light that remains after the color conversion layer 183 has not been converted.

[0115] When the light emitted by sub-pixel 20 is blue, sub-pixel 20 can output light via color conversion layer 183 or directly without color conversion layer 183. When the wavelength of the light emitted by light-emitting element 150 is approximately 467nm ± 20nm, sub-pixel 20 can also output light without color conversion layer 183. When the wavelength of the light emitted by light-emitting element 150 is 410nm ± 20nm, a color conversion layer 183 is preferably provided to convert the wavelength of the output light to approximately 467nm ± 20nm.

[0116] Even in the case of blue sub-pixel 20, sub-pixel 20 can have a filter layer 184. By providing the filter layer 184 in the blue sub-pixel 20, the minute external light reflections generated on the surface of the light-emitting element 150 are suppressed.

[0117] (Modified Example)

[0118] A variation of the sub-pixel structure will be explained.

[0119] Figure 2A and Figure 2B These are schematic cross-sectional views illustrating a portion of variations of the image display device according to this embodiment.

[0120] exist Figure 2A In subsequent cross-sectional views of the subpixels, the surface resin layer 170 and the color filter 180 are not shown to avoid complexity. In the following figures, unless otherwise specified, the surface resin layer 170 and the color filter 180 are provided on the second interlayer insulating films 156 and 256 and the second wiring layer 160. The same applies to other embodiments and variations described later.

[0121] exist Figure 2A and Figure 2B In this case, the sub-pixels 20a and 20b differ from those in the first embodiment described above in the method of connecting the light-emitting element 150 to the wirings 160a1 and 160a2. For the same main structural components, the same reference numerals are used, and detailed descriptions are omitted where appropriate.

[0122] like Figure 2A As shown, sub-pixel 20a includes a light-emitting element 150a and wiring 160a1. In this modified example, at least a portion of the light-emitting element 150a, the first interlayer insulating film 112, and the conductive layer 130 are covered by a second interlayer insulating film (second insulating film) 256. The second interlayer insulating film 256 is preferably white resin. The white resin, i.e., the interlayer insulating film 256, reflects the transversely emitted light from the light-emitting element 150a and the backlight generated by the interface of the color filter 180, thereby effectively improving the luminous efficiency of the light-emitting element 150a.

[0123] The second interlayer insulating film 256 can also be made of black resin. By making the interlayer insulating film 256 black resin, the scattering of light within the sub-pixel 20a can be suppressed, and stray light can be suppressed more effectively. Image display devices with suppressed stray light can display clearer images.

[0124] The second interlayer insulating film 256 has an opening 158. The opening 158 is formed by removing a portion of the interlayer insulating film 256 above the light-emitting element 150a. A wiring 160a1 extends to and connects to the p-type semiconductor layer 153a exposed in the opening 158. The wiring 160a1 and... Figure 1 The same applies to wiring 160a, which is connected to via 161d. The p-type semiconductor layer 153a is connected to the drain of transistor 103 via wiring 160a1, via 161d and wiring 110d.

[0125] The p-type semiconductor layer 153a has a light-emitting surface 153S exposed through the opening 158. The light-emitting surface 153S is the surface of the p-type semiconductor layer 153a that faces the surface adjacent to the light-emitting layer 152. The light-emitting surface 153S is preferably roughened. By making the light-emitting surface 153S roughened, the light extraction efficiency of the light-emitting element 150a can be improved.

[0126] like Figure 2BAs shown, in sub-pixel 20b, light-transmitting electrodes 159a and 159k are respectively disposed on wirings 160a2 and 160k. Light-transmitting electrode 159a extends to the light-emitting surface 153S of the open p-type semiconductor layer 153a. Light-transmitting electrode 159a is disposed throughout the light-emitting surface 153S. Light-transmitting electrode 159a electrically connects wiring 160a2 to the p-type semiconductor layer 153a. Wiring 160a2 and... Figure 1 The same applies to wiring 160a, which is connected to via 161d. The p-type semiconductor layer 153a is connected to the drain of transistor 103 via transparent electrode 159a, wiring 160a1, via 161d and wiring 110d.

[0127] By providing a transparent electrode 159a on the light-emitting surface 153S, the connection area between the transparent electrode 159a and the p-type semiconductor layer 153a can be increased, and the luminous efficiency can be improved. When the light-emitting surface 153S is roughened, the connection area between the light-emitting surface 153S and the transparent electrode 159a can be increased, and the contact resistance can be reduced.

[0128] In this embodiment, any of the structures of sub-pixels 20, 20a, and 20b shown above may be included.

[0129] Figure 3 This is a schematic block diagram illustrating the image display device of this embodiment.

[0130] like Figure 3 As shown, the image display device 1 of this embodiment has a display area 2. Subpixels 20 are arranged in the display area 2. The subpixels 20 are arranged in a grid pattern, for example. For example, n subpixels 20 are arranged along the X-axis and m subpixels are arranged along the Y-axis.

[0131] Pixel 10 includes multiple sub-pixels 20 that emit light of different colors. Sub-pixel 20R emits red light. Sub-pixel 20G emits green light. Sub-pixel 20B emits blue light. By emitting light at the desired brightness using three sub-pixels 20R, 20G, and 20B, the emitted color and brightness of a pixel 10 can be determined.

[0132] A pixel 10 includes three sub-pixels: 20R, 20G, and 20B. For example, sub-pixels 20R, 20G, and 20B... Figure 3 The example shown is arranged in a straight line on the X-axis. Each pixel 10 can arrange subpixels of the same color in the same column, or, as shown in this example, arrange subpixels of different colors in each column.

[0133] The image display device 1 also includes a power line 3 and a ground line 4. The power line 3 and ground line 4 are arranged in a grid pattern along the sub-pixels 20. The power line 3 and ground line 4 are electrically connected to each sub-pixel 20, supplying power to each sub-pixel 20 from a DC power supply connected between a power terminal 3a and a GND terminal 4a. The power terminal 3a and GND terminal 4a are respectively located at the ends of the power line 3 and ground line 4, and are connected to a DC power supply circuit located outside the display area 2. The power terminal 3a supplies a positive voltage with reference to the GND terminal 4a.

[0134] The image display device 1 also includes scan lines 6 and signal lines 8. The scan lines 6 are routed in a direction parallel to the X-axis. That is, the scan lines 6 are routed along the row direction of the sub-pixels 20. The signal lines 8 are routed in a direction parallel to the Y-axis. That is, the signal lines 8 are routed along the column direction of the sub-pixels 20.

[0135] The image display device 1 also includes a row selection circuit 5 and a signal voltage output circuit 7. The row selection circuit 5 and the signal voltage output circuit 7 are disposed along the outer edge of the display area 2. The row selection circuit 5 is disposed along the Y-axis of the outer edge of the display area 2. The row selection circuit 5 is electrically connected to the sub-pixels 20 of each column via scan lines 6 and supplies selection signals to each sub-pixel 20.

[0136] The signal voltage output circuit 7 is positioned along the X-axis of the outer edge of the display area 2. The signal voltage output circuit 7 is electrically connected to the sub-pixels 20 of each row via the signal line 8, and supplies signal voltage to each sub-pixel 20.

[0137] Sub-pixel 20 includes: a light-emitting element 22, a selection transistor 24, a driving transistor 26, and a capacitor 28. Figure 3 In this context, the selection transistor 24 is sometimes referred to as T1, the driving transistor 26 as T2, and the capacitor 28 as Cm.

[0138] The light-emitting element 22 is connected in series with the driving transistor 26. In this embodiment, the driving transistor 26 is a p-channel TFT, and an anode electrode connected to the p-type semiconductor layer of the light-emitting element 22 is connected to the drain electrode of the driving transistor 26. The series circuit of the light-emitting element 22 and the driving transistor 26 is connected between the power supply line 3 and the ground line 4. The driving transistor 26 corresponds to... Figure 1 Transistor 103, light-emitting element 22 corresponding to Figure 1 Light-emitting elements 150 and 150a, etc. The current flowing to the light-emitting element 22 is determined based on the voltage applied between the gate and source of the driving transistor 26, and the light-emitting element 22 emits light with a brightness corresponding to the flowing current.

[0139] The select transistor 24 is connected via the main electrode between the gate electrode of the drive transistor 26 and the signal line 8. The gate electrode of the select transistor 24 is connected to the scan line 6. A capacitor 28 is connected between the gate electrode of the drive transistor 26 and the ground line 3.

[0140] The row selection circuit 5 selects a row from the arrangement of m rows of sub-pixels 20 and supplies a selection signal to the scan line 6. The signal voltage output circuit 7 supplies a signal voltage with the required analog voltage value to each sub-pixel 20 of the selected row. The signal voltage is applied between the gate and source of the driving transistor 26 of the sub-pixel 20 of the selected row. The signal voltage is held by the capacitor 28. The driving transistor 26 flows a current corresponding to the signal voltage to the light-emitting element 22. The light-emitting element 22 emits light with a brightness corresponding to the current flowing in the light-emitting element 22.

[0141] The row selection circuit 5 sequentially switches the selected rows, supplying selection signals. That is, the row selection circuit 5 scans the rows arranged by the sub-pixels 20. Current corresponding to the signal voltage flows to the light-emitting elements 22 of the sequentially scanned sub-pixels 20, causing them to emit light. Each pixel 10 emits light with a color and brightness determined by the light emitted by the sub-pixels 20 of each of the RGB colors, displaying an image in the display area 2.

[0142] Figure 4 This is a schematic top view illustrating a portion of the image display device of this embodiment.

[0143] In this embodiment, as in Figure 1 The description states that the light-emitting element 150 (in) Figure 3 The light-emitting element 22) and the driving transistor 103 (in) Figure 3 The driving transistor 26 is laminated upwards along the Z-axis, and the anode electrode of the light-emitting element 150 is electrically connected to the drain electrode of the driving transistor 103 through the through-hole 161d. Additionally, through... Figure 1 The through-hole 161k shown connects the cathode electrode of the light-emitting element 150 to... Figure 3 The grounding wire 4 shown is electrically connected.

[0144] exist Figure 4 The upper part schematically represents a top view of floor I, and the lower part schematically represents a top view of floor II. Figure 4 In this diagram, the first layer is denoted as "I", and the second layer is denoted as "II". The first layer is the layer on which the light-emitting element 150 is formed. That is, the first layer is... Figure 1 The text indicates a main component closer to the positive Z-axis than the first interlayer insulating film 112. The main component is the layer from the n-type semiconductor layer 151 to the second wiring layer 160. Figure 4 The second interlayer insulating film 156 is not shown in the figure.

[0145] The second floor is Figure 1 The text indicates a key component closer to the positive Z-axis than the lower TFT film 106. This key component is the layer between transistor 103 and the first interlayer insulating film 112. Figure 4 The substrate 102, insulating layer 105, insulating film 108 and first interlayer insulating film 112 are not shown in the figure.

[0146] Figure 1 The sectional view is a vector section of the AA' line, represented by a dashed line in both the first and second layers.

[0147] like Figure 4 As shown, the light-emitting element 150 is located between the light reflector 130a and... Figure 1 The through hole 161k shown is connected. The through hole 161k is connected to the wiring 160k via the contact hole 161k1.

[0148] The light-emitting element 150 is connected to the wiring 160a via a contact hole 162a provided in the p-type semiconductor layer 153, and the wiring 160a is connected to the through hole 161d via a contact hole 161d1.

[0149] The through-hole 161d that penetrates the two interlayer insulating films 112 and 156 is schematically represented by a dashed line in the figure.

[0150] Through-hole 161d connects to wiring 110d via contact hole 161d2 provided in the first interlayer insulating film 112. Wiring 110d connects to... Figure 1 The through-hole 111d shown is connected and connected to the drain of transistor 103.

[0151] In this way, by passing through the through-hole 161d through the interlayer insulating films 112 and 156, the light-emitting elements 150 formed in different layers, namely the first layer and the second layer, can be electrically connected to the wiring 110d, and the light-emitting elements 150 can be electrically connected to the transistor 103.

[0152] use Figure 4 The configuration of the light reflector 130a and the light-emitting element 150 is described in the case where the light reflector 130a reflects the scattered light from the light-emitting element 150 downward toward the light-emitting surface 153S.

[0153] The light reflector 130a is a square with a length L2 along the X-axis and a length W2 along the Y-axis when viewed from above in the XY plane. On the other hand, the light-emitting element 150 has a square bottom surface with a length L1 along the X-axis and a length W1 along the Y-axis when viewed from above in the XY plane.

[0154] The lengths of each part are set such that L2 > L1 and W2 > W1. The light reflector 130a is positioned directly below the light-emitting element 150, and the outer periphery of the light reflector 130a includes the outer periphery of the light-emitting element 150. As long as the outer periphery of the light reflector 130a includes the outer periphery of the light-emitting element 150, the shape of the light reflector 130a can be any suitable shape, depending on the design on the circuit board 100, and is not limited to a square shape.

[0155] The light-emitting element 150 emits light upwards, and there is also light emitted downwards, reflected light at the interface between the interlayer insulating film 112 and the surface resin layer 170, and scattered light. Because the conductive layer 130 includes a light reflector 130a with light reflectivity, the scattered light from the light-emitting element 150 downwards is reflected upwards by the light reflector 130a. Therefore, the proportion of light emitted from the light-emitting element 150 directed towards the light-emitting surface 153S increases, and the actual luminous efficiency of the light-emitting element 150 is improved. In addition, by setting the light reflector 130a in this way, light is suppressed from reaching below the light-emitting element 150, so even when circuit elements are placed near or directly below the light-emitting element 150, the influence of light on the circuit elements can be reduced.

[0156] The conductive layer 130 is not limited to the case where the light reflector 130a is connected to the ground wire 4. It can also be connected to other potentials such as the potential of the power line 3, depending on the circuit structure and circuit design.

[0157] The manufacturing method of the image display device 1 according to this embodiment will be described.

[0158] Figures 5A to 9B This is a schematic cross-sectional view illustrating the manufacturing method of the image display device according to this embodiment and its variations.

[0159] like Figure 5A As shown, in the manufacturing method of the image display device 1 of this embodiment, a semiconductor growth substrate (second substrate) 1194 is prepared. The semiconductor growth substrate 1194 has a semiconductor layer 1150 grown on a crystal growth substrate (first substrate) 1001. The crystal growth substrate 1001 is, for example, a Si substrate, a sapphire substrate, etc. A Si substrate is preferred.

[0160] In the semiconductor growth substrate 1194, a p-type semiconductor layer 1153, a light-emitting layer 1152, and an n-type semiconductor layer 1151 are sequentially laminated on the crystal growth substrate 1001, starting from the crystal growth substrate 1001 side. The semiconductor layer 1150 can be grown using, for example, a chemical vapor deposition (CVD) method, and is best suited for metal-organic chemical vapor deposition (MOCVD). The semiconductor layer 1150 is, for example, In... X Al Y Ga 1-X-Y N(0≦X, 0≦Y, X+Y<1), etc.

[0161] like Figure 5B As shown, a circuit board 1100 is prepared. The circuit board (third board) 1100 includes... Figure 1 The circuit 101 described herein. A conductive layer 130 is formed on a first interlayer insulating film (first insulating film) 112 of a circuit board 1100. The conductive layer 130 is formed, for example, by sputtering or the like, through a mask with an opening at the location where the light reflector 130a is formed.

[0162] The semiconductor growth substrate 1194 is flipped upside down and bonded to the circuit substrate 1100 on which the conductive layer 130 is formed. More specifically, the bonding surface of the semiconductor growth substrate 1194 is the exposed surface of the n-type semiconductor layer 1151. The bonding surfaces of the circuit substrate 1100 are the exposed surface of the interlayer insulating film 112 on which the conductive layer 130 is formed and the surface of the conductive layer 130, with the aforementioned surfaces facing each other, so that the two are bonded together.

[0163] In wafer bonding that brings two substrates together, the two substrates are heated and then hot-pressed to achieve bonding. Low-melting-point metals or alloys can also be used during hot-pressing. Examples of low-melting-point metals include Sn and In, while examples of low-melting-point alloys include alloys with Zn, In, Ga, Sn, and Bi as their main components.

[0164] In wafer bonding, in addition to the above description, the bonding surfaces of each substrate can be flattened by chemical mechanical polishing (CMP) and then cleaned by plasma treatment in a vacuum to ensure close contact.

[0165] Figures 6A to 7B This illustrates two variations related to the wafer bonding process. In the wafer bonding process, it can replace... Figure 5A and Figure 5B The process, and for Figures 6A to 6CThe process. Alternatively, it can replace... Figure 5A and Figure 5B The process, and for Figure 7A and Figure 7B The process.

[0166] exist Figures 6A to 6C In the process, after the semiconductor layer 1150 is formed on the crystal growth substrate 1001, the semiconductor layer 1150 is transferred to a support substrate 1190 that is different from the crystal growth substrate 1001.

[0167] like Figure 6A As shown, a semiconductor growth substrate 1294 is prepared. In the semiconductor growth substrate 1294, a semiconductor layer 1150 is grown on a crystal growth substrate 1001, starting from one side of the crystal growth substrate 1001, in the order of an n-type semiconductor layer 1151, a light-emitting layer 1152, and a p-type semiconductor layer 1153.

[0168] In the early stages of crystal growth, crystal defects are easily generated due to the inconsistency of the lattice constant, resulting in an n-type crystal. Therefore, as shown in this example, laminating the n-type semiconductor layer 1151 onto the crystal growth substrate 1001 has advantages such as increased manufacturing process margin and easier yield.

[0169] like Figure 6B As shown, after forming a semiconductor layer 1150 on a crystal growth substrate 1001, a support substrate 1190 is bonded to the exposed surface of the p-type semiconductor layer 1153. The support substrate 1190 is formed, for example, from Si, quartz, or the like. After bonding the support substrate 1190 to the semiconductor layer 1150, the crystal growth substrate 1001 is removed. The removal of the crystal growth substrate 1001 can be achieved, for example, by wet etching or laser stripping.

[0170] like Figure 6C As shown, a circuit board 1100 is prepared. A semiconductor layer 1150 is bonded to the circuit board 1100, on which a conductive layer 130 is formed, through the exposed surface of an n-type semiconductor layer 1151. Afterwards, a support substrate 1190 is removed by laser lift-off or the like.

[0171] exist Figure 7A and Figure 7B In the example shown, after a buffer layer 1140 is provided on the crystal growth substrate 1001, a semiconductor layer 1150 is formed on the buffer layer 1140.

[0172] like Figure 7AAs shown, a semiconductor growth substrate 1194a is prepared. In the semiconductor growth substrate 1194a, a semiconductor layer 1150 is formed on a crystal growth substrate 1001 via a buffer layer 1140. The p-type semiconductor layer 1153, the light-emitting layer 1152, and the n-type semiconductor layer 1151 of the semiconductor layer 1150 are sequentially laminated on the crystal growth substrate 1001 from the crystal growth substrate 1001 side. The buffer layer 1140 is formed on one side of the crystal growth substrate 1001. The buffer layer 1140 is suitable for using nitrides such as AlN. By using the buffer layer 1140, the semiconductor layer 1150 crystal is grown, thereby mitigating the non-integration at the interface between the GaN crystal and the crystal growth substrate 1001.

[0173] like Figure 7B As shown, a circuit board 1100 is prepared. A semiconductor growth substrate 1194a is flipped vertically and bonded to the circuit board 1100, where a conductive layer 130 is formed, via the exposed surface of the n-type semiconductor layer 1151. After wafer bonding, the crystal growth substrate 1001 is removed by laser lift-off or the like.

[0174] In this example, since a buffer layer 1140 remains after the crystal growth substrate 1001 is removed, the buffer layer 1140 is removed in any subsequent process. The removal of the buffer layer 1140 can be performed, for example, after the process of forming the light-emitting element 150 or before the process of forming the light-emitting element 150. The removal of the buffer layer 1140 can be performed, for example, by wet etching.

[0175] Let's return to the manufacturing process after wafer bonding and continue the explanation.

[0176] like Figure 8A As shown, after the circuit substrate 1100 with the conductive layer 130 is bonded to the semiconductor layer 1150 by wafer bonding, the crystal growth substrate 1001 is removed by wet etching, laser stripping, etc.

[0177] like Figure 8B As shown, the semiconductor layer 1150 is etched into the desired shape. The light-emitting element 150 can be formed, for example, using a dry etching process, which is suitable for using anisotropic plasma etching (RIE). Afterward, a second interlayer insulating film 156 is formed by covering the first interlayer insulating film 112, the conductive layer 130, and the light-emitting element 150.

[0178] like Figure 9AAs shown, a contact hole 162a is formed in the second interlayer insulating film 156. A through hole 162k is formed through the interlayer insulating film 156. A through hole 162d is formed through the interlayer insulating films 112 and 156. The contact hole and through hole can be formed, for example, using a resonant interconnect (RIE). It should be noted that, as described above, even if the surface of the interlayer insulating film 156 is not flat, it is sufficient as long as it can cover the light-emitting element 150. When the surface of the second interlayer insulating film 156 is not flat, the depth of the through holes 162k and 162d can be reduced, thus reducing the size of the opening diameter of each through hole or improving the yield.

[0179] like Figure 9B As shown, by sending Figure 9A The contact holes 162a and via holes 162d and 162k shown are filled with conductive material to form via holes 161d and 161k. Then, a second wiring layer 160 is formed, forming wiring 160a and 160k. Alternatively, conductive material can be filled into the via holes 162d and 162k, forming the second wiring layer 160 simultaneously with the formation of via holes 161d and 161k.

[0180] It should be noted that, as described above, the interlayer insulating film 156 can ensure insulation by covering the light-emitting element 150, etc. The flatness of the surface of the interlayer insulating film 156 only needs to be sufficient to form the second wiring layer 160 on the interlayer insulating film 156; a planarization process is not required. By not performing a planarization process on the interlayer insulating film 156, in addition to reducing the number of processes, it also has the advantage of reducing the thickness of the interlayer insulating film 156 in locations other than where the light-emitting element 150 is formed. In areas where the interlayer insulating film 156 is thinner, the depth of the vias 162k and 162d can be reduced. By reducing the depth of the vias, the depth of the via formation can be covered, ensuring a sufficient opening diameter, thus easily ensuring the electrical connection formed by the vias. Therefore, it is possible to suppress the decrease in yield caused by electrical characteristic problems.

[0181] Figure 10A and Figure 10B This is a schematic cross-sectional view illustrating a manufacturing method of a modified example of the image display device of this embodiment.

[0182] Figure 10A and Figure 10B Indicates the use of forming Figure 2A The manufacturing process of the sub-pixel 20a shown. In this modified example, the same process as in the first embodiment is performed before forming the second interlayer insulating film 256 (156) and the via hole. Below, as an example of... Figure 9A The process will be carried out later. Figure 10A and Figure 10B The process details will be explained.

[0183] like Figure 10A As shown, an opening 158 is formed by etching the second interlayer insulating film 256, exposing the light-emitting surface 153S of the p-type semiconductor layer 153a. The etching can be wet etching or dry etching. Subsequently, to improve luminous efficiency, the exposed light-emitting surface 153S of the p-type semiconductor layer 153a is roughened.

[0184] like Figure 10B As shown, a wiring layer 160 is formed, including an opening 158, and wirings 160a1 and 160k are formed by photolithography. Wiring 160a1 is formed by connecting to the exposed p-type semiconductor layer 153a, including the light-emitting surface 153S.

[0185] Thus, the modified example of sub-pixel 20a is formed.

[0186] Figure 11A and Figure 11B This is a schematic cross-sectional view illustrating a manufacturing method of a modified example of the image display device of this embodiment.

[0187] Figure 11A and Figure 11B Indicates the use of forming Figure 2B The manufacturing process of the sub-pixel 20b shown. In this modified example, the same process as in the modified example described above is performed before forming the opening 158. Therefore, below, as in Figure 10A Execution in the future Figure 11A , Figure 11B The process details will be explained.

[0188] like Figure 11A As shown, after exposing the light-emitting surface 153S of the p-type semiconductor layer 153a to form an opening 158, the light-emitting surface 153S is roughened. Simultaneously with or after forming the via 161k through the interlayer insulating film 256, a wiring layer 160 including wirings 160a2 and 160k is formed. Wiring 160a2 is not connected to the surface including the light-emitting surface 153S.

[0189] like Figure 11B As shown, a transparent conductive film is formed covering the wiring layer 160, the second interlayer insulating film 256, and the light-emitting surface 153S. The transparent conductive film is suitable for use with ITO films, ZnO films, etc. The transparent conductive film includes transparent electrodes 159a and 159k. The transparent electrode 159a is formed on the wiring 160a2 and also on the light-emitting surface 153S of the p-type semiconductor layer 153a. Therefore, the wiring 160a2 and the p-type semiconductor layer 153a are electrically connected. Preferably, the transparent electrode 159a is provided to cover the entire exposed surface of the light-emitting surface 153S and is connected to the light-emitting surface 153S.

[0190] This forms the modified sub-pixel 20b.

[0191] A portion of the circuitry other than sub-pixel 20 is formed in the circuit board 1100. For example... Figure 3 The row selection circuit 5 shown is formed together with the drive transistor, selection transistor, etc., on the circuit board 1100. That is, the row selection circuit 5 is sometimes assembled simultaneously during the manufacturing process described above. On the other hand, the signal voltage output circuit 7 is expected to be assembled in a semiconductor device manufactured using a manufacturing process that allows for high integration through fine processing. The signal voltage output circuit 7 is mounted together with the CPU and other major circuit components on other substrates, for example, before or after the color filter described later is assembled, and is interconnected with the wiring of the circuit board 1100.

[0192] For example, circuit board 1100 includes a substrate 102 formed from a glass substrate having circuit 101. The substrate 102 is generally square. Circuit 101 for one or more image display devices is formed on the circuit board 1100. Alternatively, in the case of larger screen sizes, the circuit 101 for constituting an image display device may be divided into multiple circuit boards 1100, and all the divided circuits may be combined to constitute an image display device.

[0193] A semiconductor layer 1150 having approximately the same dimensions as the crystal growth substrate 1001 is formed on the crystal growth substrate 1001. For example, the crystal growth substrate 1001 can be square with the same dimensions as the square circuit substrate 1100. The crystal growth substrate is not limited to the same or similar shape as the circuit substrate 1100, but can also be other shapes. For example, the crystal growth substrate 1001 can also be a generally circular wafer shape with a diameter similar to that of the circuit 101 formed on the square circuit substrate 1100.

[0194] Figure 12 This is a perspective view illustrating a method for manufacturing an image display device according to this embodiment.

[0195] like Figure 12 As shown, by preparing multiple semiconductor growth substrates 1194, the semiconductor layer 1150 formed on multiple crystal growth substrates 1001 can also be bonded to a circuit substrate 1100.

[0196] On the circuit board 1100, a plurality of circuits 101 are arranged in a grid pattern on a substrate 102. The circuits 101 include all the sub-pixels 20 and the like required by an image display device 1. The adjacent circuits 101 are spaced apart by a scribe line width. No circuit elements are arranged at or near the ends of the circuits 101.

[0197] The semiconductor layer 1150 is formed so that its ends coincide with the ends of the crystal growth substrate 1001. Therefore, by aligning and bonding the ends of the semiconductor growth substrate 1194 with the ends of the circuit 101, the ends of the bonded semiconductor layer 1150 can be aligned with the ends of the circuit 101.

[0198] When the semiconductor layer 1150 is grown on the crystal growth substrate 1001, the crystal quality tends to degrade at and near the ends of the semiconductor layer 1150. Therefore, by aligning the ends of the semiconductor layer 1150 with the ends of the circuit 101, the area near the ends of the semiconductor layer 1150 on the semiconductor growth substrate 1194 where crystal quality degrades can be avoided from being used in the display area of ​​the image display device 1. It should be noted that the arrangement method of the crystal growth substrate 1001 has various degrees of freedom. Preferably, the semiconductor layer 1150 is arranged so that the ends do not touch the light-emitting element 150.

[0199] Alternatively, multiple circuit boards 1100 can be prepared and bonded to a semiconductor layer 1150 formed on a crystal growth substrate 1001 of a semiconductor growth substrate 1194.

[0200] Figure 13 This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this embodiment.

[0201] It should be noted that, in Figure 13 To avoid complexity, the structure within the circuit board 100, the interlayer insulating film 112, the vias 161d and 161k, and the wiring layer 160 are not shown. Additionally, Figure 13 This indicates a part of the color conversion components, such as color filter 180. Figure 13 In this context, the structure including the conductive layer 130, the light-emitting element 150, the interlayer insulating film 156, the surface resin layer 170, and through holes (not shown) is referred to as the light-emitting circuit section 172. Furthermore, the structure on the circuit board 100 with the light-emitting circuit section 172 is referred to as the structure 1192.

[0202] like Figure 13 As shown, the color filter (wavelength conversion component) 180 is bonded to the structure 1192 on one side. The other side of the color filter 180 is bonded to the glass substrate 186. A transparent film adhesive layer 188 is provided on one side of the color filter 180, and the filter is bonded to the side of the light-emitting circuit section 172 of the structure 1192 via the transparent film adhesive layer 188.

[0203] In this example, the color filter 180 has color conversion sections arranged in the positive direction of the X-axis in the order of red, green, and blue. For red, a red color conversion layer 183R is provided in the first layer; for green, a green color conversion layer 183G is provided in the first layer; and in all cases, a filter layer 184 is provided in the second layer. For blue, a single-layer color conversion layer 183B is provided, or a filter layer 184 may be provided. A light-blocking section 181 is provided between each color conversion section.

[0204] Align the positions of the color conversion layers 183R, 183G, and 183B with the position of the light-emitting element 150, and attach the color filter 180 to the structure 1192.

[0205] Figures 14A to 14D This is a schematic cross-sectional view illustrating a variation of the manufacturing method of the image display device according to this embodiment.

[0206] Figures 14A to 14D This describes a method for forming color filters using inkjet printing.

[0207] like Figure 14A As shown, a structure 1192 on which a light-emitting circuit section 172 is prepared to be attached to a circuit board 1100 is shown.

[0208] like Figure 14B As shown, a light-shielding portion 181 is formed on the structure 1192. The light-shielding portion 181 is formed, for example, using screen printing, photolithography, or other techniques.

[0209] like Figure 14C As shown, a phosphor corresponding to the emitted color is ejected from the inkjet nozzle to form a color conversion layer 183. The phosphor is colored in the area where the light-shielding portion 181 is not formed. The phosphor can be a fluorescent paint, such as a common phosphor material, a perovskite phosphor material, or a quantum dot phosphor material. When using perovskite phosphor materials or quantum dot phosphor materials, it is possible to achieve various emitted colors and the monochromaticity is increased, which improves color reproducibility, and is therefore preferred. After being drawn through the inkjet nozzle, it is dried at an appropriate temperature and time. The thickness of the coating film during coloring is set to be thinner than the thickness of the light-shielding portion 181.

[0210] As described above, for the blue-emitting sub-pixel, no phosphor is ejected when the color conversion section is not formed. Furthermore, for the blue-emitting sub-pixel, when forming the blue color conversion layer, if the color conversion section can be a single layer, it is preferable that the coating thickness of the blue phosphor is the same as the thickness of the light-shielding section 181a.

[0211] like Figure 14DAs shown, the paint for the filter layer 184 is ejected from the inkjet nozzle. The paint is coated over the phosphor 183a. The combined thickness of the phosphor and the paint coating is the same as the thickness of the light-shielding portion 181.

[0212] The effects of the image display device 1 in this embodiment will be explained.

[0213] In the manufacturing method of the image display device 1 of this embodiment, a semiconductor layer 1150, including a light-emitting layer 1152 for forming a light-emitting element 150, is bonded to a circuit board 1100 including circuit elements such as a transistor 103 that drives the light-emitting element 150. Then, the semiconductor layer 1150 is etched to form the light-emitting element 150. Therefore, compared to the case where a single, monolithically formed light-emitting element is transferred onto the circuit board 1100a, the process of transferring the light-emitting element can be significantly shortened.

[0214] For example, in a 4K image display device, the number of subpixels exceeds 24 million, and in an 8K image display device, the number exceeds 99 million. Mounting such a large number of light-emitting elements individually onto a circuit board requires a significant amount of time, making it difficult to realistically implement image display devices formed from micro-LEDs at a reasonable cost. Furthermore, mounting a large number of light-emitting elements individually can lead to poor connections during installation, reducing yield and inevitably increasing costs.

[0215] In contrast, in the manufacturing method of the image display device 1 in this embodiment, since the semiconductor layer 1150 is attached to the circuit board 1100 as a whole before the semiconductor layer 1150 is monolithically formed, the transfer process is completed in one step.

[0216] After the light-emitting element is directly formed on the circuit board by etching or other means, the light-emitting element is electrically connected to the circuit elements in the circuit board 1100 by forming through holes. Therefore, a uniform connection structure can be achieved and the reduction in yield can be suppressed.

[0217] Furthermore, since it is not necessary to pre-monopolize the semiconductor layer 1150 or form electrodes at the locations corresponding to the circuit elements, but rather to mount it onto the circuit substrate 1100 on a wafer-level basis, no alignment is required. Therefore, the mounting process can be easily performed in a short time. Because no alignment is required during mounting, it is also easy to miniaturize the light-emitting element 150, making it suitable for high-definition displays.

[0218] In this embodiment, for example, since the TFT formed on the glass substrate can be a circuit board 1100, existing flat panel manufacturing processes and equipment can be used.

[0219] In the image display device 1 of this embodiment, sub-pixels 20, 20a, and 20b have a conductive layer 130. The conductive layer 130 includes a light reflector 130a, and light-emitting elements 150 and 150a are disposed on the light reflector 130a. The light-emitting surface 153S of the light-emitting elements 150 and 150a is disposed on the side opposite to the interlayer insulating film 112 on which the light reflector 130a is disposed. Therefore, light scattered downward from the light-emitting elements 150 and 150a is reflected by the light reflector 130a and distributed towards the light-emitting surface 153S. Therefore, the luminous efficiency of the light-emitting elements 150 and 150a is actually improved.

[0220] Because the light reflector 130a can block the downward scattered light from the light-emitting elements 150 and 150a, it can suppress light from shining on the circuit elements located near and below the light-emitting elements 150 and 150a, thus preventing malfunctions of the circuit elements.

[0221] The light reflector 130a is conductive and is ohmically connected to the n-type semiconductor layer 151. Therefore, the wiring on the light-emitting surface 153S can be reduced in the electrical connection with the light-emitting elements 150 and 150a.

[0222] (Second Implementation)

[0223] Figure 15 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0224] Figure 15 It means equivalent to Figure 4 The vector profile of the position of line AA'.

[0225] In this embodiment, the difference from the other embodiments described above is that a plurality of light-emitting elements 150-1 and 150-2 are provided on a light reflector 130a. For major structural components that are the same as in the other embodiments described above, the same reference numerals are used, and detailed descriptions are omitted where appropriate.

[0226] like Figure 15 As shown, in the sub-pixel 220 of the image display device of this embodiment, a plurality of light-emitting elements are provided on a conductive light reflector 130a. In this example, the plurality of light-emitting elements are two light-emitting elements 150-1 and 150-2.

[0227] The light-emitting element 150-1 includes an n-type semiconductor layer 151-1, a light-emitting layer 152-1, and a p-type semiconductor layer 153-1. The n-type semiconductor layer 151-1, the light-emitting layer 152-1, and the p-type semiconductor layer 153-1 are laminated sequentially from the interlayer insulating film 112 side to the light-emitting surface 153S1 side.

[0228] The light-emitting element 150-2 includes an n-type semiconductor layer 151-2, a light-emitting layer 152-2, and a p-type semiconductor layer 153-2. The n-type semiconductor layer 151-2, the light-emitting layer 152-2, and the p-type semiconductor layer 153-2 are also laminated sequentially from the interlayer insulating film 112 side to the light-emitting surface 153S2 side.

[0229] The two light-emitting elements 150-1 and 150-2 have different areas when viewed from above in the XY plane. Hereinafter, the area viewed from above in the XY plane will simply be referred to as the area. In this example, the area of ​​light-emitting element 150-1 is smaller than the area of ​​light-emitting element 150-2. The area of ​​the light-emitting elements is set according to the emission colors of the red, green, and blue sub-pixels. The areas of light-emitting elements 150-1 and 150-2 are appropriately set based on factors such as visual sensitivity and the conversion efficiency of the color conversion unit 182 of the color filter 180.

[0230] The light reflector 130a is provided to reflect the downward scattered light from the light-emitting elements 150-1 and 150-2 toward the light-emitting surfaces 153S1 and 153S2, and to block the downward scattered light. The outer periphery of the light reflector 130a, when viewed from above in the XY plane, includes the outer periphery of the two light-emitting elements 150-1 and 150-2.

[0231] The light reflector 130a is conductive. The light reflector 130a is ohmically connected to the n-type semiconductor layers 151-1 and 151-2. That is, the cathode electrodes of the light-emitting elements 150-1 and 150-2, namely the n-type semiconductor layers 151-1 and 151-2, are electrically connected to each other by the light reflector 130a.

[0232] The first interlayer insulating film 112, the conductive layer 130, and the light-emitting elements 150-1 and 150-2 are covered by the second interlayer insulating film 256. The second interlayer insulating film 256 has openings 258-1 and 258-2, and the light-emitting surfaces 153S1 and 153S2 are exposed from the openings 258-1 and 258-2.

[0233] A through-hole 161k is provided, penetrating the interlayer insulating film 256. One end of the through-hole 161k is connected to the light reflector 130a. The other end of the through-hole 161k is connected to the wiring 160k. The wiring 160k, for example, is connected to... Figure 3 The ground wire 4 of the circuit shown is connected. Therefore, the cathode electrodes of the light-emitting elements 150-1 and 150-2, namely the n-type semiconductor layers 151-1 and 151-2, are electrically connected to the ground wire 4 via the light reflector 130a, the through hole 161k, and the wiring 160k.

[0234] Similar to the other embodiments described above, the through hole 161d is provided to penetrate the interlayer insulating films 112 and 256, and the wiring 110d and 160a2-1 are connected through the through hole 161d.

[0235] A light-transmitting electrode 159a1 is provided throughout the light-emitting surface 153S1. The light-transmitting electrode 159a1 is also provided on the wiring 160a2-1. The light-transmitting electrode 159a1 is located between the light-emitting surface 153S1 and the wiring 160a2-1, electrically connecting the p-type semiconductor layer 153-1 and the wiring 160a2-1. Therefore, the anode electrode of the light-emitting element 150-1, i.e., the p-type semiconductor layer 153-1, is electrically connected to the drain electrode of the transistor 103 via the light-transmitting electrode 159a1, the wiring 160a2-1, the via 161d, and the wiring 110d.

[0236] A light-transmitting electrode 159a2 is provided on the light-emitting surface 153S2 of the light-emitting element 150-2. The light-emitting element 150-2 is part of a sub-pixel adjacent to a sub-pixel based on the light-emitting element 150-2. The light-emitting element 150-2 is electrically connected to the transistor 103 and the light-emitting element 150-1, but is electrically connected to a transistor different from the transistor 103.

[0237] The manufacturing method of the image display device according to this embodiment will be described.

[0238] Figures 16A-16C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this embodiment.

[0239] In this embodiment, the process of bonding the semiconductor layer 1150 to the circuit board 1100 on which the conductive layer 130 is formed is the same as in the other embodiments described above. Hereinafter, from the perspective of… Figure 8A The following steps will be explained after the processing shown.

[0240] like Figure 16A As shown, the semiconductor layer 1150 is shaped into the required shape using RIE or the like to form light-emitting elements 150-1 and 150-2. Then, the first interlayer insulating film 112, the conductive layer 130, and the light-emitting elements 150-1 and 150-2 are covered to form the second interlayer insulating film 256.

[0241] like Figure 16B As shown, via 162k is formed by penetrating the second interlayer insulating film 256. Via 162d is formed by penetrating the interlayer insulating films 112 and 256. Simultaneously with the formation of via 162k and 162d, openings 258-1 and 258-2 are formed in the interlayer insulating film 156, exposing the light-emitting surfaces 153S1 and 153S2. The formation of openings 258-1 and 258-2 can occur either before or after the formation of via 162k and 162d.

[0242] like Figure 16CAs shown, conductive material is filled into the vias 162d and 162k. Then, or simultaneously with filling the vias, a second wiring layer 160 is formed. A light-transmitting electrode 159a1 is formed throughout the light-emitting surface 153S1 and the wiring 160a2-1, electrically connecting the p-type semiconductor layer 153-1 and the wiring 160a2-1. Simultaneously, a light-transmitting electrode 159a2 is formed throughout the light-emitting surface 153S2, and the light-transmitting electrode 159a2 is electrically connected to an electrode different from that of the transistor 103 used for other driving transistors. It should be noted that a light-transmitting electrode 159k is also formed on the wiring 160k.

[0243] Subsequently, as in other implementation methods, a color filter is formed.

[0244] In this way, the image display device of this embodiment can be manufactured.

[0245] The effects of the image display device according to this embodiment will be explained.

[0246] In this embodiment, the same effects as in the other embodiments described above are achieved. That is, after the semiconductor layer 1150 is bonded to the circuit board 1100, individual light-emitting elements 150-1 and 150-2 are formed by etching, thus significantly shortening the transfer process of the light-emitting elements.

[0247] In addition to the same effects as in the other embodiments described above, in this embodiment, a plurality of light-emitting elements 150-1 and 150-2 are provided on the light reflector 130a of the conductive layer 130, and the n-type semiconductor layers 151-1 and 151-2 are electrically connected to each other. Therefore, since the plurality of light-emitting elements 150-1 and 150-2 are electrically connected by the light reflector 130a, the winding of the wiring on the light-emitting surfaces 153S1 and 153S2 can be reduced, thereby improving the circuit design efficiency.

[0248] It should be noted that the above description illustrates an example of setting two light-emitting elements 150-1 and 150-2 on a single light reflector 130a, but it is also possible to set three or more light-emitting elements on a single light reflector 130a. As mentioned above, since the area of ​​the light-emitting element can be changed according to the emitted color, design efficiency can be further improved by appropriately setting the number and color of the light-emitting elements set on the light reflector 130a.

[0249] (Third Implementation)

[0250] Figure 17 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0251] Here, Figure 17 It means equivalent to Figure 4The vector profile of the position of line AA'.

[0252] In this embodiment, the difference from the other embodiments described above lies in the structure of the light-emitting element 350 and the structure of the transistor 203 driving the light-emitting element 350. Additionally, in this example, the conductive layer 330 includes a light reflector 330a, the structure of which differs from the other embodiments described above. For major structural components that are the same as in the other embodiments described above, the same reference numerals are used, and detailed descriptions are omitted where appropriate.

[0253] like Figure 17 As shown, the sub-pixel 320 of the image display device in this embodiment includes: a transistor 203, a light-emitting element 350, and a light reflector 330a.

[0254] In this example, transistor 203 is an n-channel TFT. Transistor 203 includes a TFT channel 204 and a gate 107. The TFT channel 204 is a region of polycrystalline Si formed on the first surface 102a of the substrate 102. This region, formed as amorphous Si, is annealed by laser irradiation, thereby becoming polycrystalline and activated. The TFT channel 204 includes regions 204s, 204i, and 204d. Regions 204s, 204i, and 204d are all disposed on the lower TFT film 106. Region 204i is disposed between regions 204s and 204d. Regions 204s and 204d are doped with n-type impurities such as P and are ohmically connected to vias 111s and 111d.

[0255] Gate 107 is disposed on TFT channel 204 via insulating layer 105. When a potential higher than that of region 204s is applied to gate 107, the current flowing between regions 204s and 204d is controlled by forming a channel in region 204i.

[0256] The structure of the upper structure and wiring layer of transistor 203 is the same as in the other embodiments described above.

[0257] A light reflector 330a is disposed on the interlayer insulating film 112. A light-emitting element 350 is disposed on the light reflector 330a. In this example, the light reflector 330a is disposed across the interlayer insulating film 112, and light-emitting elements for adjacent sub-pixels and other sub-pixels are also disposed on the same light reflector 330a. In this example, the light reflector 330a is, for example, similar to the one described later. Figure 18 The power line 3 shown in the circuit diagram is connected. That is, the anode electrode of the light-emitting element 350 of each sub-pixel 320 constituting the image display device of this embodiment is electrically connected to the power line 3 via a light reflector 330a, which serves as a shared wiring.

[0258] The conductive layer 330 includes through-holes 331. In this example, through-holes 331 are provided in the light reflector 330a for each light-emitting element 350. The through-holes 331 are positioned corresponding to the positions of the through-holes 161d3 penetrating the interlayer insulating films 112 and 256 in a top-down XY plane view. The through-holes 331 have a diameter larger than that of the through-holes 161d3 to avoid contact with them. The space between the through-holes 331 and the through-holes 161d3 is filled with the material of the interlayer insulating film 256.

[0259] The light-emitting element 350 includes a p-type semiconductor layer (first semiconductor layer) 353, a light-emitting layer 352, and an n-type semiconductor layer (second semiconductor layer) 351. The p-type semiconductor layer 353, the light-emitting layer 352, and the n-type semiconductor layer 351 are sequentially laminated from the first interlayer insulating film 112 of the circuit substrate 100 to the light-emitting surface 351S. The light-emitting element 350, when viewed from above in the XY plane, is, for example, formed into a generally square or rectangular shape, but the corners may also be rounded. The light-emitting element 350, when viewed from above in the XY plane, may also have, for example, an elliptical or circular shape. By appropriately selecting the shape and arrangement of the light-emitting element when viewed from above, the degree of design freedom is increased.

[0260] The light-emitting element 350 can be made of the same material as in the other embodiments described above. For example, the light-emitting element 350 emits blue light with a wavelength of about 467nm ± 20nm or cyan-violet light with a wavelength of 410nm ± 20nm.

[0261] A second interlayer insulating film (second insulating film) 256 covers the first interlayer insulating film 112 and the light-emitting element 350. The second interlayer insulating film 256 has an opening 358. The opening 358 is formed on the light-emitting element 350, and the interlayer insulating film 256 is not disposed on the light-emitting surface 351S of the light-emitting element 350. In order to reflect the light emitted by the light-emitting element 350 and effectively emit it through the opening 358, the interlayer insulating film 256 is suitable to be made of white resin, but it can also be made of black resin, as in the variations of the other embodiments described above.

[0262] The light-emitting surface 351S is the surface of the n-type semiconductor layer 351 that faces the surface adjacent to the light-emitting layer 352. The light-emitting surface 351S is roughened.

[0263] A through hole 161d3 is provided, which penetrates the interlayer insulating films 112 and 256 and the light reflector 330a. One end of the through hole 161d3 is connected to the wiring 110d.

[0264] Wiring layer 160 is disposed on interlayer insulating film 256. Wiring layer 160 includes wiring 160k3. One end of through hole 161d3 penetrating the second interlayer insulating film 256 is connected to wiring 110d, and the other end of through hole 161d3 is connected to wiring 160k3.

[0265] An opening 358 is provided on the interlayer insulating film 256 at a position corresponding to the light-emitting element 350. The light-emitting surface 351S is exposed through the opening 358. A light-transmitting electrode 159k3 is provided throughout the exposed light-emitting surface 351S. The light-transmitting electrode 159k3 is also provided on the wiring 160k3. The light-transmitting electrode 159k3 is provided between the light-emitting surface 351S and the wiring 160k3, connecting the n-type semiconductor layer 351 and the wiring 160k3. Therefore, the n-type semiconductor layer 351 is electrically connected to the region 104d of the transistor 203 corresponding to the drain electrode via the light-transmitting electrode 159k3, the wiring 160k3, the via 161d3, and the wiring 110d.

[0266] It should be noted that, regarding the connection between the light-emitting element 350 and the wiring 160k3, as in... Figure 1 , Figure 2A As explained above, the wiring can also be directly connected to the wiring 160k3 without passing through the transparent electrode 159k3. Alternatively, the second interlayer insulating film can be made of transparent resin, and the wiring can be connected without forming an opening 358. In the above cases, the surface roughening process can be omitted.

[0267] In the sub-pixel 320 of the image display device in this embodiment, a surface resin layer 170 is provided on the interlayer insulating film 256 and the wiring layer 160, and an upper structure such as a color filter 180 is formed in the same way as in the other embodiments described above.

[0268] Figure 18 This is a schematic block diagram illustrating the image display device of this embodiment.

[0269] like Figure 18 As shown, the image display device 301 of this embodiment includes: a display area 2, a row selection circuit 305, and a signal voltage output circuit 307. Similar to the other embodiments described above, sub-pixels 320 are arranged in a grid pattern on the display area 2, for example, on the XY plane.

[0270] Pixel 10, like in the other embodiments described above, includes multiple sub-pixels 320 that emit light of different colors. Sub-pixel 320R emits red light. Sub-pixel 320G emits green light. Sub-pixel 320B emits blue light. The three sub-pixels 320R, 320G, and 320B emit light at a desired brightness, thereby determining the emission color and brightness of pixel 10.

[0271] A pixel 10 is formed by three sub-pixels 320R, 320G, and 320B, which are arranged in a straight line on the X-axis, as in this example. Each pixel 10 can arrange sub-pixels of the same color in the same column, or, as in this example, arrange sub-pixels of different colors in each column.

[0272] Subpixel 320 includes: a light-emitting element 322, a selection transistor 324, a driving transistor 326, and a capacitor 328. Figure 18 In the diagram, the selection transistor 324 is denoted as T1, the driving transistor 326 is denoted as T2, and the capacitor 328 is denoted as Cm.

[0273] In this embodiment, the light-emitting element 322 is disposed on the power supply line 3 side, and the driving transistor 326, which is connected in series with the light-emitting element 322, is disposed on the ground line 4 side. That is, the driving transistor 326 is connected to a potential side that is lower than that of the light-emitting element 322. The driving transistor 326 is an n-channel transistor.

[0274] A select transistor 324 is connected between the gate electrode of the drive transistor 326 and the signal line 308. A capacitor 328 is connected between the gate electrode of the drive transistor 326 and the ground line 4.

[0275] In order to drive the n-channel transistor, i.e., the driving transistor 326, the line selection circuit 305 and the signal voltage output circuit 307 supply a signal voltage with a polarity different from that in the other embodiments described above to the signal line 308.

[0276] In this embodiment, because the driving transistor 326 is n-channel, the polarity of the signal voltage differs from that in the other embodiments described above. Specifically, the row selection circuit 305 supplies a selection signal to the scan line 306 to sequentially select one row from the arrangement of m rows of sub-pixels 320. The signal voltage output circuit 307 supplies a signal voltage with the required analog voltage value to each sub-pixel 320 of the selected row. The driving transistor 326 of the selected row's sub-pixel 320 flows a current corresponding to the signal voltage to the light-emitting element 322. The light-emitting element 322 emits light with a brightness corresponding to the flowing current.

[0277] The manufacturing method of the image display device according to this embodiment will be described.

[0278] Figures 19A to 21C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this embodiment.

[0279] like Figure 19AAs shown, in this embodiment, a semiconductor growth substrate 1294 is used. In the semiconductor growth substrate 1294, a semiconductor layer 1150 is grown and laminated on a crystal growth substrate 1001 from one side of the crystal growth substrate 1001 in the order of an n-type semiconductor layer 1151, a light-emitting layer 1152, and a p-type semiconductor layer 1153.

[0280] A metal layer 1130 is formed on the exposed surface of the p-type semiconductor layer 1153 opposite to the surface where the light-emitting layer 1152 is located. The metal layer 1130 may contain, for example, an alloy of Ti, Al, Ti and Sn. It may also contain noble metals with high light reflectivity such as Cu, V, Ag, and Pt.

[0281] By forming a metal layer on the surface of the p-type semiconductor layer 1153, the p-type semiconductor layer 1153 can be protected by the metal layer 1130, which has the advantage of making it easy to store the semiconductor growth substrate 1294 on which the metal layer 1130 is formed. It should be noted that by forming a thin film layer using a hole-injection-compatible material at the interface between the p-type semiconductor layer 1153 and the metal layer 1130, the driving voltage of the light-emitting element 350 can be further reduced. For example, an ITO film can be used as the hole-injection-compatible material.

[0282] like Figure 19B As shown, the exposed surface of the metal layer 1130 disposed on the semiconductor growth substrate 1294 is bonded to the open surface of the first interlayer insulating film 112 of the circuit board 1100.

[0283] In the wafer bonding process, as described in the first embodiment, after transferring the semiconductor growth substrate to the support substrate, the crystal growth substrate 1001 can be removed, and bonding can be performed after forming the metal layer 1130. In this case, a semiconductor growth substrate 1194, which is grown and laminated on the crystal growth substrate 1001 from one side of the crystal growth substrate 1001 in the order of p-type semiconductor layer 1153, light-emitting layer 1152, and n-type semiconductor layer 1151, can be used. The semiconductor growth substrate 1194 has already been associated with... Figure 5A The following explanation is provided: A metal layer 1130 is formed on the exposed surface of the p-type semiconductor layer 1153 of the semiconductor growth substrate 1194.

[0284] Alternatively, as described in the first embodiment, the semiconductor layer 1150 can be grown on the crystal growth substrate 1001 via a buffer layer.

[0285] The metal layer can also be disposed on one side of the circuit board 1100.

[0286] exist Figure 20A and Figure 20BIn the present paper, the case in which a metal layer 1120 is also formed on one side of the circuit board 1100 is shown.

[0287] like Figure 20A As shown, a metal layer 1120 is formed on the interlayer insulating film 112 of the prepared circuit board 1100.

[0288] like Figure 20B As shown, a circuit board 1100 with a metal layer 1120 is bonded to a semiconductor growth substrate 1294 with a metal layer 1130. In this modified example, because the metal layers are bonded to each other, wafer bonding can be performed more easily by using the same metal material or an alloy containing the same metal material in each metal layer. It should be noted that the metal layers need to be provided on at least one side of the semiconductor growth substrate 1294 side and the circuit board 1100 side.

[0289] like Figure 21A As shown, after wafer bonding, the substrate 1001 for crystal growth is removed by wet etching or laser lift-off, and the semiconductor layer 1150 is etched by anisotropic etching to form the light-emitting element 250. A through-hole 331 is formed on the light reflector 330a at a position corresponding to the wiring 110d. A second interlayer insulating film 256 is formed by covering the conductive layer 330, the first interlayer insulating film 112, and the light-emitting element 350.

[0290] like Figure 21B As shown, a via 162d3 is formed in the second interlayer insulating film 256. The via 162d3 can be formed using a resonant optical element (RIE) or similar method. Viewed from above in the XY plane, an opening 358 is formed in the interlayer insulating film 256 at a position corresponding to the light-emitting element 350. In this example, the light-emitting surface 351S exposed through the opening 358 is roughened.

[0291] like Figure 21C As shown, conductive material is filled into the via 162d3. Subsequently, or simultaneously with filling the via, a second wiring layer 160 is formed, and wiring 160k3 is formed. A light-transmitting electrode 159k3 is formed on the light-emitting surface 351S and wiring 160k3, electrically connecting the n-type semiconductor layer 351 and wiring 160k3.

[0292] Subsequently, similar to the other embodiments described above, a surface resin layer 170 covering the interlayer insulating film 256 and the wiring layer 160 is formed, and an upper structure such as a color filter is formed. Then, each image display device 301 is cut. In this way, the image display device 301 can be manufactured.

[0293] The light reflector 330a is not limited to a single case; it can also be configured as an island in each light-emitting element 350 or every other light-emitting element 350, with multiple light reflectors 330a electrically connected by wiring included in the conductive layer 330.

[0294] It should be noted that, in the above description, for the light-emitting elements 350 corresponding to all sub-pixels 320, the light reflector 330a of the conductive layer 330 is connected to the same potential, but for example, it can also be connected to different power lines 3, that is, separate power potentials.

[0295] The effects of the image display device 301 in this embodiment will be explained.

[0296] In this embodiment, the same effects as in the other embodiments described above are achieved. That is, after the semiconductor layer 1150 is bonded to the circuit board 1100, a single light-emitting element 350 is formed by etching, thus significantly shortening the transfer process of the light-emitting element.

[0297] In the image display device of this embodiment, in addition to the effects of the other embodiments described above, the conductive layer 330 includes a single light reflector 330a and is formed into a simple pattern that only includes through holes 331. Therefore, it is easy to design patterns and the development cycle of the image display device can be shortened.

[0298] In this embodiment, by making the n-type semiconductor layer 351 the light-emitting surface 351S, it is easier to roughen the surface. By connecting the wiring 160k3 to the light-emitting surface 351S, a sub-pixel with high luminous efficiency can be formed. When the light-emitting surface is roughened, the thicker side of the roughened semiconductor layer can be etched more deeply, thus increasing the connection area. Because the n-type semiconductor layer 251 is easy to make with low resistance and can be formed thicker without increasing the resistance value, it has the advantage of being able to be etched more deeply.

[0299] (Fourth Implementation)

[0300] In the image display device of this embodiment, circuit elements such as transistors are formed on a flexible substrate instead of a glass substrate. Other aspects are the same as in the other embodiments described above; the same reference numerals are used for the same main structural components, and detailed descriptions are omitted where appropriate.

[0301] Figure 22 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0302] Figure 22 It means equivalent to Figure 4 The vector section showing the position of line AA'.

[0303] like Figure 22 As shown, the image display device of this embodiment has a sub-pixel 420. The sub-pixel 420 includes a substrate 402. The substrate 402 includes a first surface 402a. Circuit elements such as a transistor 103 are disposed on the first surface 402a. In the sub-pixel 420, an upper structure including the circuit elements is formed on the first surface 402a.

[0304] The substrate 402 is flexible. The substrate 402 is, for example, a polyimide resin. The interlayer insulating films 112 and 156 and the wiring layers 110 and 160 are preferably formed of a material with a certain degree of elasticity, depending on the flexibility of the substrate 402. It should be noted that the wiring layer 110, which has the longest wiring length, has the highest risk of damage when bent. Therefore, it is desirable to adjust various film thicknesses and film qualities so that the neutral surface, including multiple protective films added on the surface and back, is the location of the wiring layer 110 as needed.

[0305] In this example, the transistor 103 and light-emitting element 150 formed on the substrate 402 are the same as in the first embodiment, for example, using... Figure 3 The circuit structure is described above. Of course, other circuit structures, including those with different implementations, can also be applied.

[0306] The manufacturing method of the image display device according to this embodiment will be described.

[0307] Figures 23A-23B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this embodiment.

[0308] like Figure 23A As shown, in this embodiment, a circuit board (third substrate) 4100 different from that in the other embodiments described above is prepared. The circuit board 4100 includes two substrates 102 and 402. The substrate 402 (fourth substrate) is disposed on the first surface 102a of the substrate 102, and is formed by coating with polyimide material and then firing. Alternatively, an inorganic film such as SiNx may be placed between the two substrates 102 and 402. The TFT lower layer film 106, the circuit 101, and the interlayer insulating film 112 are disposed on the first surface 402a of the substrate 402. The first surface 402a of the substrate 402 is the surface facing the surface on which the substrate 102 is disposed.

[0309] The semiconductor layer 1150 of the prepared semiconductor growth substrate 1194 is bonded to the circuit substrate 4100. Then, the light-emitting element 150, the interlayer insulating film 156, and the second wiring layer 160 are formed in the same manner as in other embodiments described above, and an upper structure such as a color filter 180 is also formed. For example, this applies to the previously described... Figures 5A to 14D The corresponding manufacturing process.

[0310] like Figure 23B As shown, substrate 102 is removed from the structure with the upper structure such as color filters to form a new circuit board 4100a. The removal of substrate 102 can be performed, for example, by laser lift-off. The removal of substrate 102 is not limited to the time point described above and can be performed at other suitable times. For example, substrate 102 can be removed after wafer bonding or before color filter formation. By removing substrate 102 at an earlier time point, problems such as cracks and gaps in the manufacturing process can be reduced.

[0311] The effects of the image display device according to this embodiment will be explained.

[0312] Because the substrate 402 is flexible, it can be bent as an image display device, enabling it to be applied to curved surfaces and used in wearable terminals without any discomfort.

[0313] (Fifth Implementation)

[0314] In this embodiment, an image display device with higher luminous efficiency is achieved by forming multiple light-emitting surfaces, equivalent to multiple light-emitting elements, on a single semiconductor layer including a light-emitting layer. In the following description, the same reference numerals are used for the main structural components that are the same as in the other embodiments described above, and detailed descriptions are omitted where appropriate.

[0315] Figure 24 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0316] Figure 24 The sectional view shows a section of the plane parallel to the XZ plane.

[0317] like Figure 24 As shown, the image display device has a subpixel group 520. The subpixel group 520 includes: transistors 103-1 and 103-2, a first wiring layer 510, a first interlayer insulating film 112, a conductive layer 530, a semiconductor layer 550, a second interlayer insulating film 556, a second wiring layer 560, and vias 561d1 and 561d2.

[0318] The semiconductor layer 550 includes two light-emitting surfaces 553S1 and 553S2, and the sub-pixel group 520 actually includes two sub-pixels. In this embodiment, as in the other embodiments described above, the display area is formed by arranging the sub-pixel group 520, which actually includes two sub-pixels, in a grid pattern.

[0319] Transistors 103-1 and 103-2 are formed in TFT channels 104-1 and 104-2, respectively. In this example, TFT channels 104-1 and 104-2 include p-type doped regions, and channel regions are formed between the aforementioned regions.

[0320] An insulating layer 105 is formed on TFT channels 104-1 and 104-2, and gates 107-1 and 107-2 are formed through the insulating layer 105, respectively. Gates 107-1 and 107-2 are the gates of transistors 103-1 and 103-2. In this example, transistors 103-1 and 103-2 are p-channel TFTs.

[0321] An insulating film 108 covers the two transistors 103-1 and 103-2. A first wiring layer 510 is formed on the insulating film 108.

[0322] Vias 111s1 and 111d1 are provided between the p-type doped region of transistor 103-1 and the wiring layer 510. Vias 111s2 and 111d2 are provided between the p-type doped region of transistor 103-2 and the wiring layer 510.

[0323] The first wiring layer 510 includes wirings 510s, 510d1, and 510d2. Wiring 510s is electrically connected to the source regions of transistors 103-1 and 103-2 via vias 111s1 and 111s2. Wiring 510s, for example, is connected to... Figure 3 Connect the power cord 3.

[0324] Wiring 510d1 is connected to the drain region of transistor 103-1 via via 111d1. Wiring 510d2 is connected to the drain region of transistor 103-2 via via 111d2.

[0325] The first interlayer insulating film 112 covers transistors 103-1 and 103-2 and wiring layer 510. A semiconductor layer 550 is disposed on the interlayer insulating film 112. A single semiconductor layer 550 is disposed between two driving transistors 103-1 and 103-2 arranged along the X-axis. A conductive layer 530 is formed on the first interlayer insulating film 112.

[0326] A conductive layer 530 is disposed between the semiconductor layer 550 and the first interlayer insulating film 112. The conductive layer 530 includes a light reflector (partial) 530a having both conductivity and light reflectivity, and the semiconductor layer 550 is disposed on the light reflector 530a. In this example, the light reflector 530a is, for example, similar to the one described above. Figure 3 The circuit's ground wire 4 is connected. A single semiconductor layer 550 is disposed between two driving transistors 103-1 and 103-2 arranged along the X-axis.

[0327] Semiconductor layer 550 includes an n-type semiconductor layer (first semiconductor layer) 551, a light-emitting layer 552, and a p-type semiconductor layer (second semiconductor layer) 553. Semiconductor layer 550 is laminated from the interlayer insulating film 112 side towards the light-emitting surfaces 553S1 and 553S2 side, in the order of n-type semiconductor layer 551, light-emitting layer 552, and p-type semiconductor layer 553. Light reflector 530a is electrically connected to n-type semiconductor layer 551.

[0328] A second interlayer insulating film (second insulating film) 556 covers the first interlayer insulating film 112, the conductive layer 530, and the semiconductor layer 550. The interlayer insulating film 556 covers a portion of the semiconductor layer 550. Preferably, the interlayer insulating film 556 covers not only the light-emitting surfaces 553S1 and 553S2 of the semiconductor layer 550, but also the surface of the p-type semiconductor layer 553. The interlayer insulating film 556 covers the side surfaces of the semiconductor layer 550. The interlayer insulating film 556 is preferably a white resin.

[0329] Transparent electrodes 559a1 and 559a2 are covered in the portion of semiconductor layer 550 not covered by interlayer insulating film 556. The transparent electrodes 559a1 and 559a2 are disposed on the light-emitting surfaces 553S1 and 553S2 of the p-type semiconductor layer 553, which are exposed through openings 558-1 and 558-2 in the interlayer insulating film 556, respectively. The transparent electrodes 559a1 and 559a2 are electrically connected to the p-type semiconductor layer 553.

[0330] Through holes 561d1 and 561d2 are provided to penetrate the interlayer insulating films 556 and 112. One end of through holes 561d1 and 561d2 is connected to wiring 510d1 and 510d2, respectively.

[0331] The second wiring layer 560 is disposed on the interlayer insulating film 556. The wiring layer 560 includes wirings 560a1 and 560a2. A through-hole 561d1 is disposed between wiring 510d1 and wiring 560a1. A through-hole 561d2 is disposed between wiring 510d2 and wiring 560a2. The other ends of through-holes 561d1 and 561d2 are connected to wirings 560a1 and 560a2, respectively.

[0332] A light-transmitting electrode 559a1 is provided on the wiring 560a1, and the wiring 560a1 is electrically connected to the light-transmitting electrode 559a1. The light-transmitting electrode 559a1 extends to the opening 558-1. The light-transmitting electrode 559a1 is provided across the entire surface of the light-emitting surface 553S1 exposed from the opening 558-1, and is electrically connected to the p-type semiconductor layer 553 via the light-emitting surface 553S1.

[0333] A light-transmitting electrode 559a2 is provided on the wiring 560a2, and the wiring 560a2 is electrically connected to the light-transmitting electrode 559a2. The light-transmitting electrode 559a2 extends to the opening 558-2. The light-transmitting electrode 559a2 is provided throughout the entire surface of the light-emitting surface 553S2 exposed from the opening 558-2, and is electrically connected to the p-type semiconductor layer 553 via the light-emitting surface 553S2.

[0334] An interlayer insulating film 556 is provided between openings 558-1 and 558-2. Openings 558-1 and 558-2 are located between wirings 560a1 and 560a2. Openings 558-1 and 558-2, when viewed from above in the XY plane, are, for example, square or rectangular. They are not limited to squares; they can also be polygons such as circles, ellipses, or hexagons. The light-emitting surfaces 553S1 and 553S2, when viewed from above in the XY plane, are also square, rectangular, or other polygonal shapes, circles, etc. The shapes of the light-emitting surfaces 553S1 and 553S2 can be similar to or different from the shapes of openings 558-1 and 558-2.

[0335] As described above, light-emitting surfaces 553S1 and 553S2 exposed from openings 558-1 and 558-2 are respectively connected to light-transmitting electrodes 559a1 and 559a2. When transistor 103-1 is turned on, holes are injected into light-transmitting electrode 559a1 via wiring 560a1, via 561d1, and wiring 510d1. When transistor 103-2 is turned on, holes are injected into light-transmitting electrode 559a2 via wiring 560a2, via 561d2, and wiring 510d2. On the other hand, electrons are injected into n-type semiconductor layer 551 via light reflector 530a connected to ground wire 4.

[0336] Transistors 103-1 and 103-2 are driving transistors for adjacent sub-pixels and are driven sequentially. Therefore, holes injected from either transistor 103-1 or 103-2 are injected into the light-emitting layer 552, and electrons injected from the light reflector 530a are injected into the light-emitting layer 552, thereby emitting light. When transistor 103-1 is turned on, the light-emitting surface 553S1 emits light; when transistor 103-2 is turned on, the light-emitting surface 553S2 emits light. Thus, the light emission of the light-emitting layer 552 is limited because the drift current flowing in the direction parallel to the XY plane within the semiconductor layer 550 is suppressed by the resistance of the p-type semiconductor layer 553 and the n-type semiconductor layer 551.

[0337] The manufacturing method of the image display device according to this embodiment will be described.

[0338] Figures 25A to 26B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to an exemplary embodiment.

[0339] like Figure 25A As shown, a semiconductor growth substrate 1194a is prepared. The semiconductor growth substrate 1194a is laminated on the crystal growth substrate 1001 via a buffer layer 1140, from the crystal growth substrate 1001 side, in the order of a p-type semiconductor layer 1153, a light-emitting layer 1152, and an n-type semiconductor layer 1151. A metal layer 1130 is formed on the exposed surface of the n-type semiconductor layer 1151 of the semiconductor growth substrate 1194a. The semiconductor growth substrate 1194a with the metal layer 1130 formed is then bonded to a prepared circuit board 5100. The circuit board 5100 has transistors 103-1 and 103-2, a wiring layer 510, and an interlayer insulating film 112 formed on a glass substrate 102. It should be noted that the buffer layer 1140 may be omitted, and the semiconductor layer 1150 may be grown on the semiconductor growth substrate, similar to the case described in the first embodiment.

[0340] The formation of the semiconductor growth substrate, etc., is the same as that described in the other embodiments and their variations described above, and detailed descriptions are omitted. It should be noted that the circuit structure of the circuit board 5100 may differ from that in the other embodiments described above, but almost all other parts are the same as the structures already described. Hereinafter, only substitutions for reference numerals will be used, and detailed descriptions will be omitted as appropriate.

[0341] like Figure 25B As shown, after the semiconductor growth substrate 1194a with metal layer 1130 and the circuit substrate 5100 are bonded to the wafer, the crystal growth substrate 1001 is removed by wet etching, laser lift-off, etc.

[0342] like Figure 26A As shown, except Figure 25B The buffer layer 1140 shown is used to etch the semiconductor layer 1150 to form the semiconductor layer 550. Alternatively, the buffer layer 1140 can be maintained while the semiconductor layer 1150 is etched, and then the buffer layer 1140 can be removed. Additionally, the metal layer 1130 is also etched to form a conductive layer 530 including the light reflector 530a. The outer periphery of the light reflector 530a, viewed from the XY plane, includes the outer periphery of the semiconductor layer 1150.

[0343] like Figure 26B As shown, a second interlayer insulating film 556 is formed on the first interlayer insulating film 112 and the semiconductor layer 550. Through-holes 561d1 and 561d2 are formed in the interlayer insulating film 556. In addition, a wiring layer 560 is formed, and wirings 560a1, 560a2, etc. are formed.

[0344] Next, openings 558-1 and 558-2 are formed between wirings 560a1 and 560a2. The light-emitting surfaces 553S1 and 553S2 of the p-type semiconductor layer exposed through openings 558-1 and 558-2 are roughened. Then, light-transmitting electrodes 559a1 and 559a2 are formed.

[0345] In this way, a sub-pixel group 520 is formed, which has a semiconductor layer 550 sharing two light-emitting surfaces 553S1 and 553S2.

[0346] In this embodiment, two light-emitting surfaces 553S1 and 553S2 are provided on a semiconductor layer 550. However, the number of light-emitting surfaces is not limited to two; three or more light-emitting surfaces can also be provided on a semiconductor layer 550. As an example, one or two columns of sub-pixels can also be implemented with a single semiconductor layer 550. Thus, as described later, the recombination current of each light-emitting surface that does not contribute to light emission can be reduced, and the effect of realizing a finer light-emitting element can be increased.

[0347] (Modified Example)

[0348] Figure 27 This is a schematic cross-sectional view of a portion of an image display device illustrating a variation of this embodiment.

[0349] In this modified example, the difference from the fifth embodiment described above is that two p-type semiconductor layers 5553a1 and 5553a2 are provided on the light-emitting layer 552. All other aspects are the same as in the fifth embodiment.

[0350] like Figure 27 As shown, the image display device of this modified example has a sub-pixel group 520a. The sub-pixel group 520a includes a semiconductor layer 550a. The semiconductor layer 550a includes an n-type semiconductor layer 551, a light-emitting layer 552, and p-type semiconductor layers 5553a1 and 5553a2. The n-type semiconductor layer 551, the light-emitting layer 552, and the p-type semiconductor layers 5553a1 and 5553a2 are sequentially laminated from the interlayer insulating film 112 toward the light-emitting surfaces 5553S1 and 5553S2.

[0351] p-type semiconductor layers 5553a1 and 5553a2 are arranged on the light-emitting layer 552, spaced apart along the X-axis. An interlayer insulating film 556 is provided between the p-type semiconductor layers 5553a1 and 5553a2, and the p-type semiconductor layers 5553a1 and 5553a2 are separated by the interlayer insulating film 556.

[0352] The p-type semiconductor layers 5553a1 and 5553a2 have approximately the same shape when viewed from above in the XY plane. This shape is approximately square or rectangular, but can also be other polygonal, circular, or similar shapes.

[0353] p-type semiconductor layers 5553a1 and 5553a2 have light-emitting surfaces 5553S1 and 5553S2, respectively. The light-emitting surfaces 5553S1 and 5553S2 are the surfaces of the p-type semiconductor layers 5553a1 and 5553a2 exposed through openings 558-1 and 558-2, respectively.

[0354] The shapes of the light-emitting surfaces 5553S1 and 5553S2 when viewed from above in the XY plane are the same as those of the light-emitting surfaces in the fifth embodiment, having approximately the same shape, such as a roughly square shape. The shapes of the light-emitting surfaces 5553S1 and 5553S2 are not limited to the square shape of this embodiment; they can also be polygons such as circles, ellipses, or hexagons. The shapes of the light-emitting surfaces 5553S1 and 5553S2 can be similar to the shapes of the openings 558-1 and 558-2, or they can be different shapes.

[0355] A light-transmitting electrode 559a1 is provided on the light-emitting surface 5553S1. A light-transmitting electrode 559a2 is also provided on the light-emitting surface 5553S2. The p-type semiconductor layer 5553a1 is connected to the wiring 560a1 via the light-transmitting electrode 559a1 connected to the light-emitting surface 5553S1. The p-type semiconductor layer 5553a2 is connected to the wiring 560a2 via the light-transmitting electrode 559a2 connected to the light-emitting surface 5553S2.

[0356] Figure 28A and Figure 28B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this modified example.

[0357] In this modified example, before forming the semiconductor layer 1150, the same method used in the fifth embodiment is employed. Figures 25A-25B The same procedures described above. The following sections will explain the procedures that follow.

[0358] like Figure 28A As shown, in this modified example, the buffer layer 1140, the n-type semiconductor layer 1151, the light-emitting layer 1152, and the p-type semiconductor layer 1153 are etched. After the light-emitting layer 552 and the n-type semiconductor layer 551 are formed, further etching is performed, thereby forming two p-type semiconductor layers 5553a1 and 5553a2. The buffer layer 1140 may also be removed after the p-type semiconductor layers 5553a1 and 5553a2 are formed.

[0359] exist Figure 28AIn this case, the etching of the p-type semiconductor layers 5553a1 and 5553a2 stops when the light-emitting layer 552 is reached. The etching of the p-type semiconductor layers 5553a1 and 5553a2 can also proceed to a deeper location. For example, the etching used to form the p-type semiconductor layers 5553a1 and 5553a2 can also proceed to a depth reaching within the light-emitting layer 552 or within the n-type semiconductor layer 551. In this case of deep etching of the p-type semiconductor layers, the light-emitting surfaces 5553S1 and 5553S2 of the p-type semiconductor layers, described later, are preferably located at an inner side at least 1 μm from the ends of the etched p-type semiconductor layers 5553a1 and 5553a2. By separating the ends of the p-type semiconductor layers 5553a1 and 5553a2 formed by etching from the light-emitting surfaces 5553S1 and 5553S2, recombination current can be suppressed.

[0360] like Figure 28B As shown, an interlayer insulating film 556 is formed covering the interlayer insulating film 112 and the semiconductor layer 550a, followed by the formation of vias 561d1 and 561d2. Furthermore, a wiring layer 560 is formed, and wirings 560a1, 560a2, etc., are formed.

[0361] Openings 558-1 and 558-2 are formed in the interlayer insulating film 556. The light-emitting surfaces 5553S1 and 5553S2 of the p-type semiconductor layer exposed through the openings 558-1 and 558-2 are roughened. Then, light-transmitting electrodes 559a1 and 559a2 are formed.

[0362] In this way, a sub-pixel group 520a with two light-emitting surfaces 5553S1 and 5553S2 is formed.

[0363] The situation in this modified example is the same as that in the fifth embodiment. The number of light-emitting surfaces is not limited to two, and three or more light-emitting surfaces can be disposed on a semiconductor layer 550a.

[0364] The effects of the image display device according to this embodiment will be explained.

[0365] Figure 29 This is a graph illustrating the characteristics of a pixel LED element.

[0366] Figure 29 The vertical axis represents luminous efficiency [%). The horizontal axis represents the current density of the current flowing through the pixel LED element, expressed as a relative value.

[0367] like Figure 29As shown, in the region where the relative value of current density is less than 1.0, the luminous efficiency of the pixel LED element is approximately constant or monotonically increasing. In the region where the relative value of current density is greater than 1.0, the luminous efficiency monotonically decreases. That is to say, for a pixel LED element, there exists an appropriate current density that maximizes the luminous efficiency.

[0368] The goal is to achieve a highly efficient image display device by suppressing the current density to a level that allows sufficient brightness to be obtained from the light-emitting element. However, Figure 29 This indicates that at low current densities, the luminous efficiency tends to decrease as the current density decreases.

[0369] As described in the other embodiments above, the light-emitting elements 150, 150a, 150-1, 150-2, and 350 are formed by individually separating the entire semiconductor layer 1150, including the light-emitting layers 152, 152-1, 152-2, and 352, using etching or the like. At this time, the bonding surfaces between the light-emitting layers 152, 152-1, 152-2, and 352 and the n-type semiconductor layers 151, 151-1, 151-2, and 351 are exposed at their ends. Similarly, the bonding surfaces between the light-emitting layers 152, 152-1, 152-2, and 352 and the p-type semiconductor layers 153, 153a, 153-1, 153-2, and 353 are exposed at their ends.

[0370] In the presence of the aforementioned ends, electrons and holes recombine at the ends. However, this recombination does not contribute to light emission. The recombination at the ends is almost unrelated to the current flowing through the light-emitting element. It can be considered that the recombination occurs based on the length of the junction surface at the ends that contributes to light emission.

[0371] When two light-emitting elements of the same size cube shape emit light, a total of eight ends can be produced because the ends are formed on the four sides of each light-emitting element.

[0372] In contrast, in this embodiment, the semiconductor layers 550 and 550a, each with two light-emitting surfaces, have four ends. In the region between openings 558-1 and 558-2, the injection of electrons and holes is reduced, contributing almost nothing to light emission; therefore, the number of ends that contribute to light emission can be considered to be six. Thus, in this embodiment, the number of ends of the semiconductor layers is effectively reduced, thereby reducing recombination that does not contribute to light emission, and the reduction in recombination current lowers the driving current.

[0373] In cases where the distance between sub-pixels is shortened for purposes such as high resolution, or where the current density is relatively high, the distance between the light-emitting surfaces 553S1 and 553S2 is shortened in the sub-pixel group 520 of the fifth embodiment. In this case, when the p-type semiconductor layer 553 is shared, a portion of the electrons injected to the adjacent light-emitting surface side is diverted, and the light-emitting surface on the undriven side may emit faint light. In a modified example, since the p-type semiconductor layers 5553a1 and 5553a2 are separated in each light-emitting surface 5553S1 and 5553S2, it is possible to reduce the faint light emitted by the light-emitting surface on the undriven side.

[0374] In this embodiment, the semiconductor layer including the light-emitting layer is laminated from the first interlayer insulating film 112 side in the order of n-type semiconductor layer, light-emitting layer, and p-type semiconductor layer, thereby roughening the exposed surface of the p-type semiconductor layer. This is preferred from the perspective of improving luminous efficiency. Alternatively, similar to the other embodiments described above, the lamination order of the n-type semiconductor layer and the p-type semiconductor layer can be replaced by laminating the p-type semiconductor layer, the light-emitting layer, and the n-type semiconductor layer in that order.

[0375] In all the above-described embodiments and variations, the lamination order of the light-emitting element can be modified according to the appropriate manufacturing process described above. For example, for the light-emitting element of the first embodiment, lamination can be performed from the first interlayer insulating film 112 to the light-emitting surface in the order of p-type semiconductor layer, light-emitting layer, and n-type semiconductor layer. Similarly, for the light-emitting element of the third embodiment, lamination can be performed from the first interlayer insulating film 112 to the light-emitting surface in the order of n-type semiconductor layer, light-emitting layer, and p-type semiconductor layer.

[0376] (Sixth Implementation Method)

[0377] The aforementioned image display device, as an image display module with an appropriate number of pixels, can be, for example, a computer monitor, a television, a portable terminal such as a smartphone, or a car navigation system.

[0378] Figure 30 This is a block diagram illustrating the image display device of this embodiment.

[0379] Figure 30 This shows the main structural components of a computer monitor.

[0380] like Figure 30 As shown, the image display device 601 includes an image display module 602. The image display module 602 is, for example, an image display device with the structure described in the first embodiment. The image display module 602 includes: a display area 2 with sub-pixels 20 arranged thereon, a row selection circuit 5, and a signal voltage output circuit 7. The image display device 601 may also have the structure described in any of the second to fifth embodiments.

[0381] The image display device 601 also includes a controller 670. The controller 670 receives a control signal separated and generated by an interface circuit (not shown) and controls the driving of each sub-pixel and the driving sequence relative to the row selection circuit 5 and the signal voltage output circuit 7.

[0382] (Modified Example)

[0383] Figure 31 This is a block diagram illustrating the image display device of this modified example.

[0384] Figure 31 This illustrates the structure of a high-definition, thin-film television.

[0385] like Figure 31 As shown, the image display device 701 includes an image display module 702. The image display module 702 is, for example, an image display device 1 with the structure described in the first embodiment. The image display device 701 includes a controller 770 and a frame memory 780. The controller 770 controls the driving sequence of each sub-pixel of the display area 2 based on control signals supplied by the bus 740. The frame memory 780 stores one frame of display data for processing such as smooth motion image reproduction.

[0386] The image display device 701 includes an I / O circuit 710. The I / O circuit 710 provides interface circuits for connecting to external terminals, devices, etc. The I / O circuit 710 includes, for example, a USB interface for connecting an external hard disk device, an audio interface, etc.

[0387] The image display device 701 includes a receiving unit 720 and a signal processing unit 730. The receiving unit 720 is connected to an antenna 722 and separates and generates the required signal from the radio waves received by the antenna 722. The signal processing unit 730 includes a DSP (Digital Signal Processor), a CPU (Central Processing Unit), etc., and the signal separated and generated by the receiving unit 720 is separated and generated into image data and audio data, etc. by the signal processing unit 730.

[0388] By using the receiving unit 720 and signal processing unit 730 as high-frequency communication modules such as mobile phone transmitters / receivers, WiFi receivers, and GPS receivers, they can also be configured as other image display devices. For example, an image display device with an image display module having an appropriate screen size and resolution can be a portable information terminal such as a smartphone or a car navigation system.

[0389] The image display module in this embodiment is not limited to the structure of the image display device in the first embodiment, but may also be a variation or other embodiment.

[0390] According to the embodiments described above, a method for manufacturing an image display device and an image display device that shortens the transfer process of the light-emitting element and improves the yield can be realized.

[0391] Figure 32 This is a perspective view schematically illustrating the image display device of the first to fifth embodiments and the above-described modifications.

[0392] like Figure 32 As shown, a light-emitting circuit section 172 having a large number of sub-pixels 20 is provided on a substrate 102. Figure 13 The conductive layer 130 shown includes a light reflector 130a. The light reflector 130a is disposed on each sub-pixel 20 on the substrate 102. A color filter 180 is disposed on the light-emitting circuit section 172. It should be noted that, in the fifth embodiment, the structure including the circuit substrate 100, the light-emitting circuit section 172 and the color filter 180 is an image display module 602 and 702, which are assembled into the image display devices 601 and 701.

[0393] The above description illustrates several embodiments of the present invention, but these embodiments are mentioned as examples and are not intended to limit the scope of the invention. The new embodiments described above can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. The above embodiments and their variations are included within the scope and spirit of the invention, and are also included within the scope of the invention described in the technical scope and its equivalents. Furthermore, the various embodiments described can be combined with each other for implementation.

[0394] Explanation of reference numerals in the attached figures

[0395] 1, 201, 601, 701 Image display device; 2 Display area; 3 Power line; 4 Ground line; 5, 205 Row selection circuit; 6, 206 Scan line; 7, 207 Signal voltage output circuit; 8, 208 Signal line; 10 Pixel; 20, 20a, 20b Subpixel; 22, 222 Light-emitting element; 24, 224 Select transistor; 26, 226 Drive transistor; 28, 228 Capacitor; 100 Circuit board; 101 Circuit; 103, 203, 203-1, 203-2 Transistor; 104, 204, 204-1, 204-2 TFT channel; 105 Insulating layer; 107, 107-1, 107-2 Gate; 108 Insulating film; 110 First wiring layer; 112 First interlayer insulating film; 150, 250 light-emitting elements; 156, 256, 556 Second interlayer insulating film; 159, 159a, 159k, 459k Transparent electrodes; 180 Color filters; 560 Wiring layers; 520, 520a Sub-pixel groups; 1001 Crystal growth substrate; 1100, 4100, 4100a, 5100 Circuit boards; 1140 Buffer layers; 1150 Semiconductor layers; 1190 Support substrate; 1192 Structure; 1194, 1294 Semiconductor growth substrates

Claims

1. A method for manufacturing an image display device, characterized in that, have: The process of preparing a second substrate on which a semiconductor layer including a light-emitting layer is grown on a first substrate; The process of preparing a third substrate includes: a circuit including circuit elements formed on a light-transmitting substrate, a first insulating film covering the circuit, and a conductive layer including a light-reflective portion formed on the first insulating film. The process of bonding the semiconductor layer to the third substrate; The process of forming a light-emitting element from the semiconductor layer; The process of forming a second insulating film covering the conductive layer, the light-emitting element, and the first insulating film; The process of forming a through hole that penetrates the first insulating film and the second insulating film; The process of electrically connecting the light-emitting element and the circuit element through the through-hole; The light-emitting element is disposed on the portion. The outer periphery of the portion, viewed from above, includes the outer periphery of the light-emitting element projected onto the portion. The third substrate further includes a flexible fourth substrate disposed between the light-transmitting substrate and the circuit. It also includes a step of removing the light-transmitting substrate after bonding the semiconductor layer to the third substrate.

2. The method for manufacturing the image display device as claimed in claim 1, characterized in that, The light-transmitting substrate is a glass substrate.

3. The method for manufacturing the image display device as described in claim 1, characterized in that, It also includes a step of removing the first substrate before bonding the semiconductor layer to the third substrate.

4. The method for manufacturing the image display device as claimed in claim 1, characterized in that, It also includes a step of removing the first substrate after bonding the semiconductor layer to the third substrate.

5. The method for manufacturing the image display device as claimed in claim 1, characterized in that, It also includes a step of exposing the light-emitting surface of the light-emitting element, which faces the side of the first insulating film, from the second insulating film.

6. The method for manufacturing the image display device as claimed in claim 5, characterized in that, It also includes a step of forming a light-transmitting electrode on the exposed light-emitting surface.

7. The method for manufacturing the image display device as claimed in claim 1, characterized in that, The first substrate contains silicon or sapphire.

8. The method for manufacturing the image display device as claimed in claim 1, characterized in that, The semiconductor layer includes a gallium nitride-based compound semiconductor.

9. The method for manufacturing the image display device as claimed in claim 1, characterized in that, It also includes a process of forming a wavelength conversion component on the light-emitting element.

10. An image display device, characterized in that, It is manufactured by the manufacturing method of the image display device according to any one of claims 1 to 9. The image display device has: A substrate having a first surface and being flexible; Circuit elements are disposed on the first surface; The first wiring layer is electrically connected to the circuit element; A first insulating film covers the circuit elements and the first wiring layer on the first surface; A conductive layer, comprising a light-reflective portion disposed on the first insulating film; A first light-emitting element is disposed on the portion and electrically connected to the portion; A second insulating film covers at least a portion of the first light-emitting element, the conductive layer, and the first insulating film; The second wiring layer is disposed on the second insulating film and is electrically connected to the surface of the first light-emitting element, including the light-emitting surface facing one side of the first insulating film. A first through hole penetrates the first insulating film and the second insulating film, and electrically connects the first wiring layer and the second wiring layer. The outer periphery of the portion, viewed from above, includes the outer periphery of the first light-emitting element projected onto the portion.

11. The image display device as claimed in claim 10, characterized in that, The first light-emitting element includes: a first semiconductor layer of a first conductivity type, a first light-emitting layer disposed on the first semiconductor layer, and a second semiconductor layer of a second conductivity type different from the first conductivity type disposed on the first light-emitting layer. The first light-emitting element is laminated from the first insulating film side to the light-emitting surface side in the order of the first semiconductor layer, the first light-emitting layer, and the second semiconductor layer. The first semiconductor layer is disposed on the portion and electrically connected to the portion.

12. The image display device as claimed in claim 10, characterized in that, It also has a second through hole that penetrates the second insulating film and electrically connects the portion and the second wiring layer.

13. The image display device as claimed in claim 11, characterized in that, It also has a second light-emitting element, which includes: a third semiconductor layer of the first conductivity type, a second light-emitting layer disposed on the third semiconductor layer, and a fourth semiconductor layer of the second conductivity type disposed on the second light-emitting layer. The second light-emitting element is laminated from the first insulating film side to the light-emitting surface side in the order of the third semiconductor layer, the second light-emitting layer, and the fourth semiconductor layer. The third semiconductor layer is disposed on the portion and electrically connected to the portion. The outer periphery of the portion, viewed from above, includes the outer periphery of the first light-emitting element and the outer periphery of the second light-emitting element projected onto the portion.

14. The image display device as claimed in claim 11, characterized in that, The first conductivity type is p-type. The second conductivity type is n-type.

15. The image display device as claimed in claim 10, characterized in that, The conductive layer includes through holes. The first through hole extends through the through hole and is insulated from the through hole.

16. The image display device as claimed in claim 10, characterized in that, The second insulating film has an opening that exposes the light-emitting surface. The image display device also has a light-transmitting electrode disposed on the light-emitting surface.

17. The image display device as claimed in claim 16, characterized in that, The light-emitting surface exposed from the opening includes a rough surface.

18. The image display device as claimed in claim 10, characterized in that, The first light-emitting element includes a gallium nitride-based compound semiconductor. The circuit elements include thin-film transistors.

19. The image display device as claimed in claim 10, characterized in that, The first light-emitting element also has a wavelength conversion component.

Images