A method and system for deep trench etching of silicon isolation with high photoresist selectivity

Abstract

The present invention provides a method and system for high-selectivity silicon isolation deep trench etching of photoresist. By adopting appropriate gas flow rates and times in the etching / passivation stages, the etching selectivity of silicon to photoresist is high (120:1), and the photoresist can be directly used as an etching mask throughout the etching process. By using a high radio frequency power to generate a sufficiently high plasma density, rapid etching can be achieved, and the etching rate can reach 5 μm / min. By rapidly realizing the switching time between the etching and passivation processes and the gradual process parameters, the steepness of the deep trench (90°±0.1°) and smooth lines can be ensured. The present invention directly uses the photoresist as an etching mask, avoiding the conventional metal mask in the deep trench etching with a depth greater than 100 microns, which not only simplifies the process but also does not contaminate the process chamber. Its unique etching performance can effectively realize the silicon isolation deep trench structure of mesa high-frequency transistors.

Description

Technical Field

[0001] The present invention relates to a dry etching method for deep silicon isolation grooves, in particular to a method for etching deep silicon grooves over 100 microns using the "Bosch" process. Background Art

[0002] In the etching of deep silicon grooves greater than 100 microns, in order to improve the etching selectivity, a metal is generally used as the etching mask. For example, in Chinese Patent Publication No. CN 92103289, titled "Method for Deep Groove Etching of Silicon", it is disclosed that Zr is used as the etching mask. This not only makes the process relatively complex, but also causes certain line deformation in the mask pattern transfer.

[0003] The sidewalls formed by the conventional "Bosch" process have relatively large undulations, the lines are not smooth, and the etching rate is low, not exceeding 2 um / min [1]. The etching time for deep grooves over 100 microns is long. Moreover, as the groove depth increases, due to the difficulty of the etching plasma gas reaching the bottom, the anisotropic etching effect decreases, resulting in a decrease in the steepness of the groove sidewalls and the formation of bowl-shaped sidewalls. Summary of the Invention

[0004] The technical problem to be solved by the present invention is: to overcome the deficiencies of the prior art and provide a high-speed etching method for steep and smooth deep silicon grooves directly using photoresist as the mask. This method simplifies the etching process for 150-micron deep silicon grooves, does not contaminate the process chamber, has a high etching rate, a short process time, steep groove sidewalls, smooth lines, and can effectively realize the silicon isolation deep groove structure over 100 microns for mesa high-frequency bipolar transistors.

[0005] The technical solution of the present invention is:

[0006] A method for etching silicon isolation deep grooves with a high photoresist selectivity, comprising the following steps:

[0007] (1) Set the specific gas flow rates and times for the etching stage and the passivation stage to increase the etching selectivity of silicon to photoresist to 120:1, and directly use photoresist as the etching mask throughout the etching process;

[0008] (2) Set a specific radio frequency power, i.e., the coil power, to generate a sufficiently high plasma density to achieve rapid etching, with an etching rate of 5 um / min;

[0009] (3) Adopt process parameters that can quickly realize the switching and gradual change between the etching and passivation processes to ensure the steepness of the deep grooves and smooth lines. The steepness is 90° ± 0.1°, and the process parameters for the gradual change include the electrode power and the process pressure.

[0010] Further, in the step (1), the specific gas flow rates and times in the etching stage and the passivation stage are set as follows: in the etching stage, the gas SF6 flow rate is 450 sccm and the time is 3.4 s; in the passivation stage, the gas C4F8 flow rate is 250 sccm and the time is 2.6 s.

[0011] Further, in the step (2), in the etching stage, the coil power is 2500 W, and in the passivation stage, the coil power is 2000 W.

[0012] Further, in the step (3), a rapid switching between the etching and passivation processes is adopted, specifically: the etching time is 3.4 s and the passivation time is 2.6 s.

[0013] Further, under the gradient parameters in the step (3), the electrode power in the etching stage is 140 W within the initial 0.8 s, and in the remaining 2.6 s, it is 30 W in the first process cycle and linearly changes to 35 W in the 260th process cycle.

[0014] Further, under the gradient parameters in the step (3), the electrode power in the passivation stage is 30 W in the first process cycle and linearly changes to 35 W in the 260th process cycle.

[0015] Further, under the gradient parameters in the step (3), the process pressure in the etching stage is 25 mT within the initial 0.8 s, and in the remaining 2.6 s, it is 40 mT in the first process cycle and linearly changes to 60 mT in the 260th process cycle.

[0016] Further, the present invention also provides a high-selectivity photoresist silicon isolation deep trench etching system, including:

[0017] Gas flow rate and time setting module: setting the specific gas flow rates and times in the etching stage and the passivation stage, increasing the etching selectivity of silicon to photoresist to 120:1, and directly using the photoresist as the etching mask throughout the etching process;

[0018] Plasma generation module: setting a specific radio frequency power, i.e., the coil power, to generate a sufficiently high plasma density to achieve rapid etching with an etching rate of 5 um / min;

[0019] Process switching and parameter setting module: adopting a rapid switching between the etching and passivation processes and gradient process parameters to ensure the steepness of the deep trench and smooth lines, with a steepness of 90° ± 0.1°, and the gradient process parameters including electrode power and process pressure;

[0020] Set the specific gas flow rates and times for the etching stage and the passivation stage, specifically: during the etching stage, the gas flow rate of SF6 is 450 sccm and the time is 3.4 s; during the passivation stage, the gas flow rate of C4F8 is 250 sccm and the time is 2.6 s;

[0021] The coil power during the etching stage is 2500 W, and the coil power during the passivation stage is 2000 W;

[0022] Adopt a fast process for switching between etching and passivation, specifically: the etching time is 3.4 s. The passivation time is 2.6 s;

[0023] The electrode power is 140 W within the initial 0.8 s of the etching stage, 30 W in the first process cycle for the remaining 2.6 s, and linearly gradually changes to 35 W by the 260th process cycle; the electrode power in the passivation stage is 30 W in the first process cycle and linearly gradually changes to 35 W by the 260th process cycle; the process pressure is 25 mT within the initial 0.8 s of the etching stage, 40 mT in the first process cycle for the remaining 2.6 s, and linearly gradually changes to 60 mT by the 260th process cycle.

[0024] The beneficial effects of the present invention compared with the prior art are as follows:

[0025] (1) The present invention directly uses photoresist as the etching mask, which not only ensures the accuracy of etching pattern transfer but also simplifies the process steps, greatly saving the process cost;

[0026] (2) The present invention uses a high radio frequency power, which ensures a high etching rate during the short etching stage, greatly reducing the process time of the entire product (from 60 mins to 30 mins).

[0027] (3) The present invention adopts gradient process parameters, enabling the etching rate to remain constant at different depths, with the sidewalls of the groove being steeper (90° ± 0.1°) and the lines being smooth.

[0028] (4) The process of the present invention is simple and has good repeatability, and can be widely applied to the dry etching of silicon isolation deep grooves for mesa high-frequency bipolar transistors with a size of more than 100 microns.

[0029] (5) The method of the present invention simplifies the 150-micron silicon deep groove etching process, does not contaminate the process chamber, has a high etching rate, a short process time, steep sidewalls of the groove, and smooth lines, and can effectively realize the silicon isolation deep groove structure for mesa high-frequency bipolar transistors with a size of more than 100 microns. Brief Description of the Drawings

[0030] Figure 1 is a schematic diagram of the process of the present invention (1 - photoresist; 2 - silicon substrate layer);

[0031] Figure 2 Schematic diagram of a smooth and steep 150 - micron - deep groove after etching. Detailed implementation mode

[0032] The present invention provides a method for etching a silicon - isolated deep groove with a high photoresist selectivity, comprising the following steps:

[0033] (1) Set the specific gas flow rates and times for the etching stage and the passivation stage, increase the etching selectivity of silicon to photoresist to 120:1, and directly use photoresist as the etching mask throughout the etching process;

[0034] Specifically: the gas SF6 flow rate in the etching stage is 450 sccm, and the time is 3.4 s; the gas C4F8 flow rate in the passivation stage is 250 sccm, and the time is 2.6 s.

[0035] (2) Set a specific radio - frequency power, i.e., the coil power, to generate a sufficiently high plasma density to achieve fast etching, with an etching rate of 5 um / min;

[0036] The coil power in the etching stage is 2500 W, and the coil power in the passivation stage is 2000 W.

[0037] (3) Adopt process parameters for quickly realizing the switching and gradient change between the etching and passivation processes to ensure the steepness of the deep groove and smooth lines. The steepness is 90° ± 0.1°, and the process parameters for the gradient change include the electrode power and the process pressure.

[0038] Adopt a quick realization of the switching between the etching and passivation processes. Specifically: the etching time is 3.4 s, and the passivation time is 2.6 s.

[0039] The electrode power in the etching stage is 140 W within the initial 0.8 s, and for the remaining 2.6 s, it is 30 W in the first process cycle and linearly gradually changes to 35 W at the 260th process cycle.

[0040] The electrode power in the passivation stage is 30 W in the first process cycle and linearly gradually changes to 35 W at the 260th process cycle.

[0041] The process pressure is 25 mT within the initial 0.8 s in the etching stage, and for the remaining 2.6 s, it is 40 mT in the first process cycle and linearly gradually changes to 60 mT at the 260th process cycle.

[0042] The present invention directly uses photoresist as the etching mask, avoiding the conventional metal mask in the etching of deep grooves greater than 100 microns, which not only simplifies the process but also does not pollute the process chamber; its unique etching performance can effectively realize the silicon - isolated deep - groove structure of mesa high - frequency transistors.

[0043] Furthermore, the present invention also provides a high photoresist selection ratio silicon isolation deep trench etching system, including:

[0044] Gas flow rate and time setting module: Set the specific gas flow rate and time in the etching stage and passivation stage, increase the etching selectivity of silicon to photoresist to 120:1, and directly use photoresist as the etching mask throughout the etching process;

[0045] Plasma generation module: Set a specific radio frequency power, i.e., coil power, to generate a sufficiently high plasma density to achieve rapid etching, with an etching rate of 5 um / min;

[0046] Process switching and parameter setting module: Adopt process parameters that can quickly realize the switching and gradient change between etching and passivation processes to ensure the steepness of the deep trench and smooth lines. The steepness is 90° ± 0.1°, and the gradient process parameters include electrode power and process pressure;

[0047] The method of the present invention makes the 150-micron silicon deep trench etching process simple, does not contaminate the process chamber, has a high etching rate, a short process time, steep sidewalls of the trench, and smooth lines, and can effectively realize the silicon isolation deep trench structure of more than 100 microns for mesa high-frequency bipolar transistors.

[0048] Example:

[0049] (1) Coat a layer of 3-um-thick photoresist on the silicon wafer, and photolithograph the etching window for the deep trench, as shown in (a) of Figure 1 . In the figure, 1 is the photoresist; 2 is the silicon substrate layer.

[0050] (2) Use an STS ICP plasma etching machine to achieve deep trench etching, and form a deep trench as shown in (b) of Figure 1 . The process conditions adopted are as shown in the following table:

[0051]

[0052] Adopting the above process conditions, after the etching is completed, the depth of the trench reaches 150 - 170 microns deep, with steep sidewalls and smooth lines, as shown in Figure 2 .

Claims

1. A method for high-selectivity photoresist silicon isolation deep trench etching, characterized in that it includes the following steps: (1) Set the gas flow rate and time in the etching stage and passivation stage to increase the etching selectivity of silicon to photoresist to 120:1, and directly use the photoresist as the etching mask throughout the etching process; In the step (1), setting the gas flow rate and time in the etching stage and passivation stage is specifically: the gas SF6 flow rate in the etching stage is 450 sccm, and the time is 3.4 s; the gas C4F8 flow rate in the passivation stage is 250 sccm, and the time is 2.6 s; (2) Set the radio frequency power, that is, the coil power, to generate a sufficiently high plasma density to achieve rapid etching, with an etching rate of 5 um / min; The coil power in the etching stage is 2500 W, and the coil power in the passivation stage is 2000 W; (3) Adopt process parameters that can quickly realize the switching and gradual change between the etching and passivation processes to ensure the steepness of the deep trench and smooth lines. The steepness is 90° ± 0.1°, and the process parameters for the gradual change include the electrode power and process pressure; To quickly realize the switching between the etching and passivation processes, specifically: the etching time is 3.4 s; the passivation time is 2.6 s; Under the gradual change parameters, the electrode power in the initial 0.8 s of the etching stage is 140 W, and in the remaining 2.6 s, the first process cycle is 30 W, and linearly gradually changes to 35 W by the 260th process cycle; the electrode power in the passivation stage is 30 W in the first process cycle, and linearly gradually changes to 35 W by the 260th process cycle; The process pressure is 25 mT in the initial 0.8 s of the etching stage, 40 mT in the first process cycle in the remaining 2.6 s, and linearly gradually changes to 60 mT by the 260th process cycle.

2. A high-selectivity photoresist silicon isolation deep trench etching system, characterized in that it includes: Gas flow rate and time setting module: Set the gas flow rate and time in the etching stage and passivation stage to increase the etching selectivity of silicon to photoresist to 120:1, and directly use the photoresist as the etching mask throughout the etching process; Plasma generation module: Set the radio frequency power, that is, the coil power, to generate a sufficiently high plasma density to achieve rapid etching, with an etching rate of 5 um / min; Process switching and parameter setting module: Adopt process parameters that can quickly realize the switching and gradual change between the etching and passivation processes to ensure the steepness of the deep trench and smooth lines. The steepness is 90° ± 0.1°, and the process parameters for the gradual change include the electrode power and process pressure; Set the gas flow rate and time in the etching stage and passivation stage, specifically: the gas SF6 flow rate in the etching stage is 450 sccm, and the time is 3.4 s; the gas C4F8 flow rate in the passivation stage is 250 sccm, and the time is 2.6 s; The coil power in the etching stage is 2500 W, and the coil power in the passivation stage is 2000 W; To quickly realize the switching between the etching and passivation processes, specifically: the etching time is 3.4 s; the passivation time is 2.6 s; The electrode power is 140 W during the initial 0.8 s of the etching stage, 30 W for the first process cycle during the remaining 2.6 s, and linearly ramps up to 35 W by the 260th process cycle; for the passivation stage of the electrode power, it is 30 W for the first process cycle and linearly ramps up to 35 W by the 260th process cycle. The process pressure is 25 mT during the initial 0.8 s of the etching stage, 40 mT for the first process cycle during the remaining 2.6 s, and linearly ramps up to 60 mT by the 260th process cycle.

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