Sampling control method, device, driving circuit, air conditioner and storage medium

Abstract

The present invention proposes a sampling control method, device, drive circuit, air conditioner and storage medium. The sampling control method of the drive circuit includes: obtaining the voltage component of the drive circuit in a two-phase coordinate system; determining the vector sum of the voltage component of the drive circuit in the two-phase coordinate system; determining the sampling mode of the sampling circuit according to the vector interval in which the vector sum is located; and controlling the sampling circuit to perform sampling processing according to the sampling mode. The technical solution provided by the present invention aims to combine the advantages of the three-resistance and single-resistance sampling modes by flexibly setting the sampling mode, reduce the unobservable area of ​​sampling, improve the linear output capability of the sampling control device, achieve a balance between current sampling and noise, and expand the scope of application.

Description

Technical Field

[0001] The present invention relates to the technical field of air conditioners, and in particular to a sampling control method of a drive circuit, a sampling control device, a drive circuit, an air conditioner and a computer-readable storage medium. Background Art

[0002] In the related art, three-resistance sampling and single-resistance sampling are commonly used in the sampling scheme of indoor DC fans. Due to the need to reduce noise, the single-resistance sampling method requires phase shifting processing, and the unobservable area of ​​the single-resistance sampling method is mainly in the low modulation area and the switching area of ​​the vector interval. There is also the problem that the phase current is not at the same time, and there is an error in the sampled current. The controller is seriously nonlinear at low voltage output. Although the three-resistance sampling method does not require phase shifting, and the unobservable area of ​​the three-resistance sampling method is mainly in the high modulation area, the phase current belonging to the same moment can be obtained, but the minimum pulse width of the three lower bridge arms needs to be set, resulting in the output of the bridge arm being limited, resulting in the nonlinearity of the controller output at high voltage output, and the output harmonics increase, which is not conducive to reducing noise. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art or related art.

[0004] To this end, a first aspect of the present invention is to propose a sampling control method for a driving circuit.

[0005] A second aspect of the present invention is to provide a sampling control device for a driving circuit.

[0006] A third aspect of the present invention is to provide a driving circuit.

[0007] A fourth aspect of the present invention is to provide an air conditioner.

[0008] A fifth aspect of the present invention is to provide a computer-readable storage medium.

[0009] In view of this, according to a first aspect of the present invention, a sampling control method for a drive circuit is proposed, wherein the drive circuit includes an inverter circuit and a sampling circuit, and the sampling circuit is connected to the inverter circuit; the sampling control method includes: obtaining the voltage components of the drive circuit in a two-phase coordinate system; determining the vector sum of the voltage components of the drive circuit in the two-phase coordinate system; determining the sampling mode of the sampling circuit according to the vector interval in which the vector sum is located; and controlling the sampling circuit to perform sampling processing according to the sampling mode.

[0010] In the above technical scheme, further, according to the vector interval in which the vector sum is located, the step of determining the sampling mode of the sampling circuit specifically includes: based on the vector sum being in the first vector interval, the sampling mode is a three-resistor sampling mode; based on the vector sum being in the second vector interval, the sampling mode is a single-resistor sampling mode; based on the vector sum being in the third vector interval, the vector sum is decomposed into two adjacent space vectors, and the sampling mode is determined according to the space vector.

[0011] In any of the above technical solutions, further, the step of determining the sampling mode according to the space vector specifically includes: based on the space vector satisfying a preset space vector range, the sampling mode is a single resistor sampling mode or a three-resistor sampling mode.

[0012] In any of the above technical solutions, further, the step of controlling the sampling circuit to perform sampling processing according to the three-resistance sampling method specifically includes: obtaining the comparison matching values ​​of the three phases of the driving circuit; determining the target comparison matching value according to the size relationship between the comparison matching values ​​of the three phases; determining the sampling trigger time point according to the difference between the target comparison matching value and the sampling delay time; and controlling the sampling circuit to perform sampling processing according to the sampling trigger time point.

[0013] In any of the above technical solutions, further, the step of controlling the sampling circuit to perform sampling processing according to the single resistor sampling method specifically includes: determining the time length of decomposing the vector sum into two adjacent space vectors according to the vector sum and the vector angle of the driving circuit; determining the target comparison matching value of the driving circuit according to the time length; determining the sampling trigger time point according to the difference between the target comparison matching value and the sampling delay time length; and controlling the sampling circuit to perform sampling processing according to the sampling trigger time point.

[0014] In any of the above technical solutions, further, before the step of determining the sampling method of the sampling circuit according to the vector and the vector interval in which it is located, it also includes: determining the space vector sector in which the target voltage vector of the driving circuit is located according to the voltage component of the driving circuit in a two-phase coordinate system and the vector angle of the driving circuit; dividing the space vector sector into a first vector interval, a second vector interval, and a third vector interval.

[0015] In any of the above technical solutions, further, the step of dividing the space vector sector into a first vector interval, a second vector interval, and a third vector interval specifically includes: determining a sampling time threshold of the sampling circuit according to the dead time of the inverter circuit, the current stabilization time of the DC bus, and the sampling hold time of the sampling circuit; dividing the space vector sector according to the sampling time threshold to obtain the first vector interval, the second vector interval, and the third vector interval.

[0016] In any of the above technical solutions, further, the step of controlling the sampling circuit to perform sampling processing specifically includes: controlling the sampling circuit to perform sampling processing in the order of first sampling the bus voltage and then sampling the phase current.

[0017] According to a second aspect of the present invention, a sampling control device is provided, comprising: a memory and a processor, wherein the memory stores a computer program; when the processor executes the computer program, the steps of the sampling control method for the driving circuit provided in the first aspect are performed.

[0018] According to a third aspect of the present invention, a drive circuit is proposed, comprising: a motor; an inverter circuit, the inverter circuit is connected between the positive and negative poles of a DC bus, the inverter circuit comprises three pairs of half-bridge circuits, each pair of half-bridge circuits comprises two switching tubes connected in series, and a common end between the two switching tubes is connected to the motor; a sampling circuit, the sampling circuit comprises a sampling resistor, and the sampling resistor is connected between the lower bridge arm switching tubes of at least two pairs of half-bridge circuits and the negative pole of the DC bus; a protection circuit, connected in parallel with the sampling resistor; and the sampling control device proposed in the second aspect, connected to the inverter circuit and the sampling circuit.

[0019] In the above technical solution, further, the sampling resistor includes: a first sampling resistor, connected between the lower bridge arm switch tubes of at least two pairs of half-bridge circuits and the negative electrode of the DC bus, and arranged on the lower bridge arm of at least two pairs of half-bridge circuits; a second sampling resistor, connected in series with all the first sampling resistors of at least two first sampling resistors; and a protection circuit connected in parallel with the second sampling resistor.

[0020] According to a fourth aspect of the present invention, an air conditioner is provided, comprising: a load; and the driving circuit provided in the third aspect, wherein the driving circuit is connected to the load and is used to drive the load to operate.

[0021] According to a fifth aspect of the present invention, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the sampling control method of the driving circuit provided in the first aspect are performed.

[0022] In the technical solution of the present invention, in the current PWM (Pulse Width Modulation, vector pulse width modulation) cycle, the driving circuit can modulate the desired output voltage according to the voltage modulation algorithm. The voltage component of the PWM output waveform (pulse width modulation signal) in the two-phase coordinate system is obtained, and the vector sum of the voltage components in the two-phase coordinate system of the driving circuit is calculated. After determining the vector interval of the space vector sector that the vector sum satisfies, different sampling methods are selected according to the different vector intervals in which the vector sum is located, so that the driving circuit uses a three-resistance sampling algorithm at low modulation and a single-resistance sampling algorithm at high modulation. On the one hand, by flexibly setting the sampling method, the advantages of the three-resistance and single-resistance sampling methods are combined, the unobservable area of ​​sampling is reduced, the linear output capacity of the sampling control device is improved, the balance between current sampling and noise is achieved, and the scope of application is expanded; on the other hand, the traditional three-resistance sampling circuit is not changed, no new devices are required, and the circuit structure is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0024] Figure 1 A schematic flow chart showing a sampling control method of a driving circuit according to an embodiment of the present invention is shown;

[0025] Figure 2 A schematic flow chart showing a sampling control method of a driving circuit according to another embodiment of the present invention is shown;

[0026] Figure 3 A schematic flow chart showing a sampling control method of a driving circuit according to another embodiment of the present invention is shown;

[0027] Figure 4 A schematic flow chart showing a sampling control method of a driving circuit according to another embodiment of the present invention is shown;

[0028] Figure 5 A schematic flow chart showing a sampling control method of a driving circuit according to another embodiment of the present invention is shown;

[0029] Figure 6 A schematic flow chart showing a sampling control method of a driving circuit according to another embodiment of the present invention is shown;

[0030] Figure 7 A schematic flow chart showing a sampling control method of a driving circuit according to another embodiment of the present invention is shown;

[0031] Figure 8 A circuit topology diagram of a driving circuit according to an embodiment of the present invention is shown;

[0032] Fig. 9 A circuit topology diagram of a driving circuit according to another embodiment of the present invention is shown;

[0033] Fig.10 A schematic diagram of a space vector sector according to an embodiment of the present invention is shown;

[0034] Fig.11 A schematic diagram of a space vector sector according to another embodiment of the present invention is shown;

[0035] Fig.12 A schematic diagram showing trigger sampling time points of a three-resistance sampling method according to an embodiment of the present invention is shown;

[0036] Fig.13 A schematic diagram showing trigger sampling time points of a single resistor sampling method according to an embodiment of the present invention is shown;

[0037] Fig.14 A schematic diagram showing sampling limitations of a three-resistance sampling method in the related art is shown;

[0038] Fig.15 A schematic diagram showing the minimum pulse width of a three-resistance sampling method according to an embodiment of the present invention is shown;

[0039] Fig.16 A schematic diagram showing the minimum pulse width of a single resistor sampling method according to an embodiment of the present invention is shown;

[0040] Fig.17 A sampling equivalent diagram corresponding to a vector (100) according to an embodiment of the present invention is shown;

[0041] Fig.18 The sampling equivalent diagram corresponding to the vector (001) according to an embodiment of the present invention is shown.

[0042] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0045] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0046] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0047] In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0048] Refer to the following Figures 1 to 18 A sampling control method of a driving circuit, a sampling control device, a driving circuit, an air conditioner, and a computer-readable storage medium according to some embodiments of the present invention are described.

[0049] Embodiment 1:

[0050] like Figure 1 As shown, according to an embodiment of the first aspect of the present invention, a sampling control method of a driving circuit is proposed, the method comprising:

[0051] Step 102, obtaining the voltage component of the driving circuit in a two-phase coordinate system;

[0052] Step 104, determining the vector sum of the voltage components of the drive circuit in the two-phase coordinate system;

[0053] Step 106, determining a sampling mode of a sampling circuit according to the vector and the vector interval in which the vector is located;

[0054] Step 108, controlling the sampling circuit to perform sampling processing according to the sampling mode.

[0055] In this embodiment, in the current PWM (Pulse Width Modulation, vector pulse width modulation) cycle, the driving circuit can modulate the desired output voltage according to the voltage modulation algorithm. The voltage component of the PWM output waveform (pulse width modulation signal) in the two-phase coordinate system is obtained, and the vector sum of the voltage components in the two-phase coordinate system of the driving circuit is calculated. After determining the vector interval of the space vector sector that the vector sum satisfies, different sampling methods are selected according to the different vector intervals in which the vector sum is located, so that the driving circuit uses a three-resistance sampling algorithm at low modulation and a single-resistance sampling algorithm at high modulation. On the one hand, by flexibly setting the sampling method, the advantages of the three-resistance and single-resistance sampling methods are combined, the unobservable area of ​​sampling is reduced, the linear output capacity of the sampling circuit is improved, the balance between current sampling and noise is achieved, and the scope of application is expanded; on the other hand, the traditional three-resistance sampling circuit is not changed, no new devices are required, the circuit structure is simple, and the sampling resistor replaces the Hall sensor to collect current, which is low in cost.

[0056] Among them, the two-phase coordinate system includes a two-phase stationary coordinate system (α-axis, β-axis) and a two-phase rotating coordinate system (d-axis, q-axis). It can be understood that the vector sum can be a synthetic vector of the α-axis voltage component and the β-axis voltage component, or it can be a synthetic vector of the d-axis voltage component and the q-axis voltage component.

[0057] Specifically, a space vector sector includes a first vector interval, a second vector interval and a third vector interval, wherein the third vector interval represents an unobservable area in the space vector sector, the first vector interval represents a valid observation area in the space vector sector, and the second vector interval represents an area in the space vector sector excluding the unobservable area and the valid observation area.

[0058] It should be noted that the drive circuit includes an inverter circuit and a sampling circuit, and the sampling circuit is connected to the inverter circuit, wherein the inverter circuit includes three pairs of half-bridge circuits, i.e., three-phase inverter circuits, and each pair of half-bridge circuits includes an upper bridge arm and a lower bridge arm, wherein the upper bridge arm is connected to the positive pole of the DC bus of the drive circuit, and the lower bridge arm is connected to the negative pole of the DC bus of the drive circuit. Each pair of half-bridge circuits includes: two switch tubes connected in series, i.e., one switch tube is provided for each of the upper bridge arm and the lower bridge arm, and the common end (the midpoint of the upper and lower bridge arms) between the two switch tubes is connected to the load. The sampling circuit includes a sampling resistor, and the sampling resistor is connected between the lower bridge arm switch tubes of at least two pairs of half-bridge circuits and the negative pole of the DC bus.

[0059] Embodiment 2:

[0060] like Figure 2As shown, according to an embodiment of the present invention, a sampling control method of a driving circuit is proposed, the method comprising:

[0061] Step 202, obtaining the voltage component of the driving circuit in the two-phase coordinate system;

[0062] Step 204, determining the vector sum of the voltage components of the drive circuit in the two-phase coordinate system;

[0063] Step 206, whether the vector sum is in the first vector interval, if so, proceed to step 208, if not, proceed to step 210;

[0064] Step 208, controlling the sampling circuit to perform sampling processing according to the three-resistance sampling method;

[0065] Step 210, whether the vector sum is in the second vector interval, if so, proceed to step 212, if not, proceed to step 214;

[0066] Step 212, controlling the sampling circuit to perform sampling processing according to the single resistor sampling method;

[0067] Step 214, decomposing the vector sum into two adjacent space vectors;

[0068] Step 216, determining a sampling mode according to the space vector, and controlling the sampling circuit to perform sampling processing according to the sampling mode.

[0069] In this embodiment, if the vector sum of the voltage components in the two-phase coordinate system is in the first vector interval, it means that the vector sum is in the effective observation area of ​​the space vector sector, that is, the drive circuit is in the low modulation area, and a three-resistance sampling algorithm is used to collect the phase current of the drive circuit, thereby avoiding the three-resistance sampling method from generating an unobservable area in the high modulation area, and there is no need to limit the minimum pulse width of the drive circuit, and the output limit of the inverter circuit bridge arm is released, thereby reducing the output harmonics of the sampling circuit, which is beneficial to reducing noise.

[0070] If the vector sum of the voltage components in the two-phase coordinate system is in the second vector interval, it means that the vector sum is between the effective observation area and the unobservable area of ​​the space vector sector, that is, the drive circuit is in the high modulation area. In this case, a single resistor sampling algorithm is used to collect the phase current of the drive circuit, thereby avoiding the single resistor sampling method from generating an unobservable area in the low modulation area, thereby improving the linear output capability of the sampling circuit and ensuring the accuracy of the sampled current.

[0071] If the vector sum of the voltage components in the two-phase coordinate system is neither in the first vector interval nor in the second vector interval, it means that the vector sum is in the third vector interval, that is, the vector sum is in the unobservable area of ​​the space vector sector, and it is difficult to complete the reconstruction of the phase current. Then the vector sum is decomposed into two adjacent space vectors, and the unobservable area is further divided by the decomposed space vector. When the vector sum is in a partial unobservable area, the phase current of the drive circuit can still be obtained by the three-resistance sampling method or the single-resistance sampling method. While ensuring the accuracy of the sampling results, the unobservable area of ​​the sampling is effectively reduced, the linear output capability of the sampling circuit is improved, the balance between current sampling and noise is achieved, and the scope of application is expanded.

[0072] Specifically, when the vector sum is inside the space vector sector, the two space vectors after the vector sum is decomposed are non-zero vectors. When the vector sum is exactly on six non-zero vectors, a zero vector may appear after the vector sum is decomposed.

[0073] Embodiment 3:

[0074] like Figure 3 As shown, according to an embodiment of the present invention, a sampling control method of a driving circuit is proposed, the method comprising:

[0075] Step 302, obtaining the voltage component of the driving circuit in the two-phase coordinate system;

[0076] Step 304, determining the vector sum of the voltage components of the drive circuit in the two-phase coordinate system;

[0077] Step 306, whether the vector sum is in the first vector interval, if so, proceed to step 308, if not, proceed to step 310;

[0078] Step 308, controlling the sampling circuit to perform sampling processing according to the three-resistance sampling method;

[0079] Step 310, whether the vector sum is in the second vector interval, if so, proceed to step 312, if not, proceed to step 314;

[0080] Step 312, controlling the sampling circuit to perform sampling processing according to the single resistor sampling method;

[0081] Step 314, decomposing the vector sum into two adjacent space vectors;

[0082] Step 316, whether the space vector meets the preset space vector range, if yes, proceed to step 318, if no, proceed to step 320;

[0083] Step 318, controlling the sampling circuit to perform sampling processing according to the single resistor sampling method or the three resistor sampling method;

[0084] Step 320, adjusting the minimum pulse width of the driving circuit or controlling the phase shift of the driving circuit, and controlling the sampling circuit to perform sampling processing.

[0085] In this embodiment, when the vector sum of the voltage components of the driving circuit in the two-phase coordinate system is in the third vector interval, that is, the unobservable area of ​​the space vector sector, the vector sum is decomposed into two adjacent space vectors. And by judging whether the space vector meets the preset space vector range, the unobservable area is further divided into a pseudo unobservable area and a true unobservable area. If the space vector meets the preset space vector range, that is, the vector sum is in the pseudo unobservable area, the vector action time decomposed on the space vector is the largest at this time, and the requirements of trigger sampling can be met, then the single resistor sampling method or the three-resistance sampling method can be used to control the sampling circuit for sampling processing. If the space vector does not meet the preset space vector range, it means that the vector sum is in the true unobservable area. At this time, it is difficult to complete the reconstruction of the phase current, and only the traditional three-resistance sampling minimum pulse width control scheme or the single resistor phase shifting scheme can be used to avoid the vector sum being in the true unobservable area. Therefore, through the decomposed space vector, when the vector sum is in a partial unobservable area, the phase current of the driving circuit can still be obtained by the three-resistance sampling method or the single resistor sampling method. While ensuring the accuracy of the sampling results, the unobservable area of ​​the sampling is effectively reduced, the linear output capability of the sampling circuit is improved, a balance between current sampling and noise is achieved, and the scope of application is expanded.

[0086] Specifically, Fig.11 As shown, the preset space vector range includes vector (100), vector (010) and vector (001).

[0087] Embodiment 4:

[0088] like Figure 4 As shown, according to an embodiment of the present invention, a sampling control method of a driving circuit is proposed, the method comprising:

[0089] Step 402, obtaining the voltage component of the driving circuit in the two-phase coordinate system;

[0090] Step 404, determining the vector sum of the driving circuit in the two-phase coordinate system;

[0091] Step 406, determining that the vector sum is in a first vector interval;

[0092] Step 408, obtaining comparison matching values ​​of three phases of the driving circuit;

[0093] Step 410, determining a target comparison matching value according to the magnitude relationship between the comparison matching values ​​of the three phases;

[0094] Step 412, determining a sampling triggering time point according to the difference between the target comparison matching value and the sampling delay time length;

[0095] Step 414, controlling the sampling circuit to perform sampling processing according to the sampling triggering time point.

[0096] In this embodiment, after determining that the vector sum of the voltage components of the drive circuit in the two-phase coordinate system is in the first vector interval, that is, the drive circuit is in the low modulation area, the three-resistance sampling algorithm is used to collect the phase current of the drive circuit. Specifically, the lower bridge arm switch tubes of the three pairs of half-bridge circuits of the inverter circuit are all turned on, and three comparison matching values ​​of the three-phase modulation voltage of the PWM output waveform are obtained. The size relationship between the three comparison matching values ​​is compared, and the maximum or minimum value of the three comparison matching values ​​is used as the target comparison matching value. The difference between the target comparison matching value and the sampling delay time is calculated to determine the sampling trigger time point. When the timing reaches the sampling trigger time point, the sampling operation is triggered and implemented, thereby controlling the on / off time of the lower bridge arm switch tube. On the one hand, the three-resistance sampling method is avoided to generate an unobservable area in the high modulation area, and the line current sampling can be realized without limiting the minimum pulse width of the drive circuit, reducing the output harmonics of the sampling circuit, which is conducive to reducing noise. On the other hand, by reasonably setting the comparison matching value, it is ensured that the sampled phase current meets the actual demand. For example, the minimum value is selected as the target comparison matching value, so that the phase corresponding to the minimum value of the comparison matching value can also be sampled smoothly, thereby ensuring the integrity of phase current collection.

[0097] Embodiment 5:

[0098] like Figure 5 As shown, according to an embodiment of the present invention, a sampling control method of a driving circuit is proposed, the method comprising:

[0099] Step 502, obtaining the voltage component of the driving circuit in the two-phase coordinate system and the vector angle of the driving circuit;

[0100] Step 504, determining the vector sum of the voltage components of the drive circuit in the two-phase coordinate system;

[0101] Step 506, determining that the vector sum is in a second vector interval;

[0102] Step 508, determining the duration of decomposing the vector sum into two adjacent space vectors according to the vector sum and the vector angle;

[0103] Step 510, determining a target comparison matching value of the driving circuit according to the duration;

[0104] Step 512, determining a sampling triggering time point according to the difference between the target comparison matching value and the sampling delay time length;

[0105] Step 514, controlling the sampling circuit to perform sampling processing according to the sampling triggering time point.

[0106] In this embodiment, after determining that the vector sum of the voltage components of the drive circuit in the two-phase coordinate system is in the second vector interval, that is, the drive circuit is in the high modulation area, a single resistor sampling algorithm is used to collect the phase current of the drive circuit. Specifically, the lower bridge arm switch tubes of one or two pairs of half-bridge circuits of the inverter circuit are controlled to be turned on, and the duration of the vector sum being decomposed into two adjacent space vectors, that is, the vector action time, is determined according to the vector sum and the vector angle of the drive circuit. According to the duration, the comparison matching value corresponding to the phase of the lower bridge arm after sampling equivalent is determined, and the comparison matching value is used as the target comparison matching value. The difference between the target comparison matching value and the sampling delay time is calculated to determine the sampling trigger time point. When the timing reaches the sampling trigger time point, the sampling operation is triggered and implemented, thereby controlling the on / off time of the lower bridge arm switch tube. On the one hand, only one operation is needed in one PWM cycle to sample the phase current of the drive circuit, and the three-phase current of the load can be obtained at the same time, while ensuring the sampling accuracy, the sampling time is reduced, the sampling efficiency is improved, and the demand for the computing power of the sampling circuit can be reduced, and the circuit cost can be reduced. On the other hand, it avoids the unobservable area produced by the single resistor sampling method in the low modulation area, improves the linear output capability of the sampling circuit, achieves a balance between current sampling and noise, and expands the scope of application.

[0107] The vector angle may be a vector angle estimated by the driving circuit in a previous PWM cycle, or may be a vector angle estimated by the driving circuit in a preset next PWM cycle.

[0108] Taking the vector sum decomposition into vector (100) and vector (110) as an example, the vector sum decomposition into vector (100) and vector (110) whose vector action time is respectively the first duration and the second duration, then the zero vector action time can be calculated according to the first duration, the second duration and the PWM period, and pulse width modulation is performed based on this. At this time, the sampling equivalent diagram is as follows Fig.17 As shown, the U-phase equivalent resistor 942 is connected to the positive pole of the DC bus through the upper bridge arm, and the V-phase equivalent resistor 944 and the W-phase equivalent resistor 946 are connected to the negative pole of the DC bus through the lower bridge arm through the sampling resistors of each phase. Then, the V-phase current and the W-phase current flow through the sampling resistors respectively, and the U-phase current can be calculated by the sum of the three-phase currents being 0. As can be seen from the above, the sampling of the three-phase current of the load can be completed by sampling and calculating once in one PWM cycle, realizing single-resistance sampling.

[0109] Embodiment 6:

[0110] like Figure 6As shown, according to an embodiment of the present invention, a sampling control method of a driving circuit is proposed, the method comprising:

[0111] Step 602, obtaining the voltage component of the driving circuit in the two-phase coordinate system and the vector angle of the driving circuit;

[0112] Step 604, determining the space vector sector where the target voltage vector of the drive circuit is located according to the voltage component and the vector angle of the drive circuit in the two-phase coordinate system;

[0113] Step 606, determining a sampling time threshold of the sampling circuit according to the dead time of the inverter circuit, the current stabilization time of the DC bus, and the sampling holding time of the sampling circuit;

[0114] Step 608, dividing the space vector sector into a first vector interval, a second vector interval, and a third vector interval according to the sampling time threshold;

[0115] Step 610, respectively comparing the vector sum with the first vector interval, the second vector interval, and the third vector interval, and determining the vector interval in which the vector sum is located;

[0116] Step 612, determining a sampling mode of a sampling circuit according to the vector and the vector interval in which the vector is located;

[0117] Step 614, controlling the sampling circuit to perform sampling processing according to the sampling mode.

[0118] In this embodiment, in the current PWM cycle, the driving circuit can modulate the desired output voltage according to the voltage modulation algorithm. The voltage component of the PWM output waveform in the two-phase coordinate system is obtained, and the space vector sector where the voltage vector to be output is located is confirmed according to the voltage component in the two-phase coordinate system and the estimated vector angle. At the same time, according to the sum of the dead time of the inverter circuit, the DC bus current signal stabilization time and the ADC (Analog Digital Converter) sampling and holding time, the sampling time threshold (the shortest time required for sampling), that is, the minimum vector working time for the PWM waveform, is calculated. The size of the first vector interval, the second vector interval, and the third vector interval in the space vector sector is determined according to the sampling time threshold. The vector sum is compared with the first vector interval, the second vector interval, and the third vector interval respectively. After determining the vector interval of the space vector sector that the vector sum satisfies, different sampling methods are selected according to the different vector intervals where the vector sum is located, so that the driving circuit uses the three-resistance sampling algorithm when low modulation and the single-resistance sampling algorithm when high modulation. Therefore, by flexibly setting the sampling method, the advantages of the three-resistance and single-resistance sampling methods are combined, the unobservable area of ​​sampling is reduced, the linear output capability of the sampling circuit is improved, the balance between current sampling and noise is achieved, and the scope of application is expanded.

[0119] It should be noted that, as Fig.10 and Fig.11 shown, when the inverter circuit performs vector pulse width modulation, taking the three-phase symmetrical motor stator powered by three-phase symmetrical sine wave voltage as the reference standard, appropriate switching is made through different switching modes of the three-phase inverter circuit, thereby forming a PWM wave, and using the actually formed magnetic flux vector to track its accurate magnetic flux circle. The six switching devices of the three-phase inverter circuit are combined (the signals of the upper and lower half-bridges of the same arm are opposite), and there are a total of 8 safe switching states. Among them, 000 and 111 are zero vectors and will not generate effective current during motor drive. The other 6 switching states (100, 110, 101, 001, 010, 011) are respectively six effective vectors. The 6 effective vectors divide the 360-degree voltage space into sectors of 60 degrees each, a total of six sectors, that is, forming a regular hexagon in space. Any voltage vector in space can be formed by the 6 effective vectors and 2 zero vectors.

[0120] Embodiment 7:

[0121] As Figure 7 shown, according to an embodiment of the present invention, a sampling control method for a drive circuit is proposed, and the method includes:

[0122] Step 702, obtaining the voltage components of the drive circuit in the two-phase coordinate system;

[0123] Step 704, determining the vector sum of the voltage components of the drive circuit in the two-phase coordinate system;

[0124] Step 706, determining the sampling method of the sampling circuit according to the vector interval where the vector sum is located;

[0125] Step 708, controlling the sampling circuit to perform sampling processing according to the sampling method in the order of first sampling the bus voltage and then sampling the phase current.

[0126] In this embodiment, due to the ringing phenomenon generated in the loop during the switching process of the switching tube of the inverter circuit, in order to prevent sampling the ringing signal, it is necessary to start sampling after a sampling delay duration, that is, the ringing time (Tdelay). Usually, the sampling order is to sample the three-phase current first and then the DC bus voltage, where the order of the UVW three phases can be changed. After sampling the bus voltage, enter the AD sampling interrupt and execute the control algorithm. However, due to sequential sampling, each AD sampling channel has a fixed sampling hold time (Tsampling), and the ringing time of the three-resistor sampling circuit needs to satisfy less than the sampling hold time (Tdelay < Tsampling). Therefore, as Fig.14As shown in the figure, after sampling three currents and one DC bus voltage in sequence, the minimum sampling pulse width needs to be limited to at least 4 times Tsampling, and 5 times Tsampling are required to complete the sampling. If only two currents and one bus voltage are sampled, the minimum sampling pulse width required is at least 2 times Tsampling, and 3 times Tsampling are required to complete the sampling. Not only is the sampling pulse width limited, but the sampling completion time is also longer.

[0127] For this reason, Fig.15 and Fig.16 As shown in the figure, the sampling process is carried out in the order of sampling the bus voltage first and then the phase current. After the last phase current is sampled, the AD sampling interrupt is entered and the control program is started. Therefore, without changing the circuit hardware topology, the minimum pulse width required for sampling and the time to complete the sampling are reduced by adjusting the software sampling sequence. Especially when the vector sum is in the truly unobservable area, it is necessary to limit the minimum sampling pulse width to avoid the vector sum being in the truly unobservable area. The sampling pulse width limit can be effectively reduced, the linear output range can be increased, and the interval time from the end of software sampling to the interruption can be accelerated, which is conducive to increasing the current loop bandwidth, and thus can take into account both the noise demand and the sampling efficiency, and expand the scope of application.

[0128] It is understandable that for circuit structures that require current sampling, the minimum pulse width required for sampling can be reduced by sampling the bus voltage first and then the phase current, and this is not limited to the circuit structure of the three-phase sampling resistor.

[0129] Embodiment 8:

[0130] According to an embodiment of the second aspect of the present invention, a sampling control device is provided, comprising a memory and a processor, wherein the memory stores a computer program; when the processor executes the computer program, the steps of the sampling control method for the drive circuit provided in the embodiment of the first aspect are performed. Therefore, the sampling control device has all the beneficial effects of the sampling control method for the drive circuit provided in the embodiment of the first aspect, which will not be described in detail here.

[0131] Embodiment 9:

[0132] like Figure 8 and Fig. 9 As shown, according to an embodiment of the third aspect of the present invention, a drive circuit is proposed, including: a motor 940; an inverter circuit 910, a sampling circuit 920, a protection circuit 930 and a sampling control device (not shown in the figure) proposed in an embodiment of the second aspect.

[0133] In detail, the inverter circuit 910 includes three pairs of half-bridge circuits, each pair of half-bridge circuits includes an upper bridge arm and a lower bridge arm, the upper bridge arm is connected to the positive pole of the DC bus of the driving circuit, and the lower bridge arm is connected to the negative pole of the DC bus of the driving circuit. Each pair of half-bridge circuits includes: two switch tubes connected in series, that is, one switch tube is provided for each of the upper bridge arm and the lower bridge arm, and the common end between the two switch tubes (the midpoint of the upper and lower bridge arms) is connected to the motor 940. The sampling circuit 920 includes a sampling resistor, and the sampling resistor is connected between the lower bridge arm switch tubes of at least two pairs of half-bridge circuits and the negative pole of the DC bus. The protection circuit 930 is connected in parallel with the sampling resistor. The sampling control device is connected to the control end of the switch tube to control the switch tube to be turned on or off. The sampling control device is also connected to the sampling circuit 920 to control the sampling circuit 920 to collect the phase current of the drive circuit. Specifically, the sampling control device can perform the following steps when executing the computer program: obtain the voltage component of the drive circuit in the two-phase coordinate system; determine the vector sum of the voltage components of the drive circuit in the two-phase coordinate system; determine the sampling mode of the sampling circuit 920 according to the vector interval in which the vector sum is located; and control the sampling circuit 920 to perform sampling processing according to the sampling mode.

[0134] In this embodiment, in the current PWM (Pulse Width Modulation, vector pulse width modulation) cycle, the driving circuit can modulate the desired output voltage according to the voltage modulation algorithm. The voltage component of the PWM output waveform (pulse width modulation signal) in the two-phase coordinate system is obtained, and the vector sum of the voltage components in the two-phase coordinate system of the driving circuit is calculated. After determining the vector interval of the space vector sector that the vector sum satisfies, different sampling methods are selected according to the different vector intervals in which the vector sum is located, so that the driving circuit uses a three-resistance sampling algorithm at low modulation and a single-resistance sampling algorithm at high modulation. On the one hand, by flexibly setting the sampling method, the advantages of the three-resistance and single-resistance sampling methods are combined, the unobservable area of ​​sampling is reduced, the linear output capability of the sampling circuit 920 is improved, the balance between current sampling and noise is achieved, and the scope of application is expanded; on the other hand, the traditional three-resistance sampling circuit is not changed, no new devices are required, the circuit structure is simple, and the sampling resistor replaces the Hall sensor to collect current, which is low in cost.

[0135] Furthermore, if Fig.10 As shown, a space vector sector includes a first vector interval, a second vector interval and a third vector interval, wherein the third vector interval represents an unobservable area in the space vector sector, the first vector interval represents a valid observation area in the space vector sector, and the second vector interval represents an area in the space vector sector excluding the unobservable area and the valid observation area.

[0136] The sampling circuit 920 also includes an amplifier circuit, a digital-to-analog converter, and the like.

[0137] It should be noted that the switch tube includes at least one of the following: a field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT) and a diode. Among them, the gate of the field effect transistor is connected to the command output terminal of the controller, and a reverse freewheeling diode is connected between the source and drain of the field effect transistor. The base of the insulated gate bipolar transistor is connected to the output terminal of the sampling control device, and a reverse freewheeling diode is connected between the emitter and the collector of the insulated gate bipolar transistor. Among them, the field effect transistor can be a depletion field effect transistor or an enhancement field effect transistor, and a SiC transistor or a GaN transistor can also be used.

[0138] Embodiment 10:

[0139] like Figure 8 and Fig. 9 As shown, according to an embodiment of the present invention, it includes the features defined in any of the above embodiments, and further: the sampling resistor includes a first sampling resistor 922 and a second sampling resistor 924 .

[0140] In detail, the first sampling resistor 922 is arranged on each lower bridge arm in at least two pairs of half-bridge circuits, and the first sampling resistor 922 is connected between the lower bridge arm switch tubes of at least two pairs of half-bridge circuits and the negative pole of the DC bus, that is, the first sampling resistor 922 is used to collect the phase current of each phase of the drive circuit. The second sampling resistor 924 is connected in series with all the first sampling resistors 922 in at least two first sampling resistors 922, that is, the second sampling resistor 924 is connected between the negative pole of the DC bus and the common end of all the lower bridge arms of the inverter circuit 910, and the second sampling resistor 924 is used to collect the current of the total loop. The protection circuit 930 is connected in parallel with the second sampling resistor 924.

[0141] In this embodiment, by setting a second sampling resistor 924 on the total loop between the inverter circuit 910 and the negative pole of the DC bus, the functions of sampling the total current and protecting the loop are realized, so that the protection circuit 930 of the first sampling resistor 922 of each phase can be eliminated, and the circuit as a whole reduces two protection devices, optimizes the circuit structure, and further reduces the circuit cost.

[0142] Embodiment 11:

[0143] According to an embodiment of the fourth aspect of the present invention, an air conditioner is provided, a load and a driving circuit provided in the third aspect. The driving circuit is connected to the load. Therefore, the air conditioner has all the beneficial effects of the driving circuit provided in the third aspect, which will not be described in detail here.

[0144] Embodiment 12:

[0145] According to an embodiment of the fifth aspect of the present invention, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the sampling control method of the drive circuit of the first aspect embodiment are performed. Therefore, the computer-readable storage medium has all the beneficial effects of the sampling control method of the drive circuit of the first aspect embodiment. Specific embodiment:

[0147] According to a specific embodiment of the present invention, a driving circuit is proposed, which uses a new three-resistance sampling hardware structure, such as Figure 8 and Fig. 9 As shown, the number of devices is reduced in hardware, and a sampling control method is provided to reduce the unobservable area in software using a new sampling algorithm.

[0148] In terms of hardware, Figure 8 The circuit structure uses four sampling resistors, which are located in the lower bridge arm of the UVW three-phase and the total loop. The resistor on the total loop can be used to sample the total current and protect the loop. Compared with the traditional solution, although one sampling resistor is added, two protection devices are reduced. Fig. 9 The circuit structure using three sampling resistors can reduce two protection devices. Furthermore, the sampling circuit can use a differential circuit for sampling, and can also use the common point of the three resistors as the sampling location for sampling. At this time, the current of the total loop needs to be negatively calculated.

[0149] In terms of software, considering that for the single-resistance sampling scheme, the observation area is mainly in the low modulation area and the vector interval switching area, and there is also the problem that the phase current is not at the same time, there is an error in the sampled current. The unobservable area of ​​the three-resistance sampling scheme is mainly in the high modulation area, but the acquired phase current belongs to the same time. Specifically, the steps of the sampling control method are as follows:

[0150] S0, such as Fig.11 As shown, the minimum time (sampling time threshold) Tmin is designed based on the sum of the dead time of the switching device (switch tube), the AD sampling and holding time of the MCU (processor), and the time for the sampling signal to stabilize. Tmin determines the size of the non-observable area of ​​single-resistance and three-resistance sampling, and also determines the size of the unobservable area.

[0151] S1. Modulate the desired output voltage according to the voltage modulation algorithm to obtain the output voltages Vα and Vβ (the voltage components of the α and β axes) of the α and β axes of the PWM output waveform.

[0152] S2. According to the calculated Vα and Vβ and the vector angle estimated in the previous PWM cycle, the sector where the voltage vector to be output is located is determined.

[0153] S3, taking the vector and the first sector (the sector between vector (100) and vector (110)) calculated in S2 as an example, Fig.10 As shown, the first vector section, the second vector section or the third vector section belonging to the first sector is confirmed according to the vector sum of Vα and Vβ.

[0154] S4. If the vector sum of Vα and Vβ is in the first vector interval, the three-resistance sampling algorithm is used to perform sampling when all three lower bridge arms are closed. The desired output voltage is modulated according to the voltage modulation algorithm to obtain the three-phase modulation voltage comparison matching points of the PWM output waveform, which are Vu, Vv, and Vw respectively. The three-phase modulation voltage comparison matching points Vu, Vv, and Vw are compared to obtain the maximum comparison matching point (or the minimum comparison matching point), which represents the on-off time of the lower bridge arm. Taking the maximum comparison matching point as an example, the sampling trigger time point is designed to be the comparison matching value of the minimum output phase of the lower bridge arm minus the sampling delay time setting value Tdelay, such as Fig.12 shown.

[0155] S5. If the vector sum of Vα and Vβ is in the second vector interval, a single resistor sampling algorithm is used, as follows:

[0156] S5.1. Calculate the time of decomposition into two adjacent vectors according to the vector sum and vector angle of Vα and Vβ. Taking the first sector where the current voltage vector is located as an example, the time of decomposition into V1 (100) vector and V2 (110) vector is calculated according to the vector sum and vector angle of Vα and Vβ as T1 and T2 respectively.

[0157] S5.2. According to Ts=T1+T2+T0 (where T0 is the zero vector time and Ts is the PWM cycle time), pulse width modulation is performed according to T1, T2, and T0.

[0158] S5.3, if Fig.13 As shown, according to the time T1 decomposed to the vector V1 (100), the sampling point is designed to be the comparison match value of the V phase or the W phase minus the sampling delay time setting value Tdelay (ringing time). Specifically, the sampling equivalent diagram of the vector V1 (100) is as follows: Fig.17As shown, it can be seen that the U-phase equivalent resistor 924 is connected to the positive end of the bus voltage by the U-phase upper bridge arm, and the V-phase equivalent resistor 944 and the W-phase equivalent resistor 946 are connected to the negative end of the bus voltage by the lower bridge arm through the sampling resistors of each phase. At this time, the V-phase and W-phase currents flow through the sampling resistor (the first sampling resistor 922) respectively. The U-phase current can be calculated by the sum of the three-phase currents being 0, or it can be obtained by sampling the total resistance of the loop. As can be seen from the above, the three-phase current of the motor can be obtained through one sampling and calculation in one PWM cycle. The time T2 when the vector is decomposed to V2 (110) cannot be used to reconstruct the current because only the total current can be obtained.

[0159] Similarly, if the voltage vector is in the fourth sector (the sector between vector (001) and vector (011)), as long as the time to decompose to vector V5 (001) is sufficient, the sampling equivalent diagram at vector V5 (001) is as follows: Fig.18 As shown, the W-phase equivalent resistor 946 is connected to the positive end of the bus voltage by the upper bridge arm, and the V-phase equivalent resistor 944 and the U-phase equivalent resistor 942 are connected to the negative end of the bus voltage by the lower bridge arm through the sampling resistors of each phase. At this time, the V-phase current can still be obtained through the V-phase sampling resistor (the first V-phase sampling resistor 922), and the loop current (that is, the W-phase current) can be obtained through the total loop sampling resistor (the second sampling resistor 924), and then the U-phase current is calculated based on the sum of the three-phase currents being 0.

[0160] S6. If the vector sum of Vα and Vβ is in the third vector interval (unobservable zone), the C interval can be divided into two parts. The first part is the pseudo unobservable zone near vector V1 (100), vector V3 (010) and vector V5 (001), and the second part is the true unobservable zone near vector V2 (110), vector V4 (011) and vector V6 (101).

[0161] S6.1 For the pseudo unobservable region, since the vector sum of Vα and Vβ is near vector V1(100), vector V3(010) and vector V5(001), the time decomposed on vector V1(100), vector V3(010) and vector V5(001) is the largest, which can also meet the requirement of being greater than or equal to Tmin. Therefore, refer to S5.3 to obtain the three-phase current. The sampling equivalent diagram corresponding to vector V1(100) is as follows: Fig.17 shown.

[0162] S6.2 For the truly unobservable area, there are only three areas in the six voltage intervals, distributed near the three vectors V2 (110), V4 (011), and V6 (101). At this time, we can only use the minimum pulse width scheme of three-resistance sampling to avoid entering this area, or refer to the phase shift scheme of a single resistor to further eliminate the unobservable area.

[0163] In addition, due to the ringing phenomenon generated in the loop during the switching process of switching devices such as IGBTs, in order to prevent sampling the ringing signal, it is necessary to delay for a period of time Tdelay before starting sampling. Traditional sampling setup points are as Fig.14 shown. The sampling sequence is U / V / W / bus voltage (the order of UVW can be changed). After sampling the bus voltage, it enters the AD sampling interrupt and the control algorithm is executed. However, when sampling in this sequence, each AD sampling channel has a fixed sampling and holding time (Tsampling). The ringing time of the three-resistor sampling circuit needs to satisfy being less than the sampling and holding time (Tdelay < Tsampling). Therefore, when sequentially sampling three currents and one DC bus voltage, the minimum sampling pulse width time needs to be limited to at least 4 times Tsampling, and 5 times Tsampling is required to complete the sampling. If only two currents and one bus voltage are sampled, the minimum sampling pulse width required is at least 2 times Tsampling, and 3 times Tsampling is required to complete the sampling. This not only limits the sampling pulse width but also takes a long time to complete sampling. Therefore, the sampling circuit is controlled to sample the bus voltage first, and then sequentially sample the three-phase currents of U, V, and W (or any two-phase currents). After sampling the last-phase current, it enters the AD interrupt to start executing the control program. As Fig.15 and Fig.16 shown, the interval time between the pulse width limit and the interruption when sampling ends is small. Among them, the AD sampling time can be determined according to the specifications and parameters of the MCU (controller).

[0164] In this embodiment, on the one hand, based on the hardware of the traditional three-resistor sampling scheme, the three-resistor sampling algorithm is used in low modulation, and the single-resistor sampling algorithm is used in high modulation, so as to integrate the advantages of the three-resistor and single-resistor sampling schemes, reduce the unobservable area of sampling, and improve the linear output ability of the controller. On the other hand, the hardware circuit can reduce two protection circuits, the circuit structure is simple, the traditional three-resistor sampling circuit is not changed, and no new devices need to be added. On the third hand, the single-resistor sampling is only calculated once, and the three-phase currents of the motor can be obtained at the same moment, and the current accuracy is higher. On the fourth hand, the software sampling sequence is optimized to reduce the sampling pulse width limit value, increase the linear output range, and can also accelerate the interval time of the software sampling end entering the interrupt, which is beneficial to accelerating the current loop bandwidth.

Claims

1. A sampling control method for a driving circuit, characterized in that: The driving circuit includes an inverter circuit and a sampling circuit, and the sampling circuit is connected to the inverter circuit; the sampling control method includes: Obtaining a voltage component of the drive circuit in a two-phase coordinate system; Determining a vector sum of voltage components of the drive circuit in a two-phase coordinate system; Determining a sampling mode of the sampling circuit according to the vector and the vector interval in which the vector is located; Controlling the sampling circuit to perform sampling processing according to the sampling mode; The step of determining the sampling mode of the sampling circuit according to the vector and the vector interval in which the vector is located specifically includes: Based on the vector sum being in the first vector interval, the sampling method is a three-resistance sampling method; Based on the vector sum being in the second vector interval, the sampling method is a single resistor sampling method; Based on the fact that the vector sum is in a third vector interval, decomposing the vector sum into two adjacent space vectors, and determining the sampling mode according to the space vectors; The first vector interval represents the effective observation area in the space vector sector, the second vector interval represents the area in the space vector sector excluding the unobservable area and the effective observation area, and the third vector interval represents the unobservable area in the space vector sector.

2. The sampling control method of the driving circuit according to claim 1, characterized in that: The step of determining the sampling mode according to the space vector specifically includes: Based on the fact that the space vector satisfies a preset space vector range, the sampling method is the single-resistor sampling method or the three-resistor sampling method.

3. The sampling control method of the driving circuit according to claim 2, characterized in that: The step of controlling the sampling circuit to perform sampling processing according to the three-resistance sampling method specifically includes: Obtaining comparison matching values ​​of three phases of the drive circuit; Determine a target comparison matching value according to the magnitude relationship between the comparison matching values ​​of the three phases; Determine the sampling trigger time point according to the difference between the target comparison matching value and the sampling delay time length; The sampling circuit is controlled to perform sampling processing according to the sampling trigger time point.

4. The sampling control method of the driving circuit according to claim 2, characterized in that: The step of controlling the sampling circuit to perform sampling processing according to the single resistor sampling method specifically includes: Determining the duration of decomposing the vector sum into two adjacent space vectors according to the vector sum and the vector angle of the driving circuit; Determining a target comparison matching value of the driving circuit according to the duration; Determine the sampling trigger time point according to the difference between the target comparison matching value and the sampling delay time length; The sampling circuit is controlled to perform sampling processing according to the sampling trigger time point.

5. The sampling control method of the driving circuit according to any one of claims 1 to 4, characterized in that: Before the step of determining the sampling mode of the sampling circuit according to the vector and the vector interval, the method further includes: Determining the space vector sector where the target voltage vector of the drive circuit is located according to the voltage component of the drive circuit in the two-phase coordinate system and the vector angle of the drive circuit; The space vector sector is divided into the first vector interval, the second vector interval, and the third vector interval.

6. The sampling control method of the driving circuit according to claim 5, characterized in that: The step of dividing the space vector sector into the first vector interval, the second vector interval, and the third vector interval specifically includes: Determining a sampling time threshold of the sampling circuit according to the dead time of the inverter circuit, the current stabilization time of the DC bus and the sampling and holding time of the sampling circuit; The space vector sectors are divided according to the sampling time threshold to obtain the first vector interval, the second vector interval, and the third vector interval.

7. The sampling control method of the driving circuit according to any one of claims 1 to 4, characterized in that: The step of controlling the sampling circuit to perform sampling processing specifically includes: The sampling circuit is controlled to perform sampling processing in the order of sampling the bus voltage first and then sampling the phase current.

8. A sampling control device, characterized in that: include: A memory and a processor, wherein the memory stores a computer program; When the processor executes the computer program, the processor performs the steps of the sampling control method of the drive circuit according to any one of claims 1 to 7.

9. A driving circuit, characterized in that: include: Motor; An inverter circuit, wherein the inverter circuit is connected between the positive electrode and the negative electrode of the DC bus, and the inverter circuit comprises three pairs of half-bridge circuits, each pair of half-bridge circuits comprises two switch tubes connected in series, and a common end between the two switch tubes is connected to the motor; A sampling circuit, the sampling circuit comprising a sampling resistor, the sampling resistor being connected between at least two pairs of lower arm switch tubes of the half-bridge circuit and the negative electrode of the DC bus; A protection circuit connected in parallel with the sampling resistor; The sampling control device according to claim 8, connected to the inverter circuit and the sampling circuit.

10. The driving circuit according to claim 9, characterized in that: The sampling resistor comprises: A first sampling resistor is connected between the lower bridge arm switch tubes of at least two pairs of the half-bridge circuits and the negative electrode of the DC bus, and is arranged on the lower bridge arms of at least two pairs of the half-bridge circuits; a second sampling resistor connected in series with all of the first sampling resistors of at least two of the first sampling resistors; The protection circuit is connected in parallel with the second sampling resistor.

11. An air conditioner, characterized in that: include: load; The drive circuit according to claim 9 or 10, wherein the drive circuit is connected to the load.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the sampling control method of the drive circuit according to any one of claims 1 to 7 are performed.

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