A method and apparatus for automatic routing of integrated circuits without relying on grid points.

Abstract

This application relates to the field of integrated circuit technology, and in particular to a method and apparatus for automatic routing of integrated circuits without relying on grid points. The method for automatic routing of integrated circuits without relying on grid points includes: obtaining the routing priority between any two adjacent pins based on a pin dataset; starting routing from the two pins with the highest routing priority, ensuring that the routing between any two adjacent pins passes the isvalid check, until all pins are routed. This application, employing the above scheme, can reduce the running time of the routing algorithm, improve routing quality, shorten the integrated circuit design cycle, and reduce integrated circuit design costs.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a method and apparatus for automatic routing of integrated circuits without relying on grid points. Background Technology

[0002] Routing, a crucial step in integrated circuit design, involves connecting all devices belonging to the same electrical node using metal wires after the rectangular components are placed. Traditional maze routing, due to limitations in its search rules, can be time-consuming even in relatively simple routing scenarios, and the routing quality is inconsistent. Therefore, in many cases, manual routing by professionals is still necessary. Summary of the Invention

[0003] This application aims to at least partially address one of the technical problems in the related art.

[0004] Therefore, the first objective of this application is to propose a method for automatic routing of integrated circuits that does not rely on grid points, in order to solve the technical problems of low routing efficiency and poor routing quality of traditional routing methods.

[0005] The second objective of this application is to propose a device for automatic routing of integrated circuits without relying on grid points.

[0006] The third objective of this application is to propose a terminal.

[0007] To achieve the above objectives, the first aspect of this application proposes a method for automatic routing of integrated circuits without relying on grid points, comprising:

[0008] Based on the pin dataset, obtain the routing priority between any two adjacent pins;

[0009] Start routing from the two pins with the highest routing priority, and ensure that the routing between any two adjacent pins passes the isvalid check, until all pins are routed.

[0010] Optionally, in one embodiment of this application, before obtaining the routing priority between any two adjacent pins based on the pin dataset, the method further includes:

[0011] Obtain the spatial relationship of all pins, and determine the pin dataset based on the spatial relationship.

[0012] Optionally, in one embodiment of this application, obtaining the routing priority between any two adjacent pins based on the pin dataset includes:

[0013] Determine the maximum priority between any two adjacent pins and obtain the Manhattan distance between any two adjacent pins;

[0014] The routing priority between any two adjacent pins is determined based on the maximum priority and the Manhattan distance.

[0015] Optionally, in one embodiment of this application, determining the routing priority between any two adjacent pins based on the maximum priority and the Manhattan distance includes:

[0016] The quotient of the Manhattan distance and the maximum priority is determined as the wiring priority between any two adjacent pins.

[0017] Optionally, in one embodiment of this application, ensuring that the wiring between any two adjacent pins passes the isvalid check includes:

[0018] The isvalid check includes short-circuit checks and design rule checks;

[0019] The pin dataset uses RTree as the underlying data structure and performs spatial indexing based on RTree. If there is no short circuit problem, it means that the short circuit check has passed.

[0020] Obtain the design rule judgment conditions from the design rule file, and perform design rule checks based on the rule judgment conditions. If there are no design rule problems, it means that the design rule check has passed.

[0021] Optionally, in one embodiment of this application, the step of starting routing from the two pins with the highest routing priority and ensuring that the routing between any two adjacent pins passes the isvalid check, until all pins are routed, includes:

[0022] If any two pins have an overlapping area in the y-axis direction, and the overlapping area is not less than the minimum line width, then route_x routing is used;

[0023] If any two pins have an overlapping area in the x-axis direction, and the overlapping area is not less than the minimum line width, then route_y routing is used;

[0024] If any two pins are on different layers in the z-axis direction, and the overlapping area in the x-axis and y-axis directions is not less than the minimum line width, then route_z routing is used.

[0025] If any two pins are on the same layer in the z-axis direction and have overlapping areas in the x-axis and y-axis directions, then route_overlap routing is used.

[0026] Optionally, in one embodiment of this application, it further includes:

[0027] When using route_x routing, a rectangle in the x-direction is constructed using the coordinates of the two pins, so that the two rectangles containing the two pins are connected through the rectangle in the x-direction.

[0028] When using route_y routing, a rectangle in the y direction is constructed using the coordinates of the two pins, so that the two rectangles containing the two pins are connected through the rectangle in the y direction.

[0029] When using route_z routing, the upper right or lower left corner of the starting pin is used as the starting punch point, and a rectangle is placed on the starting punch point;

[0030] When using route_overlap routing, ensure that the overlap area of ​​the two pins in the x-axis and y-axis directions is not less than the minimum line width, and return an empty set.

[0031] Optionally, in one embodiment of this application, it further includes:

[0032] When using route_x for routing, if routing fails, U-shaped routing or Z-shaped routing will be used.

[0033] When using route_y routing, if routing fails, then use U-shaped routing or Z-shaped routing.

[0034] When using route_z for routing, if routing fails, the current pin is skipped.

[0035] In summary, the method proposed in the first aspect of this application obtains the routing priority between any two adjacent pins based on a pin dataset; routing begins from the two pins with the highest routing priority, ensuring that the routing between any two adjacent pins passes the isvalid check, until all pins are routed. This application can reduce the running time of the routing algorithm, improve the routing quality, shorten the integrated circuit design cycle, and reduce the integrated circuit design cost.

[0036] To achieve the above objectives, a second aspect of this application provides an apparatus for automatic routing of integrated circuits without relying on grid points, comprising:

[0037] The acquisition module is used to obtain the routing priority between any two adjacent pins based on the pin dataset;

[0038] The routing module is used to start routing from the two pins with the highest routing priority and ensure that the routing between any two adjacent pins passes the isvalid check, until all pins are routed.

[0039] In summary, the apparatus proposed in the second aspect of this application obtains the routing priority between any two adjacent pins based on the pin dataset by an acquisition module; the routing module starts routing from the two pins with the highest routing priority and ensures that the routing between any two adjacent pins passes the isvalid check, until all pins are routed. This application can reduce the running time of the routing algorithm, improve the routing quality, shorten the integrated circuit design cycle, and reduce the integrated circuit design cost.

[0040] To achieve the above objectives, a third aspect of this application provides a terminal, comprising:

[0041] At least one processor; and

[0042] A memory communicatively connected to the at least one processor; wherein,

[0043] The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method described in any one of the preceding aspects.

[0044] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0045] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0046] Figure 1 A flowchart illustrating a method for automatic routing of integrated circuits without relying on grid points, provided in an embodiment of this application;

[0047] Figure 2 This is a schematic diagram of the L-shaped wiring provided in an embodiment of this application;

[0048] Figure 3 A schematic diagram of the U-wire structure provided in the embodiments of this application;

[0049] Figure 4 A schematic diagram of the Z-wire structure provided in the embodiments of this application;

[0050] Figure 5 This application provides a schematic diagram of a device for automatic routing of integrated circuits without relying on grid points.

[0051] Figure 6 This application provides a schematic diagram of the structure of a terminal;

[0052] Figure 7This application provides a schematic diagram of the operating system and user space structure in an embodiment;

[0053] Figure 8 Figure 7 Architecture diagram of the Android operating system in China;

[0054] Figure 9 Figure 7 Architecture diagram of the iOS operating system. Detailed Implementation

[0055] The embodiments of this application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. Rather, the embodiments of this application include all variations, modifications, and equivalents falling within the spirit and scope of the appended claims.

[0056] It should be noted that in actual routing, not all routing requires complex searches; some routing environments may exist with relatively relaxed requirements. Meshless routing utilizes the spatial relationships between components, independent of the search environment provided by the mesh, and at the cost of fewer attempts and spatial indexing—a significant reduction compared to traditional routing algorithms. Therefore, meshless routing is an effective method for improving the efficiency of automatic routing.

[0057] The present application will now be described in detail with reference to specific embodiments.

[0058] Figure 1 This is a flowchart illustrating a method for automatic routing of integrated circuits that does not rely on grid points, as provided in an embodiment of this application.

[0059] like Figure 1 As shown in the figure, this application provides a method for automatic routing of integrated circuits without relying on grid points, which includes the following steps:

[0060] Step 101: Based on the pin dataset, obtain the routing priority between any two adjacent pins;

[0061] Step 102: Start routing from the two pins with the highest routing priority, and ensure that the routing between any two adjacent pins passes the isvalid check, until all pins are routed.

[0062] In this embodiment of the application, before obtaining the routing priority between any two adjacent pins based on the pin dataset, the method further includes:

[0063] Obtain the spatial relationship of all pins, and determine the pin dataset based on the spatial relationship.

[0064] Specifically, the pin dataset can be used to obtain the spatial position relationship of any pin and to perform spatial indexing on any pin.

[0065] In this embodiment of the application, the routing priority between any two adjacent pins is obtained based on the pin dataset, including:

[0066] Determine the maximum priority between any two adjacent pins and obtain the Manhattan distance between any two adjacent pins;

[0067] The routing priority between any two adjacent pins is determined based on the maximum priority and the Manhattan distance.

[0068] In this embodiment of the application, determining the routing priority between any two adjacent pins based on the maximum priority and the Manhattan distance includes:

[0069] The quotient of the Manhattan distance and the maximum priority is the routing priority between any two adjacent pins.

[0070] In this embodiment of the application, and to ensure that the wiring between any two adjacent pins passes the isvalid check, the following is included:

[0071] The isvalid check includes short-circuit checks and design rule checks;

[0072] The pin dataset uses RTree as the underlying data structure and performs spatial indexing based on RTree. If there is no short circuit problem, it means that the short circuit check has passed.

[0073] Obtain the design rule judgment conditions from the design rule file, and perform design rule checks based on the rule judgment conditions. If there are no design rule issues, the design rule check is passed.

[0074] Specifically, the isvalid check refers to determining whether the object variable has been instantiated, that is, whether the value of the instance variable is a valid object. In the embodiments of this application, the isvalid check is used to determine whether a short circuit problem occurs between any two adjacent pins, and whether a DRC problem occurs.

[0075] Specifically, the pin dataset uses RTree as the underlying data structure, which can reduce the worst-case time complexity of a single spatial index from O(n) to O(log2n).

[0076] In this embodiment, routing begins with the two pins with the highest routing priority, ensuring that routing between any two adjacent pins passes the isvalid check, until all pins are routed, including:

[0077] If any two pins have an overlapping area in the y-axis direction, and the overlapping area is not less than the minimum line width, then route_x routing is used;

[0078] If any two pins have an overlapping area in the x-axis direction, and the overlapping area is not less than the minimum line width, then route_y routing is used;

[0079] If any two pins are on different layers in the z-axis direction, and the overlapping area in the x-axis and y-axis directions is not less than the minimum line width, then route_z routing is used.

[0080] If any two pins are on the same layer in the z-axis direction and have overlapping areas in the x-axis and y-axis directions, then route_overlap routing is used.

[0081] In this embodiment of the application, it also includes:

[0082] When using route_x routing, a rectangle in the x-direction is constructed using the coordinates of the two pins, so that the two rectangles containing the two pins are connected by the rectangle in the x-direction.

[0083] When using route_y routing, a rectangle in the y direction is constructed using the coordinates of the two pins, so that the two rectangles containing the two pins are connected by the rectangle in the y direction.

[0084] When using route_z routing, the upper right or lower left corner of the starting pin is used as the starting punch point, and a rectangle is placed on the starting punch point;

[0085] When using route_overlap routing, ensure that the overlap area of ​​the two pins in the x-axis and y-axis directions is not less than the minimum line width, and return an empty set.

[0086] Specifically, when using route_x routing, first obtain the spatial coordinates of the two pins to ensure that the starting pin is in the negative x-axis direction of the target pin; if the starting pin is not in the negative x-axis direction of the target pin, then swap the original starting pin with the target pin and swap the original target pin with the starting pin.

[0087] Yes, when using route_y routing, first obtain the spatial coordinates of the two pins to ensure that the starting pin is in the negative y-axis direction of the target pin; if the starting pin is not in the negative y-axis direction of the target pin, then the original starting pin is swapped to the target pin, and the original target pin is swapped to the starting pin.

[0088] Yes, when using route_z routing, the spatial coordinates of the two pins are first obtained to ensure that the starting pin is below the target pin; if the starting pin is not below the target pin, the original starting pin is swapped to the target pin, and the original target pin is swapped to the starting pin.

[0089] Specifically, when using route_overlap routing, if the overlap area of ​​two pins in the x-axis or y-axis direction is less than the minimum line width, then the two rectangles containing the two pins are expanded in the x-axis or y-axis direction until the minimum line width is met.

[0090] In this embodiment of the application, it also includes:

[0091] When using route_x for routing, if routing fails, U-shaped routing or Z-shaped routing will be used.

[0092] When using route_y routing, if routing fails, then use U-shaped routing or Z-shaped routing.

[0093] When using route_z for routing, if routing fails, the current pin is skipped.

[0094] Specifically, any two of the route_x, route_y, and route_z routes constitute an L-shaped route, i.e., route_zx, route_zy, and route_xy, respectively. Figure 2 As shown in the diagram. The L-shaped routing uses a central rectangle as a connection hub for two routing combinations, selecting the first or last rectangle from the returned rectangle set as the routing element. The coordinates of the central rectangle can be determined based on the spatial coordinates of the two pins.

[0095] Furthermore, the middle rectangle does not need to pass the isvalid check because route_x routing, route_y routing, and route_z routing are guaranteed to pass the isvalid check.

[0096] Specifically, U-shaped routing is any combination of route_x, route_y, and route_z routing with L-shaped routing, i.e., route_detoures_x, route_detoures_y, route_detoures_z, such as... Figure 3 As shown in the diagram, a central rectangle is set as the connection hub for these two wiring combinations. Using the minimum line width as the step size, the coordinates of the central rectangle are determined through multiple trials.

[0097] Specifically, Z-type routing is any combination of route_x, route_y, and route_z routing with L-type routing, i.e., route_detoures_x, route_detoures_y, route_detoures_z, such as... Figure 4 As shown in the diagram, a central rectangle is set as the connection hub for these two wiring combinations. Using the minimum line width as the step size, the coordinates of the central rectangle are determined through multiple trials.

[0098] In summary, the method proposed in this application obtains the routing priority between any two adjacent pins based on the pin dataset; routing begins from the two pins with the highest routing priority, ensuring that the routing between any two adjacent pins passes the isvalid check, until all pins are routed. This application does not rely on grid points, but utilizes the spatial positional relationship between two pins for routing, avoiding the time and quality losses caused by the inconsistency between the spatial coordinates of the pins and the floating-point precision of the grid points. This reduces the running time of the routing algorithm, improves the routing quality, shortens the integrated circuit design cycle, and reduces the integrated circuit design cost.

[0099] To achieve the above embodiments, this application also proposes an apparatus for automatic routing of integrated circuits without relying on grid points.

[0100] Figure 5 This is a schematic diagram of a device for automatic routing of integrated circuits without relying on grid points, provided in an embodiment of this application.

[0101] like Figure 5 As shown, an apparatus for automatic routing of integrated circuits without relying on grid points includes:

[0102] The acquisition module 501 obtains the routing priority between any two adjacent pins based on the pin dataset.

[0103] The routing module 502 starts routing from the two pins with the highest routing priority and ensures that the routing between any two adjacent pins passes the isvalid check, until all pins are routed.

[0104] In summary, the apparatus proposed in this application obtains the routing priority between any two adjacent pins based on the pin dataset by an acquisition module; the routing module starts routing from the two pins with the highest routing priority and ensures that the routing between any two adjacent pins passes the isvalid check, until all pins are routed. This application can reduce the running time of the routing algorithm, improve the routing quality, shorten the integrated circuit design cycle, and reduce the integrated circuit design cost.

[0105] Please refer to Figure 6This illustration shows a structural block diagram of a terminal provided in an exemplary embodiment of this application. The terminal in this application may include one or more components such as a processor 110, a memory 120, an input device 130, an output device 140, and a bus 150. The processor 110, memory 120, input device 130, and output device 140 are connected via the bus 150. The processor loads and executes as described above. Figures 3-9 The network connection method described in the illustrated embodiment can be found in the following document for a detailed execution process. Figures 3-9 The specific details of the illustrated embodiments will not be elaborated here.

[0106] Processor 110 may include one or more processing cores. Processor 110 connects to various parts of the terminal using various interfaces and lines, and performs various functions and processes data of terminal 100 by running or executing instructions, programs, code sets, or instruction sets stored in memory 120, and by calling data stored in memory 120. Optionally, processor 110 may be implemented using at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), or programmable logic array (PLA). Processor 110 may integrate one or more of the following: central processing unit (CPU), graphics processing unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the displayed content; and the modem handles wireless communication. It is understood that the modem may also not be integrated into processor 110 and may be implemented separately using a communication chip.

[0107] The memory 120 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 120 may include non-transitory computer-readable storage medium. The memory 120 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 120 may include a program storage area and a data storage area. The program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as touch functionality, sound playback functionality, image playback functionality, etc.), instructions for implementing the various method embodiments described below, etc. The operating system may be the Android system, including systems deeply developed based on the Android system, the iOS system developed by Apple Inc., including systems deeply developed based on the iOS system, or other systems. The data storage area may also store data created by the terminal during use, such as phonebook data, audio and video data, chat log data, etc.

[0108] See Figure 7 As shown, the memory 120 can be divided into operating system space and user space. The operating system runs in the operating system space, while native and third-party applications run in the user space. To ensure that different third-party applications can achieve good running performance, the operating system allocates corresponding system resources for each third-party application. However, different application scenarios within the same third-party application have different requirements for system resources. For example, in local resource loading scenarios, third-party applications have higher requirements for disk read speed; in animation rendering scenarios, third-party applications have higher requirements for GPU performance. Since the operating system and third-party applications are independent of each other, the operating system often cannot promptly perceive the current application scenario of a third-party application, resulting in the operating system's inability to adapt system resources accordingly to the specific application scenario of the third-party application.

[0109] In order for the operating system to distinguish the specific application scenarios of third-party applications, it is necessary to establish data communication between the third-party applications and the operating system. This would allow the operating system to obtain the current scenario information of the third-party applications at any time, and then perform targeted system resource adaptation based on the current scenario.

[0110] Taking the Android operating system as an example, the programs and data stored in memory 120 are as follows: Figure 8As shown, the memory 120 can store the Linux kernel layer 320, the system runtime library layer 340, the application framework layer 360, and the application layer 380. The Linux kernel layer 320, system runtime library layer 340, and application framework layer 360 belong to the operating system space, while the application layer 380 belongs to the user space. The Linux kernel layer 320 provides low-level drivers for various terminal hardware components, such as display drivers, audio drivers, camera drivers, Bluetooth drivers, Wi-Fi drivers, and power management. The system runtime library layer 340 provides support for key Android features through several C / C++ libraries. For example, the SQLite library provides database support, the OpenGL / ES library provides 3D graphics support, and the Webkit library provides browser kernel support. The system runtime library layer 340 also provides the Android runtime library, which mainly provides core libraries that allow developers to write Android applications using the Java language. The Application Framework Layer 360 provides various APIs that may be used when building applications. Developers can also use these APIs to build their own applications, such as activity management, window management, view management, notification management, content provider, package management, call management, resource management, and location management. At least one application runs in the Application Layer 380. These applications can be native applications that come with the operating system, such as contacts, SMS, clock, and camera apps; or third-party applications developed by third-party developers, such as games, instant messaging, photo editing, and network connectivity applications.

[0111] Taking the operating system as an example (iOS), the programs and data stored in memory 120 are as follows: Figure 9The iOS system comprises: Core OS layer 420, Core Services layer 440, Media layer 460, and Cocoa Touch layer 480. Core OS layer 420 includes the operating system kernel, drivers, and low-level program frameworks. These frameworks provide hardware-level functionality for use by the program frameworks in Core Services layer 440. Core Services layer 440 provides applications with the system services and / or program frameworks they require, such as Foundation framework, account framework, advertising framework, data storage framework, network connectivity framework, geolocation framework, motion framework, etc. Media layer 460 provides applications with audiovisual interfaces, such as interfaces related to graphics and images, audio technology, video technology, and AirPlay (wireless audio / video transmission). Cocoa Touch layer 480 provides various commonly used interface-related frameworks for application development and is responsible for user touch interaction on the terminal. Examples include local notification services, remote push services, advertising frameworks, game tool frameworks, message user interface (UI) frameworks, UIKit frameworks, map frameworks, and so on.

[0112] exist Figure 9 The frameworks shown include, but are not limited to, the base framework in the core services layer 440 and the UIKit framework in the touchable layer 480. The base framework provides many basic object classes and data types, offering the most basic system services to all applications, and is independent of the UI. The UIKit framework, on the other hand, provides a basic UI class library for creating touch-based user interfaces. iOS applications can use the UIKit framework to provide their UI, thus providing the application's infrastructure for building user interfaces, drawing, handling user interaction events, responding to gestures, and so on.

[0113] The methods and principles for implementing data communication between third-party applications and the operating system in the iOS system can be referenced from the Android system, and will not be elaborated here.

[0114] The input device 130 is used to receive input instructions or data, and includes, but is not limited to, a keyboard, mouse, camera, microphone, or touch device. The output device 140 is used to output instructions or data, and includes, but is not limited to, a display device and a speaker. In one example, the input device 130 and the output device 140 can be combined into a touch screen, which is used to receive touch operations from the user using a finger, stylus, or any suitable object on or near it, and to display the user interface of various applications. The touch screen is usually located on the front panel of the terminal. The touch screen can be designed as a full-screen, curved screen, or irregularly shaped screen. The touch screen can also be designed as a combination of a full-screen and a curved screen, or a combination of an irregularly shaped screen and a curved screen; this application embodiment does not limit this.

[0115] In addition, those skilled in the art will understand that the structure of the terminal shown in the above figures does not constitute a limitation on the terminal. The terminal may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the terminal may also include radio frequency circuits, input units, sensors, audio circuits, wireless fidelity (WiFi) modules, power supplies, Bluetooth modules, etc., which will not be described in detail here.

[0116] In this embodiment, the executing entity for each step can be the terminal described above. Optionally, the executing entity for each step is the terminal's operating system. The operating system can be Android, iOS, or other operating systems; this embodiment does not limit this.

[0117] The terminal in this embodiment may also be equipped with a display device, which can be various devices capable of display functions, such as: cathode ray tube display (CR), light-emitting diode display (LED), e-ink screen, liquid crystal display (LCD), plasma display panel (PDP), etc. Users can use the display device on the terminal 100 to view displayed text, images, videos, and other information. The terminal may be a smartphone, tablet computer, gaming device, AR (Augmented Reality) device, automobile, data storage device, audio playback device, video playback device, laptop, desktop computing device, wearable device such as electronic watch, electronic glasses, electronic helmet, electronic bracelet, electronic necklace, electronic clothing, etc.

[0118] Those skilled in the art will clearly understand that the technical solutions of this application can be implemented using software and / or hardware. In this specification, "unit" and "module" refer to software and / or hardware capable of independently performing or cooperating with other components to perform specific functions. Hardware may include, for example, a Field-Programmable Gate Array (FPGA), an Integrated Circuit (IC), etc.

[0119] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0120] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0121] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0122] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0123] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0124] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0125] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0126] The foregoing description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Other embodiments of this disclosure will be readily apparent to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described herein. The specification and embodiments are to be considered exemplary only, and the scope and spirit of this disclosure are defined by the claims.

Claims

1. A method for automatic routing of integrated circuits without relying on grid points, characterized in that, The method comprises: obtaining the wiring priority between any two adjacent pins based on the pin dataset; starting wiring from the two pins with the highest wiring priority, and ensuring that the wiring between any two adjacent pins passes the isvalid check until all pins are wired, wherein if there is an overlapping area between any two pins in the y-axis direction and the overlapping area is not less than the minimum line width, route_x wiring is adopted, wherein when route_x wiring is adopted, an x-direction rectangle is constructed using the coordinates of the two pins, so that the two rectangles in which the two pins are respectively located are connected through the x-direction rectangle; if there is an overlapping area between any two pins in the x-axis direction and the overlapping area is not less than the minimum line width, route_y wiring is adopted, wherein when route_y wiring is adopted, a y-direction rectangle is constructed using the coordinates of the two pins, so that the two rectangles in which the two pins are respectively located are connected through the y-direction rectangle; if any two pins are in different layers in the z-axis direction and the overlapping areas in the x-axis direction and the y-axis direction are not less than the minimum line width, route_z wiring is adopted, wherein when route_z wiring is adopted, the upper right corner or the lower left corner of the starting pin is taken as the starting punch point, and a rectangle is placed on the starting punch point; if any two pins are in the same layer in the z-axis direction and there is an overlapping area in the x-axis direction and the y-axis direction, route_overlap wiring is adopted, wherein when route_overlap wiring is adopted, the overlapping areas in the x-axis direction and the y-axis direction of the two pins are not less than the minimum line width, and an empty set is returned.

2. The method of claim 1, wherein, Before the step of obtaining the wiring priority between any two adjacent pins based on the pin dataset, the method further comprises: obtaining the spatial position relationship of all pins, and determining the pin dataset according to the spatial position relationship.

3. The method of claim 1, wherein, The step of obtaining the wiring priority between any two adjacent pins based on the pin dataset comprises: determining the maximum priority between any two adjacent pins, and obtaining the Manhattan distance between any two adjacent pins; determining the wiring priority between any two adjacent pins according to the maximum priority and the Manhattan distance.

4. The method of claim 3, wherein, The step of determining the wiring priority between any two adjacent pins according to the maximum priority and the Manhattan distance comprises: determining the quotient of the Manhattan distance and the maximum priority as the wiring priority between any two adjacent pins.

5. The method of claim 1, wherein, The step of ensuring that the wiring between any two adjacent pins passes the isvalid check comprises: the isvalid check comprises a short circuit check and a design rule check; the pin dataset uses RTree as an underlying data structure, and performs spatial indexing based on RTree; if there is no short circuit problem, it means that the short circuit check is passed; obtaining design rule judgment conditions from a design rule file, performing a design rule check based on the rule judgment conditions, and if there is no design rule problem, it means that the design rule check is passed.

6. The method of claim 1, wherein, The method further comprises: when route_x wiring is adopted, if wiring fails, U-shaped wiring or Z-shaped wiring is adopted. When route_y is used, if the routing fails, U-shaped routing is used, or Z-shaped routing is used; When route_z is used, if the routing fails, the current pin is skipped.

7. An apparatus for automatic routing of integrated circuits without dependence on grid points, comprising: The apparatus comprises: an acquisition module configured to acquire, based on the pin dataset, a routing priority between any two adjacent pins; a routing module configured to, when any two pins have an overlapping area in the y-axis direction and the overlapping area is not less than the minimum line width, use route_x routing, wherein, when route_x routing is used, an x-direction rectangle is constructed using the coordinates of the two pins, so that the two rectangles in which the two pins are located are connected by the x-direction rectangle; when any two pins have an overlapping area in the x-axis direction and the overlapping area is not less than the minimum line width, use route_y routing, wherein, when route_y routing is used, a y-direction rectangle is constructed using the coordinates of the two pins, so that the two rectangles in which the two pins are located are connected by the y-direction rectangle; when any two pins are in different layers in the z-axis direction and the overlapping areas in the x-axis direction and the y-axis direction are both not less than the minimum line width, use route_z routing, wherein, when route_z routing is used, the upper right corner or the lower left corner of the starting pin is used as the starting drilling point, and a rectangle is placed on the starting drilling point; when any two pins are in the same layer in the z-axis direction and there is an overlapping area in the x-axis direction and the y-axis direction, use route_overlap routing, wherein, when route_overlap routing is used, the overlapping areas of the two pins in the x-axis direction and the y-axis direction are both not less than the minimum line width, and an empty set is returned.

8. A terminal, comprising: at least one processor; and a memory connected in communication with the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-6.

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