A high-precision floating-point simulation method based on domestic heterogeneous many-core platform

By defining the structure mdouble on the domestic heterogeneous multi-core platform, the basic operations of high-precision floating-point numbers are realized, and the problem of complex and low efficiency of high-precision floating-point operations is solved, and the computing efficiency is improved.

CN114217764BActive Publication Date: 2025-09-05JIANGNAN INST OF COMPUTING TECH
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Patent Information

Application Number
CN202110479704.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-04-30
Publication Date
2025-09-05
Estimated Expiration
2041-04-30

AI Technical Summary

Technical Problem

Domestic heterogeneous multi-core platforms lack the support for high-precision floating-point number instructions, resulting in complex implementation of high-precision floating-point operations and low computing efficiency.

Method used

It provides a high-precision floating-point number simulation method based on the domestic heterogeneous multi-core platform. By defining the structure mdouble, using scalars to simulate the sign, exponential and mantissa digits of floating-point numbers, and accelerates based on the instructions of the domestic heterogeneous multi-core platform to realize the functions of adding, subtraction, multiplication, division, square, rounding, decimal, type conversion, comparison, absolute value, inverse and other functions of high-precision floating-point numbers.

Benefits of technology

It reduces the programming difficulty of users, reduces the number of instructions for high-precision floating-point operations, improves calculation efficiency, and meets the needs of users of domestic heterogeneous multi-core platforms for high-precision floating-point computing.

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Abstract

The present invention discloses a high-precision floating-point number simulation method based on a domestically produced heterogeneous many-core platform, comprising the following steps: S1. Conversion and representation of the initial data type: using a data type conversion function to convert the source data type into a high-precision floating-point number; S2. Based on the specific function, corresponding operations are performed on the sign bit, exponent bit, and mantissa, and accelerated using instructions; S3. Rounding the result in S2 to the nearest even number and adjusting the exponent based on the rounding result to obtain the result of the high-precision floating-point operation. The present invention reduces the programming difficulty for users, reduces the number of instructions required to implement high-precision floating-point operations, and improves computational efficiency.
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Description

Technical Field

[0001] The present invention relates to a high-precision floating-point number simulation method based on a domestically produced heterogeneous many-core platform, and belongs to the technical field of high-precision floating-point operations. Background Art

[0002] High-precision floating-point operations are widely used in many large-scale parallel algorithms. However, current domestic heterogeneous many-core platforms only support single- and double-precision floating-point operations and lack corresponding high-precision floating-point instructions. This requires users to indirectly implement high-precision floating-point functions through arrays, scalars, and complex algorithms, which is complex and computationally inefficient. For example, 80-bit floating-point multiplication uses integers to represent the sign and exponent of the 80-bit floating-point number, and unsigned long integers to represent the mantissa. During multiplication, the signs are XORed, the exponents are added, and the mantissas are multiplied. However, multiplication of a 64-bit mantissa produces a 128-bit product, making long integer multiplication impossible. The typical approach is to split two 64-bit unsigned long integers into four 32-bit numbers, store them in unsigned long integers, and then multiply and add them separately. This method is complex to implement and lacks the corresponding instructions supported by domestic heterogeneous many-core platforms, resulting in low computational efficiency. Summary of the Invention

[0003] The purpose of the present invention is to provide a high-precision floating-point simulation method based on a domestic heterogeneous many-core platform to solve the problems of complex implementation and low computational efficiency of high-precision floating-point operations on domestic heterogeneous many-core platforms.

[0004] To achieve the above objectives, the technical solution adopted by the present invention is to provide a high-precision floating-point number simulation method based on a domestic heterogeneous many-core platform, which is used for projects with high requirements for floating-point calculation accuracy and efficiency. The method uses scalars to simulate the sign bit, exponent bit, and mantissa bit of floating-point numbers, and accelerates them based on the instructions of the domestic heterogeneous many-core platform to realize the addition, subtraction, multiplication, division, square root, integer, decimal, type conversion, comparison, absolute value, and negation functions of high-precision floating-point numbers. The method is based on the following configuration:

[0005] High-precision floating-point numbers are defined as the mdouble structure. The definitions of each member of mdouble comply with IEEE754, as follows:

[0006]

[0007] The following steps are involved:

[0008] S1. Conversion and representation of initial data types: Use data type conversion functions to convert source data types to high-precision floating-point numbers;

[0009] S2. Perform corresponding operations on the sign bit, exponent bit, and mantissa according to the specific function, and use instructions to accelerate them;

[0010] S3. Round the result in S2 to the nearest even number and adjust the exponent according to the rounding result to obtain a high-precision floating-point operation result.

[0011] Due to the application of the above technical solution, the present invention has the following advantages compared with the prior art:

[0012] The present invention provides a high-precision floating-point simulation method based on a domestic heterogeneous many-core platform, which reduces the programming difficulty of users, reduces the number of instructions for implementing high-precision floating-point operations, and improves the computing efficiency, thus meeting the needs of users of domestic heterogeneous many-core platforms for high-precision floating-point calculations. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Attachment Figure 1 It is a structural diagram of double-precision floating-point type;

[0014] Attachment Figure 2 This is a structural diagram of an 80-bit floating-point number type;

[0015] Attachment Figure 3 This is the structure diagram of the simulated 80-bit floating-point number mdouble;

[0016] Attachment Figure 4 This is a diagram of the basic operation process of mdouble type data. DETAILED DESCRIPTION

[0017] Embodiment: The present invention provides a high-precision floating-point number simulation method based on a domestic heterogeneous many-core platform, which is suitable for projects with high requirements for floating-point calculation accuracy and efficiency. It uses scalars to simulate the sign bit, exponent bit, and mantissa bit of floating-point numbers, and is accelerated based on the instructions of the domestic heterogeneous many-core platform to implement high-precision floating-point number addition, subtraction, multiplication, division, square root, integer rounding, decimal point taking, type conversion, comparison, absolute value taking, and negation functions. It is based on the following configuration:

[0018] High-precision floating-point numbers are defined as the mdouble structure. The definitions of each member of mdouble comply with IEEE754, as follows:

[0019]

[0020] The following steps are involved:

[0021] S1. Conversion and representation of initial data types: Use data type conversion functions to convert source data types to high-precision floating-point numbers;

[0022] S2. Perform corresponding operations on the sign bit, exponent bit, and mantissa according to the specific function, and use instructions to accelerate them, so that the operation efficiency is significantly improved compared with the traditional implementation method;

[0023] S3. Round the result in S2 to the nearest even number and adjust the exponent according to the rounding result to obtain a high-precision floating-point operation result.

[0024] The above embodiment is further explained as follows:

[0025] To make the purpose, technical solutions and advantages of the present invention more clear, the following will be combined with the accompanying drawings of the present invention, taking 80-bit floating-point numbers as an example, to clearly and completely describe the addition, subtraction, multiplication, division, square root, integer, decimal, type conversion, comparison, absolute value, and negation of high-precision floating-point numbers implemented by the present invention, which specifically includes the following steps:

[0026] (1) Representation of high-precision floating-point numbers

[0027] High-precision floating-point numbers are defined as the mdouble structure. The definitions of each member of mdouble comply with IEEE754, as follows:

[0028] typedef struct{

[0029] int s;

[0030] int e;

[0031] unsigned long f;

[0032] } mdouble;

[0033] When s=0, it indicates a positive number, and when s=1, it indicates a negative number.

[0034] (2) Addition and subtraction of mdouble

[0035] Addition and subtraction of mdouble with arbitrary signs can be implemented by adding the same sign and sequential subtraction. The same sign addition means that the two operands of addition have the same sign, and the sequential subtraction means that the minuend and subtrahend have the same sign and the minuend is greater than the subtrahend.

[0036] The addition algorithm for mdouble data with the same sign is as follows:

[0037] 1. Determine the size of the index, align the small index with the large index, and record the difference that needs to be filled , if the large exponent is 2 and the small exponent is -2, then 4 bits need to be added, that is, the mantissa needs to be shifted 4 bits to the right;

[0038] 2. Move the small index number to the right bits, and rounding is required at this time; then the two mantissas are added using the long word add instruction, and it is determined whether there is a carry. If a carry occurs, it is necessary to shift to the right and round it.

[0039] Since the two operands of sequential subtraction have the same sign and the minuend is greater than the subtrahend, the exponent of the subtrahend must be less than or equal to the exponent of the minuend. After the exponents are aligned, the mantissa of the subtrahend must also be less than the mantissa of the minuend. Therefore, sequential subtraction of mdouble can be implemented as follows:

[0040] 1. Align the exponent of the subtrahend with the exponent of the minuend and record the difference as , then shift the mantissa of the subtrahend to the right ;

[0041] 2. Move the small index number to the right bits, rounding is required at this time; then the long word subtraction instruction is used to make the difference between the two mantissas. After the mantissa of the subtrahend is shifted, it must be less than or equal to the mantissa of the minuend.

[0042] 3. Determine whether the highest bit of the difference is 0. If so, shift it and adjust the exponent of the difference accordingly.

[0043] (3) Multiplication of mdouble

[0044] The multiplication of mdouble follows the principle of operating on each part separately, that is, the sign bit is XORed, the exponent bits are added, and the mantissa bits are multiplied.

[0045] Since the mantissa of mdouble is a 64-bit number with the high-order bit being 1, the product of the mantissas is 128 bits, and the product has the following characteristics: either the 128th bit is 1 and the 127th bit is 0, or the 128th bit is 0 and the 127th bit is 1.

[0046] The present invention utilizes the high bits of unsigned long word multiplication and long word multiplication supported by the domestic heterogeneous multi-core platform to calculate the high 64 bits of the mantissa product and the low 64 bits, and then rounds the product according to the 128th bit of the product (rounding to the nearest even number). Finally, the product retains 64 bits, and then the exponent is adjusted according to the retained result.

[0047] (IV) Division of mdouble

[0048] The division of mdouble is implemented using Newton iteration.

[0049] Given constants N and K, to solve N / K, we can first solve 1 / K and then multiply it by N. Let X = 1 / K, Xi be the i-th iteration of X = 1 / K, and ri be the error of the i-th iteration. According to Newton's iteration equation, the iteration formula is:

[0050]

[0051] When the initial value satisfies \(0 < X0 < 2 / K\), the iterative process converges, then

[0052]

[0053] By recursive derivation, we get

[0054]

[0055] Thus, the division implementation of mdouble is as follows:

[0056] Define two numbers Mn and Mk of mdouble type (the value of Mk is not 0, if it is 0, an exception is output). To complete Mn / Mk, we can first use Newton's iterative method to find the reciprocal rMk of Mk, and then perform the multiplication of mdouble-structured numbers with Mn:

[0057] 1. Represent 2 as an mdouble number, denoted as M2; convert Mk to double precision, then find its reciprocal as the initial value of the iteration, and then convert it to an mdouble-structured number denoted as rMk (there is another method, directly calculate the reciprocal of the mantissa of Mk to generate a new mdouble number, denoted as Mk1, the exponent bit of the initial value is Mk1.e - Mk.e, and the mantissa bit is Mk1.f);

[0058] 2. Calculate rMk(2 - Mk * rMk), and store the result in rMk.

[0059] 3. Calculate the error r = 1 - Mk * rMk. If r is less than a given value by us, the calculation ends and rMk is output, otherwise go back to step 2.

[0060] 4. Calculate rMk * Mn.

[0061] (V) Square root of mdouble

[0062] Use Newton's iteration to implement the square root of mdouble.

[0063] Let there be a constant N, calculate , select an appropriate initial value , starting from , using Newton's iteration, the square root of the constant N can be calculated. The iterative formula is as follows:

[0064]

[0065] Thus, the square root algorithm of mdouble is as follows:

[0066] Define a number Mn of mdouble type,

[0067] 1. Express 2 as an mdouble number, denoted as M2; use Mn0=Mn / 2 as the initial value of the iteration.

[0068] 2. Calculate Temp = , the result is stored in Temp.

[0069] 3. Calculate the error r = |Mn - Temp|. If r is less than a given value, the calculation ends and Temp is output. Otherwise, return to step 2.

[0070] (6) Type conversion of mdouble

[0071] The present invention realizes the type conversion between mdouble and double.

[0072] 1. Convert mdouble to double

[0073] The sign bit of the mdouble type data is the sign bit of the double type data; the lower 52 bits of the remaining 53 bits after rounding the mantissa of the mdouble type data to the nearest even number are the mantissa of the double type data (rounding may cause a carry, and if a carry occurs, a shift is required); the exponent bit of the mdouble type data plus 1086 is the exponent bit of the double type data (if a carry occurs when the mantissa is rounded, 1 needs to be added here).

[0074] 2. Double to mdouble

[0075] The sign bit of the double type data is the sign bit of the mdouble type data, the exponent bit of the double type data minus 1086 is the exponent bit of the mdouble type data, the mantissa bit (52) of the double type non-zero data is set to 1, and then right shifted 11 bits to obtain the mantissa bit of the mdouble type data.

[0076] (7) mdouble to decimal

[0077] The opposite of the exponent bit of the mdouble type data indicates the number of decimal places in its mantissa. The decimal place in the mantissa is extracted using the exponent bits. The extracted decimal place is then adjusted according to the requirements of the mdouble mantissa (i.e., the highest bit of the mantissa is 1). The exponent is then adjusted accordingly to complete the decimal operation on the data.

[0078] (8) mdouble integer

[0079] Here, rounding the mdouble to an integer indicates truncation. Since the inverse of the exponent of an mdouble represents the number of decimal places in its mantissa, the remainder is the integer part. If there is no integer part, the exponent is 0; otherwise, the exponent is equal to the original number.

[0080] (9) mdouble comparison

[0081] Define two numbers m1 and m2 of type mdouble,

[0082] If m1 and m2 have opposite signs, then the positive one is greater than the negative one;

[0083] If they have the same sign and are both positive, then the number with the larger exponent is larger; if the exponents are equal, then the number with the larger mantissa is larger;

[0084] If they have the same sign and are both negative, then the one with the smaller exponent has a larger value; if the exponents are equal, then the one with the smaller mantissa has a larger value.

[0085] (10) Taking the absolute value of mdouble

[0086] Just set the sign position of the mdouble data to 0.

[0087] (11) mdouble negation

[0088] The sign bit of the mdouble data is set to 1 if it is 0, otherwise it is set to 0.

[0089] When the above-mentioned high-precision floating-point simulation method based on the domestic heterogeneous many-core platform is adopted, it is based on the domestic heterogeneous many-core platform, uses scalars to simulate high-precision floating-point numbers, and uses the instructions supported by the existing domestic heterogeneous many-core platform to accelerate the high-precision floating-point operations, realizing the addition, subtraction, multiplication, rounding, decimals, type conversion, comparison, absolute value, and negation of high-precision floating-point numbers, and uses Newton iteration to realize functions such as division and square root, reducing the user's programming difficulty, making the number of instructions for implementing high-precision floating-point operations less and the computing efficiency higher, meeting the needs of users of the domestic heterogeneous many-core platform for high-precision floating-point calculations.

[0090] The above embodiments are intended only to illustrate the technical concepts and features of the present invention. Their purpose is to enable those skilled in the art to understand the contents of the present invention and implement them accordingly. They are not intended to limit the scope of protection of the present invention. Any equivalent changes or modifications made in accordance with the spirit of the present invention are intended to be covered by the scope of protection of the present invention.

Claims

1. A high-precision floating-point simulation method based on a domestically produced heterogeneous many-core platform, characterized by: This is used for projects that require high floating-point calculation accuracy and efficiency. It uses scalars to simulate the sign bit, exponent bit, and mantissa bit of floating-point numbers, and is accelerated based on instructions from a domestically produced heterogeneous multi-core platform to implement high-precision floating-point addition, subtraction, multiplication, division, square root, integer rounding, decimal point taking, type conversion, comparison, absolute value taking, and negation functions. It is based on the following configuration: High-precision floating-point numbers are defined as the mdouble structure. The definitions of each member of mdouble comply with IEEE 754, as follows: The following steps are involved: S1. Conversion and representation of initial data types: Use data type conversion functions to convert source data types to high-precision floating-point numbers; S2. Perform corresponding operations on the sign bit, exponent bit, and mantissa according to the specific function, and use instructions to accelerate them; S3. Round the result in S2 to the nearest even number and adjust the exponent according to the rounding result to obtain a high-precision floating-point operation result.

Citation Information

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