A hard disk module design method and system with hard disk data protection function

By designing a hard disk module with hard disk data protection function, using FPGA and control switches, the backup and destruction of hard disk data is solved, and the problem of data protection and backup in the existing technology is achieved, and the perfect protection of hard disk data is achieved.

CN114218618BActive Publication Date: 2025-05-23联想长风科技(北京)有限公司
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Patent Information

Application Number
CN202111551198.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-17
Publication Date
2025-05-23
Estimated Expiration
2041-12-17

AI Technical Summary

Technical Problem

In the prior art, data backup cannot be performed while protecting data, resulting in data being unable to be saved and lost, and data destruction is not highly applicable.

Method used

By designing a hard disk module with hard disk data protection function, using FPGA and control switches to trigger the data protection mechanism, the transmission and backup of hard disk data to the remote encryption server is realized, and the destruction switch is turned on after the transmission is completed, so that the high current breaks down the hard disk and realizes dual data protection.

Benefits of technology

It realizes perfect protection of hard disk data, and through software and hardware design, the dual protection of data backup and destruction is achieved, avoiding the problems of data loss and incomplete destruction.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a hard disk module design method and system with hard disk data protection function, the method comprising: obtaining a first key signal; FPGA triggers a data protection mechanism according to the first key signal and sends a first control signal; a control switch sends a first transmission signal according to the first control signal; a HDD transmits a data file to a remote encryption server according to the first transmission signal; after the data file in the HDD is transmitted to the remote encryption server, a first return signal is obtained; the FPGA generates a second control signal according to the first return signal; the control switch controls the destruction switch to open according to the second control signal, so that a large current breaks down the HDD. The method solves the problem that in the prior art, while protecting data, it also causes the inability to back up data, so that data cannot be saved and is lost, and the data destruction is not very applicable.
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Description

Technical Field

[0001] The present invention relates to the field of data protection, and in particular to a hard disk module design method and system with a hard disk data protection function. Background Art

[0002] With the rapid development of the information age, the capacity of computer hard disks is getting larger and larger, the functions of operating systems and application software are becoming more and more abundant, and the transmission and interaction of information data is becoming more and more frequent. Therefore, the protection of information data is becoming more and more important, especially in confidential fields. At present, the way of protecting hard disk data information through encryption technology is not safe. There is a risk of hackers cracking and stealing hard disk data. The disadvantage of physical destruction of hard disks is that there may be a risk of incomplete erasure and data repair.

[0003] However, the inventors of this application found that the above technology has at least the following technical problems in the process of implementing the technical solution of the invention in the embodiment of this application:

[0004] The existing technology has the problem that while protecting data, it also causes the inability to back up data itself, resulting in data loss due to inability to save data, and data destruction is not very practical. Summary of the invention

[0005] In view of the defects in the prior art, the purpose of the embodiments of the present application is to provide a hard disk module design method and system with hard disk data protection function, so as to solve the problem that in the prior art, while protecting data, it also causes the inability to back up data itself, resulting in data loss due to inability to save data, and data destruction is not very practical. The dual data protection method of hard disk data destruction and hard disk data backup is achieved through software and hardware design, thereby achieving the technical effect of perfect protection of hard disk data.

[0006] In a first aspect, an embodiment of the present application provides a method for designing a hard disk module with a hard disk data protection function, wherein the method comprises: obtaining a first key signal; the FPGA triggers a data protection mechanism according to the first key signal and sends a first control signal; the control switch sends a first transmission signal according to the first control signal; the HDD transmits a data file to a remote encryption server according to the first transmission signal; when the data file in the HDD is transmitted to the remote encryption server, a first return signal is obtained; the FPGA generates a second control signal according to the first return signal; the control switch controls the destruction switch to open according to the second control signal, so that a large current breaks down the HDD.

[0007] On the other hand, the present application also provides a hard disk module design system with a hard disk data protection function, wherein the system includes: a first obtaining unit, the first obtaining unit is used to obtain a first key signal; a first sending unit, the first sending unit is used for the FPGA to trigger the data protection mechanism according to the first key signal and send a first control signal; a second sending unit, the second sending unit is used to control the switch to send a first transmission signal according to the first control signal; a first transmission unit, the first transmission unit is used for the HDD to transmit data files to a remote encryption server according to the first transmission signal; a second obtaining unit, the second obtaining unit is used to obtain a first return signal after the data file in the HDD is transmitted to the remote encryption server; a first generating unit, the first generating unit is used for the FPGA to generate a second control signal according to the first return signal; a first control unit, the first control unit is used for the control switch to control the destruction switch to open according to the second control signal, so that a large current breaks down the HDD.

[0008] On the other hand, the present invention provides a hard disk module design system with hard disk data protection function, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method described in the first aspect when executing the program.

[0009] One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

[0010] Since the data protection mechanism is triggered by a button, the FPGA will send an enable signal to the HDD controller after the button is triggered. After receiving the enable signal, the HDD controller will transmit the data file in the HDD to the remote encryption server. When the data file in the HDD has been transmitted, a signal will be returned to the FPGA. When the FPGA receives the signal returned by the HDD, it will control the destruction switch of the corresponding HDD to turn on, so that the large current can break down the HDD. This achieves a dual data protection method of hard disk data destruction and hard disk data backup through software and hardware design, thereby achieving the technical effect of perfect protection of hard disk data.

[0011] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0013] Figure 1 A flowchart of a method for designing a hard disk module with a hard disk data protection function according to an embodiment of the present application;

[0014] Figure 2 This is a schematic diagram of a process of generating a first return signal sequence in a method for designing a hard disk module with a hard disk data protection function according to an embodiment of the present application;

[0015] Figure 3 A schematic diagram of a flow chart of sequence segmentation quantitative analysis in a hard disk module design method with a hard disk data protection function according to an embodiment of the present application;

[0016] Figure 4 This is a flow chart of an upper voltage threshold in a method for designing a hard disk module with a hard disk data protection function according to an embodiment of the present application;

[0017] Figure 5 A schematic diagram of a flow chart of data transmission conversion in a hard disk module design method with a hard disk data protection function according to an embodiment of the present application;

[0018] Figure 6 This is a structural schematic diagram of a hard disk module design system with a hard disk data protection function according to an embodiment of the present application;

[0019] Figure 7 It is a schematic diagram of the structure of an exemplary electronic device according to an embodiment of the present application.

[0020] Explanation of the reference numerals: first sending unit 11, second sending unit 12, third sending unit 13, first transmission unit 14, fourth sending unit 15, fifth sending unit 16, first control unit 17, bus 300, receiver 301, processor 302, transmitter 303, memory 304, bus interface 305. DETAILED DESCRIPTION

[0021] The embodiment of the present application provides a hard disk module design method and system with hard disk data protection function, which solves the problem in the prior art that while protecting data, it also causes the inability to back up data itself, resulting in data loss due to inability to save data, and data destruction is not very practical. The dual data protection method of hard disk data destruction and hard disk data backup is achieved through software and hardware design, thereby achieving the technical effect of perfect protection of hard disk data.

[0022] Below, the exemplary embodiments according to the present application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application, and it should be understood that the present application is not limited to the exemplary embodiments described here.

[0023] Application Overview

[0024] With the rapid development of the information age, the capacity of computer hard disks is getting larger and larger, the functions of operating systems and application software are becoming more and more abundant, and the transmission and interaction of information data is becoming more and more frequent. Therefore, the protection of information data is becoming more and more important, especially in confidential fields. Data protection is particularly critical. At present, the way of protecting hard disk data information through encryption technology is not safe. There is a risk of hackers cracking and stealing hard disk data. The disadvantage of physical destruction of hard disks is that there may be a risk of incomplete erasure and data repair. However, the existing technology has the problem that while protecting data, it also causes the inability to back up data itself, resulting in data loss due to inability to save data, and data destruction is not very practical.

[0025] In response to the above technical problems, the overall idea of ​​the technical solution provided by this application is as follows:

[0026] An embodiment of the present application provides a method for designing a hard disk module with a hard disk data protection function, wherein the method includes: obtaining a first key signal; the FPGA triggers a data protection mechanism according to the first key signal and sends a first control signal; the control switch sends a first transmission signal according to the first control signal; the HDD transmits a data file to a remote encryption server according to the first transmission signal; when the data file in the HDD is transmitted to the remote encryption server, a first return signal is obtained; the FPGA generates a second control signal according to the first return signal; the control switch controls the destruction switch to open according to the second control signal, so that a large current breaks down the HDD.

[0027] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0028] Embodiment 1

[0029] like Figure 1 As shown, an embodiment of the present application provides a hard disk module design method with a hard disk data protection function, wherein the method comprises:

[0030] Step S100: obtaining a first key signal;

[0031] Step S200: the FPGA triggers a data protection mechanism according to the first key signal and sends a first control signal;

[0032] Specifically, the embodiment of the present application provides a hard disk module design method with hard disk data protection function, and the module design method is implemented by designing a hard disk module. Further, FPGA (Field-Programmable Gate Array) communication connection, that is, field programmable gate array, is a product further developed on the basis of programmable devices such as PAL, GAL, CPLD, etc. It appears as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of gate circuits of the original programmable devices. The hard disk module includes a button, which is connected to the FPGA communication, and the data protection mechanism is triggered by the button to enter the next step of the signal transmission process.

[0033] Step S300: controlling the switch to send a first transmission signal according to the first control signal;

[0034] Step S400: the HDD transmits the data file to the remote encryption server according to the first transmission signal;

[0035] Furthermore, step S400 in the embodiment of the present application further includes:

[0036] Step S410: the HDD includes N sub-HDDs, and the control switch includes N sub-control switches;

[0037] Step S420: The N sub-HDDs correspond to the N sub-control switches, and the N sub-HDDs correspond to the N sub-control switches one by one.

[0038] Specifically, the control switch is an HDD controller, wherein the HDD (Hard Disk Drive) hard disk drive is the most basic computer storage. When the data protection mechanism is triggered by the button, the FPGA receives the first control signal and sends the first transmission signal to the HDD control switch to control the HDD to transmit data to the remote encryption server. The transmission mode of the HDD includes multiple transmission modes, such as burst data transmission or smooth data transmission, and the designed hard disk module can include multiple HDD memories, thereby realizing data backup transmission.

[0039] Furthermore, the HDD includes a plurality of sub-HDDs, namely HDD 1 ,HDD 2 ,HDD 3 ...HDD NSimilarly, since each HDD is connected to a controller, the control switch also includes multiple sub-control switches, switch 1, switch 2, switch 3... switch N. Among them, the N sub-HDDs correspond to the N sub-control switches one by one, such as HDD 1 Corresponding to switch 1, HDD 2 Corresponding to switch 2, HDD 3 Corresponding to switch 3..., HDD N Corresponding to switch N, the module system supports the composite transmission of multiple HDD memories, thereby achieving centralized backup destruction processing, and setting a destruction mechanism based on an independent switch, thereby increasing the efficiency of the data backup transmission and the operability of the instruction issuance.

[0040] Step S500: After the data file in the HDD is transmitted to the remote encryption server, a first return signal is obtained;

[0041] Furthermore, the remote encryption server is a server for backing up and storing the HDD data files, which can encrypt and store the transmitted files, thereby increasing the security of the backup data when the data is destroyed. In detail, after the button is triggered, the FPGA will send an enable signal to the HDD controller, and after receiving the enable signal, the HDD controller will transmit the data file in the HDD to the remote encryption server. When the data file in the HDD has been transmitted, a signal will be returned to the FPGA. Furthermore, the transmission completion status of the data file in the HDD can be determined by adding a data backup self-test unit to check whether there is an error in the format of the backup upload, whether there are garbled characters, character or field deviations, etc. When the data backup self-test unit completes the self-test, it generates a first self-test result, and evaluates the file transmission status according to the first self-test result, thereby obtaining the first return signal.

[0042] Step S600: the FPGA generates a second control signal according to the first return signal;

[0043] Step S700: the control switch controls the destroy switch to open according to the second control signal, so that a large current breaks down the HDD.

[0044] Specifically, the second control signal is a destruction signal, and the second control signal is different from the first control signal. The first control signal is used to control the HDD to perform data backup to the remote encryption server. The second control signal is used to control the corresponding HDD's destruction switch to open after the FPGA receives the signal returned by the HDD, so that the large current can break through the HDD to achieve the destruction effect. This solves the problem in the prior art that while protecting data, it also causes the data to be unable to be backed up, resulting in data being lost and unable to be saved, and data destruction is not very practical. The dual data protection method of hard disk data destruction and hard disk data backup is achieved through software and hardware design, thereby achieving the technical effect of perfect protection of hard disk data.

[0045] Further, such as Figure 2 As shown, step S500 of the embodiment of the present application includes:

[0046] Step S510: obtaining N return signals according to the transmission status of the N sub-HDDs;

[0047] Step S520: obtaining return time node information corresponding to the N return signals, wherein each sequence signal in the N return signals corresponds to a time node;

[0048] Step S530: generating a first return signal sequence according to the N return signals and the return time node information;

[0049] Step S540: the FPGA performs sequence processing according to the first return signal sequence.

[0050] Specifically, since the HDD memory in the entire module design includes N memories, and each memory corresponds to a control switch for controlling the HDD, when the amount of data stored in the N HDD memories is different, the corresponding transmission rates are also different, thereby generating multiple time nodes for data transmission. When each of the N memories completes data transmission to the remote encryption server, there is a corresponding transmission completion signal and a time node corresponding to the transmission completion. Therefore, the transmission completion signal and the corresponding time node are used to generate the first return signal sequence, wherein the first return signal sequence is the arrangement information of all signal states arranged in chronological order. Therefore, when the FPGA receives the return signal and processes the signal, it sends the destruction instruction in sequence according to the order of the arranged states, thereby preventing the technical effect of reducing the signal accuracy and signal collision probability due to too many signals.

[0051] Further, such as Figure 3 As shown, step S540 of the embodiment of the present application includes:

[0052] Step S541: obtaining a first preset time threshold;

[0053] Step S542: performing a sequence segmentation quantization analysis on the first return signal sequence according to the first preset time threshold to obtain a segmentation quantization value;

[0054] Step S543: obtaining M return signals greater than or equal to a preset number of signals from the first return signal sequence according to the segmented quantization values;

[0055] Step S544: Allocate the signal receiving serial port of the FPGA according to the M return signals.

[0056] Specifically, the first preset time threshold is a preset time period data set in advance, which is used to segment the generated first return signal sequence. In detail, since each return signal corresponds to a time node, the intervals between the time nodes are also different. Therefore, the first return signal sequence is segmented according to the first preset time threshold, and the number of each segment signal after segmentation is quantitatively analyzed to obtain the quantization value of each sequence segment, and the sequence segment with a larger quantization value is screened out, and the M return signals in the sequence segment are extracted. Since the return signal quantization value is high in the first preset time threshold, it means that more signals are received at a certain time node, which may cause a delay effect, thereby being not conducive to the FPGA receiving the signal. Therefore, the signal receiving serial port of the FPGA is allocated and changed based on the program transcription method to increase its receiving efficiency.

[0057] Further, such as Figure 4 As shown, the control switch receives the second control signal sent by the FPGA to control the destruction switch to open, so that the large current breaks down the HDD, and step S700 also includes:

[0058] Step S710: obtaining a first destroy instruction according to the second control signal;

[0059] Step S720: obtaining first connection circuit information of the HDD according to the first destroy instruction;

[0060] Step S730: obtaining an upper voltage threshold of the HDD according to the component withstand voltage information and the connection wire information of the HDD in the first connection circuit information.

[0061] Step S740: inputting the upper voltage threshold as a specific value of voltage transmission into the first connection circuit, and the first connection circuit generates a real-time high current to break down the HDD.

[0062] Specifically, the second control signal is that when the FPGA receives the signal returned by the HDD, it will control the destruction switch of the corresponding HDD to open, wherein the process of controlling the destruction switch of the corresponding HDD to open is implemented according to the first destruction instruction. Further, when the destruction switch is turned on, the HDD will be broken down based on the large current, thereby achieving the destruction effect, but the large current breakdown during the destruction can be based on a significant increase in the voltage across the HDD, thereby changing the current size in the circuit, thereby achieving the purpose of breakdown. Therefore, when further limiting the increased high voltage, it is necessary to analyze the components and connecting wires of the first connection circuit information of the HDD to achieve the current conversion process. Therefore, in order to achieve the safe destruction of the corresponding HDD and not affect other connected HDDs, the increased high voltage is further controlled to obtain the upper limit voltage threshold to achieve the technical effect of large current breakdown of the HDD and ensure safety.

[0063] Further, such as Figure 5 As shown, step S200 of the embodiment of the present application also includes:

[0064] Step S210: obtaining first destruction emergency level information of the HDD;

[0065] Step S220: generating a first additional signal according to the first destruction emergency level information;

[0066] Step S230: adding the first additional signal to the first control signal to generate a first additional control signal;

[0067] Step S240: converting the data file transmission mode of the HDD to the remote encryption server according to the first additional control signal, wherein the transmission mode of the HDD includes stable transmission and burst transmission.

[0068] Specifically, since the hard disk data destruction is a series of tasks that can be completed with one keystroke, the operation is simple and the data protection is rapid, which can ensure data protection operations in emergency situations. Therefore, by analyzing and judging the emergency situation of the HDD destruction, an additional signal is generated according to the emergency situation and added to the first control signal, so that when the emergency situation is high, the HDD changes the mode of data file transmission to the remote encryption server to a burst transmission mode, increases the transmission rate and closes its data transmission self-check process. If the emergency situation is low, the HDD changes the mode of data file transmission to the remote encryption server to a stable transmission mode, improves the data transmission quality, and starts the data transmission self-check process, thereby achieving intelligent data backup while protecting the data, ensuring the quality of the backup after data destruction and the flexible choice of destruction.

[0069] Compared with the prior art, the present invention has the following beneficial effects:

[0070] 1. Due to the use of a button-triggered data protection mechanism, after the button is triggered, the FPGA will send an enable signal to the HDD controller. After receiving the enable signal, the HDD controller will transmit the data file in the HDD to the remote encryption server. When the data file in the HDD has been transmitted, it will return a signal to the FPGA. When the FPGA receives the signal returned by the HDD, it will control the destruction switch of the corresponding HDD to open, so that the large current can break down the HDD. Through software and hardware design, a dual data protection method of hard disk data destruction and hard disk data backup is achieved, thereby achieving the technical effect of perfect protection of hard disk data.

[0071] 2. In order to achieve safe destruction of the corresponding HDD without affecting other connected HDDs, the increased high voltage is further controlled, and then the upper limit voltage threshold is obtained to achieve the technical effect of large current breaking through the HDD and ensuring safety.

[0072] Embodiment 2

[0073] Based on the same inventive concept as the hard disk module design method with hard disk data protection function in the aforementioned embodiment, the present invention also provides a hard disk module design system with hard disk data protection function, such as Figure 6 As shown, the system comprises:

[0074] A first obtaining unit 11, wherein the first obtaining unit 11 is used to obtain a first key signal;

[0075] A first sending unit 12, wherein the first sending unit 12 is used for the FPGA to trigger a data protection mechanism according to the first key signal and send a first control signal;

[0076] A second sending unit 13, the second sending unit 13 is used to control the switch to send a first transmission signal according to the first control signal;

[0077] A first transmission unit 14, wherein the first transmission unit 14 is used for the HDD to transmit a data file to a remote encryption server according to the first transmission signal;

[0078] A second obtaining unit 15, the second obtaining unit 15 is used to obtain a first return signal after the data file in the HDD is transmitted to the remote encryption server;

[0079] A first generating unit 16, wherein the first generating unit 16 is used for the FPGA to generate a second control signal according to the first return signal;

[0080] The first control unit 17 is used for the control switch to control the destruction switch to open according to the second control signal, so that a large current breaks down the HDD.

[0081] Furthermore, the system also includes:

[0082] A first including unit, wherein the first including unit is that the HDD includes N sub-HDDs, and the control switch includes N sub-control switches;

[0083] The first corresponding unit is that the N sub-HDDs correspond to the N sub-control switches, and the N sub-HDDs correspond to the N sub-control switches one by one.

[0084] Furthermore, the system also includes:

[0085] a third obtaining unit, the third obtaining unit being configured to obtain N return signals according to the transmission states of the N sub-HDDs;

[0086] A fourth obtaining unit, the fourth obtaining unit is used to obtain return time node information corresponding to the N return signals, wherein each sequence signal in the N return signals corresponds to a time node;

[0087] A second generating unit, the second generating unit is used to generate a first return signal sequence according to the N return signals and the return time node information;

[0088] A first processing unit, wherein the first processing unit is used for the FPGA to perform sequence processing according to the first return signal sequence.

[0089] Furthermore, the system also includes:

[0090] a fifth obtaining unit, wherein the fifth obtaining unit is used to obtain a first preset time threshold;

[0091] a sixth obtaining unit, configured to perform a sequence segmented quantitative analysis on the first return signal sequence according to the first preset time threshold to obtain a segmented quantization value;

[0092] a seventh obtaining unit, the seventh obtaining unit being configured to obtain M return signals greater than or equal to a preset number of signals from the first return signal sequence according to the segmented quantization values;

[0093] A first allocation unit is used to allocate the signal receiving serial port of the FPGA according to the M return signals.

[0094] Furthermore, the system also includes:

[0095] an eighth obtaining unit, the eighth obtaining unit being configured to obtain a first destroy instruction according to the second control signal;

[0096] a ninth obtaining unit, configured to obtain first connection circuit information of the HDD according to the first destroy instruction;

[0097] a tenth obtaining unit, configured to obtain an upper voltage threshold of the HDD according to the component withstand voltage information and the connection wire information of the HDD in the first connection circuit information;

[0098] A first input unit is used to input the upper voltage threshold as a specific value of voltage transmission into the first connection circuit, and the first connection circuit generates a real-time high current to break down the HDD.

[0099] Furthermore, the system also includes:

[0100] an eleventh obtaining unit, the eleventh obtaining unit being used to obtain first destruction urgency level information of the HDD;

[0101] a second generating unit, the second generating unit being configured to generate a first additional signal according to the first destruction emergency level information;

[0102] a third generating unit, configured to add the first additional signal to the first control signal to generate a first additional control signal;

[0103] A first conversion unit, wherein the first conversion unit is used to convert a data file transmission mode of the HDD to a remote encryption server according to the first additional control signal, wherein the transmission mode of the HDD includes stable transmission and burst transmission.

[0104] The foregoing Figure 1 The various variations and specific examples of the hard disk module design method with hard disk data protection function in Example 1 are also applicable to the hard disk module design system with hard disk data protection function in this embodiment. Through the above detailed description of the hard disk module design method with hard disk data protection function, technical personnel in this field can clearly know the implementation method of the hard disk module design system with hard disk data protection function in this embodiment, so for the sake of conciseness of the specification, it will not be described in detail again.

[0105] Embodiment 3

[0106] Reference below Figure 7 To describe the electronic device of the embodiment of the present application.

[0107] Figure 7 The figure shows a schematic structural diagram of an electronic device according to an embodiment of the present application.

[0108] Based on the inventive concept of a hard disk module design method with a hard disk data protection function in the aforementioned example, the present invention also provides a hard disk module design system with a hard disk data protection function, on which a computer program is stored. When the program is executed by a processor, the steps of any method of a hard disk module design system with a hard disk data protection function described above are implemented.

[0109] Among them, Figure 7 In the embodiment of the present invention, a bus architecture (represented by bus 300) is shown, which may include any number of interconnected buses and bridges, and bus 300 links various circuits including one or more processors represented by processor 302 and memory represented by memory 304. Bus 300 may also link various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are not further described herein. Bus interface 305 provides an interface between bus 300 and receiver 301 and transmitter 303. Receiver 301 and transmitter 303 may be the same element, namely a transceiver, providing a unit for communicating with various other systems over a transmission medium. Processor 302 is responsible for managing bus 300 and general processing, while memory 304 may be used to store data used by processor 302 when performing operations.

[0110] The embodiment of the present application provides a method for designing a hard disk module with a hard disk data protection function, wherein the method includes: obtaining a first key signal; FPGA triggers a data protection mechanism according to the first key signal and sends a first control signal; the control switch sends a first transmission signal according to the first control signal; the HDD transmits a data file to a remote encryption server according to the first transmission signal; after the data file in the HDD is transmitted to the remote encryption server, a first return signal is obtained; the FPGA generates a second control signal according to the first return signal; the control switch controls the destruction switch to open according to the second control signal, so that a large current breaks down the HDD, solving the problem in the prior art that while protecting data, it also causes the inability to back up data itself, so that data cannot be saved and lost, and data destruction is not very applicable. The dual data protection method of hard disk data destruction and hard disk data backup is achieved through software and hardware design, thereby achieving the technical effect of perfect protection of hard disk data.

[0111] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0112] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A system that specifies the functions of a box or multiple boxes.

[0113] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction system, which is implemented in the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0114] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0115] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0116] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A hard disk module design method with hard disk data protection function, in, The method comprises: Obtaining a first key signal; The FPGA triggers a data protection mechanism according to the first key signal and sends a first control signal; Controlling the switch to send a first transmission signal according to the first control signal; The HDD transmits the data file to the remote encryption server according to the first transmission signal; When the data file in the HDD is transmitted to the remote encryption server, a first return signal is obtained; The FPGA generates a second control signal according to the first return signal; The control switch controls the destruction switch to open according to the second control signal, so that a large current breaks down the HDD; The method further comprises: Obtaining a first preset time threshold; Performing a sequence segmented quantitative analysis on the first return signal sequence according to the first preset time threshold to obtain a segmented quantized value; Obtaining M return signals greater than or equal to a preset number of signals from the first return signal sequence according to the segmented quantization values; The signal receiving serial port of the FPGA is allocated according to the M return signals.

2. The method according to claim 1, in, The method further comprises: The HDD includes N sub-HDDs, and the control switch includes N sub-control switches; The N sub-HDDs correspond to the N sub-control switches, and the N sub-HDDs correspond to the N sub-control switches one by one.

3. The method according to claim 2, in, The method further comprises: Obtaining N return signals according to the transmission status of the N sub-HDDs; Obtaining return time node information corresponding to the N return signals, wherein each sequence signal in the N return signals corresponds to a time node; Generate a first return signal sequence according to the N return signals and the return time node information; The FPGA performs sequence processing according to the first return signal sequence.

4. The method according to claim 1, in, The control switch receives the second control signal sent by the FPGA to control the destruction switch to open, so that a large current breaks down the HDD. The method further includes: Obtaining a first destruction instruction according to the second control signal; According to the first destruction instruction, obtaining first connection circuit information of the HDD; Obtaining an upper voltage threshold of the HDD according to the withstand voltage information of the HDD components and the connection wire information in the first connection circuit information; The upper voltage threshold is input as a specific value for voltage transmission into the first connection circuit, and the first connection circuit generates a real-time high current to break down the HDD.

5. The method according to claim 1, in, The method further comprises: Obtaining first destruction emergency level information of the HDD; generating a first additional signal according to the first destruction emergency level information; adding the first additional signal to the first control signal to generate a first additional control signal; The mode of data file transmission from the HDD to the remote encryption server is converted according to the first additional control signal, wherein the transmission mode of the HDD includes stable transmission and burst transmission.

6. A hard disk module design system with hard disk data protection function, in, The system comprises: A first obtaining unit, wherein the first obtaining unit is used to obtain a first key signal; A first sending unit, wherein the first sending unit is used for the FPGA to trigger a data protection mechanism according to the first key signal and send a first control signal; a second sending unit, the second sending unit being used to control the switch to send a first transmission signal according to the first control signal; a first transmission unit, wherein the first transmission unit is used for the HDD to transmit a data file to a remote encryption server according to the first transmission signal; A second obtaining unit, the second obtaining unit is used to obtain a first return signal after the data file in the HDD is transmitted to the remote encryption server; A first generating unit, wherein the first generating unit is used for the FPGA to generate a second control signal according to the first return signal; a first control unit, wherein the first control unit is used for the control switch to control the destruction switch to open according to the second control signal, so that a large current breaks down the HDD; The system further comprises: a fifth obtaining unit, wherein the fifth obtaining unit is used to obtain a first preset time threshold; a sixth obtaining unit, configured to perform a sequence segmented quantitative analysis on the first return signal sequence according to the first preset time threshold to obtain a segmented quantization value; a seventh obtaining unit, the seventh obtaining unit being configured to obtain M return signals greater than or equal to a preset number of signals from the first return signal sequence according to the segmented quantization values; A first allocation unit is used to allocate the signal receiving serial port of the FPGA according to the M return signals.

7. A hard disk module design system with hard disk data protection function, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, in, When the processor executes the program, the steps of the method according to any one of claims 1 to 5 are implemented.

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