A heterogeneous thin film wafer and preparation method thereof

Abstract

The present application discloses a heterogeneous thin film wafer and a preparation method, wherein a heterogeneous thin film wafer comprises a substrate layer and a volume expansion layer located on the substrate layer, wherein the volume expansion layer is used to form a structure protruding toward the bonding surface when the wafer is bonded; the bonding surface direction refers to the direction in which the volume expansion layer is away from the substrate layer; an isolation layer is provided on the side of the volume expansion layer away from the substrate layer, and the isolation layer is used to strengthen the bonding strength when the wafer is bonded; a functional film layer is provided on the side of the isolation layer away from the volume expansion layer, and the functional film layer is used to prepare devices and chips; a stress compensation layer is provided on the side of the substrate layer away from the volume expansion layer, and the stress compensation layer is used to improve the morphology of the wafer. The heterogeneous thin film wafer realizes that the wafer contacts from the middle point during the bonding process and then gradually expands to the surrounding areas, thereby improving the bonding yield. At the same time, by adjusting the thickness of the stress compensation layer, the curvature and warpage of the wafer are close to 0, thereby improving the morphology of the wafer.

Description

Technical Field

[0001] The present application relates to the field of chips, and in particular to a heterogeneous thin film wafer and a preparation method thereof. Background Art

[0002] Heterogeneous integration of multiple materials is an important path to improve chip performance and integration. In the existing technology, when manufacturing heterogeneous thin film material wafers, the heterogeneous material is usually transferred to a silicon substrate or other substrate through bonding. The bonding process will produce holes and the bonding yield is not high.

[0003] In addition, on the one hand, there are differences in the thermal expansion coefficients of different materials; on the other hand, there is stress inside the film after the material transfer. These unfavorable factors cause the film to have a large curvature and warping, and the wafer morphology is poor, which is not conducive to the subsequent wafer tape-out processing. Summary of the invention

[0004] The present application provides a heterogeneous thin film wafer and a preparation method, which can at least improve the problems of low bonding yield and poor wafer morphology.

[0005] An embodiment of the present invention provides a heterogeneous thin film wafer, comprising:

[0006] A substrate layer and a volume expansion layer located on the substrate layer, wherein the volume expansion layer is used to form a structure protruding toward a bonding surface when wafers are bonded; the bonding surface direction refers to a direction in which the volume expansion layer is away from the substrate layer;

[0007] An isolation layer is provided on the side of the volume expansion layer away from the substrate layer, and the isolation layer is used to enhance the bonding strength when the wafers are bonded;

[0008] A functional film layer is provided on one side of the isolation layer away from the volume expansion layer, and the functional film layer is used for preparing devices and chips;

[0009] A stress compensation layer is provided on a side of the substrate layer away from the volume expansion layer, and the stress compensation layer is used to improve the morphology of the wafer.

[0010] Optionally, the stress compensation layer, the isolation layer and the functional film layer have in-plane stress inside; the in-plane stress inside the isolation layer is greater than the in-plane stress inside the stress compensation layer.

[0011] Optionally, when the in-plane stress inside the functional film layer is tensile stress, the in-plane stress inside the isolation layer and the stress compensation layer is compressive stress; when the in-plane stress inside the functional film layer is compressive stress, the in-plane stress inside the isolation layer and the stress compensation layer is tensile stress.

[0012] Optionally, the overall curvature of the substrate layer and the volume expansion layer is between 0 and 100 microns.

[0013] Optionally, the material of the volume expansion layer is obtained by pre-processing the material of the substrate layer; the material of the substrate layer includes silicon or silicon carbide.

[0014] Optionally, the stress compensation layer and the isolation layer are made of the same material; the stress compensation layer and the isolation layer are made of a combination of one or more of silicon dioxide, aluminum nitride and silicon carbide.

[0015] Optionally, the material of the functional film layer is different from that of the isolation layer; the material of the functional film layer includes any one of lithium niobate, lithium tantalate, aluminum nitride and silicon carbide.

[0016] An embodiment of the present invention provides a method for preparing a heterogeneous thin film wafer, comprising:

[0017] A volume expansion layer is formed on the substrate layer to obtain a first wafer protruding toward the bonding surface direction, so as to ensure that the center points between the wafers are in contact first when the wafers are bonded; the bonding surface direction refers to the direction in which the volume expansion layer is away from the substrate layer;

[0018] The same material with the same thickness is deposited on the upper and lower surfaces of the first wafer at the same time to obtain a substrate wafer; the side close to the volume expansion layer is the isolation layer, and the side close to the substrate layer is the stress compensation layer;

[0019] performing ion implantation on the heterogeneous wafer to form a defect layer in the heterogeneous wafer;

[0020] Wafer bonding the isolation layer to the functional thin film layer in the heterogeneous wafer to obtain a first bonding structure; the heterogeneous wafer includes a functional thin film layer, a defect layer and a functional thick film layer;

[0021] Annealing the first bonding structure so that the heterogeneous wafer is peeled off along the defective layer to obtain a second bonding structure;

[0022] The thickness of the stress compensation layer is adjusted to improve the morphology of the second bonding structure and obtain a heterogeneous thin film wafer.

[0023] Optionally, annealing the first bonding structure so that the heterogeneous wafer is peeled off along the defective layer to obtain the second bonding structure includes: annealing the first bonding structure so that the functional thick film layer is peeled off along the defective layer to obtain an intermediate bonding structure;

[0024] The intermediate bonding structure is subjected to annealing treatment and chemical mechanical polishing treatment to remove the defect layer and the damaged layer on the surface of the functional film layer to obtain a second bonding structure.

[0025] Optionally, the method of forming the volume expansion layer on the substrate layer includes: growing amorphous, polycrystalline, porous crystal corresponding to the single crystal material of the substrate layer and performing ion implantation on the substrate layer.

[0026] The beneficial effects of the present invention are as follows: the introduction of the volume expansion layer makes the substrate wafer convex toward the bonding surface, so that the wafer starts to contact from the middle point during the bonding process and then gradually expands to the surrounding areas, thereby ensuring that the bonding is complete and free of holes, thereby improving the bonding yield. At the same time, in the last step of wafer preparation, by adjusting the thickness of the stress compensation layer, the curvature and warpage of the wafer are close to 0, thereby improving the wafer morphology. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions and advantages in the embodiments of the present application or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0028] Figure 1 is a schematic structural diagram of a heterogeneous thin film wafer provided by an embodiment of the present invention;

[0029] Figure 2 It is a schematic diagram of a process of preparing a heterogeneous thin film wafer provided by an embodiment of the present invention;

[0030] Figure 3 A stress cloud diagram of a wafer provided by an embodiment of the present invention;

[0031] Figure 4 is another stress cloud diagram of a wafer provided by an embodiment of the present invention;

[0032] Figure 5 It is a partial flow diagram of a method for preparing a heterogeneous thin film wafer provided by an embodiment of the present invention;

[0033] Figure 6 This is another stress cloud diagram of a wafer provided by an embodiment of the present invention.

[0034] The corresponding reference numerals in the figure are: 1-substrate layer; 2-volume expansion layer; 3-isolation layer; 4-functional thin film layer; 5-stress compensation layer; 41-defect layer; 42-functional thick film layer; 101-first wafer; 102-substrate wafer; 103-heterogeneous wafer; 104-first bonding structure; 105-second bonding structure; 106-heterogeneous thin film wafer; 1041-intermediate bonding structure. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0036] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0037] Embodiment 1

[0038] See also Figure 1 , Figure 1 It is a structural schematic diagram of a heterogeneous thin film wafer provided by an embodiment of the present invention. The heterogeneous thin film wafer includes a substrate layer 1 that plays a supporting role and a volume expansion layer 2 located on the substrate layer 1, wherein the material of the substrate layer 1 includes silicon or silicon carbide, and the material of the volume expansion layer 2 is obtained by pre-treating the material of the substrate layer 1. The so-called "volume expansion" means that under the same conditions, a certain substance of the same mass contains defects, pores and other structures inside, resulting in a larger volume and lower density compared with a dense substance. Therefore, the material of the above-mentioned volume expansion layer 2 includes amorphous, polycrystalline, porous crystals corresponding to the single crystal material of the substrate layer 1, and ion implantation of the substrate layer 1. For example, when the material of the substrate layer 1 is silicon, the material of the volume expansion layer 2 can be a combination of one or more of amorphous silicon, polycrystalline silicon, porous silicon and silicon containing implantation defects.

[0039] The volume expansion layer 2 is used to form a structure that bulges toward the bonding surface when the wafer is bonded (the bonding surface direction refers to the direction in which the volume expansion layer 2 is away from the substrate layer 1), so as to facilitate the expansion of the bonding wave from the middle to achieve wafer hole-free bonding and improve the wafer bonding yield. Before the volume expansion layer 2 is deposited on the surface of the substrate layer 1, the curvature of the substrate layer 1 and the volume expansion layer 2 are both 0. The thickness of the volume expansion layer 2 is 0-2 microns. After it is deposited on the surface of the substrate layer 1, the overall curvature of the substrate layer 1 and the volume expansion layer 2 combined is between 0-100 microns.

[0040] In the heterogeneous thin film wafer, an isolation layer 3 is provided on the side of the volume expansion layer 2 away from the substrate layer 1, and the isolation layer 3 is used to strengthen the bonding strength when the wafer is bonded. A stress compensation layer 5 is provided on the side of the substrate layer 1 away from the volume expansion layer 2, and the thickness of the stress compensation layer 5 can be adjusted by etching, wet etching, etc., so that the stress compensation layer 5 is used to improve the morphology of the wafer. The material of the stress compensation layer 5 and the isolation layer 3 is the same, and the material of the stress compensation layer 5 and the isolation layer 3 includes a combination of one or more of silicon dioxide, aluminum nitride and silicon carbide.

[0041] A functional film layer 4 is provided on one side of the isolation layer 3 away from the volume expansion layer 2. The functional film layer 4 is used to prepare devices and chips. The material of the functional film layer 4 is different from that of the isolation layer 3. The material of the functional film layer 4 includes any one of lithium niobate (LN for short), lithium tantalate (LT for short), aluminum nitride and silicon carbide.

[0042] The stress compensation layer 5, the isolation layer 3 and the functional film layer 4 have in-plane stress, wherein the in-plane stress in the isolation layer 3 and the stress compensation layer 5 is 100-2000 MPa, and the in-plane stress in the isolation layer 3 is greater than the in-plane stress in the stress compensation layer 5. When the in-plane stress in the functional film layer 4 is tensile stress, the in-plane stress in the isolation layer 3 and the stress compensation layer 5 is compressive stress; when the in-plane stress in the functional film layer 4 is compressive stress, the in-plane stress in the isolation layer 3 and the stress compensation layer 5 is tensile stress.

[0043] Embodiment 2

[0044] The embodiment of the present invention provides a method for preparing a heterogeneous thin film wafer. Figure 2 The preparation method shown includes:

[0045] S201: forming a volume expansion layer 2 on the substrate layer 1 to obtain a first wafer 101 protruding toward the bonding surface, so as to ensure that the center points between the wafers are in contact first when the wafers are bonded.

[0046] The bonding surface direction refers to the direction in which the volume expansion layer 2 is away from the substrate layer 1. The protruding structure enables the bonding process to start from the center point and then expand outward, thereby avoiding the formation of bonding holes due to multiple points of contact at the same time.

[0047] The method of forming the volume expansion layer 2 on the substrate layer 1 includes: growing amorphous, polycrystalline, porous crystal corresponding to the single crystal material of the substrate layer 1 and ion implanting the substrate layer 1. The material of the substrate layer 1 includes silicon or silicon carbide. When the material of the substrate layer 1 is silicon, the material of the volume expansion layer 2 can be a combination of one or more of amorphous silicon, polycrystalline silicon, porous silicon and silicon containing implantation defects.

[0048] S202 : depositing the same material with the same thickness on the upper and lower surfaces of the first wafer 101 simultaneously to obtain a substrate wafer 102 ; the isolation layer 3 is located on the side close to the volume expansion layer 2 , and the stress compensation layer 5 is located on the side close to the substrate layer 1 .

[0049] The deposited materials include one or more combinations of silicon dioxide, aluminum nitride and silicon carbide, and the deposition methods include oxidation, plasma evaporation vapor deposition (PECVD), low pressure vapor deposition (LPCVD), atmospheric pressure vapor deposition (APCVD) and magnetron sputtering.

[0050] Although there is stress inside the wafer, the substrate wafer 102 and the first wafer 101 have the same morphology because the same material with the same thickness is deposited. The stress cloud diagram of the substrate wafer 102 is as follows: Figure 3 As shown, at this time the wafer structure protrudes upward, which is beneficial for subsequent bonding.

[0051] S203 : performing ion implantation on the heterogeneous wafer 103 to form a defect layer 41 in the heterogeneous wafer 103 .

[0052] The heterogeneous wafer 103 may be any one of an LN wafer, an LT wafer, an aluminum nitride wafer and a silicon carbide wafer, and the ion implantation includes implanting hydrogen ions and / or helium ions.

[0053] S204 : Wafer bonding the isolation layer 3 to the functional thin film layer 4 in the heterogeneous wafer 103 to obtain a first bonding structure 104 ; the heterogeneous wafer 103 includes the functional thin film layer 4 , the defect layer 41 and the functional thick film layer 42 .

[0054] The above bonding method can be to transfer the heterogeneous wafer 103 onto the substrate wafer 102 through the smart peeling technology. Due to the internal stress of the functional film layer 4 and the thermal mismatch between the functional film layer 4 and the substrate layer 1, the morphology of the first bonding structure 104 is poor. In an exemplary embodiment, the thickness of the heterogeneous wafer 103 is close to the thickness of the substrate wafer 102. Since the curvature of the heterogeneous wafer 103 is 0, the warpage of the first bonding structure 104 can be ignored. In another exemplary embodiment, as Figure 4 As shown, the functional film layer 4 has tensile stress, and at this time the first bonding structure 104 protrudes downward as a whole.

[0055] S205 : performing annealing treatment on the first bonding structure 104 , so that the heterogeneous wafer 103 is peeled off along the defective layer 41 , thereby obtaining a second bonding structure 105 .

[0056] like Figure 5 As shown, S205 performs annealing treatment on the first bonding structure 104 so that the heterogeneous wafer 103 is peeled off along the defective layer 41, and the second bonding structure 105 is obtained, including:

[0057] S2051: performing annealing treatment on the first bonding structure 104 so that the functional thick film layer 42 is peeled off along the defective layer 41 to obtain an intermediate bonding structure 1041;

[0058] S2052 : performing annealing treatment and chemical mechanical polishing (CMP) treatment on the intermediate bonding structure 1041 to remove the defect layer 41 and the damaged layer on the surface of the functional film layer 4 , thereby obtaining the second bonding structure 105 .

[0059] S206 : adjusting the thickness of the stress compensation layer 5 to improve the morphology of the second bonding structure 105 , and obtaining a heterogeneous thin film wafer 106 .

[0060] The above-mentioned method for adjusting the thickness of the stress compensation layer 5 includes grinding and thinning, chemical etching, dry etching and chemical mechanical polishing (CMP). After the adjustment, the curvature and warpage of the heterogeneous thin film wafer are close to 0. In an exemplary embodiment, the stress compensation layer 5 is etched to half of its original thickness by wet etching. At this time, the curvature and warpage are greatly reduced, and the morphology improvement effect is as follows: Figure 6 shown.

[0061] It can be seen from the embodiments provided by the present invention that the present invention introduces a volume expansion layer to make the substrate wafer convex toward the bonding surface, so that the wafer starts to contact from the middle point during the bonding process and then gradually expands to the surrounding areas, thereby ensuring that the bonding is complete and free of holes, thereby improving the bonding yield. At the same time, the present invention introduces a stress compensation layer and adjusts the thickness of the stress compensation layer in the last step of wafer preparation, so that the curvature and warpage of the wafer are close to 0, thereby improving the wafer morphology.

[0062] It should be noted that the above-mentioned sequence of the embodiments of the present application is for description only and does not represent the advantages and disadvantages of the embodiments. The above-mentioned specific embodiments of this specification are described. Other embodiments are within the scope of the attached claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0063] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0064] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0065] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A heterogeneous thin film wafer, characterized in that: It comprises a substrate layer (1) and a volume expansion layer (2) located on the substrate layer (1), wherein the volume expansion layer (2) is used to form a structure protruding toward a bonding surface when wafers are bonded; the bonding surface direction refers to the direction in which the volume expansion layer (2) is away from the substrate layer (1); An isolation layer (3) is provided on the side of the volume expansion layer (2) away from the substrate layer (1), and the isolation layer (3) is used to enhance the bonding strength when wafers are bonded; A functional film layer (4) is provided on the side of the isolation layer (3) away from the volume expansion layer (2), and the functional film layer (4) is used for preparing devices and chips; A stress compensation layer (5) is provided on the side of the substrate layer (1) away from the volume expansion layer (2), and the stress compensation layer (5) is used to improve the morphology of the wafer.

2. The heterogeneous thin film wafer according to claim 1, characterized in that: The stress compensation layer (5), the isolation layer (3) and the functional film layer (4) have in-plane stress inside; The in-plane stress inside the isolation layer (3) is greater than the in-plane stress inside the stress compensation layer (5).

3. The heterogeneous thin film wafer according to claim 2, characterized in that: When the in-plane stress inside the functional film layer (4) is tensile stress, the in-plane stress inside the isolation layer (3) and the stress compensation layer (5) is compressive stress; When the in-plane stress inside the functional thin film layer (4) is compressive stress, the in-plane stress inside the isolation layer (3) and the stress compensation layer (5) is tensile stress.

4. The heterogeneous thin film wafer according to claim 1, characterized in that: The overall curvature of the substrate layer (1) and the volume expansion layer (2) is between 0 and 100 micrometers.

5. The heterogeneous thin film wafer according to claim 1, characterized in that: The material of the volume expansion layer (2) is obtained by pre-treating the material of the substrate layer (1); The material of the substrate layer (1) includes silicon or silicon carbide.

6. The heterogeneous thin film wafer according to claim 1, characterized in that: The stress compensation layer (5) and the isolation layer (3) are made of the same material; The materials of the stress compensation layer (5) and the isolation layer (3) include a combination of one or more of silicon dioxide, aluminum nitride and silicon carbide.

7. The heterogeneous thin film wafer according to claim 1, characterized in that: The material of the functional film layer (4) is different from the material of the isolation layer (3); The material of the functional thin film layer (4) includes any one of lithium niobate, lithium tantalate, aluminum nitride and silicon carbide.

8. A method for preparing a heterogeneous thin film wafer, characterized in that: include: A volume expansion layer (2) is formed on a substrate layer (1) to obtain a first wafer (101) that is convex toward a bonding surface, so as to ensure that the center points of the wafers are in contact first when the wafers are bonded; the bonding surface direction refers to the direction in which the volume expansion layer (2) is away from the substrate layer (1); The same material of the same thickness is deposited simultaneously on the upper and lower surfaces of the first wafer (101) to obtain a substrate wafer (102); the side close to the volume expansion layer (2) is an isolation layer (3), and the side close to the substrate layer (1) is a stress compensation layer (5); Performing ion implantation on a heterogeneous wafer (103) to form a defect layer (41) in the heterogeneous wafer (103); Wafer bonding is performed on the isolation layer (3) and the functional thin film layer (4) in the heterogeneous wafer (103) to obtain a first bonding structure (104); the heterogeneous wafer (103) comprises the functional thin film layer (4), the defect layer (41) and the functional thick film layer (42); Performing an annealing treatment on the first bonding structure (104) so ​​that the heterogeneous wafer (103) is peeled off along the defective layer (41) to obtain a second bonding structure (105); The thickness of the stress compensation layer (5) is adjusted to improve the morphology of the second bonding structure (105) to obtain a heterogeneous thin film wafer (106).

9. The method for preparing a heterogeneous thin film wafer according to claim 8, characterized in that: The first bonding structure (104) is subjected to annealing treatment so that the heterogeneous wafer (103) is peeled off along the defective layer (41) to obtain a second bonding structure (105), comprising: Annealing the first bonding structure (104) so ​​that the functional thick film layer (42) is peeled off along the defective layer (41) to obtain an intermediate bonding structure (1041); The intermediate bonding structure (1041) is subjected to annealing treatment and chemical mechanical polishing treatment to remove the defective layer (41) and the damaged layer on the surface of the functional film layer (4), thereby obtaining the second bonding structure (105).

10. The method for preparing a heterogeneous thin film wafer according to claim 8, characterized in that: The method of forming the volume expansion layer (2) on the substrate layer (1) comprises: growing amorphous, polycrystalline, or porous crystals corresponding to the single crystal material of the substrate layer (1) and performing ion implantation on the substrate layer (1).

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