An output matching circuit, a power amplifier and a radio frequency front end module

Abstract

This application discloses an output matching circuit, a front-end RF module, and an RF front-end module, relating to the field of electronic circuit technology. The output matching circuit is coupled to the output of a signal amplifier circuit and includes a first impedance node, an adjustable impedance unit, and a second impedance node. The adjustable impedance unit forms a first impedance matching circuit with the first and second impedance nodes when the signal amplifier circuit operates in high-power mode, and forms a second impedance matching circuit with the first and second impedance nodes when the signal amplifier circuit operates in low-power mode. Simultaneously, the first impedance value of the first impedance node in the first impedance matching circuit is made smaller than the second impedance value of the first impedance node in the second impedance matching circuit, thus avoiding gain expansion when the signal amplifier circuit operates in low-power mode and improving the linearity of the signal amplifier circuit at lower power consumption.

Description

Technical Field

[0001] This application belongs to the field of electronic circuit technology, and in particular relates to an output matching circuit, a power amplifier, and a radio frequency front-end module. Background Technology

[0002] With the popularization of 5G technology, the demand for frequency bands for transmitting and receiving video signals by terminals and other communication devices is also increasing.

[0003] In existing communication equipment, signal transmission and reception are achieved through a radio frequency (RF) front-end module. The RF front-end module includes a signal amplification circuit and an output matching circuit. The signal amplification circuit amplifies the input signal pair, and the output matching circuit achieves output impedance matching. However, when the signal amplification circuit operates in low-power mode, its gain expands as the output power gradually increases, resulting in non-ideal linearity and failing to meet usage requirements. Summary of the Invention

[0004] This application provides an output matching circuit and a push-pull power amplifier RF front-end module to solve the problem of non-ideal linearity in the signal amplifier circuit connected to the output matching circuit in the prior art during low-power mode.

[0005] In a first aspect, embodiments of this application provide an output matching circuit coupled to the output terminal of a signal amplification circuit; the output matching circuit includes: a first impedance node, an impedance adjustable unit, and a second impedance node;

[0006] The first impedance node is configured to be connected to the output terminal of the signal amplification circuit for receiving the radio frequency amplified signal output by the signal amplification circuit;

[0007] The impedance adjustable unit is configured to form a first impedance matching circuit with the first impedance node and the second impedance node when the signal amplification circuit is operating in high power mode, and to form a second impedance matching circuit with the first impedance node and the second impedance node when the signal amplification circuit is operating in low power mode.

[0008] The first impedance value of the first impedance node in the first impedance matching circuit is less than the second impedance value of the first impedance node in the second impedance matching circuit.

[0009] Furthermore, the impedance-adjustable unit includes: an adjustable impedance branch and a fixed impedance branch;

[0010] The adjustable impedance branch is configured to form a first impedance branch with the first impedance node when the signal amplification circuit is operating in high power mode, and to form a second impedance branch with the first impedance node when the signal amplification circuit is operating in low power mode.

[0011] The fixed impedance branch is configured such that, when the signal amplification circuit operates in high power mode, it forms a first impedance matching circuit together with the first impedance branch and the second impedance node, and when the signal amplification circuit operates in low power mode, it forms a second impedance matching circuit together with the second impedance branch and the second impedance node.

[0012] Furthermore, the fixed impedance branch includes a first capacitor and a first inductor;

[0013] The first terminal of the first capacitor serves as the first terminal of the fixed impedance branch and is connected to the adjustable impedance branch. The second terminal of the first capacitor is connected to the first terminal of the first inductor, and the second terminal of the first inductor is connected to the ground terminal.

[0014] Alternatively, the first end of the first inductor is connected to the first end of the fixed impedance branch and the adjustable impedance branch, the second end of the first inductor is connected to the first end of the first capacitor, and the second end of the first capacitor is connected to the ground terminal.

[0015] Furthermore, the adjustable impedance branch includes a first impedance adjustment unit and a first switching switch. The first end of the first impedance adjustment unit is connected to the first end of the fixed impedance branch, the second end of the first impedance adjustment unit is connected to the first end of the first switching switch, and the second end of the first switching switch is grounded.

[0016] Specifically, when the signal amplification circuit operates in high-power mode, the first switching switch is closed; when the signal amplification circuit operates in low-power mode, the first switching switch is open.

[0017] Furthermore, the first impedance adjustment unit includes a second inductor or a second capacitor.

[0018] Furthermore, the impedance adjustment branch also includes a second impedance adjustment unit and a second switching switch. The first end of the second impedance adjustment unit is connected to the first impedance node, the second end of the second impedance adjustment unit is connected to the first end of the fixed impedance branch, the first end of the second switching switch is connected to the first end of the second impedance adjustment unit, and the second end of the second switching switch is connected to the second end of the second impedance adjustment unit.

[0019] Furthermore, when the signal amplification circuit operates in high-power mode, the second switching switch is open; when the signal amplification circuit operates in low-power mode, the second switching switch is closed.

[0020] Furthermore, the second impedance adjustment unit includes a third capacitor or a third inductor.

[0021] The first aspect provides an output matching circuit coupled to the output terminal of a signal amplification circuit. This output matching circuit includes a first impedance node, an adjustable impedance unit, and a second impedance node. Since the first impedance node is connected to the output terminal of the signal amplification circuit, it can receive the RF amplified signal output by the signal amplification circuit. The adjustable impedance unit forms a first impedance matching circuit with the first and second impedance nodes when the signal amplification circuit operates in high-power mode, and a second impedance matching circuit with the first and second impedance nodes when the signal amplification circuit operates in low-power mode. This achieves adaptation to different impedance matching circuits according to different operating modes of the signal amplification circuit. Furthermore, it ensures that the first impedance value of the first impedance node in the first impedance matching circuit is smaller than the second impedance value of the first impedance node in the second impedance matching circuit. This allows the first impedance node to have a smaller first impedance value when the signal amplification circuit operates in high-power mode, ensuring the signal amplification gain of the signal amplification circuit. Conversely, it allows the first impedance node to have a larger second impedance value when the signal amplification circuit operates in low-power mode, avoiding gain expansion when the signal amplification circuit operates in low-power mode, and improving the linearity of the signal amplification circuit with lower power consumption.

[0022] Secondly, embodiments of this application also provide a power amplifier, including: a signal amplification circuit and an output matching circuit, wherein the output matching circuit includes a first impedance node, a second impedance node, and an impedance adjustable unit disposed between the first impedance node and the second impedance node; the output terminal of the signal amplification circuit is connected to the first impedance node of the output matching circuit.

[0023] The impedance adjustable unit is configured to adjust the impedance of the first impedance node to a first impedance value when the signal amplification circuit is operating in a high-power mode; and to adjust the impedance of the first impedance node to a second impedance value when the signal amplification circuit is operating in a low-power mode, wherein the first impedance value is less than the second impedance value.

[0024] Thirdly, embodiments of this application also provide a radio frequency front-end module, including the output matching circuit of the first aspect and / or the power amplifier of the second aspect.

[0025] The beneficial effects that the power amplifier and RF front-end module can achieve can be referred to the beneficial effects of the output matching circuit provided in the first aspect, and will not be repeated here. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of the structure of an output matching circuit provided in an embodiment of this application;

[0028] Figure 2 This is a schematic diagram of the specific structure of an output matching circuit provided in an embodiment of this application. Figure 1 ;

[0029] Figure 3 This is a schematic diagram of the specific structure of an output matching circuit provided in an embodiment of this application. Figure 2 ;

[0030] Figure 4 This is a schematic diagram of the specific structure of an output matching circuit provided in an embodiment of this application. Figure 3 ;

[0031] Figure 5 This is a specific circuit of an output matching circuit provided in an embodiment of this application. Figure 1 ;

[0032] Figure 6 This is a specific circuit of an output matching circuit provided in an embodiment of this application. Figure 2 ;

[0033] Figure 7 This is a schematic diagram of the structure of a power amplifier provided in an embodiment of this application;

[0034] Figure 8 This is a schematic diagram of the structure of a radio frequency front-end module provided in an embodiment of this application. Detailed Implementation

[0035] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0036] Please see Figure 1 , Figure 1 This is a schematic diagram of an output matching circuit provided in an embodiment of this application. For example... Figure 1 As shown, an output matching circuit 100 is coupled to the output terminal 111 of a signal amplification circuit 110. The output matching circuit 100 includes a first impedance node 10, an impedance adjustable unit 20, and a second impedance node 30.

[0037] The first impedance node 10 is configured to be connected to the output terminal 111 of the signal amplification circuit 110, for receiving the radio frequency amplified signal output by the signal amplification circuit 110.

[0038] The impedance adjustable unit 20 is configured to form a first impedance matching circuit with the first impedance node 10 and the second impedance node 30 when the signal amplification circuit 110 is operating in high power mode, and to form a second impedance matching circuit with the first impedance node 10 and the second impedance node 30 when the signal amplification circuit 110 is operating in low power mode; the first impedance value of the first impedance node in the first impedance matching circuit is less than the second impedance value of the first impedance node in the second impedance matching circuit.

[0039] like Figure 1 As shown, the first impedance node 10 in the output matching circuit 100 is coupled to the output terminal 111 of the signal amplification circuit 110. In practical applications, the second impedance node 20 in the output matching circuit 100 can be used to connect to the signal output circuit 120.

[0040] It should be noted that the output matching circuit 100 is used to achieve impedance matching between the signal amplification circuit 110 and the signal output circuit 120. Figure 1 In the output matching circuit 100, the impedance adjustable unit 20 is coupled between the first impedance node 10 and the second impedance node 30. The first impedance node 10 is connected to the output terminal 111 of the signal amplification circuit 110, allowing the signal amplification circuit 110 to amplify the radio frequency signal to obtain an amplified radio frequency signal. This amplified signal is then transmitted to the output matching circuit 100 via the first impedance node 10, and then to the signal output circuit 120 via the output matching circuit 100. Here, the signal output circuit 120 can be an output circuit for the amplified radio frequency signal, such as an antenna circuit or an antenna combination circuit.

[0041] Taking the signal output circuit 120 as an example of an antenna circuit, the output matching circuit 100 is coupled between the signal amplification circuit 110 and the antenna circuit through the first impedance node 10 and the second impedance node 30. Assuming the impedance of the first impedance node 10 is 4Ω, if the impedance requirement of the second impedance node 30 is 50Ω, then the impedance of the second impedance node 30 can be matched to 50Ω through the impedance adjustable unit 20 in the output matching circuit 100.

[0042] In all embodiments of this application, when the signal output circuit 120 connected to the output matching circuit 100 remains unchanged, during the joint operation of the signal amplification circuit 110 and the output matching circuit 100, it is generally necessary to meet the 50-ohm impedance matching requirement at the output terminal of the output matching circuit 100. That is, the impedance value at the node connecting the output matching circuit 100 and the signal output circuit 120 is a fixed constant, i.e., the impedance value of the second impedance node 30 is a fixed constant (50 ohms). Based on this, in order to ensure that the impedance value requirement of the second impedance node 30 is met, and at the same time to avoid the phenomenon of gain expansion when the signal amplification circuit 110 operates in low power mode, the impedance adjustable unit 20 is configured to form a corresponding impedance matching circuit with the first impedance node 10 and the second impedance node 30 according to the power mode of the signal amplification circuit 110. Here, the structure of the impedance matching circuit formed when the signal amplification circuit 110 operates in different power modes is also different. Since the impedance value of the second impedance node 30 is a fixed constant, the difference between different impedance matching circuits lies in the impedance value of the first impedance node 10.

[0043] Specifically, when the signal amplification circuit 110 operates in high-power mode, the impedance adjustable unit 20, together with the first impedance node 10 and the second impedance node 30, forms a first impedance matching circuit, in which the impedance value of the first impedance node 10 is Z1; when the signal amplification circuit 110 operates in low-power mode, the impedance adjustable unit 20, together with the first impedance node 10 and the second impedance node 30, forms a second impedance matching circuit, in which the impedance value of the first impedance node 10 is Z1', and Z1 < Z1'. Here, when the signal amplifier circuit 110 is operating in low power mode, in the second impedance matching circuit formed by the impedance adjustable unit 20, the impedance value Z1' of the first impedance node 10 is larger than the impedance value Z1 of the first impedance node 10 in the first impedance matching circuit when the signal amplifier circuit 110 is operating in high power mode. This allows the gain of the signal amplifier circuit 110 to decrease as the impedance value of the first impedance node 10 increases, thereby avoiding the phenomenon of gain expansion when the signal amplifier circuit 110 is operating in low power mode.

[0044] For example, in a specific implementation, the impedance adjustable unit 20 can be composed of multiple sets of impedance branches and multiple sets of switching branches. When the signal amplification circuit 110 is working in different power modes, the multiple sets of impedance branches are combined by controlling the on and off of the multiple sets of switching branches, and then combined with the first impedance node 10 and the second impedance node 30 to form a first impedance matching circuit or a second impedance matching circuit.

[0045] In conjunction with the previous example, in specific implementation, in order to ensure that the impedance value of the second impedance node 30 can meet the impedance matching requirements, the impedance adjustable unit 20 may also include an inherent impedance branch. When the signal amplification circuit 110 is operating in different power modes, by controlling the on and off of multiple sets of switching branches, multiple sets of impedance branches are combined to form impedance branches with different impedance values, which then form a target impedance circuit with the inherent impedance branch. Finally, together with the first impedance node 10 and the second impedance node 30, a first impedance matching circuit or a second impedance matching circuit is formed.

[0046] It is understandable that the impedance adjustable unit 20, based on the power mode of the signal amplifier circuit 110, combines with the first impedance node 10 and the second impedance node 30 to form different impedance matching circuits. Since the impedance values ​​of the first impedance node 10 are different between the different impedance matching circuits, the impedance adjustable unit 20 is equivalent to adjusting or adapting the impedance value of the first impedance node 10 according to the power mode of the signal amplifier circuit 110. This allows the first and second impedance matching circuits to meet the impedance matching requirements of the signal amplifier circuit 110 when it operates in different power modes. Furthermore, when the signal amplifier circuit 110 operates in a low-power mode, by increasing the impedance value of the first impedance node 10, the gain of the signal amplifier circuit 110 decreases as the impedance value of the first impedance node 10 increases. This achieves appropriate compression of the gain of the RF amplified signal, thereby improving the linearity of the signal amplifier circuit 110 at lower power consumption.

[0047] In the above scheme, the output matching circuit is coupled to the output terminal of the signal amplifier circuit. This output matching circuit includes a first impedance node, an adjustable impedance unit, and a second impedance node. Since the first impedance node is connected to the output terminal of the signal amplifier circuit, it can receive the RF amplified signal output by the signal amplifier circuit. The adjustable impedance unit forms a first impedance matching circuit with the first and second impedance nodes when the signal amplifier circuit operates in high-power mode, and a second impedance matching circuit with the first and second impedance nodes when the signal amplifier circuit operates in low-power mode. This achieves adaptation of different impedance matching circuits according to different operating modes of the signal amplifier circuit. Simultaneously, it ensures that the first impedance value of the first impedance node in the first impedance matching circuit is smaller than the second impedance value of the first impedance node in the second impedance matching circuit. This allows the first impedance node to have a smaller first impedance value when the signal amplifier circuit operates in high-power mode, ensuring the gain of the signal amplification circuit. Conversely, it allows the first impedance node to have a larger second impedance value when the signal amplifier circuit operates in low-power mode, avoiding gain expansion and improving the linearity of the signal amplifier circuit at lower power consumption.

[0048] Figure 2 This is a schematic diagram of the specific structure of an output matching circuit provided in an embodiment of this application. Figure 1 .like Figure 2 As shown, as an example, the impedance adjustable unit 20 includes: an adjustable impedance branch 21 and a fixed impedance branch 22.

[0049] The adjustable impedance branch 21 is configured to form a first impedance branch with the first impedance node 10 when the signal amplification circuit 110 is operating in high power mode, and to form a second impedance branch with the first impedance node 10 when the signal amplification circuit 110 is operating in low power mode.

[0050] The fixed impedance branch 22 is configured to form a first impedance matching circuit with the first impedance branch and the second impedance node when the signal amplification circuit 110 is operating in high power mode, and to form a second impedance matching circuit with the second impedance branch and the second impedance node 30 when the signal amplification circuit 110 is operating in low power mode.

[0051] In this embodiment, the adjustable impedance branch 21 is used to form impedance branches with the first impedance node 10 with different structures when the signal amplifier circuit 110 operates in different power modes, thus having different effects on the impedance value of the first impedance node 10. Here, in order to avoid the output gain compression phenomenon when the signal amplifier circuit 110 operates in high power mode, the impedance value of the first impedance node 10 in the first impedance branch formed by the adjustable impedance branch 21 and the first impedance node 10 is set to a smaller impedance value Z1; in order to avoid the output gain expansion phenomenon when the signal amplifier circuit 110 operates in low power mode, the impedance value of the first impedance node 10 in the second impedance branch formed by the adjustable impedance branch 21 and the first impedance node 10 is set to a larger impedance value Z1', that is, the impedance value Z1 of the first impedance node 10 in the first impedance branch and the impedance value Z1' of the first impedance node 10 in the second impedance branch satisfy the following relationship: Z1 < Z1'. The fixed impedance branch 22 is configured with a preset impedance increment. That is, in order to adapt to the output impedance requirements of the signal output circuit 120, the fixed impedance branch 22 is configured with a preset impedance increment. When different impedance matching circuits are formed with different impedance branches, the impedance value of the second impedance node 30 can still adapt to the output impedance requirements of the signal output circuit 120.

[0052] It should be noted that, under the condition that the input impedance requirement of the signal output circuit 120 remains unchanged, the impedance value of the second impedance node 30 is constant. By configuring a fixed impedance branch 22 with a preset impedance increment, the impedance value of the second impedance node 30 can be guaranteed to be met. At the same time, by using the adjustable impedance branch 21 and the first impedance node 10, impedance branches with different structures can be formed. Different impedance branches form different impedance matching circuits with the fixed impedance branch 22 and the second impedance node 30, ensuring that while meeting the impedance value requirement of the second impedance node 30, the output gain expansion phenomenon is also avoided when the signal amplifier circuit 110 operates in low-power mode.

[0053] In practical implementation, the impedance adjustment branch 21 can be implemented by combining different LC branches with multiple sets of switching branches. Specifically, the switching branches can include switching switches controlled by a controller. That is, the signal amplification circuit 110 operates in different power modes, sending control commands to the controller to characterize different power modes. The controller, according to the control commands, controls the on / off state of multiple sets of switching branches, realizing the combination and matching of different LC branches, which, together with the first impedance node 10, form a first impedance branch or a second impedance branch.

[0054] As an example, the switching branch can also be implemented by a switching transistor or a switching circuit composed of switching transistors. The controller can be a controller set in the impedance adjustment branch 21. By connecting the controller to the signal amplification circuit 110, the operating mode of the signal amplification circuit 110 can be detected. According to the operating mode of the signal amplification circuit 110, the switching branch can be controlled to switch on and off, thereby realizing the combination of different LC branches, and then forming a first impedance branch or a second impedance branch with the first impedance node 10.

[0055] It is easy to understand that, in a practical implementation, the controller can also be implemented by multiplexing the controller in the signal amplification circuit 110.

[0056] Figure 3 This is a schematic diagram of the specific structure of an output matching circuit provided in an embodiment of this application. Figure 2 .like Figure 3 As shown in the figure, in one embodiment, the impedance adjustment branch 21 includes a first impedance adjustment unit 211 and a first switching switch S1. The first end of the first impedance adjustment unit 211 is connected to the first end of the fixed impedance branch 22, and the second end of the first impedance adjustment unit 211 is connected to the first end of the first switching switch S1. The second end of the first switching switch S1 is grounded. When the signal amplification circuit 110 is operating in high power mode, the first switching switch S1 is closed; when the signal amplification circuit 110 is operating in low power mode, the first switching switch S1 is open.

[0057] It should be noted that, in the specific implementation, the first end of the first impedance adjustment unit 211 is connected to the first end of the fixed impedance branch 22, and the first end of the fixed impedance branch 22 is also coupled to the first impedance node 10.

[0058] In this embodiment, the first end of the first impedance adjustment unit 211 is connected to the first end of the fixed impedance branch 22, and the second end of the first impedance adjustment unit 211 is connected to the ground terminal through the first switching switch S1. Here, when the signal amplification circuit 110 is operating in high power mode, the first switching switch S1 is closed, so that the first impedance adjustment unit 211 is connected to the ground through the first switching switch S1 and forms a closed loop. At this time, the first impedance adjustment unit 211 and the first impedance node 10 form the first impedance branch. When the signal amplification circuit 110 is operating in low power mode, the first switching switch S1 is open, so that the first impedance adjustment unit 211 cannot be connected to the ground through the first switching switch S1, that is, the first impedance adjustment unit 211 is disconnected. At this time, only the first impedance node 10 forms the second impedance branch.

[0059] In a specific implementation, the first impedance adjustment unit 211 can be implemented by selecting at least one device with equivalent impedance, such as a capacitor or an inductor, or by selecting other existing combination circuits or devices with equivalent impedance.

[0060] by Figure 3 Based on the examples, Figure 4 This is a schematic diagram of the specific structure of an output matching circuit provided in an embodiment of this application. Figure 3 .like Figure 4 As shown, in another embodiment, the impedance adjustment branch 21 further includes a second impedance adjustment unit 212 and a second switching switch S2. The first end of the second impedance adjustment unit 212 is connected to the first impedance node 10, and the second end of the second impedance adjustment unit 212 is connected to the first end. The first end of the second switching switch S2 is connected to the first end of the second impedance adjustment unit 212, and the second end of the second switching switch S2 is connected to the second end of the second impedance adjustment unit 212.

[0061] In this embodiment, the first end of the fixed impedance branch 22 is coupled to the first impedance node 10 via the second impedance adjustment unit 212 and the second switching switch S2. When the second switching switch S2 is closed, the signal equivalent current transmitted by the first impedance node 10 flows through the second switching switch S2 to the first end of the fixed impedance branch 22, and the second impedance adjustment unit 212 is short-circuited. When the second switching switch S2 is open, the signal equivalent current transmitted by the first impedance node 10 flows through the second impedance adjustment unit 212 to the first end of the fixed impedance branch 22.

[0062] When the signal amplifier circuit 110 is operating in high power mode, the second switching switch S2 is open; when the signal amplifier circuit 110 is operating in low power mode, the second switching switch S2 is closed.

[0063] In a specific implementation, the second impedance adjustment unit 212 can be implemented by selecting at least one device with equivalent impedance, such as a capacitor or an inductor, or by selecting other existing combination circuits or devices with equivalent impedance.

[0064] exist Figure 4 In the high-power mode of the signal amplification circuit 110, the first switching switch S1 is closed and the second switching switch S2 is open. This allows the equivalent current of the signal transmitted through the first impedance node 10 to be transmitted through the second impedance adjustment unit 212 to the first impedance adjustment unit 211 and the fixed impedance branch 22. At this time, the first impedance adjustment unit 211 is connected to ground through the first switching switch S1 and forms a closed loop. The first impedance node 10, the first impedance adjustment unit 211, the second impedance adjustment unit 212, and the first switching switch S1 together form the first impedance branch. Here, the first impedance branch, together with the fixed impedance branch 22 and the second impedance node 30, forms the first impedance matching circuit.

[0065] When the signal amplification circuit 110 operates in low-power mode, the first switching switch S1 is open, the second switching switch S2 is closed, the first impedance adjustment unit 211 is disconnected, and the second impedance adjustment unit 212 is short-circuited. This prevents the first impedance adjustment unit 211 from being connected to ground through the first switching switch S1, and the equivalent current of the signal transmitted by the first impedance node 10 flows through the second switching switch S2 to the first end of the fixed impedance branch 22. At this time, the first impedance node 10 and the second switching switch S2 together form the second impedance branch. Here, the second impedance branch, together with the fixed impedance branch 22 and the second impedance node 30, forms the second impedance matching circuit.

[0066] In a specific implementation, a first impedance adjustment unit 211 and / or a second impedance adjustment unit 212 are configured in the impedance adjustment branch 21 to make the impedance value of the first impedance node 10 adjustable. Therefore, an existing LC combination branch can be used. For example, an LC combination of series capacitor and parallel inductor, or an LC combination of series inductor and parallel capacitor.

[0067] In one implementation of this embodiment, the first impedance adjustment unit 211 includes a second inductor or a second capacitor. Correspondingly, the second impedance adjustment unit 212 includes a third capacitor or a third inductor.

[0068] Figure 5 This is a specific circuit of an output matching circuit provided in an embodiment of this application. Figure 1 .like Figure 5 As shown, in one implementation of this embodiment, the first impedance adjustment unit 211 includes a second inductor L2. Correspondingly, the second impedance adjustment unit 212 includes a third capacitor C3.

[0069] Here, when the first impedance adjustment unit 211 includes the second inductor L2, the corresponding second impedance adjustment unit 212 includes the third capacitor C3. When the signal amplification circuit 110 operates in high-power mode, the first switching switch S1 is closed and the second switching switch S2 is open, allowing the equivalent current of the signal transmitted through the first impedance node 10 to be transmitted to the first impedance adjustment unit 211 and the fixed impedance branch 22 through the third capacitor C3. At this time, the second inductor L2 is connected to ground through the first switching switch S1 and forms a closed loop. The first impedance node 10, the third capacitor C3, the second inductor L2, and the first switching switch S1 together form the first impedance branch. Here, the first impedance branch, together with the fixed impedance branch 22 and the second impedance node 30, forms the first impedance matching circuit.

[0070] When the signal amplification circuit 110 operates in low-power mode, the first switch S1 is open, the second switch S2 is closed, the second inductor L2 is disconnected, and the third capacitor C3 is short-circuited. This prevents the second inductor L2 from being connected to ground via the first switch S1, and the equivalent current of the signal transmitted by the first impedance node 10 flows through the second switch S2 to the first end of the fixed impedance branch 22. At this time, the first impedance node 10 and the second switch S2 together form the second impedance branch. Here, the second impedance branch, together with the fixed impedance branch 22 and the second impedance node 30, forms the second impedance matching circuit.

[0071] Figure 6 This is a specific circuit of an output matching circuit provided in an embodiment of this application. Figure 2 .like Figure 6 As shown, in one implementation of this embodiment, the first impedance adjustment unit 211 includes a second capacitor C2. Correspondingly, the second impedance adjustment unit 212 includes a third inductor L3.

[0072] Here, when the first impedance adjustment unit 211 includes the second capacitor C2, the corresponding second impedance adjustment unit 212 includes the third inductor L3. When the signal amplification circuit 110 operates in high-power mode, the first switching switch S1 is closed and the second switching switch S2 is open, allowing the equivalent current of the signal transmitted through the first impedance node 10 to be transmitted to the first impedance adjustment unit 211 and the fixed impedance branch 22 through the third inductor L3. At this time, the second capacitor C2 is connected to ground through the first switching switch S1 and forms a closed loop. The first impedance node 10, the third inductor L3, the second capacitor C2, and the first switching switch S1 together form the first impedance branch. Here, the first impedance branch, together with the fixed impedance branch 22 and the second impedance node 30, forms the first impedance matching circuit.

[0073] When the signal amplification circuit 110 operates in low-power mode, the first switch S1 is open, the second switch S2 is closed, the second inductor L2 is disconnected, and the second capacitor C2 is short-circuited. This prevents the second inductor L2 from being connected to ground through the first switch S1, and the equivalent current of the signal transmitted by the first impedance node 10 flows through the second switch S2 to the first end of the fixed impedance branch 22. At this time, the first impedance node 10 and the second switch S2 together form the second impedance branch. Here, the second impedance branch, together with the fixed impedance branch 22 and the second impedance node 30, forms the second impedance matching circuit.

[0074] like Figures 5 to 6 As an example, the fixed impedance branch 22 includes a first capacitor C1 and a first inductor L1. Here, the first capacitor C1 and the first inductor L1 in the fixed impedance branch 22 form an LC branch with a preset impedance. The LC branch formed by the first capacitor C1 and the first inductor L1 is coupled to the second impedance node 30, so that the output impedance at the second impedance node 30 can meet the impedance requirements of the signal output circuit.

[0075] like Figure 5 As shown, in one implementation of this embodiment, the first end of the first inductor L1 is connected to the first end of the fixed impedance branch 22 and the adjustable impedance branch 21. The second end of the first inductor L1 is connected to the first end of the first capacitor C1, and the second end of the first capacitor C1 is connected to the ground terminal.

[0076] exist Figure 5In the first impedance adjustment unit 211, when the second inductor L2 is included, the corresponding second impedance adjustment unit 212 includes a third capacitor C3. When the signal amplification circuit 110 operates in high-power mode, the first switching switch S1 is closed and the second switching switch S2 is open, allowing the equivalent current of the signal transmitted through the first impedance node 10 to be transmitted to the second inductor L2 and the first inductor L1 through the third capacitor C3. At this time, the second inductor L2 is connected to ground through the first switching switch S1 and forms a closed loop. The first impedance node 10, the third capacitor C3, the second inductor L2, and the first switching switch S1 together form the first impedance branch. Here, the first impedance branch, together with the first inductor L1, the first capacitor C1, and the second impedance node 30, forms the first impedance matching circuit. That is, at this time, the third capacitor C3, the second inductor L2, the first inductor L1, and the first capacitor C1 are all conducting or participating in the circuit operation. Since the third capacitor C3 and the second inductor L2 in the impedance adjustment branch 21 also participate in the circuit operation, the impedance value of the first impedance node 10 is relatively small.

[0077] When the signal amplification circuit 110 operates in low-power mode, the first switch S1 is open, the second switch S2 is closed, the second inductor L2 is disconnected, and the third capacitor C3 is short-circuited. This prevents the second inductor L2 from being connected to ground through the first switch S1, and the equivalent current of the signal transmitted by the first impedance node 10 flows to the first end of the first inductor L1 through the second switch S2. At this time, the first impedance node 10 and the second switch S2 together form the second impedance branch. Here, the second impedance branch, together with the first inductor L1, the first capacitor C1, and the second impedance node 30, forms the second impedance matching circuit. That is, only the first inductor L1 and the first capacitor C1 are both conducting or participating in the circuit operation. Since the third capacitor C3 and the second inductor L2 in the impedance adjustment branch 21 do not participate in the circuit operation, the impedance value of the first impedance node 10 is the same as the impedance value of the first end of the first inductor L1, and the impedance value of the first end of the first inductor L1 is a larger value. Therefore, when the signal amplifier circuit 110 is operating in low power mode, by increasing the impedance value of the first impedance node 10, the phenomenon of gain expansion can be avoided, and the linearity of the signal amplifier circuit 110 can be improved.

[0078] like Figure 6 As shown, in another implementation of this embodiment, the first end of the first capacitor C1 is connected to the first end of the fixed impedance branch 22 and the adjustable impedance branch 21. The second end of the first capacitor C1 is connected to the first end of the first inductor L1, and the second end of the first inductor L1 is connected to the ground terminal.

[0079] exist Figure 6In the first impedance adjustment unit 211, when the second capacitor C2 is included, the corresponding second impedance adjustment unit 212 includes a third inductor L3. When the signal amplification circuit 110 operates in high-power mode, the first switching switch S1 is closed and the second switching switch S2 is open, allowing the equivalent current of the signal transmitted through the first impedance node 10 to be transmitted to the second capacitor C2 and the first capacitor C1 through the third inductor L3. At this time, the second capacitor C2 is connected to ground through the first switching switch S1 and forms a closed loop. The first impedance node 10, the third inductor L3, the second capacitor C2, and the first switching switch S1 together form the first impedance branch. Here, the first impedance branch, together with the first capacitor C1, the first inductor L1, and the second impedance node 30, forms the first impedance matching circuit. That is, at this time, the third inductor L3, the second capacitor C2, the first capacitor C1, and the first inductor L1 are all conducting or participating in the circuit operation. Since the third inductor L3 and the second capacitor C2 in the impedance adjustment branch 21 also participate in the circuit operation, the impedance value of the first impedance node 10 is relatively small.

[0080] When the signal amplification circuit 110 operates in low-power mode, the first switch S1 is open, the second switch S2 is closed, the second capacitor C2 is disconnected, and the third inductor L3 is short-circuited. This prevents the second capacitor C2 from being connected to ground via the first switch S1, and the equivalent current of the signal transmitted by the first impedance node 10 flows through the second switch S2 to the first terminal of the first capacitor C1. At this time, the first impedance node 10 and the second switch S2 together form the second impedance branch. Here, the second impedance branch, together with the first capacitor C1, the first inductor L1, and the second impedance node 30, forms the second impedance matching circuit. That is, only the first capacitor C1 and the first inductor L1 are both conducting or participating in the circuit operation. Since the third inductor L3 and the second capacitor C2 in the impedance adjustment branch 21 do not participate in the circuit operation, the impedance value of the first impedance node 10 is the same as the impedance value of the first terminal of the first capacitor C1, and the impedance value of the first terminal of the first capacitor C1 is larger. Therefore, when the signal amplifier circuit 110 is operating in low power mode, by increasing the impedance value of the first impedance node 10, the phenomenon of gain expansion can be avoided, and the linearity of the signal amplifier circuit 110 at lower power consumption can be improved.

[0081] like Figure 7 As shown, a power amplifier 200 includes a signal amplification circuit 110 and an output matching circuit 100 as described in the above embodiment. The signal amplification circuit 110 and the output matching circuit 100 include a first impedance node 10, a second impedance node 30, and an impedance adjustable unit 20 disposed between the first impedance node and the second impedance node. The output terminal of the signal amplification circuit 110 is connected to the first impedance node 10 of the output matching circuit 100.

[0082] The impedance adjustable unit 20 is configured to adjust the impedance of the first impedance node 10 to a first impedance value when the signal amplification circuit 110 is operating in a high-power mode; and to adjust the impedance of the first impedance node 10 to a second impedance value when the signal amplification circuit 110 is operating in a low-power mode, wherein the first impedance value is less than the second impedance value.

[0083] It should be noted that the output matching circuit 100 is used to achieve impedance matching between the signal amplification circuit 110 and the signal output circuit 120. Figure 1 In the output matching circuit 100, the impedance adjustable unit 20 is coupled between the first impedance node 10 and the second impedance node 30. The first impedance node 10 is connected to the output terminal 111 of the signal amplification circuit 110, allowing the signal amplification circuit 110 to amplify the radio frequency signal to obtain an amplified radio frequency signal. This amplified signal is then transmitted to the output matching circuit 100 via the first impedance node 10, and then to the signal output circuit 120 via the output matching circuit 100. Here, the signal output circuit 120 can be an output circuit for the amplified radio frequency signal, such as an antenna circuit or an antenna combination circuit.

[0084] In all embodiments of this application, when the signal output circuit 120 connected to the output matching circuit 100 remains unchanged, during the joint operation of the signal amplification circuit 110 and the output matching circuit 100, it is generally necessary to meet the 50-ohm impedance matching requirement at the output terminal of the output matching circuit 100. That is, the impedance value at the node connecting the output matching circuit 100 and the signal output circuit 120 is a fixed constant, i.e., the impedance value of the second impedance node 30 is a fixed constant (50 ohms). Based on this, in order to ensure that the impedance value requirement of the second impedance node 30 is met, and at the same time to avoid the phenomenon of gain expansion when the signal amplification circuit 110 operates in low power mode, the impedance adjustable unit 20 is configured to form a corresponding impedance matching circuit with the first impedance node 10 and the second impedance node 30 according to the power mode of the signal amplification circuit 110. Here, the structure of the impedance matching circuit formed when the signal amplification circuit 110 operates in different power modes is also different. Since the impedance value of the second impedance node 30 is a fixed constant, the difference between different impedance matching circuits lies in the impedance value of the first impedance node 10.

[0085] Specifically, when the signal amplification circuit 110 operates in high-power mode, the impedance adjustable unit 20, together with the first impedance node 10 and the second impedance node 30, forms a first impedance matching circuit, in which the impedance value of the first impedance node 10 is Z1; when the signal amplification circuit 110 operates in low-power mode, the impedance adjustable unit 20, together with the first impedance node 10 and the second impedance node 30, forms a second impedance matching circuit, in which the impedance value of the first impedance node 10 is Z1', and Z1 < Z1'. Here, when the signal amplifier circuit 110 is operating in low power mode, in the second impedance matching circuit formed by the impedance adjustable unit 20, the impedance value Z1' of the first impedance node 10 is larger than the impedance value Z1 of the first impedance node 10 in the first impedance matching circuit when the signal amplifier circuit 110 is operating in high power mode. This allows the gain of the signal amplifier circuit 110 to decrease as the impedance value of the first impedance node 10 increases, thereby avoiding the phenomenon of gain expansion when the signal amplifier circuit 110 is operating in low power mode.

[0086] For example, in a specific implementation, the impedance adjustable unit 20 can be composed of multiple sets of impedance branches and multiple sets of switching branches. When the signal amplification circuit 110 is working in different power modes, the multiple sets of impedance branches are combined by controlling the on and off of the multiple sets of switching branches, and then combined with the first impedance node 10 and the second impedance node 30 to form a first impedance matching circuit or a second impedance matching circuit.

[0087] In conjunction with the previous example, in specific implementation, in order to ensure that the impedance value of the second impedance node 30 can meet the impedance matching requirements, the impedance adjustable unit 20 may also include an inherent impedance branch. When the signal amplification circuit 110 is operating in different power modes, by controlling the on and off of multiple sets of switching branches, multiple sets of impedance branches are combined to form impedance branches with different impedance values, which then form a target impedance circuit with the inherent impedance branch. Finally, together with the first impedance node 10 and the second impedance node 30, a first impedance matching circuit or a second impedance matching circuit is formed.

[0088] It is understandable that the impedance adjustable unit 20, based on the power mode of the signal amplifier circuit 110, combines with the first impedance node 10 and the second impedance node 30 to form different impedance matching circuits. Since the impedance values ​​of the first impedance node 10 are different between the different impedance matching circuits, the impedance adjustable unit 20 is equivalent to adjusting or adapting the impedance value of the first impedance node 10 according to the power mode of the signal amplifier circuit 110. This allows the first and second impedance matching circuits to meet the impedance matching requirements of the signal amplifier circuit 110 when it operates in different power modes. Furthermore, when the signal amplifier circuit 110 operates in a low-power mode, by increasing the impedance value of the first impedance node 10, the gain of the signal amplifier circuit 110 decreases as the impedance value of the first impedance node 10 increases. This achieves appropriate compression of the gain of the RF amplified signal, thereby improving the linearity of the signal amplifier circuit 110 at lower power consumption.

[0089] In the above scheme, the output matching circuit is coupled to the output terminal of the signal amplifier circuit. This output matching circuit includes a first impedance node, an adjustable impedance unit, and a second impedance node. Since the first impedance node is connected to the output terminal of the signal amplifier circuit, it can receive the RF amplified signal output by the signal amplifier circuit. The adjustable impedance unit forms a first impedance matching circuit with the first and second impedance nodes when the signal amplifier circuit operates in high-power mode, and a second impedance matching circuit with the first and second impedance nodes when the signal amplifier circuit operates in low-power mode. This achieves adaptation of different impedance matching circuits according to different operating modes of the signal amplifier circuit. Simultaneously, it ensures that the first impedance value of the first impedance node in the first impedance matching circuit is smaller than the second impedance value of the first impedance node in the second impedance matching circuit. This allows the first impedance node to have a smaller first impedance value when the signal amplifier circuit operates in high-power mode, ensuring the gain of the signal amplification circuit. Conversely, it allows the first impedance node to have a larger second impedance value when the signal amplifier circuit operates in low-power mode, avoiding gain expansion and improving the linearity of the signal amplifier circuit at lower power consumption.

[0090] like Figure 8 As shown, a radio frequency front-end module 300 includes the output matching circuit 100 in the above embodiments, or includes the power amplifier 200 in the above embodiments.

[0091] It is understood that since the power amplifier 200 and the radio frequency front-end module 300 provided in this embodiment have been described in detail above, the relevant content and implementation methods of this application will not be repeated here.

[0092] The units in the terminal of this application embodiment can be merged, divided, and deleted according to actual needs.

[0093] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An output matching circuit, characterized in that, Coupled to the output of the signal amplification circuit; the output matching circuit includes: a first impedance node, an impedance adjustable unit, and a second impedance node; The first impedance node is configured to be connected to the output terminal of the signal amplification circuit for receiving the radio frequency amplified signal output by the signal amplification circuit; The impedance adjustable unit is configured to form a first impedance matching circuit with the first impedance node and the second impedance node when the signal amplification circuit is operating in high power mode, and to form a second impedance matching circuit with the first impedance node and the second impedance node when the signal amplification circuit is operating in low power mode. The first impedance value of the first impedance node in the first impedance matching circuit is less than the second impedance value of the first impedance node in the second impedance matching circuit. The impedance adjustable unit includes an adjustable impedance branch and a fixed impedance branch. The first end of the adjustable impedance branch is connected to the first impedance node, the second end of the adjustable impedance branch is connected to the first end of the fixed impedance branch, and the second end of the fixed impedance branch is connected to the second impedance node. When the signal amplification circuit operates in high power mode, the impedance value of the first impedance node in the first impedance matching circuit is less than the impedance value of the first end of the fixed impedance branch. When the signal amplification circuit operates in low-power mode, the impedance value of the first impedance node in the second impedance matching circuit is the same as the impedance value of the first end of the fixed impedance branch.

2. The output matching circuit according to claim 1, characterized in that: The adjustable impedance branch is configured to form a first impedance branch with the first impedance node when the signal amplification circuit is operating in high power mode, and to form a second impedance branch with the first impedance node when the signal amplification circuit is operating in low power mode. The fixed impedance branch is configured such that, when the signal amplification circuit operates in high power mode, it forms a first impedance matching circuit together with the first impedance branch and the second impedance node, and when the signal amplification circuit operates in low power mode, it forms a second impedance matching circuit together with the second impedance branch and the second impedance node.

3. The output matching circuit according to claim 2, characterized in that, The fixed impedance branch includes a first capacitor and a first inductor; The first terminal of the first capacitor serves as the first terminal of the fixed impedance branch and is connected to the adjustable impedance branch. The second terminal of the first capacitor is connected to the first terminal of the first inductor, and the second terminal of the first inductor is connected to the ground terminal. Alternatively, the first end of the first inductor is connected to the first end of the fixed impedance branch and the adjustable impedance branch, the second end of the first inductor is connected to the first end of the first capacitor, and the second end of the first capacitor is connected to the ground terminal.

4. The output matching circuit according to claim 3, characterized in that, The adjustable impedance branch includes a first impedance adjustment unit and a first switching switch. The first end of the first impedance adjustment unit is connected to the first end of the fixed impedance branch, the second end of the first impedance adjustment unit is connected to the first end of the first switching switch, and the second end of the first switching switch is grounded. Specifically, when the signal amplification circuit operates in high-power mode, the first switching switch is closed; when the signal amplification circuit operates in low-power mode, the first switching switch is open.

5. The output matching circuit according to claim 4, characterized in that, The first impedance adjustment unit includes a second inductor or a second capacitor.

6. The output matching circuit according to claim 4, characterized in that, The adjustable impedance branch further includes a second impedance adjustment unit and a second switching switch. The first end of the second impedance adjustment unit is connected to the first impedance node, the second end of the second impedance adjustment unit is connected to the first end of the fixed impedance branch, the first end of the second switching switch is connected to the first end of the second impedance adjustment unit, and the second end of the second switching switch is connected to the second end of the second impedance adjustment unit.

7. The output matching circuit according to claim 6, characterized in that, When the signal amplification circuit operates in high power mode, the second switching switch is open; when the signal amplification circuit operates in low power mode, the second switching switch is closed.

8. The output matching circuit according to claim 6, characterized in that, The second impedance adjustment unit includes a third capacitor or a third inductor.

9. A power amplifier, characterized in that, include: The signal amplification circuit and the output matching circuit are provided. The output matching circuit includes a first impedance node, a second impedance node, and an impedance adjustable unit disposed between the first impedance node and the second impedance node. The output terminal of the signal amplification circuit is connected to the first impedance node of the output matching circuit. The impedance adjustable unit is configured to adjust the impedance of the first impedance node to a first impedance value when the signal amplification circuit is operating in high power mode; and to adjust the impedance of the first impedance node to a second impedance value when the signal amplification circuit is operating in low power mode, wherein the first impedance value is less than the second impedance value. The impedance adjustable unit includes an adjustable impedance branch and a fixed impedance branch. The first end of the adjustable impedance branch is connected to the first impedance node, the second end of the adjustable impedance branch is connected to the first end of the fixed impedance branch, and the second end of the fixed impedance branch is connected to the second impedance node. When the signal amplification circuit operates in high power mode, the impedance value of the first impedance node in the first impedance matching circuit is less than the impedance value of the first end of the fixed impedance branch. When the signal amplification circuit operates in low-power mode, the impedance value of the first impedance node in the second impedance matching circuit is the same as the impedance value of the first end of the fixed impedance branch.

10. A radio frequency front-end module, characterized in that, The radio frequency front-end module includes the output matching circuit according to any one of claims 1-8, or includes the power amplifier according to claim 9.

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