A method for automatically generating a fault tree
By using FMEA analysis and knowledge graph technology, fault trees are generated and optimized, which solves the problem that existing fault tree generation methods cannot describe fault hierarchy and constraint relationships. Formal representation and parameter updates of fault trees are realized, thus improving fault repair efficiency.
Patent Information
- Application Number
- CN202111624684.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-28
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2041-12-28
AI Technical Summary
Existing fault tree generation methods cannot effectively describe the hierarchical relationship of faults and the constraint relationship between faults. They lack formal representation, cannot quantify the probability and importance of faults, and the generated fault trees lack knowledge update capabilities.
FMEA analysis is used to establish the physical connections and logical relationships between components, generate dynamic functional processes, construct fault propagation paths and generate fault trees, formally represent fault trees using knowledge graphs, and map them to Bayesian networks for parameter updates.
It realizes the transformation from design knowledge to diagnostic knowledge, generates a formalized fault tree, provides a basis for fault repair decisions, and improves fault repair efficiency.
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Figure CN114281590B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of data processing, and in particular, to an automatic generation method of a fault tree. BACKGROUND
[0002] Fault tree is equivalent to incident tree, which is a special inverted tree-shaped logic causal diagram. With the increasing scale and complexity of the studied system, the traditional manual establishment method of fault tree is no longer applicable, and model-based fault tree generation method and feature configuration-based fault tree generation method are born. Among them, the model-based fault tree generation method is based on a formal model with strict semantics, and the analysis efficiency and accuracy are improved through model detection and other automatic analysis technologies. For example, the Chinese patent application with the publication number CN111709133A "System safety evaluation method based on model fault tree automatic generation" is a model-based fault tree generation method, and its technical solution is shown in the following figure. AltaRica model is established according to system function requirements, and is flattened into semantic model guardian conversion system (GTS) model. The GTS model is divided into one or more independent GTS and independent assertions, the reachability graph of each independent GTS is generated, the reachability graph is compiled to generate a Boolean formula, and finally the fault tree is generated by assertion propagation.
[0003] The feature configuration-based fault tree generation method introduces variability modeling into the analysis process, uses feature models as structural models of system faults to describe the hierarchy and constraint relationship of faults, and generates a fault tree based on fault-labeled behavior models of the system. For example, the Chinese patent application with the publication number CN105426680A "Fault tree generation method based on feature configuration" mainly determines the fault features of system components, clarifies the constraint relationship between faults, establishes a fault feature model, and specifies fault configuration. The normal behavior model of the system is established, and the influence of fault events on the normal behavior of the system is clarified. The linear temporal logic is used to formally describe the safety requirements of the system. The model checker is used to verify the system model and analyze the output results to obtain the fault tree.
[0004] However, the above two fault tree generation methods in the prior art have the following problems:
[0005] 1. Although the model-based fault tree generation method provides a method for automatically generating a fault tree for a given top-level failure event, the main problem is that it is limited to the analysis of non-temporal safety properties, and cannot calculate all fault combinations for the top-level failure event. When modeling faults, it cannot describe the fault hierarchy relationship and the constraint relationship between faults.
[0006] 2. The fault tree generation method based on feature configuration lacks a formal representation of the relationship between the established components and fault features, the constraints between faults, and the generated fault tree, which is not conducive to the search for fault knowledge. It also lacks a way to quantitatively describe the fault tree, such as probability and importance, and the generation of the fault tree is a one-time process, lacking knowledge updates based on test data. Summary of the Invention
[0007] The purpose of this application is to solve at least one technical problem in existing fault tree generation methods, realize the transformation from design knowledge to diagnostic knowledge, thereby automatically generating fault trees based on FMEA, and formally representing fault trees using knowledge graph technology, and continuously improving them using machine learning, so as to provide decision-making basis for fault diagnosis and repair of complex systems.
[0008] The technical solution of this application is: to provide an automatic fault tree generation method, which includes: Step 1, establishing physical connection relationships and logical relationships between components based on the Bill of Materials (BOM) and FMEA structural analysis of the system to be analyzed; Step 2, establishing a first mapping relationship between the dynamic functions of each component and the components through FMEA functional analysis, and dividing the first mapping relationship based on different operating conditions of each component to generate the dynamic functional flow of each component; Step 3, constructing fault transmission paths based on the dynamic functional flow, and generating a fault tree based on the fault transmission paths.
[0009] In any of the above technical solutions, the dynamic function of the component further includes at least functional attributes, performance attributes, and environmental attributes.
[0010] In any of the above technical solutions, the dynamic functional flow further includes a second mapping relationship, which is the mapping between the functional attributes of each component and the component parameters. The component parameters are determined by the Bill of Materials (BOM) list of the system to be analyzed.
[0011] In any of the above technical solutions, step 2 further includes: step 21, based on the knowledge graph of component assembly relationships, treating each component as a component node, associating component dynamic functions under different working conditions with component nodes at each level, and treating each component dynamic function as a component function node; step 22, establishing a first mapping relationship between component nodes and component function nodes; step 23, dividing the first mapping relationship according to the functions between each component and the different working conditions of each component, and forming the dynamic function flow of each component by combining the input and output relationships between component function nodes.
[0012] In any of the technical solutions above, further, in step 3, the fault tree is generated based on the fault transmission path, specifically comprising: step 31, in the knowledge graph of the dynamic function flow, the system function failure mode event to be analyzed is taken as a top event node by searching and positioning, and the system function to be analyzed is taken as a top event function node; step 32, according to the fault transmission path, the top event node is taken as a current event node, and the top event function node is taken as a current function node, the input function of the current function node is searched reversely, the failure mode event of the input function is determined, the searched failure mode event is taken as a current event node, and the input function corresponding to the current event node is taken as a current function node for the next search; step 33, according to the logical gate connection type between the current event node and the current event node, a logical gate node is established, and the connection relationship between the current event node, the current event node and the logical gate node is determined; step 34, steps 32 and 33 are repeated until all input functions of the current function node are traversed, the current event node with the input function in the traversal process is recorded as an intermediate event node, the current event node without the input function in the traversal process is taken as a basic event node, and the connection relationship between the top event node, the intermediate event node and the basic event node is established through the logical gate node to generate the fault tree.
[0013] In any of the technical solutions above, further, in step 3, it further comprises: step 35, based on the fault tree, the fault event nodes in the fault tree are quantitatively analyzed and calculated, the event probability, importance and root cause analysis of the fault event nodes are calculated, wherein the fault event nodes comprise the top event node, the intermediate event node and the basic event node.
[0014] In any of the technical solutions above, further, the method further comprises: step 4, mapping the fault tree into a Bayesian network, and calculating the conditional probability of each Bayesian node in the Bayesian network; step 5, according to the conditional probability, updating the event probability of the fault event node in the fault tree.
[0015] In any of the technical solutions above, further, in step 4, the fault tree is mapped into a Bayesian network, specifically comprising: the fault event nodes in the fault tree are mapped into Bayesian nodes; according to the connection relationship between each fault tree event node in the fault tree according to the logical gate node, the directed arc connection between each Bayesian node in the Bayesian network is established, and the Bayesian network is generated by mapping.
[0016] The application has the advantages that: through the combination of FMEA (Failure Mode and Effects Analysis) and FTA (Fault Tree Analysis), the conversion of design knowledge to diagnosis knowledge is realized. On the basis of FMEA function analysis, the functions of the system and components to be analyzed under different working conditions are considered, the mapping relationship between the component dynamic function of each component and the component is established and divided, the dynamic function flow of each component is formed, the fault transmission path is determined, and through the knowledge graph form, the connection relationship between the top event node, the intermediate event node and the basic event node in the dynamic function flow is determined through reverse search, the preliminary automatic generation of the fault tree is realized. Then, the preliminary generated fault tree is mapped into the Bayesian network structure, and the Bayesian network parameters, i.e. the conditional probability of each Bayesian node, are learned and updated through sample data, so as to update the event probability of each fault event node in the preliminary generated fault tree, form the final fault tree, and provide a decision basis for the fault maintenance of the complex system and improve the efficiency of the fault maintenance. BRIEF DESCRIPTION OF DRAWINGS
[0017] The above and / or additional aspects of the application will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:
[0018] Figure 1 is a schematic diagram of a FMEA factor model of the prior art;
[0019] Figure 2 is a schematic flow chart of the automatic generation method of the fault tree according to an embodiment of the application;
[0020] Figure 3 is a schematic diagram of the component connection and component-function mapping relationship according to an embodiment of the application;
[0021] Figure 4 is a schematic diagram of the function flow and function-failure mapping relationship under a certain working condition according to an embodiment of the application;
[0022] Figure 5 is a schematic diagram of the fault tree structure according to an embodiment of the application;
[0023] Figure 6 is a schematic flow chart of the fault tree cut set search algorithm according to an embodiment of the application;
[0024] Figure 7 is a schematic flow chart of the fault tree minimum cut set search algorithm according to an embodiment of the application;
[0025] Figure 8 is a schematic flow chart of the top event occurrence probability disjoint algorithm according to an embodiment of the application. DETAILED DESCRIPTION
[0026] To better understand the above-mentioned objectives, features, and advantages of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in the embodiments of this application can be combined with each other.
[0027] In the following description, many specific details are set forth in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Therefore, the scope of protection of this application is not limited to the specific embodiments disclosed below.
[0028] like Figure 1 As shown, based on the analysis of FMEA elements and their interrelationships, this study investigates intelligent operation and maintenance knowledge maintenance, including components, functions, parameters, attributes, events, functional processes, and fault trees. Intelligent operation and maintenance knowledge is maintained in a topic-based manner, with relevant content mainly including component assembly relationships, functional process relationships, and fault trees. Based on the above research, as... Figure 2 As shown, the automatic fault tree generation method in this embodiment specifically includes the following steps:
[0029] Step 1: Based on the Bill of Materials (BOM) and FMEA structural analysis of the system to be analyzed, establish the physical and logical connections between components to enable structural analysis of the system.
[0030] Specifically, based on the Bill of Materials (BOM) of the system to be analyzed, Failure Mode and Effects Analysis (FMEA) is used to establish physical and logical connections between components (such as material exchange, energy transfer, and information exchange), analyze the interactions between components, and automatically generate parent-child relationships containing connection lines through component ID and parent ID, and establish connection relationships between components at the same level.
[0031] Based on the physical and logical connections between components, corresponding component parameters are defined and matched with the collected parameters. The established components and their relationships are defined as nodes and relationships in a knowledge graph, thereby realizing a formal representation of the physical structure and rapid search and location of components, laying the foundation for subsequent mining, analysis, construction, drawing, and display of fault knowledge and its interrelationships.
[0032] This example illustrates how to establish a directed graph of component structure relationships in a graph database. Each component is treated as a main node, with its label defined as "Component," and attributes such as ID, parent ID, number, and name defined. The containment relationship between parent and child components is defined, named "Containment," with the child component pointing to the parent component.
[0033] Step 2, based on the physical connection relationship and logical relationship generated by the structure analysis in step 1, establish the first mapping relationship between the component dynamic function of each component and the component through FMEA function analysis, and divide the first mapping relationship based on different working conditions of each component, generate the dynamic function flow of each component, to realize the function analysis of the system to be analyzed, wherein the component dynamic function at least includes function attribute, performance attribute and environment attribute.
[0034] Further, in order to describe the component dynamic function and the component in the dynamic function flow in detail, the second mapping relationship between the function attribute of each component and the component parameter is established through FMEA function analysis, wherein the component parameter is determined by the bill of materials (BOM) list of the system to be analyzed.
[0035] Specifically, taking the physical connection relationship and logical relationship between the components established in step 1 as input, and taking the establishment of the first mapping relationship and the second mapping relationship as processing, finally realizing the output of the dynamic function flow under different working conditions, wherein the first mapping relationship between the component and the component dynamic function is one-to-many, the system to be analyzed or the component has different component dynamic functions under different working conditions, and the dynamic functions have input-output transmission relationship.
[0036] Firstly, according to the different working conditions of each component in the system to be analyzed, the component dynamic function under different working conditions is introduced, the definition of function attribute, performance attribute and environment attribute is improved, and the first mapping relationship between the component dynamic function and the component and the second mapping relationship between the function attribute and the component parameter are established.
[0037] Then, according to the physical connection relationship between the components and the input-output transmission relationship between the component dynamic functions, the corresponding transmission flow between the component dynamic functions is established, and the different working conditions of each component are introduced, the first mapping relationship is divided, and the divided first mapping relationship is taken as the dynamic function flow;
[0038] Finally, taking the component as the node, the second mapping relationship is added to the dynamic function flow to describe the mapping relationship between the function attribute and the component parameter in each component.
[0039] By generating the dynamic function flow, the component dynamic function under different working conditions is represented in the form of flow, which can map the component parameters of the component under different working conditions to the input and output attributes of the component dynamic function.
[0040] The process formalization of the component dynamic function of the component under different working conditions can be understood as: when the system to be analyzed or its subsystem is in different working states, the function of each component under each working condition and the input-output relationship between the functions form a function flow.
[0041] And the dynamic function flow can be divided into function sub-flow according to the corresponding component level. Through the knowledge graph, the dynamic function flow of each component is generated by formalizing the dynamic function flow of each component.
[0042] Step 21, based on the knowledge graph of component assembly relationship, each component is taken as a component node, the dynamic function of each component under different working conditions is associated with each component node, and each dynamic function of the component is taken as a component function node. The label of the component function node is defined as "position function", which represents the definition name, number, description and other attribute information of the component function node. The knowledge graph of component assembly relationship is determined by intelligent operation and maintenance knowledge.
[0043] Step 22, the first mapping relationship between the component node and the component function node is established, and the relationship name is defined as "configuration and function". The first mapping relationship is from the component node to the component function node.
[0044] Step 23, according to the function between each component and the different working conditions of each component, the first mapping relationship is divided, and the input and output relationship between the component function nodes is combined to form the dynamic function flow of each component. The relationship name between the component function nodes is defined as "function flow", and the relationship direction is from the output node to the input node.
[0045] As shown in Figure 3 , the box represents the component, the circle represents the function contained in the component, the thick solid line arrow represents the connection relationship between the components, and the thin curve arrow connecting each function represents the function flow under a certain working condition.
[0046] Step 3, automatic generation of fault tree. Mainly according to the dynamic function flow generated by the function analysis in step 2, the fault transmission path is constructed, and the fault tree is generated based on the fault transmission path.
[0047] Specifically, through the FMEA structure analysis and FMEA function analysis of the previous two steps, the fault transmission path of each component is determined according to the physical connection relationship, logical relationship and dynamic function flow of each component, and the fault tree is generated based on the fault transmission path.
[0048] In this embodiment, based on the FMEA function analysis, the failure mode analysis is carried out, the failure (fault) mode of each function is established, the fault reason and fault influence of each failure mode are analyzed and established, and the fault influence of the upper level is taken as the fault reason of the lower level, thereby forming the mapping from function to failure mode, and the mapping from failure mode to fault reason and fault influence.
[0049] The fault transmission path is transmitted from the child component function to the parent component function according to the component function, for example, the failure of a component function causes the failure of the parent component or function, and finally causes the abnormality of the entire system function to be analyzed.
[0050] In the dynamic function flow, the component function node input of the sub-flow is input as the input of the parent flow, and the output of the sub-flow is output as the output of the parent flow node during transmission along the direction of function flow execution, therefore, the fault path is transmitted from the sub-flow to the parent flow node. According to the opposite direction of the fault transmission path, the abnormality of the system function to be analyzed is taken as the starting point, and the fault transmission path is decomposed layer by layer downward until the root cause that may cause the abnormality of the system function to be analyzed is decomposed, and the decomposed fault transmission path is composed into a fault tree.
[0051] Step 31, in the knowledge graph of the dynamic function flow, the failure mode event of the system function to be analyzed is taken as a top event node by searching and positioning, and the system function to be analyzed is taken as a top event function node.
[0052] Specifically, in the knowledge graph of the dynamic function flow, the failure mode event of the system function to be analyzed is taken as a top event node by searching and positioning, and the failure mode event of the system function to be analyzed is taken as a top event function node. A layer-by-layer search is performed to search for the intermediate event node and the basic event node that may cause the top event. In the search process, the top event node is taken as an initial current event node, and the system function to be analyzed is taken as an initial current function node, and then a layer-by-layer search is started until the search is completed.
[0053] Step 32, according to the fault transmission path, the top event node is taken as a current event node, and the top event function node is taken as a current function node, the input function of the current function node is searched in reverse, so as to search and determine the failure mode event of the input function, the searched failure mode event is taken as a current event node, and the input function corresponding to the current event node is taken as a current function node for the next search.
[0054] Step 33, according to the logical gate connection type between the current event node and the current event node, a logical gate node is established, and the connection relationship between the current event node, the current event node and the established logical gate node is determined.
[0055] Specifically, the current event node in the embodiment is a fault result event in the current cycle step, which is an output event of the logical gate; the current event node is a fault cause event node, which is an input event of the logical gate, and the two types of events are connected with the logical gate, thereby establishing the influence relationship.
[0056] Step 34, repeat step 32 and step 33 until all input functions of the current function node are traversed, record the event nodes with input functions in the traversal process as intermediate event nodes, and record the event nodes without input functions in the traversal process as basic event nodes, so as to realize the decomposition from the top event of the fault tree to the basic event, and establish the connection relationship among the top event node, the intermediate event node and the basic event node through the logic gate node, thereby realizing the automatic generation of the fault tree.
[0057] The partial fault tree generation process of the embodiment is shown in Figure 4 As shown in the figure, on the basis of the dynamic function flow, the failure modes of each function and the corresponding fault events are constructed, the fault events are related according to the reverse direction of the fault transmission path, and the fault tree is formed. The fault tree structure is shown in Figure 5 As shown in the figure, the event 1 at the top is the top event; the thick dashed line without connecting input logic gate, such as events 8, 13, 14, 15, 16 and 17, is the basic event; and the other events except the top event and the basic event are the intermediate events.
[0058] On the basis of the dynamic function flow knowledge graph, the fault event nodes are established, and the relationships among the fault event nodes, the relationships between the fault event nodes and the component function nodes, and the relationships between the fault event nodes are established. Among them, the label of the fault event node is defined as "fault event", which contains attribute information such as corresponding name, number and fault duration; the relationship name between the fault event node and the component function node is defined as "function event", and the direction of the relationship is from the component function node to the fault event node; the relationship name between the fault event nodes is defined as "fault influence relationship", and the direction of the relationship is from the fault result event to the fault cause event, wherein the fault event node includes the top event node, the intermediate event node and the basic event node.
[0059] Up to now, the fault tree is generated through FMEA analysis, and the transformation from design knowledge to diagnosis knowledge is realized. However, the fault tree obtained in this way depends on the experience of the designer, and is a qualitative product. It is necessary to perform quantitative analysis on the fault tree on this basis to provide strong data basis for the positioning of the fault cause and the troubleshooting of the system to be analyzed.
[0060] In this embodiment, the fault tree quantitative analysis includes event probability calculation, importance calculation, root cause analysis and the like.
[0061] In this embodiment, the method for quantitative analysis and calculation of the fault tree specifically includes: first, based on the fault tree, the corresponding fault event node is located through a corresponding search algorithm; then, quantitative analysis is performed according to the attribute values of the fault event node; finally, the results of the quantitative analysis are bound to the fault event nodes of the fault tree through attribute definition.
[0062] Specifically, the quantitative analysis calculation of fault trees includes at least: the calculation of the probability of the top event, the calculation of importance, and the calculation of root cause analysis. The probability of the top event can be quantitatively calculated through the minimum cut set. The specific steps can be divided into determining the cut set, determining the minimum cut set based on the cut set, and calculating the probability of the top event based on the minimum cut set and the disjointness algorithm.
[0063] like Figure 6 As shown, in the process of implementing fault tree cut set search in this embodiment, firstly, for any given top event, the input gate node is searched according to the direction of the directed graph, and the logic gate type of the input gate node is determined.
[0064] When the logic gate type is determined to be "AND gate", the sub-(input) event set of that gate node is obtained, and the AND gate logic is input into that event set. The elements are arranged in a row to determine the subset of events in the set. When the logic gate type is determined to be "OR gate", the sub-(input) event set of that gate node is obtained, and the OR gate logic is input into that event set. The elements are arranged in a column to determine the subset of events in the set. If no logic gate is determined, the fault tree cut set search algorithm ends.
[0065] Next, obtain the next input gate node and determine whether the input event is connected to an input logic gate. If so, determine the type of the logic gate connected to the input logic gate. Otherwise, take the event set of the last column of each row as a cut set. There can be multiple cut sets for the top event.
[0066] like Figure 7 As shown, when there are multiple cut sets in the fault tree, a search algorithm can be used to search for the minimum cut set. The specific process of this search algorithm includes:
[0067] Determine whether there is an inclusion relationship between multiple cut sets. If not, the searched cut set is taken as the minimum cut set. If there is an inclusion relationship, exclude the basic event set that contains other cut sets, and take the excluded set as the minimum cut set.
[0068] It should be noted that there can be one or more minimal cut sets.
[0069] like Figure 8 As shown, in the process of calculating the probability of the top event, the following definition is first made: count the number of the minimum cut sets and define its number as n. Set the index of the current cut set as i = 0, 1, ..., n-1. If the index of the cut set is i = 0, it means that the cut set is the first cut set and there are no cut sets before it. At this time, the probability of the top event is P(T) = 0. Define the variable P(Z) = 1 and let i = 1.
[0070] Based on the current cut set index, a loop algorithm is used to perform the following calculations sequentially:
[0071] 1) Calculate the non-event probability of the i-1th minimal cut set and update the definition variable P(Z), and the corresponding calculation formula is:
[0072]
[0073]
[0074] wherein, P(K i-1 ) is the fault probability of the i-1th minimal cut set, i = 0, 1, …, n-1;
[0075] 2) Calculate the fault probability P(J i ) of the i-th minimal cut set, which takes the value of all containing the probability product of each bottom event;
[0076] 3) The top event occurrence probability P(T) = P(T) + P(Z) * P(K i ), i = 0, 1, …, n-1;
[0077] 4) Let i = i + 1, judge whether i < n is satisfied. If satisfied, repeat steps 1 to 3; if not satisfied, output the current P(T), which is the top event occurrence probability.
[0078] The importance in the embodiment includes probability importance, structural importance and key importance, wherein the calculation method of the probability importance is the partial derivative of the top event occurrence probability to the bottom event occurrence probability. The structural importance refers to the reliability distribution of the component in the system to be analyzed, which is only related to the position of the component in the system to be analyzed, and is independent of the probability of the component itself. The key importance is defined as the change degree of the change rate of the bottom event occurrence probability to the change rate of the top event occurrence probability, which can be calculated by the probability importance and the structural importance.
[0079] The importance is not only used for the reliability distribution of the system to be analyzed, but also used for the optimization design of the system to be analyzed, and is more used for the maintenance of the system to be analyzed, so the importance analysis can evaluate the contribution of each bottom event to the failure of the system to be analyzed from different angles.
[0080] In the embodiment, the root cause analysis includes single event root cause analysis and multi-event root cause analysis, wherein the single event root cause analysis is that when the top event occurs, the possible bottom events can be sorted according to the probability according to the existing fault tree and the probability of each event of the fault tree.
[0081] And the multi-event root cause analysis refers to that according to the sequence of a series of alarms occurring in a period of time, the root cause analysis is repeatedly performed, and the Bayesian method is iteratively used to strengthen the certainty of the root cause.
[0082] In addition, if the alarms occurring continuously in a time window can be combined into a group in a fault tree, the continuously occurring alarm events can be monitored, and a minimal cut set is provided for an alarm or multiple continuous alarms, and a list is provided in probability order.
[0083] On the basis of the above-mentioned embodiment, the embodiment further proposes a fault tree optimization method, which uses the fault tree structure and quantitative description generated by the above-mentioned process as mechanism prior knowledge, and uses test data as posterior data, so as to constantly improve the knowledge solidified by the mechanism, and update the event probability of the fault event nodes in the fault tree. The event probability updating process specifically includes:
[0084] Step 4, mapping the fault tree into a Bayesian network, and calculating the conditional probability of each Bayesian node in the Bayesian network. When mapping the fault tree into the Bayesian network, first, the fault event nodes in the fault tree are mapped into Bayesian nodes; second, according to the connection relationship between each fault tree event node in the fault tree according to the logical gate node, the directed arc connection between each Bayesian node in the Bayesian network is established, and the Bayesian network is generated by mapping.
[0085] Specifically, in the process of constructing the Bayesian network structure of the fault tree, according to the main mapping relationship of the fault tree and the Bayesian network: fault tree event node-Bayesian node, logical gate node-Bayesian network connection strength.
[0086] In the embodiment, for each fault tree event node in the fault tree, a corresponding node is established in the Bayesian network, and according to the connection relationship between each fault tree event node in the fault tree according to the logical gate node, the directed arc connection between each Bayesian node in the Bayesian network is established, so as to convert the fault tree into the Bayesian network structure, and generate the Bayesian network by mapping.
[0087] Based on the generated Bayesian network, Bayesian network parameter learning is performed, that is, the conditional probability table of each node in the Bayesian network structure is updated.
[0088] In the embodiment, the connection strength of the directed arc between nodes is represented by the conditional probability. When the occurrence of a reason node leads to the generation of a result, it is a probability expression, not a certainty, so a conditional probability needs to be added to each node. The probability set of a node taking different attribute values under different value combinations of its parent nodes (direct reason nodes) constitutes the conditional probability table of the node. The conditional probability table is composed of conditional probabilities, and the calculation of the conditional probability is obtained by sample data statistics.
[0089] The sample data is a state set of whether each event occurs. Specifically, in the sample data, the ratio of the occurrence times of the basic event to the sum of the occurrence times and the non-occurrence times is taken as the event occurrence probability, the non-occurrence probability of the basic event is 1, and the occurrence probability and the non-occurrence probability of the basic event constitute the conditional probability table of the node corresponding to the basic event. The basic event node is the parent node of the intermediate event, and the probability set constituted by whether the intermediate node event occurs under the condition of whether the two parent node events occur constitutes the conditional probability table of the intermediate node.
[0090] By analogy, the conditional probability table of all nodes in the Bayesian network structure can be obtained, that is, the Bayesian network parameters are obtained. With the enrichment of the sample data, the Bayesian network parameters are updated and gradually tend to be accurate.
[0091] Step 5: updating the event probability of the fault event node in the fault tree according to the conditional probability.
[0092] In this embodiment, through the Bayesian network structure and parameters, not only the results of the descendants can be deduced from the ancestors, but also the probabilities of various states of the ancestors can be deduced from the evidence nodes among the descendants. Through the updating of the parameters, the updating of the state probabilities of each node can be synchronized.
[0093] Specifically, if the occurrence probability of the ancestor node (basic event) is known, it is taken as the prior probability, the Bayesian network parameters are the conditional probability, the posterior probability, that is, the occurrence probability of the child node, that is, the top event probability, is obtained by solving the Bayesian formula.
[0094] On the contrary, if the probability of the child node is known, it is taken as the posterior probability, the Bayesian network parameters are the conditional probability, and the prior probability, that is, the occurrence probability of the ancestor node, is obtained by calculating the Bayesian formula.
[0095] Therefore, through the updated Bayesian network parameters (conditional probability table), the updating of the probabilities of each node is realized, that is, the updating of the event probability of each fault event node in the fault tree is realized.
[0096] From this, the whole process of the automatic generation and optimization of the reliability analysis method of the fault tree is formed.
[0097] The technical scheme of the present application is described in detail above in combination with the drawings. The present application provides a fault tree automatic generation method, which comprises the following steps: step 1, establishing the physical connection relationship and the logical relationship between components according to the bill of materials (BOM) list and FMEA structure analysis of a system to be analyzed; step 2, establishing the first mapping relationship between the component dynamic function and the component through FMEA function analysis, and dividing the first mapping relationship based on different working conditions of each component to generate the dynamic function flow of each component; and step 3, constructing a fault transmission path according to the dynamic function flow, and generating a fault tree based on the fault transmission path. Through the technical scheme in the present application, the fault tree is automatically generated according to FMEA analysis, and the fault tree is formally represented by using knowledge graph technology, so that a decision basis can be provided for fault maintenance of a complex system.
[0098] The steps in the present application can be adjusted in sequence, combined and reduced according to actual needs.
[0099] The units in the device in the present application can be combined, divided and reduced according to actual needs.
[0100] Although the present application is disclosed in detail with reference to the drawings, it should be understood that the description is only exemplary and is not intended to limit the application of the present application. The protection scope of the present application is defined by the appended claims, and can include various modifications, improvements and equivalent schemes made to the application without departing from the protection scope and spirit of the present application.
Claims
1. A method for automatically generating a fault tree, characterized by, The method comprises: Step 1, according to the bill of materials (BOM) list and FMEA structure analysis of the system to be analyzed, establishing the physical connection relationship and logical relationship between components; Step 2, establishing the first mapping relationship between the component dynamic function of each component and the component based on the FMEA function analysis, and dividing the first mapping relationship based on different working conditions of each component to generate the dynamic function flow of each component; Step 3, constructing a fault transmission path according to the dynamic function flow, and generating a fault tree based on the fault transmission path; The step 2 specifically comprises: Step 21, on the basis of the knowledge graph of the component assembly relationship, taking each component as a component node, associating the component dynamic function under different working conditions for each level of component node, and taking each component dynamic function as a component function node; Step 22, establishing the first mapping relationship between the component node and the component function node; Step 23, according to the function between each component and the different working conditions of each component, dividing the first mapping relationship, combining the input-output relationship between the component function nodes, and forming the dynamic function flow of each component.
2. The method of claim 1, wherein, The component dynamic function at least includes functional attributes, performance attributes, and environmental attributes.
3. The method of claim 2, wherein, The dynamic function flow further includes a second mapping relationship, which is a mapping between the functional attributes of each component and component parameters, and the component parameters are determined by the bill of materials (BOM) list of the system to be analyzed.
4. The method of claim 1, wherein, In the step 3, the fault tree is generated based on the fault transmission path, specifically comprising: Step 31, in the knowledge graph of the dynamic function flow, the function failure mode event of the system to be analyzed is taken as a top event node, and the function of the system to be analyzed is taken as a top event function node through search positioning; Step 32, according to the fault transmission path, taking the top event node as a current event node and the top event function node as a current function node, searching the input function of the current function node in reverse, determining the failure mode event of the input function, taking the searched failure mode event as a current event node, and taking the input function corresponding to the current event node as the current function node for the next search; Step 33, according to the logical gate connection type between the current event node and the current event node, establishing a logical gate node, and determining the connection relationship between the current event node, the current event node and the logical gate node; Step 34, repeating the step 32 and the step 33 until all input functions of the current function node are traversed, recording the current event nodes with input functions in the traversal process as intermediate event nodes, recording the current event nodes without input functions in the traversal process as basic event nodes, and establishing the connection relationship between the top event node, the intermediate event node and the basic event node through the logical gate node to generate the fault tree.
5. The automatic fault tree generation method as described in claim 4, characterized in that, The step 3 further comprises: Step 35, based on the fault tree, performing quantitative analysis calculation on the fault event nodes in the fault tree to calculate the event probability, importance, and root cause analysis of the fault event nodes, wherein the fault event nodes include the top event node, the intermediate event node, and the basic event node.
6. The method of claim 5, wherein, The method further comprises: Step 4, mapping the fault tree into a Bayesian network and calculating the conditional probability of each Bayesian node in the Bayesian network; Step 5, updating the event probability of the fault event nodes in the fault tree according to the conditional probability.
7. The automatic fault tree generation method as described in claim 6, characterized in that, In the step 4, the fault tree is mapped into a Bayesian network, specifically comprising: mapping the fault event nodes in the fault tree into Bayesian nodes; establishing the directed arc connection between each Bayesian node in the Bayesian network according to the connection relationship between each fault tree event node in the fault tree according to the logical gate node, and mapping to generate the Bayesian network.
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