A two-dimensional reconfigurable Doherty power amplifier

Abstract

A two-dimensional reconfigurable Doherty power amplifier, having both frequency and average power reconfiguration functions, includes: an equal power divider, a main power amplifier frequency reconfigurable input matching network, a main power tube, a main power tube gate power supply terminal, a main power tube drain power supply terminal, a main power amplifier output harmonic control network, a main power amplifier output matching network, an auxiliary power amplifier frequency reconfigurable input matching network, an auxiliary power tube, an auxiliary power tube gate power supply terminal, an auxiliary power tube drain power supply terminal, an auxiliary power amplifier output harmonic control network, an auxiliary power amplifier output matching network, an input phase compensation line, an output phase compensation line, and a post-matching network. The present invention introduces frequency reconfiguration technology to overcome the problem of overly narrow bandwidth in traditional dual-band / multi-band power amplifiers, and changes the DC bias voltage of the main and auxiliary power tube drain power supply terminals to achieve average power reconfiguration, meeting the requirements of operating in multiple frequency bands and with different optimal output powers.

Description

Technical Field

[0001] The present invention relates to the technical field of power amplifiers, and in particular to a two-dimensional reconfigurable Doherty power amplifier with frequency reconfiguration and average power reconfiguration functions. Background Art

[0002] With the full deployment of 4G systems and the official commercialization of 5G, the types and frequencies of channels are constantly increasing, and communication systems of various standards will coexist for a long time. For communication base stations and smart terminals, achieving efficient communication in multi-band modes and concurrent signaling modes at different frequencies is becoming increasingly important. In addition, as application scenarios become more complex and diverse, the optimal output power required for signal transmission will also change. As a key component of the front end of wireless communication transmitters, the performance of power amplifiers in multi-band and multi-mode operation directly determines the multi-band signal processing capabilities of wireless communication systems. Therefore, it is necessary to develop a power amplifier that is compatible with multiple operating frequency bands and can meet high-performance operation at different output powers.

[0003] Currently, high-efficiency multi-frequency and multi-mode operation can be achieved through multi-band, ultra-wideband, and frequency reconfiguration technologies. Multi-band technology allows for simultaneous operation of multiple frequency bands, but suffers from complex circuit structures and narrow bandwidths in individual frequency bands. Ultra-wideband technology can fully expand bandwidth and boasts a simple structure, but this sacrifices other performance features and limits flexibility. Frequency reconfiguration technology enables dynamic matching networks, resulting in high flexibility and reliability. To address the new challenge of power amplifiers requiring high efficiency at varying output power levels, average power reconfiguration technology achieves variable output power by varying the supply voltage, offering high flexibility and configurability.

[0004] Doherty power amplifiers feature power back-off, ensuring high-efficiency operation at both saturated and back-off powers. Their structure is also easy to order and debug. However, traditional Doherty power amplifiers can only achieve optimal performance within a fixed operating frequency band and output power.

[0005] In summary, traditional design solutions all have their own shortcomings. Considering the current communication system's need to operate in multiple frequency bands and with high efficiency at different output power states, it is of great significance to design a two-dimensional reconfigurable Doherty power amplifier that operates in multiple frequency bands and multiple output power states. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a Doherty power amplifier and design steps that can realize frequency reconfiguration and average power reconfiguration.

[0007] The technical solutions adopted in the present invention are as follows:

[0008] A two-dimensional reconfigurable Doherty power amplifier comprises: a signal input terminal, a signal output terminal, an equal power divider, a main power amplifier, an auxiliary power amplifier, an input phase compensation line, an output phase compensation line, and a post-matching network. The main power amplifier comprises a main power amplifier frequency reconfigurable input matching network, a main power transistor, a main power transistor gate power supply terminal, a main power transistor drain power supply terminal, a main power amplifier output harmonic control network, and a main power amplifier output matching network, all connected in sequence. The auxiliary power amplifier comprises an auxiliary power amplifier frequency reconfigurable input matching network, an auxiliary power transistor, an auxiliary power transistor gate power supply terminal, an auxiliary power transistor drain power supply terminal, an auxiliary power amplifier output harmonic control network, and an auxiliary power amplifier output matching network, all connected in sequence. The signal input end is connected to the input end of the equal power divider, the two output ends of the equal power divider are respectively connected to the input phase compensation line and the auxiliary power amplifier frequency reconfigurable input matching network, the input phase compensation line is connected to the main power amplifier frequency reconfigurable input matching network, the main power tube gate and drain power supply ends are respectively connected to the main power amplifier frequency reconfigurable input matching network and the main power amplifier output harmonic control network, the auxiliary power tube gate and drain power supply ends are respectively connected to the auxiliary power amplifier frequency reconfigurable input matching network and the auxiliary power amplifier output harmonic control network, the auxiliary power amplifier output matching network is connected to the output phase compensation line, the main power amplifier output matching network and the output phase compensation line are combined and connected to the post-matching network, and the post-matching network is connected to the signal output end. The equal power divider and the post-matching network can both work normally in the reconfigurable working frequency band of the Doherty power amplifier.

[0009] The two-dimensional reconfigurable Doherty power amplifier (PDA) features both frequency and average power reconfiguration. Frequency reconfiguration technology achieves target fundamental impedance matching for different frequency bands by adjusting the DC bias voltage of the RF switches in the frequency-reconfigurable input matching networks of the main and auxiliary power amplifiers, thereby regulating the on / off switching of the switches.

[0010] Average power reconfigurable technology adjusts the DC bias voltage of the drain power supply terminal of the main power tube and the drain power supply terminal of the auxiliary power tube at the same time, thereby changing the static operating point of the power tube, so that it can work efficiently under different output power states. The calculation formula is as follows:

[0011] (1)

[0012] Among them, V ds,high 、V ds,lowThe DC bias voltages of the drain power supply terminal of the main power tube and the drain power supply terminal of the auxiliary power tube in high and low output power states, respectively, in V, P W,high and P W,low The values are high and low average output power, respectively, in W. Due to the characteristics of Doherty power amplifiers, after switching the DC bias voltages at the drain power supply terminals of the main and auxiliary power tubes, it is necessary to adjust the DC bias voltage at the gate power supply terminal of the auxiliary power tube to ensure that the auxiliary power amplifier starts operating at the appropriate start-up point.

[0013] The beneficial effects of the present invention are:

[0014] The present invention proposes a two-dimensional reconfigurable Doherty power amplifier with frequency reconfiguration and average power reconfiguration functions. By introducing frequency reconfiguration technology into the Doherty power amplifier, it can not only overcome the problem of narrow bandwidth of traditional dual-band / multi-band power amplifiers, but also reduce the interference of stray signals compared to broadband power amplifiers, and achieve better performance in two non-contiguous frequency bands. In addition, by introducing average power reconfiguration technology, the DC bias provided by the drain power supply terminals of the main and auxiliary power tubes is reduced, thereby better improving the efficiency of the Doherty power amplifier at low output power. The present invention can meet the application scenarios of operating in multiple frequency bands and at different optimal output powers. It is very suitable for the requirements of modern wireless communication systems for multi-mode compatibility and has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The figure is a schematic structural diagram of a two-dimensional reconfigurable Doherty power amplifier of the present invention.

[0016] Figure 2 Schematic diagram of the broadband load modulation network structure at the output end of the main power amplifier in the present invention.

[0017] Figure 3 This is a schematic diagram of the simulation structure of a two-dimensional reconfigurable Doherty power amplifier embodiment of the present invention.

[0018] Figure 4-1 Graph showing simulation results of drain efficiency / gain-output power of a Doherty power amplifier embodiment of the present invention (high output power state, 2.4-2.7 GHz & switch off).

[0019] Figure 4-2 Graph showing simulation results of drain efficiency / gain-output power of a Doherty power amplifier embodiment of the present invention (high output power state, 3.4-3.6 GHz & switch closed).

[0020] Figure 4-3Graph showing simulation results of drain efficiency / gain-output power for a Doherty power amplifier embodiment of the present invention (-3dB low output power state, 2.4-2.7 GHz & switch off).

[0021] Figure 4-4 Graph showing simulation results of drain efficiency / gain-output power of a Doherty power amplifier embodiment of the present invention (-3dB low output power state, 3.4-3.6GHz & switch closed).

[0022] Figure 4-5 1 and 2 are curves of a Doherty power amplifier embodiment of the present invention in a high output power state and a low output power state at a frequency of 2.5 GHz.

[0023] Figure 4-6 1 and 2 are curves of a Doherty power amplifier embodiment of the present invention in a high output power state and a low output power state at a frequency of 3.5 GHz. DETAILED DESCRIPTION

[0024] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings.

[0025] A two-dimensional reconfigurable Doherty power amplifier of the present invention, such as Figure 1 As shown, it includes a signal input terminal 01, a signal output terminal 02, an equal power divider 03, a main power amplifier frequency-reconfigurable input matching network 04, a main power transistor 05, a main power transistor gate power supply terminal 06, a main power transistor drain power supply terminal 07, a main power amplifier output harmonic control network 08, a main power amplifier output matching network 09, an auxiliary power amplifier frequency-reconfigurable input matching network 10, an auxiliary power transistor 11, an auxiliary power transistor gate power supply terminal 12, an auxiliary power transistor drain power supply terminal 13, an auxiliary power amplifier output harmonic control network 14, an auxiliary power amplifier output matching network 15, an input phase compensation line 16, an output phase compensation line 17, and a post-matching network 18. The signal input terminal 01 and the signal output terminal 02 are connected to the microstrip line on the dielectric board via SMA RF signal adapters.

[0026] The main power amplifier comprises a frequency-reconfigurable input matching network 04, a main power transistor 05, a main power transistor gate supply terminal 06, a main power transistor drain supply terminal 07, a main power amplifier output harmonic control network 08, and a main power amplifier output matching network 09. The auxiliary power amplifier comprises a frequency-reconfigurable input matching network 10, an auxiliary power transistor 11, an auxiliary power transistor gate supply terminal 12, an auxiliary power transistor drain supply terminal 13, an auxiliary power amplifier output harmonic control network 14, and an auxiliary power amplifier output matching network 15. The connection point between the main power amplifier and the auxiliary power amplifier at the post-matching network 18 is called a combining point.

[0027] The equal power divider 03 adopts a broadband Wilkinson structure, and its operating bandwidth covers the reconfigurable operating frequency band of the Doherty power amplifier. Generally speaking, there are at least two reconfigurable operating frequency bands.

[0028] Both the main power amplifier frequency-reconfigurable input matching network 04 and the auxiliary power amplifier frequency-reconfigurable input matching network 10 employ a T-shaped structure, consisting of two series microstrip lines and two parallel microstrip lines. The two series microstrip lines are directly connected, while the two parallel microstrip lines are connected via an RF switch PIN diode, which is connected between the two series microstrip lines. Applying a DC bias voltage across the RF switch controls the on / off state of the RF switch, thereby achieving matching of the target fundamental impedance at different frequency bands.

[0029] The main power amplifier output harmonic control network 08 is used to match the second harmonic impedance of the main power amplifier within the reconfigurable operating frequency band. The auxiliary power amplifier output harmonic control network 14 is used to match the second harmonic impedance of the auxiliary power amplifier within the reconfigurable operating frequency band. This network uses one series microstrip line and two parallel microstrip lines. The calculation method can be found in relevant literature on passive matching.

[0030] The main power amplifier output matching network 09 and the auxiliary power amplifier output matching network 15 both adopt a T-type structure, comprising two sections of series microstrip lines and one section of parallel microstrip line, with the parallel microstrip line connected between the two ends of the series microstrip line. Figure 2 The figure shows a schematic diagram of the structure used in the main power tube 05, the main power amplifier output harmonic control network 08 and the main power amplifier output matching network 09 (since the structures of the auxiliary power tube 11, the auxiliary power amplifier output harmonic control network 14 and the auxiliary power amplifier output matching network 15 are consistent with the main power amplifier, they are not shown separately here). The function of the main power amplifier output matching network 09 is to make the whole including the power tube equivalent parasitic parameter model 20, the main power amplifier output harmonic control network 08 and the main power amplifier output matching network 09 in the figure present a broadband fundamental load modulation characteristic, that is, the broadband load modulation network 21 of the main power amplifier needs to realize R under saturation power. opt to R opt The matching of the main power amplifier and the broadband load modulation network 21 need to achieve 2R opt to R opt / 2 matching (here R optRefers to the target fundamental load impedance value of the equivalent current source port when the power tube operates in Class B state), and its operating frequency band needs to include all reconfigurable operating frequency bands. The auxiliary power tube 11, the auxiliary power amplifier output harmonic control network 14 and the auxiliary power amplifier output matching network 15 form a broadband fundamental impedance matching network. Unlike the broadband load modulation network 21 in the main power amplifier, this network only needs to ensure that the 2R opt to R opt / 2 matches.

[0031] The characteristic impedance of the input phase compensation line 16 is the output load value of the equal power divider (usually 50Ω), and the characteristic impedance of the output phase compensation line 17 is R opt The corresponding electrical length should be determined based on factors such as the operating frequency band, the phase difference between the main power amplifier branch and the auxiliary power amplifier branch.

[0032] The post-matching network 18 adopts a broadband matching network based on a step impedance transformation line. The working frequency band needs to include all reconfigurable working frequency bands to achieve the R opt / 2 to 50Ω matching.

[0033] The following is an introduction to the design method of the two-dimensional reconfigurable Doherty power amplifier of the present invention. First, a two-dimensional reconfigurable Doherty power amplifier with an operating frequency band of 2.4-2.7GHz and 3.4-3.6GHz and a 3dB difference between the high and low average output power states is selected as an embodiment. Among them, the main and auxiliary power tubes are both GaN HEMT devices CGH40010F produced by CREE, and the RF switch uses the PIN diode SMP1345_079LF produced by Skyworks. Rogers4350B dielectric board is selected, with a dielectric constant of 3.66 and a board thickness of 20mil (0.508mm). The design steps are as follows:

[0034] Step 1: Design the Auxiliary Power Amplifier

[0035] Step 1-1: First, determine the static operating point of the power tube, design a stable circuit, and obtain the required target impedance through source pull and load pull simulation. Since the auxiliary power amplifier operates in Class C mode, determine the gate-source voltage V under high output power (for this embodiment, the optimal output power of the power tube). gs.p.high =-6.6V, drain-source voltage V ds.p.high =28V. After calculation by the above formula (1), the gate-source voltage V in the low output power state, which is 3dB different from the high output power, is determined. gs.p.low =-5.8V, drain-source voltage V ds.p.low= 20 V. A suitable stabilization circuit is designed to ensure stable operation of the power tube under large-signal excitation. Source-pull and load-pull simulations are then performed on the auxiliary power tube with the stabilization circuit. The target input fundamental impedance, output fundamental impedance, and output second harmonic impedance at each frequency point in the reconfigurable frequency band are obtained under high and low output power conditions, respectively.

[0036] Step 1-2: Design the auxiliary power amplifier frequency reconfigurable input matching network 10. The specific method is: Based on the target input fundamental impedance of the 2.4-2.7GHz and 3.4-3.6GHz frequency bands in the high and low output power states obtained from the simulation of step 1-1, the T-type structure is adopted and the specific parameters of each branch are continuously optimized to enable the auxiliary power amplifier frequency reconfigurable input matching network 10 to achieve good matching in both frequency bands. The final structure is as follows Figure 3 TL in 26 ,TL 27 ,TL 28 ,TL 29 Specific microstrip line parameters are shown in Table 1. The corresponding power amplifier operating frequency bands for the RF switch states are shown in Table 2. As shown in Table 2, when RF switch SW2 is off, the auxiliary power amplifier operates in the 2.4-2.7 GHz band; when SW2 is closed, the auxiliary power amplifier operates in the 3.4-3.6 GHz band.

[0037] Figure 3 The main power amplifier frequency reconfigurable input matching network 04 and the auxiliary power amplifier frequency reconfigurable input matching network 10 already include auxiliary circuits such as a stabilization circuit and an input bias circuit. Since these auxiliary circuits are well-known parts and do not belong to the invention content of the present invention, they will not be introduced in detail here.

[0038] Step 1-3: Design the auxiliary power amplifier output harmonic control network 14. For the auxiliary power tube output, first perform second harmonic impedance matching, compare and analyze the target output second harmonic impedance of the 2.4-2.7GHz and 3.4-3.6GHz frequency bands under high and low output power conditions obtained in the simulation of step 1-1, and obtain a common target output second harmonic impedance area, and refer to it accordingly. Figure 2 The structure shown in FIG1 is used to design the auxiliary power amplifier output harmonic control network 14. Taking into account the actual conditions such as circuit complexity, the two series microstrip lines are merged into one series microstrip line. The final structure is as follows: Figure 3 TL in 16 ,TL 17 ,TL 18 The specific parameters of the microstrip line can be found in Table 1.

[0039] Step 1-4: Design the auxiliary power amplifier output matching network 15. Then perform fundamental impedance matching. According to the target output fundamental impedance obtained in the simulation of step 1-1, a low-pass matching structure is used for design, and the following is obtained: Figure 3 As shown by TL 19 ,TL 20 ,TL 21 The auxiliary power amplifier output matching network 15 is composed of the microstrip line. The specific parameters of the network can be seen in Table 1. The network can achieve high output power state and low output power state and two reconfigurable frequency bands, from 2R opt =34Ω to match the target fundamental impedance of the power tube.

[0040] Step 2: Design the Main Power Amplifier

[0041] Step 2-1: First, determine the static operating point of the power tube, design a stable circuit, and obtain the required target impedance through source pull and load pull simulation. The design steps are similar to step 1-1, but the difference is that the main power amplifier operates in deep class AB state, so as to determine the gate-source voltage V under high output power state. gs.c.high =-2.9V, drain-source voltage V ds.c.high =28V. After calculation by the above formula (1), the gate-source voltage V at low output power, which is 3dB different from the high output power, is determined. gs.c.low =-2.9V, drain-source voltage V ds.c.low = 20 V. Similarly, the target input fundamental impedance, output fundamental impedance, and output second harmonic impedance at each frequency point in the reconfigurable frequency bands of 2.4-2.7 GHz and 3.4-3.6 GHz can be obtained in the high output power state and the low output power state, respectively.

[0042] Step 2-2: Design the main power amplifier frequency reconfigurable input matching network 04. The specific method is: Based on the target input fundamental impedance of the 2.4-2.7GHz and 3.4-3.6GHz frequency bands in the high and low output power states obtained from the simulation of step 2-1, the T-type structure is adopted and the specific parameters of each branch are continuously optimized to ensure that the main power amplifier frequency reconfigurable input matching network 04 can achieve good matching in both frequency bands. The final structure is as follows Figure 3 and TL in Table 1 11 ,TL 12 ,TL 13 ,TL 14 The corresponding power amplifier operating frequency bands for the RF switch states are shown in Table 2. As shown in Table 2, when RF switch SW1 is off, the main power amplifier operates in the 2.4-2.7 GHz band; when SW1 is closed, the main power amplifier operates in the 3.4-3.6 GHz band.

[0043] Step 2-3: Design the main power amplifier output harmonic control network 08. For the main power tube output, first perform second harmonic impedance matching. Compare and analyze the target output second harmonic impedance of the 2.4-2.7GHz and 3.4-3.6GHz frequency bands under high and low output power conditions obtained in the simulation of step 2-1 to obtain a common target output second harmonic impedance region. The method for designing the auxiliary power amplifier output harmonic control network is the same as that used in the design of the auxiliary power amplifier output harmonic control network. Figure 2 The structure shown in the figure is used to design the main power amplifier output harmonic control network 08. The final structure is as follows: Figure 3 As shown in TL1, TL2, and TL3 in Table 1. The simulation results show that although the second harmonic control effect of the main power amplifier output harmonic control network 08 is not as good as that of the auxiliary power amplifier output harmonic control network 14, it has the characteristics of controlling the second harmonic in both saturation and back-off states.

[0044] Step 2-4: Design the main power amplifier output matching network 09. After completing the second harmonic impedance matching, perform fundamental impedance matching. According to the target output fundamental impedance obtained in the simulation of step 2-1, combined with the saturation and back-off state impedance matching, design the broadband load modulation network 21. Since the main power amplifier output harmonic control network 08 has been completed in step 2-3, the main power amplifier output matching network 09 needs to be designed next. Taking into account the reconfigurable operating frequency band range, in order to ensure its performance under the operating frequency band, 2.3-3.7GHz is selected as the bandwidth of the broadband load modulation network 21. In addition, it is necessary to consider the impedance matching under high and low output power states at the same time. According to the simulation results of step 2-1, it can be seen that the optimal output fundamental impedance of each frequency band under the -3dB low output power state has no obvious change in the real part compared with the high output power state, while the imaginary part has a slight increase. In this step, the average value of the optimal output fundamental impedance values under high and low output power states at each frequency is calculated. After design and optimization, the following is finally obtained. Figure 3 The structure in Table 1, where TL1, TL2, and TL3 control the second harmonic impedance at the center frequencies of 2.55 GHz and 3.5 GHz in two reconfigurable operating frequency bands, and TL4, TL5, and TL6 form the main power amplifier output matching network 09. The entire broadband load modulation network 21 achieves 2R at saturated power in the range of 2.3-3.7 GHz. opt to R opt / 2 matching and R under fallback power opt to R opt of the match.

[0045] Step 3: Design the equal power divider 03. The equal power divider 03 adopts a broadband Wilkinson structure and selects the operating frequency band of 2.3-3.7 GHz to ensure the normal operation of the Doherty power amplifier. The specific parameters are shown in Figure 3 and Table 1.

[0046] Step 4: Design the post-matching network 18. The post-matching network uses a broadband matching network based on a step impedance transformation line. Its bandwidth covers the operating frequency band of the Doherty power amplifier. After optimization, the final microstrip line parameter used is W p1 =3.25, L p1 =14.6,W p2 =1.76, L p2 =15.5,W p3 =0.5, L p3 =5.4 (unit: mm), to achieve R opt / 2 = 17Ω to 50Ω matching.

[0047] Step 5: Perform simulation and overall optimization to improve the overall performance of the two-dimensional reconfigurable Doherty power amplifier. After completing the design of each part in the above steps, it is necessary to further optimize the influence between the main and auxiliary paths in the Doherty power amplifier. The specific steps are as follows: 1. Optimize the main power amplifier input phase compensation line 16 and the auxiliary power amplifier output phase compensation line 17 to ensure that the signals at the junction point are in phase, thereby maximizing the output power; 2. Adjust the gate voltage Vgs.p of the auxiliary power amplifier and fine-tune the turn-on time of the auxiliary power tube to ensure that the auxiliary power amplifier is in the critical turn-on state when the main power amplifier reaches saturation. After optimization and debugging, the gate-source voltage V gs.p.high =-7.2V, gate-source voltage V at low output power gs.p.low =-6V. After the above optimization and fine-tuning of each part of the microstrip line, the circuit diagram of a two-dimensional reconfigurable Doherty power amplifier shown in this embodiment is as follows: Figure 3 The parameters of the microstrip lines and components are shown in Table 1.

[0048] Table 1 Parameters of microstrip lines and components of a two-dimensional reconfigurable Doherty power amplifier circuit

[0049]

[0050] Table 2 RF switch state and main and auxiliary power tube bias voltage corresponding to two-dimensional reconfigurable working mode

[0051]

[0052]

[0053] The simulation results of the corresponding embodiment of the present invention are introduced as follows: Figures 4-1 to 4-5 shown. Figure 4-1 、 Figure 4-2These are the simulation curves of the drain efficiency and gain changing with output power in the low frequency band and high frequency band under high output power state. Figure 4-1 , the Doherty power amplifier operates at 2.4-2.7GHz, at which time the switch is disconnected, the saturated output power is greater than 42.5dBm, the saturated drain efficiency can reach 71%, the 6dB back-off drain efficiency is greater than 52%, and the saturated gain is greater than 8.5dB; Figure 4-2 The Doherty power amplifier operates at 3.4-3.6GHz. When the switch is closed, the saturated output power is greater than 42dBm, the saturated drain efficiency is between 61% and 66%, the 6dB back-off drain efficiency is greater than 50%, and the saturated gain is greater than 7.5dB. Figure 4-3 、 Figure 4-4 These are the simulation curves of the drain efficiency and gain changing with output power in the low frequency band and high frequency band under low output power state. Figure 4-3 , the Doherty power amplifier operates at 2.4-2.7GHz, at which time the switch is disconnected, the saturated output power is greater than 39.8dBm, the saturated drain efficiency can reach 71%, the 6dB back-off drain efficiency is greater than 52%, and the saturated gain is greater than 8dB; Figure 4-4 , the Doherty power amplifier operates at 3.4-3.6GHz, at which point the switch is off, the saturated output power is greater than 39dBm, the saturated drain efficiency is between 60%-65%, the 6dB back-off drain efficiency is greater than 48%, and the saturated gain is greater than 7dB. In addition, to compare the relationship between high and low output power states, the effects at 2.5GHz and 3.5GHz are selected for comparison. The results are shown in the figure. Figure 4-5 、 Figure 4-6 As shown. The 6dB back-off area of the Doherty power amplifier is marked with shadows A to D respectively. Figure 4-5 The difference between shadow B and shadow A is 3dB. Figure 4-6 The 3dB difference between shaded areas D and C indicates that at 2.5 GHz and 3.5 GHz, the average power output at low and high output power states differs by 3dB. These simulation results demonstrate the dual frequency and average power reconfigurability of the two-dimensional reconfigurable Doherty power amplifier of the present invention, ensuring the rationality and correctness of its structure and theory, from the perspectives of overall performance and power reconfigurability.

[0054] The present invention proposes a two-dimensional reconfigurable Doherty power amplifier that combines frequency reconfiguration technology with average power reconfiguration technology, which has the following characteristics:

[0055] 1. Compared with existing Doherty power amplifiers and reconfigurable power amplifiers, the present invention can flexibly switch between different frequency bands and different output power states, and can achieve high-efficiency operation in multiple frequency bands and multiple modes.

[0056] 2. The present invention uses frequency reconfigurable technology to flexibly switch between operating frequency bands that are far apart and have a wide bandwidth. In addition, a harmonic control network is introduced at the output ends of the main and auxiliary power amplifiers to control the second harmonic, thereby improving the performance under different operating frequency bands.

[0057] 3. The present invention uses average power reconfigurable technology to adjust the static operating point of the power tube so that it can operate with high efficiency at a lower output power state. At the same time, combined with the advantage of the Doherty power amplifier having a back-off range, the high efficiency range can be indirectly expanded.

[0058] The above-mentioned specific embodiments of the present invention are only for illustrative purposes. It should be noted that a number of fine-tuning, improvements, equivalent replacements and other operations may be performed within the scope of the present invention, and these operations should also fall within the scope of protection of the present invention.

Claims

1. A two-dimensional reconfigurable Doherty power amplifier, characterized in that: The invention also has the functions of frequency reconfiguration and average power reconfiguration, including: a signal input terminal (01), a signal output terminal (02), an equal power divider (03), a main power amplifier frequency reconfigurable input matching network (04), a main power tube (05), a main power tube grid power supply terminal (06), a main power tube drain power supply terminal (07), a main power amplifier output harmonic control network (08), a main power amplifier output matching network (09), an auxiliary power amplifier frequency reconfigurable input matching network (10), an auxiliary power tube (11), an auxiliary power tube grid power supply terminal (12), an auxiliary power tube drain power supply terminal (13), an auxiliary power amplifier output harmonic control network (14), an auxiliary power amplifier output matching network (15), an input phase The invention relates to a phase compensation line (16), an output phase compensation line (17) and a post-matching network (18); wherein, the main power amplifier frequency reconfigurable input matching network (04), the main power tube (05), the main power tube gate power supply terminal (06), the main power tube drain power supply terminal (07), the main power amplifier output harmonic control network (08) and the main power amplifier output matching network (09) connected in sequence constitute a main power amplifier; and the auxiliary power amplifier frequency reconfigurable input matching network (10), the auxiliary power tube (11), the auxiliary power tube gate power supply terminal (12), the auxiliary power tube drain power supply terminal (13), the auxiliary power amplifier output harmonic control network (14) and the auxiliary power amplifier output matching network (15) connected in sequence constitute an auxiliary power amplifier. The main power amplifier frequency reconfigurable input matching network (04) and the auxiliary power amplifier frequency reconfigurable input matching network (10) respectively realize fundamental impedance matching of the main power amplifier and the auxiliary power amplifier in the reconfigurable frequency band, and both adopt a T-type structure, including two sections of series microstrip lines and two sections of parallel microstrip lines, wherein the two sections of series microstrip lines are directly connected, and the two sections of parallel microstrip lines are connected through a radio frequency switch PIN diode and connected between the two ends of the series microstrip lines. By adding a bias DC voltage at both ends of the radio frequency switch, the on and off of the radio frequency switch can be controlled, thereby realizing matching of the corresponding target fundamental impedance in different frequency bands through the frequency reconfigurable technology; The main power amplifier output harmonic control network (08), the main power amplifier output matching network (09) and the power tube equivalent parasitic parameter model (20) in the main power tube (05) constitute a broadband load modulation network (21), and the broadband load modulation network (21) is used to make the entire system including the power tube equivalent parasitic parameter model (20), the main power amplifier output harmonic control network (08) and the main power amplifier output matching network (09) present broadband fundamental wave load modulation characteristics, thereby achieving impedance matching in a saturation state and a low power state at two reconfigurable frequencies; The auxiliary power tube (11), the auxiliary power amplifier output harmonic control network (14) and the auxiliary power amplifier output matching network (15) form a broadband fundamental impedance matching network, which is used for fundamental impedance matching of the auxiliary power amplifier in the working frequency band; The main power amplifier output harmonic control network (08) and the auxiliary power amplifier output harmonic control network (14) are used to match the second harmonic impedance of the main power amplifier and the auxiliary power amplifier in the reconfigurable working frequency band respectively, and both adopt a dual-frequency matching network, which is composed of a series microstrip line and two parallel microstrip lines, and the two parallel microstrip lines are simultaneously connected to the series microstrip line; The main power amplifier output matching network (09) and the auxiliary power amplifier output matching network (15) both adopt a low-pass matching structure, comprising two sections of series microstrip lines and one section of parallel microstrip line, wherein the parallel microstrip line is connected between the two sections of series microstrip lines.

2. The two-dimensional reconfigurable Doherty power amplifier according to claim 1, wherein: The signal input terminal (01) is connected to the input terminal of the equal power distributor (03); the two output terminals of the equal power distributor (03) are respectively connected to the input phase compensation line (16) and the auxiliary power amplifier frequency reconfigurable input matching network (10); the input phase compensation line (16) is connected to the main power amplifier frequency reconfigurable input matching network (04); the auxiliary power amplifier output matching network (15) is connected to the output phase compensation line (17); the main power amplifier output matching network (09) and the output phase compensation line (17) are combined and connected to the rear matching network (18); and the rear matching network (18) is connected to the signal output terminal (02).

3. The two-dimensional reconfigurable Doherty power amplifier according to claim 1, wherein: The average power reconfiguration function in the two-dimensional reconfiguration is achieved by simultaneously adjusting the DC bias voltages of the main power tube drain power supply terminal and the auxiliary power tube drain power supply terminal. The specific calculation formula is: (1) Where V ds,high 、V ds,low The DC bias voltages of the drain power supply terminal of the main power tube and the drain power supply terminal of the auxiliary power tube in high and low output power states, respectively, in V, P W,high and P W,low They are high and low average output power values respectively, in W.

4. The two-dimensional reconfigurable Doherty power amplifier according to claim 1, wherein: The impedance of the junction point between the main power amplifier and the auxiliary power amplifier is R opt / 2, where R opt Refers to the optimal fundamental wave load impedance value of the equivalent current source port when the power tube works in the Class B state; the post-matching network (18) adopts a broadband matching network based on a step impedance transformation line to complete the transition from R opt / 2 to the standard port matching, its bandwidth covers the Doherty power amplifier operating band.

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