Method and device for obtaining thread crash address

Abstract

The present application discloses a method and device for obtaining a thread crash address, the method comprising: the IEC operation thread of the user space periodically determines whether a thread crash occurs; when it is determined that a thread crash occurs, obtaining the thread crash address read by the crash processing thread of the user space from the register of a specific peripheral of the CPU. The method and device enable the user to automatically obtain the thread crash address.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and more particularly to a method and device for obtaining a thread crash address. Background Art

[0002] PLC controllers are widely used in the field of process control and are very important automation control equipment. Hollysys has developed a highly secure microkernel operating system kernel (microkernel for short) based on the domestic MIPS architecture processor. The microkernel runs in the kernel space of the CPU. Hollysys has developed PLC controller software based on the microkernel, which runs in the user space of the CPU.

[0003] According to the requirements of the PLC controller software, when a thread crash occurs, the address of the thread crash must be provided for further analysis and problem location. However, the PLC controller software runs in user mode, uses virtual memory, and cannot access the memory of the microkernel. The microkernel only provides five extremely primitive functions in the kernel space: thread management, inter-process communication (IPC), virtual memory space, handle space, and device basic unit (interrupt object). The microkernel can identify the crash address of the thread, but cannot access the memory of the PLC controller software. The above two points result in the microkernel being unable to pass the thread crash address to the PLC controller software through memory when a thread crash occurs.

[0004] Application Contents

[0005] The present application provides a method and device for obtaining a thread crash address in a user space, which can enable a user to automatically obtain the thread crash address.

[0006] The present application provides a method for obtaining a thread crash address, comprising:

[0007] The IEC operation thread in the user space periodically determines whether a thread crash has occurred;

[0008] When it is determined that a thread crash occurs, the crash address of the thread read by the crash processing thread in the user space from the register of the specific peripheral of the CPU is obtained.

[0009] In an exemplary embodiment, before obtaining the crash address of the thread read by the crash processing thread in the user space from the register of the specific peripheral device of the CPU, the method includes:

[0010] The user space initializes the specific peripherals of the CPU;

[0011] After receiving the thread crash notification in the user space, the read thread crash address is stored in a preset first user global variable; and a preset thread crash flag is assigned a value;

[0012] The thread crash notification is generated under the following circumstances: after the microkernel completes the initialization process, when a thread crash occurs, the crash address of the thread is written into the register of a specific peripheral of the CPU, and an interrupt is generated to notify the user space that a thread crash has occurred.

[0013] In an exemplary embodiment, the initialization of the microkernel includes:

[0014] The initial thread of the microkernel initializes the specific peripherals of the CPU and records the access address of the specific peripherals through a preset first kernel global variable.

[0015] In an exemplary embodiment, the invention comprises:

[0016] The microkernel writes the crash address of the thread into a register of a specific peripheral of the CPU, including:

[0017] The microkernel reads the crash address of the thread from the register of the exception program counter and stores it in the task control block of the operating system;

[0018] The saved crash address of the thread is written into the register of a specific peripheral of the CPU by calling the address writing function.

[0019] In an exemplary embodiment, writing the recorded crash address of the thread into a register of a specific peripheral of the CPU by calling an address writing function includes:

[0020] The entry parameters of the address write function include a preset first kernel global variable, a preset first parameter and a preset second parameter, wherein the second parameter is the register offset of the specific peripheral; the address write function assigns the crash address of the thread saved in the task control block to the preset first parameter, and writes the value of the preset first parameter to the address corresponding to the sum of the value of the preset first kernel global variable and the value of the preset second parameter.

[0021] In an exemplary embodiment, obtaining the crash address of a thread read by a crash processing thread in a user space from a register of a specific peripheral of a CPU includes:

[0022] The crash address of the thread read by the crash processing thread is obtained by reading the preset first user global variable.

[0023] In an exemplary embodiment, the IEC operation thread in the user space periodically determines whether a thread crash occurs, including:

[0024] The IEC operation thread in the user space periodically determines whether a thread crash occurs through the preset thread crash flag.

[0025] In an exemplary embodiment, after storing the read crash address of the thread into a preset first user global variable, the method further includes:

[0026] The crash address of the read thread is recorded in a log, so as to manually obtain the crash address of the thread.

[0027] In an exemplary embodiment, the register of the specific peripheral of the CPU includes a register of a DES peripheral of the CPU.

[0028] The present application provides a device for obtaining a thread crash address, comprising a memory and a processor.

[0029] The memory is used to store a program for obtaining a thread crash address;

[0030] The processor is configured to read and execute the program for obtaining the thread crash address, and perform the following operations:

[0031] The IEC operation thread in the user space periodically determines whether a thread crash has occurred;

[0032] When it is determined that a thread crash occurs, the crash address of the thread read by the crash processing thread in the user space from the register of the specific peripheral of the CPU is obtained.

[0033] In an exemplary embodiment, before obtaining the crash address of the thread read by the crash processing thread in the user space from the register of the specific peripheral device of the CPU, the method includes:

[0034] The user space initializes the specific peripherals of the CPU;

[0035] After receiving the thread crash notification in the user space, the read thread crash address is stored in a preset first user global variable; and a preset thread crash flag is assigned a value;

[0036] The thread crash notification is generated under the following circumstances: after the microkernel completes the initialization process, when a thread crash occurs, the crash address of the thread is written into the register of a specific peripheral of the CPU, and an interrupt is generated to notify the user space that a thread crash has occurred.

[0037] In an exemplary embodiment, the initialization of the microkernel includes:

[0038] The initial thread of the microkernel initializes the specific peripherals of the CPU and records the access address of the specific peripherals through a preset first kernel global variable.

[0039] In an exemplary embodiment, the invention comprises:

[0040] The microkernel writes the crash address of the thread into a register of a specific peripheral of the CPU, including:

[0041] The microkernel reads the crash address of the thread from the register of the exception program counter and stores it in the task control block of the operating system;

[0042] The saved crash address of the thread is written into the register of a specific peripheral of the CPU by calling the address writing function.

[0043] In an exemplary embodiment, writing the recorded crash address of the thread into a register of a specific peripheral of the CPU by calling an address writing function includes:

[0044] The entry parameters of the address write function include a preset first kernel global variable, a preset first parameter and a preset second parameter, wherein the second parameter is the register offset of the specific peripheral; the address write function assigns the crash address of the thread saved in the task control block to the preset first parameter, and writes the value of the preset first parameter to the address corresponding to the sum of the value of the preset first kernel global variable and the value of the preset second parameter.

[0045] In an exemplary embodiment, obtaining the crash address of a thread read by a crash processing thread in a user space from a register of a specific peripheral of a CPU includes:

[0046] The crash address of the thread read by the crash processing thread is obtained by reading the preset first user global variable.

[0047] In an exemplary embodiment, the IEC operation thread in the user space periodically determines whether a thread crash occurs, including:

[0048] The IEC operation thread in the user space periodically determines whether a thread crash occurs through the preset thread crash flag.

[0049] In an exemplary embodiment, after storing the read crash address of the thread into a preset first user global variable, the method further includes:

[0050] The crash address of the read thread is recorded in a log, so as to manually obtain the crash address of the thread.

[0051] In an exemplary embodiment, the register of the specific peripheral of the CPU includes a register of a DES peripheral of the CPU.

[0052] At least one embodiment of the present application enables a user to automatically obtain the crash address of the thread by writing the crash address of the thread into a register of a specific peripheral of the CPU accessible to both the microkernel and the user space through the microkernel.

[0053] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by implementing the present application. Other advantages of the present application can be realized and obtained by the schemes described in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The accompanying drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0055] Figure 1 A flowchart of a method for obtaining a thread crash address according to an embodiment of the present application;

[0056] Figure 2 This is a structural block diagram of a PLC controller according to an embodiment of the present application;

[0057] Figure 3 This is a flowchart of the overall thread crash address recording of an embodiment of the present application;

[0058] Figure 4 A schematic diagram of a device for obtaining a thread crash address according to an embodiment of the present application. DETAILED DESCRIPTION

[0059] Figure 1 This is a flow chart of a method for obtaining a thread crash address according to an embodiment of the present application. Figure 1 As shown, the method for obtaining a thread crash address in this embodiment includes steps S11-S12:

[0060] S11, the IEC operation thread in the user space periodically determines whether a thread crash occurs;

[0061] S12: When it is determined that a thread crash occurs, the crash address of the thread read by the crash processing thread in the user space from the register of the specific peripheral device of the CPU is obtained.

[0062] In an exemplary embodiment, before obtaining the crash address of the thread read by the crash processing thread in the user space from the register of the specific peripheral device of the CPU, the method includes:

[0063] The user space initializes the specific peripherals of the CPU;

[0064] After receiving the thread crash notification in the user space, the read thread crash address is stored in a preset first user global variable; and a preset thread crash flag is assigned a value;

[0065] The thread crash notification is generated under the following circumstances: after the microkernel completes the initialization process, when a thread crash occurs, the crash address of the thread is written into the register of a specific peripheral of the CPU, and an interrupt is generated to notify the user space that a thread crash has occurred.

[0066] In an exemplary embodiment, the initialization of the microkernel includes:

[0067] The initial thread of the microkernel initializes the specific peripherals of the CPU and records the access address of the specific peripherals through a preset first kernel global variable.

[0068] In an exemplary embodiment, the microkernel writes the crash address of the thread into a register of a specific peripheral of the CPU, including:

[0069] The microkernel reads the crash address of the thread from the register of the exception program counter and stores it in the task control block of the operating system;

[0070] The saved crash address of the thread is written into the register of a specific peripheral of the CPU by calling the address writing function.

[0071] In an exemplary embodiment, writing the recorded crash address of the thread into a register of a specific peripheral of the CPU by calling an address writing function includes:

[0072] The entry parameters of the address write function include a preset first kernel global variable, a preset first parameter and a preset second parameter, the value of the preset second parameter is the register offset of the specific peripheral; the address write function assigns the crash address of the thread saved in the task control block to the preset first parameter, and writes the value of the preset first parameter to the address corresponding to the sum of the value of the preset first kernel global variable and the value of the preset second parameter.

[0073] In an exemplary embodiment, obtaining the crash address of a thread read by a crash processing thread in a user space from a register of a specific peripheral of a CPU includes:

[0074] The crash address of the thread read by the crash processing thread is obtained by reading the preset first user global variable.

[0075] In an exemplary embodiment, the IEC operation thread in the user space periodically determines whether a thread crash occurs, including:

[0076] The IEC operation thread in the user space periodically determines whether a thread crash occurs through the preset thread crash flag.

[0077] In an exemplary embodiment, after storing the read crash address of the thread into a preset first user global variable, the method further includes:

[0078] The crash address of the read thread is recorded in a log, so as to manually obtain the crash address of the thread.

[0079] In an exemplary embodiment, the register of the specific peripheral of the CPU includes the register of the DES peripheral of the CPU. The DES peripheral is generally used for encryption and decryption. In some other embodiments, the register of the specific peripheral of the CPU may also be a peripheral register that is not used by the microkernel and the PLC controller software.

[0080] In the embodiment of the present application, the crash address of the thread is written into the register of the specific peripheral of the CPU through the microkernel, and the crash processing thread of the user space reads the crash address of the thread from the register of the specific peripheral of the CPU and stores it into a global variable, so that the IEC operation thread of the user space can obtain the crash address of the thread, thereby allowing the user to automatically obtain the crash address of the thread.

[0081] In order to better understand the application content, the following is a specific description of the implementation method of transferring the thread crash address from the microkernel to the PLC controller software based on the microkernel operating system.

[0082] The crash address recording function designed in this application mainly modifies the microkernel operating system kernel, initial thread, crash processing thread, and IEC operation thread. Figure 2 PLC controller structure diagram component 12 micro-kernel operating system kernel; initial thread corresponding Figure 2 PLC controller structure diagram of component 15 initial thread; crash processing thread corresponding Figure 1 PLC controller structure diagram of component 20 crash processing thread; IEC operation thread corresponding to the thread Figure 1 Component 26IEC operation thread of the PLC controller structure block diagram.

[0083] The thread crash address recording function of the PLC controller based on the microkernel operating system designed by this application has the difficulty of finding an effective channel for transmitting information from the microkernel to the PLC controller software. On a 32-bit CPU, the crash address of the thread is the pc pointer when the thread crashes, and the pc pointer has only 4 bytes (8 bits per byte, a total of 32 bits). Since the microkernel operating system only provides five extremely primitive functions, it does not provide methods and interface functions for transmitting user information from the microkernel to the user space, which makes it difficult to pass these four bytes from the microkernel to the PLC controller software. It is specifically divided into the following two aspects:

[0084] First, the microkernel cannot pass the crash address to the PLC controller software with the help of memory. The microkernel runs in kernel space, and the PLC controller software runs in user space. Both are virtual addresses, and the addresses are invisible. There is no channel or interface function for the microkernel and PLC controller software to share memory. Although the microkernel can capture the crash address of the thread, the microkernel cannot pass the crash address to the PLC controller software with the help of memory, resulting in the PLC controller software being unable to obtain the crash address of the thread.

[0085] Secondly, the microkernel cannot pass the crash address to the PLC controller software with the help of the CPU registers. The CPU of the Mips architecture has a total of 32 registers, of which the k0, k1, and at registers are reserved for the OS and compiler. They are not used by users, and other registers may be used in user programs. Among them, k0 and k1 are specifically used by the OS, and their main purpose is to be used as temporary variables during context switching or TLB exceptions. The at register is mainly used by the compiler. If a temporary register is required when compiling some pseudo-instructions, at can be used. In summary, each CPU register has its own use. If the CPU register is used to pass the crash address of a thread, some very low-level assembly functions of the microkernel will cause errors, which is not worth the loss.

[0086] Since the microkernel cannot pass the crash address to the PLC controller software with the help of memory, and the microkernel cannot pass the crash address to the PLC controller software with the help of CPU registers, this application combines the characteristics of the microkernel operating system and the PLC controller software, and uses CPU-specific peripheral registers as a channel to pass the thread crash address from the microkernel to the PLC controller software, thus realizing the need to pass the thread crash address from the microkernel to the PLC controller software. The demonstration process is as follows:

[0087] The microkernel can access the serial port to print some debugging information, indicating that the microkernel can access some peripherals of the CPU; the PLC controller software can also print some debugging information to the serial port, and this function does not depend on the microkernel, indicating that the PLC controller software can also access some peripherals of the CPU. It can be judged that both the microkernel and the PLC controller software can access some peripherals of the CPU. If there is a CPU peripheral that the microkernel can access and the PLC controller can access, and the peripheral is usually not used, reading and writing a register of the peripheral will not change the function of the CPU, and the register is 32 bits, then the register of the peripheral can be used as a channel to pass the thread crash address from the microkernel to the PLC controller software. For the PLC controller software developed by Hollysys based on the Loongson processor and the microkernel operating system, consult the manual of the Loongson processor, check the Loongson peripherals one by one, and judge whether they meet the above requirements. The Loongson processor has a peripheral for encryption and decryption, called the DES peripheral, which is currently not used by the microkernel and the PLC controller software. Register 0 of the DES peripheral is a 32-bit register used to store the key. Reading and writing register 0 of the DES peripheral will not change the function of the CPU, and the written value is consistent with the read value. If both the microkernel and the PLC controller software can access the DES peripheral of the Loongson processor, register 0 of the DES peripheral of the Loongson processor can be used as a channel to pass the thread crash address from the microkernel to the PLC controller software. Modify the initialization code of the microkernel and the PLC controller software, and then try to access register 0 of the DES peripheral, both can be accessed. In summary, register 0 of the DES peripheral of the Loongson processor can be used as a channel to pass the thread crash address from the microkernel to the PLC controller software.

[0088] The thread crash address recording function of the PLC controller based on the microkernel operating system designed by this application includes two changes to the microkernel operating system kernel. When the microkernel is initialized, the initialization of the DES peripheral of the Loongson processor is added with reference to the initialization process of the serial port, so that the microkernel can access the DES peripheral. When a thread crashes, the microkernel records the crash address of the thread in register 0 of the DES peripheral of the Loongson processor and continues to run.

[0089] The thread crash address recording function of the PLC controller based on the microkernel operating system designed in this application modifies the initial thread as follows: when the initial thread located in the user space is initialized, the initialization process of the serial port is referred to, and the initialization of the DES peripheral of the Loongson processor is added to allow the user space to access the DES peripheral.

[0090] The thread crash address recording function of the PLC controller based on the microkernel operating system designed by this application includes 5 changes to the crash handling thread. When the crash handling thread runs, it first reads the crash address from register 0 of the DES peripheral of the Loongson processor, then calls the log interface to record the address in the log file, then records the crash address in the global variable and marks that the thread crash has occurred. The crash handling thread also provides an interface function for higher-level users to call to obtain the crash address of the thread.

[0091] The thread crash address recording function of the PLC controller based on the microkernel operating system designed in this application is modified as follows: the IEC operation thread calls the interface function provided by the crash processing thread to obtain two pieces of information: whether the thread crash occurs and the specific address of the thread crash.

[0092] The thread crash address recording function of the PLC controller based on the microkernel operating system designed in this application, the overall process of thread crash address recording is as follows Figure 3 When a crash occurs, the microkernel records the crash address to the register of a specific peripheral; the crash processing thread reads the crash address from the register of the specific peripheral and saves it to a global variable; the IEC operation thread obtains the crash address of the thread through the interface function.

[0093] In addition, the bottom layer of the file system is flash and its driver, the upper layer is file management, and the upper layer is various files (including log files). There is no file system in the kernel of the microkernel operating system, so logs cannot be written. The microkernel cannot see the log files of the application layer. The user space writes the crash address to the log, and the PLC controller software can also read the log (reading the log is an existing function and has not been modified). By manually obtaining the crash address of the thread, it is convenient to locate the problem when it occurs. For example, the approximate time of the crash can be recorded, and if multiple crashes occur during long-term operation of the controller, it can be seen through the log. The crash address obtained by the IEC operation thread is the crash address of the current thread.

[0094] The thread crash address recording function implementation method and implementation of the PLC controller based on the microkernel operating system designed by this application adds a set of functions as shown below:

[0095] void os_ker_write_epc_to_reg(char*paddr,unsigned int off,unsigned intval);

[0096] unsigned int os_app_read_epc_from_reg(char*paddr,unsigned int off);

[0097] void os_app_set_thread_fault_flag(void);

[0098] unsigned int os_api_get_thread_fault_flag(void);

[0099] unsigned int os_api_get_epc_addr(void);

[0100] os_ker_write_epc_to_reg implements the function of writing the thread crash address to the DES peripheral register, which is called by the microkernel. The parameter paddr is the access address of the microkernel to initialize the DES peripheral record (i.e. the preset first kernel global variable mentioned above); the parameter val is the thread crash address (i.e. the preset first parameter mentioned above), and the parameter off is the register offset (i.e. the preset second parameter mentioned above), which is currently equal to 0. The os_ker_write_epc_to_reg function directly writes val to paddr+off, that is, writes it to register 0 of the DES peripheral.

[0101] The kernel can capture the crash address of any thread. Because after a thread crashes, it will automatically trigger a CPU exception and enter the kernel. At this time, the crash address is stored in the CPU's epc (exception program counter) register. Val is the value of the epc register at the time of the crash.

[0102] os_app_read_epc_from_reg implements the function of reading the thread crash address from the DES peripheral register and is called by the crash handling thread. The parameter paddr is the access address recorded when the initial thread in user space initializes the DES peripheral; the parameter off is the register offset, which is currently 0; the return value of the function is the thread crash address. os_app_read_epc_from_reg directly reads a 4-byte value from paddr+off and returns the value.

[0103] It should be noted here that the microkernel runs in kernel space and uses virtual addresses, and the PLC controller software runs in user space and uses virtual addresses. Although os_ker_write_epc_to_reg and os_app_read_epc_from_reg are accessing the same DES peripheral, their first parameters are different (they use two different virtual addresses (one is the kernel state virtual address, which is the address above 0x80000000, and the other is the user state virtual address, which is the address below 0x80000000. The virtual address is dynamically mapped). The kernel writes the virtual address corresponding to the physical address (mapped by the kernel), and the user reads the virtual address corresponding to the physical address (mapped again by the user calling the os function). The virtual addresses obtained by the two mappings are different, but they both point to the same physical address).

[0104] os_app_set_thread_fault_flag sets a thread crash and is called by the crash handling thread. os_app_set_thread_fault_flag directly sets the thread crash flag to TRUE (1), and the thread crash flag defaults to FALSE (0) at power-on.

[0105] The os_api_get_thread_fault_flag interface function is used to return whether a thread crash has occurred. It is called by the IEC operation thread. This function directly returns the crash flag recorded by the crash processing thread, where 1 indicates a crash has occurred; 0 indicates no crash has occurred.

[0106] The os_api_get_epc_addr interface function is used to return the thread crash address and is called by the IEC operation thread. This function directly returns the crash address recorded by the crash processing thread.

[0107] It should be noted that the crash handling thread implements the underlying support functions of the OS, and the IEC thread is the user interface of the PLC. The data read here can be viewed by the user on the PC interface (through the PLC communication protocol).

[0108] Hollysys developed a microkernel based on the Loongson LS2K1000 dual-core processor and developed PLC controller software based on it. The PLC controller software requires the ability to record and obtain the crash address of the thread. The microkernel operating system does not provide methods and interface functions for transferring user data from the microkernel to the user space, resulting in the PLC controller software being unable to obtain the crash address of the thread.

[0109] This application focuses on the characteristics of the microkernel, and passes the thread crash address from the microkernel to the PLC controller software through register 0 of the DES peripheral of the Loongson processor, meeting the functional requirements of the product. The thread crash address recording function of the PLC controller based on the microkernel operating system designed by this application abandons the transmission path based on memory and CPU registers, and adopts specific peripheral registers as the transmission path. The logic is clear, bypassing many limitations and difficulties of the microkernel operating system, and avoiding large-scale changes to the microkernel. The thread crash address recording function of the PLC controller based on the microkernel operating system designed by this application adds a set of functions, which are relatively simple to implement.

[0110] Figure 4 Schematic diagram of a device for obtaining a thread crash address according to an embodiment of the present application. Figure 4 As shown, a device for obtaining a thread crash address proposed in an embodiment of the present application includes a memory and a processor.

[0111] The memory is used to store a program for obtaining a thread crash address;

[0112] The processor is used to read and execute the program for obtaining the thread crash address, and execute the above method for obtaining the thread crash address.

[0113] The present application describes multiple embodiments, but the description is exemplary rather than restrictive, and it is obvious to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present application. Although many possible feature combinations are shown in the drawings and discussed in the specific embodiments, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.

[0114] The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features, and elements disclosed in the present application may also be combined with any conventional features or elements to form a unique application scheme defined by the claims. Any features or elements of any embodiment may also be combined with features or elements from other application schemes to form another unique application scheme defined by the claims. Therefore, it should be understood that any features shown and / or discussed in the present application may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the attached claims and their equivalents, the embodiments are not subject to other restrictions. In addition, various modifications and changes may be made within the scope of protection of the attached claims.

[0115] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps of the specific order described. As will be understood by those of ordinary skill in the art, other sequences of steps are also possible. Therefore, the specific sequence of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and / or process should not be limited to the steps of performing them in the order written, and those skilled in the art can easily understand that these sequences can be changed and still remain within the spirit and scope of the embodiments of the present application.

[0116] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

Claims

1. A method for obtaining a thread crash address, characterized in that: The IEC operation thread in the user space periodically determines whether a thread crash has occurred; When it is determined that a thread crash occurs, the crash address of the thread read by the crash processing thread in the user space from the register of a specific peripheral of the CPU is obtained; Before obtaining the crash address of the thread read by the crash handling thread of the user space from the register of the specific peripheral of the CPU, include: The user space initializes the specific peripherals of the CPU so that the user space can access the specific peripherals of the CPU; After receiving the thread crash notification in the user space, the read thread crash address is stored in a preset first user global variable; and a preset thread crash flag is assigned a value; The thread crash notification is generated in the following circumstances: after the microkernel completes the initialization process, when a thread crash occurs, the crash address of the thread is written into a register of a specific peripheral of the CPU, and an interrupt is generated to notify the user space that the thread crash has occurred; The initialization of the microkernel includes: The initial thread of the microkernel initializes the specific peripherals of the CPU so that the microkernel can access the specific peripherals of the CPU.

2. The method according to claim 1, wherein the initialization of the microkernel further comprises: The access address of the specific peripheral is recorded through a preset first kernel global variable.

3. The method of claim 2, comprising: The microkernel writes the crash address of the thread into a register of a specific peripheral of the CPU, including: The microkernel reads the crash address of the thread from the register of the exception program counter and stores it in the task control block of the operating system; The saved crash address of the thread is written into the register of the specific peripheral of the CPU by calling the address writing function.

4. The method according to claim 3, wherein the step of writing the recorded crash address of the thread into a register of a specific peripheral of the CPU by calling an address writing function comprises: The entry parameters of the address write function include a preset first kernel global variable, a preset first parameter and a preset second parameter, wherein the second parameter is the register offset of the specific peripheral; the address write function assigns the crash address of the thread saved in the task control block to the preset first parameter, and writes the value of the preset first parameter to the address corresponding to the sum of the value of the preset first kernel global variable and the value of the preset second parameter.

5. The method according to claim 1, obtaining the crash address of the thread read by the crash processing thread of the user space from the register of the specific peripheral of the CPU, comprises: The crash address of the thread read by the crash processing thread is obtained by reading the preset first user global variable.

6. The method according to claim 1, wherein the IEC operation thread in the user space periodically determines whether a thread crash occurs, comprising: The IEC operation thread in the user space periodically determines whether a thread crash occurs through the preset thread crash flag.

7. The method according to claim 1, after storing the crash address of the read thread into a preset first user global variable, further comprises: The crash address of the read thread is recorded in a log, so as to manually obtain the crash address of the thread.

8. The method according to any one of claims 1 to 7, comprising: The registers of the specific peripherals of the CPU include registers of the DES peripherals of the CPU.

9. A device for obtaining a thread crash address, comprising a memory and a processor, characterized in that: The memory is used to store a program for obtaining a thread crash address; The processor is used to read and execute the program for obtaining the thread crash address, and execute the method according to any one of claims 1 to 8.

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