Solid state drive based accelerated power on method and solid state drive

Abstract

Embodiments of the present application provide a solid state disk based accelerated power-on method, a solid state disk, a computer device and a computer readable storage medium, the method comprising: when detecting that the power supply voltage of the solid state disk is abnormal, brushing the current first mapping table to the storage area of the solid state disk; when detecting that the power supply voltage returns to normal, reading the first mapping table in the storage area of the solid state disk, and restoring a temporary mapping table based on the first mapping table; and restoring the second mapping table when the voltage is abnormal according to the dirty page bitmap of the second mapping table before the voltage is abnormal and the temporary mapping table. In the case of detecting that the voltage of the external power supply returns to normal, the second mapping table can be directly restored by reading the first mapping table in the storage area of the SSD, avoiding the problem of long recovery time and long SSD power-on time caused by scanning user data to restore the second mapping table, and shortening the power-on time of the SSD.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of data processing, in particular to an accelerated power-on method based on a solid state disk and the solid state disk. BACKGROUND

[0002] A solid state disk (SSD) is an integrated circuit storage, which needs to be continuously powered during the reading and writing process. Therefore, once an abnormal power-off occurs, not only the data that has not been saved will be lost, but in extreme cases, the previously written data will also be corrupted, resulting in the SSD being unable to be recognized by the system.

[0003] Currently, a common solution is that when the host detects a voltage anomaly, it triggers a capacitor discharge to achieve the caching of user and system data. However, if an abnormal power-off occurs, there is too much user data and system data that needs to be flushed, and the capacitor discharge time requirement is longer, which requires a corresponding increase in the capacitor, resulting in an increase in cost and an increase in the area of the printed circuit board (PCB), which will directly affect the occupied space of the host device. If the capacitor is not increased, when an abnormal power-off occurs, all user data and a small amount of system data will be flushed, which can easily cause the problem of too long power-on time when the SSD is powered on due to the recovery of system data and mapping tables.

[0004] Therefore, there is an urgent need for a method to accelerate the power-on speed of the SSD after an abnormal power-off, which shortens the power-on time of the SSD after an abnormal power-off without increasing the cost of the host device. SUMMARY

[0005] Therefore, one of the purposes of the present application is to provide an accelerated power-on method based on a solid state disk and the solid state disk, which at least solves part of the above technical problems.

[0006] Embodiments of the present application can be implemented as follows:

[0007] In a first aspect, the embodiments of the present application provide an accelerated power-on method based on a solid state disk, which comprises:

[0008] When an abnormal power supply voltage of the solid state disk is detected, the current first mapping table is flushed to the storage area of the solid state disk;

[0009] When the power supply voltage is detected to be normal, the first mapping table in the storage area of the solid state disk is read, and a temporary mapping table is recovered based on the first mapping table;

[0010] The second mapping table at the time of the voltage anomaly is recovered according to the dirty page bitmap of the second mapping table before the voltage anomaly and the temporary mapping table.

[0011] The first mapping table is a mapping table from logical addresses to physical addresses, and the second mapping table is a mapping table from the physical addresses to the logical addresses.

[0012] In a possible implementation, before the step of flashing the current first mapping table to the storage area of ​​the solid-state drive, the method includes:

[0013] Splitting the second mapping table before the voltage abnormality into at least two second mapping sub-tables according to a preset splitting rule;

[0014] Recording the update status of each second mapping sub-table according to the dirty page bitmap of the second mapping table;

[0015] flushing all the second mapping sub-tables to the storage area, and storing the dirty page bitmap of the second mapping table in the management information in the storage area;

[0016] Clearing the dirty page bitmap of the second mapping table;

[0017] Writing the physical allocation address into the storage area of ​​the solid state drive, and writing the logical allocation address corresponding to the physical allocation address into the buffer of the first mapping table;

[0018] If it is detected that the buffer area of ​​the first mapping table is full, the current first mapping table is flushed to the storage area of ​​the solid state drive.

[0019] In a possible implementation, the step of flashing the current first mapping table to the storage area of ​​the solid-state drive includes:

[0020] Flashing the first mapping table in the buffer to a storage area of ​​the solid-state drive;

[0021] If the second mapping sub-table is not completely flushed to the storage area, the dirty page bitmaps of all the second mapping tables are stored in the storage area.

[0022] In a possible implementation, the step of restoring the second mapping table at the time of the voltage abnormality according to the dirty page bitmap of the second mapping table before the voltage abnormality and the temporary mapping table includes:

[0023] Loading the dirty page bitmap and the unupdated second mapping sub-table of the second mapping table in the storage area to the mainboard memory;

[0024] Detecting a storage location where a complete second mapping table is stored at a preceding adjacent time before the voltage abnormality time;

[0025] Loading the first mapping table from the storage location where the complete second mapping table is stored until the first mapping table corresponding to the voltage abnormality is completely loaded;

[0026] The first mapping table in the storage area is loaded into the cache area of ​​the first mapping table, and all second mapping sub-tables are updated to complete the recovery of the second mapping table.

[0027] In a possible implementation, the step of loading the dirty page bitmap and the unupdated second mapping sub-table of the second mapping table in the storage area into the motherboard memory includes:

[0028] Detecting the dirty page bitmap of the second mapping table in the storage area, and first loading all the dirty page bitmaps of the second mapping table storing system data into the mainboard memory;

[0029] The unupdated second mapping sub-table is loaded into the mainboard memory.

[0030] In a possible implementation, the step of flushing the second mapping sub-table to the storage area includes:

[0031] The second mapping sub-table is refreshed to the system data area at a preset time interval.

[0032] In a possible implementation, after the step of flashing the current first mapping table to the storage area of ​​the solid-state drive, the method further includes:

[0033] Storing the dirty page bitmap of the second mapping table in the storage area;

[0034] A portion of the second mapping table is loaded into the storage area according to the dirty page bitmap of the second mapping table.

[0035] In a third aspect, an embodiment of the present application provides a computer device, which includes a computer-readable storage medium and a processor, wherein a computer program is stored on the computer-readable storage medium, and when the computer program is executed by the processor, the accelerated power-on method based on the solid-state hard drive provided in the first aspect is implemented.

[0036] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by one or more processors, the solid-state hard drive-based accelerated power-on method provided in the present application is implemented.

[0037] In the embodiment of the present application, when an abnormal voltage of the external power supply of the SSD is detected, the current first mapping table is flushed to the storage area of ​​the SSD. When it is detected that the voltage of the external power supply has returned to normal, the second mapping table can be directly restored by reading the first mapping table in the storage area of ​​the SSD. This avoids the problems of long recovery time and long SSD power-on time caused by scanning all user data to restore the second mapping table, thereby shortening the power-on time of the SSD. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0039] Figure 1 A schematic diagram of the structure of a computer device provided in an embodiment of the present application is shown;

[0040] Figure 2 A flowchart of a method for accelerating power-on based on a solid-state drive provided in an embodiment of the present application is shown;

[0041] Figure 3 A flowchart of loading a portion of the second mapping table involved in a method for accelerating power-on based on a solid-state drive provided in an embodiment of the present application is shown;

[0042] Figure 4 A schematic diagram of the functional modules of a solid-state drive provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0043] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0044] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0045] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0046] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the accompanying drawings, or is the orientation or position relationship in which the product of the invention is usually placed when in use. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be understood as a limitation on the present invention.

[0047] In addition, the terms "first", "second", etc., if used, are merely used to distinguish and describe, and should not be understood as indicating or implying relative importance.

[0048] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0049] Please refer to Figure 1 , the computer device provided can be a computer device with data processing capabilities, such as a personal computer, a server, etc., mainly including a solid-state drive 110, a memory 120 and a processor 130. Among them, the components of the memory 120 and the processor 130 are electrically connected to each other directly or indirectly to realize data transmission or interaction. For example, these components can be electrically connected to each other through one or more communication buses or signal lines. The computer device 100 includes at least one software function module that can be stored in the memory 120 in the form of software or firmware (Firmware) or solidified in the operating system (Operating System, OS) of the computer device 100. The processor 130 is used to execute the executable modules stored in the memory 120, such as the software function modules and computer programs included in the solid-state drive 110.

[0050] The memory 120 may be, but is not limited to, a random access memory (RAM), a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc. The memory 120 is used to store a program, and the processor 130 executes the program after receiving an execution instruction.

[0051] The processor 130 may be an integrated circuit chip with signal processing capabilities. The above-mentioned processor may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The various methods, steps and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The computer device provided in this embodiment can execute the accelerated power-on method based on the solid-state hard drive provided in this application.

[0052] Please refer to Figure 2 , the following will describe in detail the various steps of the accelerated power-on method based on the solid-state drive.

[0053] S210 , when it is detected that the power supply voltage of the solid state drive is abnormal, the current first mapping table is flushed to the storage area of ​​the solid state drive.

[0054] SSDs are integrated circuit storage devices that require continuous power during read and write operations. An abnormal power outage on an SSD not only results in the loss of some unsaved system data and all user data, but in extreme cases can also cause errors in previously written data, rendering the SSD unrecognizable by the system. Regardless of whether the power outage was abnormal or normal, the SSD must be able to recover and resume normal operation after power is restored.

[0055] In this embodiment, the abnormal voltage of the external power supply of the SSD indicates voltage instability, a tendency to face sudden power outage, or a sudden power outage. Specifically, when the external power supply voltage of the SSD is abnormal, the first mapping table will be flushed to the storage area of ​​the SSD.

[0056] In this embodiment, the first mapping table represents a mapping table from logical addresses to physical addresses, and mainly stores mapping information from logical addresses to physical addresses. The storage area of ​​the SSD is the physical block of the SSD.

[0057] In a possible implementation, before step S210, the method further includes:

[0058] Splitting the second mapping table before the voltage abnormality into at least two second mapping sub-tables according to a preset splitting rule;

[0059] Recording the update status of each second mapping sub-table according to the dirty page bitmap of the second mapping table;

[0060] flushing all the second mapping sub-tables to the storage area, and storing the dirty page bitmap of the second mapping table in the management information in the storage area;

[0061] Clearing the dirty page bitmap of the second mapping table;

[0062] Writing the physical allocation address into the storage area of ​​the solid state drive, and writing the logical allocation address corresponding to the physical allocation address into the buffer of the first mapping table;

[0063] If it is detected that the buffer area of ​​the first mapping table is full, the current first mapping table is flushed to the storage area of ​​the solid state drive.

[0064] In this embodiment, the preset splitting rule can be set according to the size of the second mapping table. The preset splitting rule in this embodiment can split the second mapping table into fixed sizes. For example, the size of each second mapping sub-table obtained by splitting is 64KB. The dirty page bitmap in this embodiment can be used to record the update status of each second mapping sub-table.

[0065] Among them, when it is monitored that the buffer of the first mapping table is full, the current first mapping table is flushed to the storage area of ​​the SSD. Optionally, when it is detected that other storage areas of the SSD are full, the current first mapping table is also flushed to the storage area of ​​the SSD.

[0066] Optionally, the step of flashing the current first mapping table to the storage area of ​​the SSD includes:

[0067] Flashing the first mapping table in the buffer to a storage area of ​​the solid-state drive;

[0068] If the second mapping sub-table is not completely flushed to the storage area, the dirty page bitmaps of all the second mapping tables are stored in the storage area.

[0069] In this embodiment, after the dirty bitmap of the second mapping table is saved in the management information, the dirty bitmap of the original second mapping table will be cleared. When other user data is flushed to the system data area, the dirty bitmap of the second mapping table will be updated again.

[0070] S220: When it is detected that the power supply voltage returns to normal, read the first mapping table in the storage area of ​​the solid-state drive, and restore a temporary mapping table based on the first mapping table;

[0071] S230 : Restoring the second mapping table when the voltage is abnormal according to the dirty page bitmap of the second mapping table before the voltage is abnormal and the temporary mapping table.

[0072] In this embodiment, when the voltage of the external power supply of the SSD returns to normal, the SSD needs to be restored to normal operation. In this case, the second mapping table needs to be restored. The second mapping table represents a mapping table of physical addresses to logical addresses, and mainly stores mapping information of physical addresses to logical addresses.

[0073] In this embodiment, the first mapping table is directly read from the storage area of ​​the SSD, and the second mapping table is further restored to realize the power-on of the SSD. There is no need to restore the second mapping table by scanning all user data. It should be noted here that restoring the second mapping table by scanning all user data is likely to cause the power-on time of the SSD to be too long. Directly reading the first mapping table from the storage area of ​​the SSD and restoring the second mapping table according to the first mapping table shortens the power-on time of the SSD.

[0074] In a possible implementation, the step of restoring the second mapping table at the time of the voltage abnormality based on the dirty page bitmap of the second mapping table before the voltage abnormality and the temporary mapping table includes:

[0075] Loading the dirty page bitmap and the unupdated second mapping sub-table of the second mapping table in the storage area to the mainboard memory;

[0076] Detecting a storage location where a complete second mapping table is stored at a preceding adjacent time before the voltage abnormality time;

[0077] Loading the first mapping table from the storage location where the complete second mapping table is stored until the first mapping table corresponding to the voltage abnormality is completely loaded;

[0078] The first mapping table in the storage area is loaded into the cache area of ​​the first mapping table, and all second mapping sub-tables are updated to complete the recovery of the second mapping table.

[0079] In this embodiment, after the second mapping table is restored, all updated second mapping sub-tables can be flushed to the system data area, ensuring that the correspondence between user data on the SSD and the second mapping table remains consistent. The SSD is powered on and can operate normally.

[0080] Optionally, the step of loading the dirty page bitmap and the unupdated second mapping sub-table of the second mapping table in the storage area into the mainboard memory includes:

[0081] Detecting the dirty page bitmap of the second mapping table in the storage area, and first loading all the dirty page bitmaps of the second mapping table storing system data into the mainboard memory;

[0082] The unupdated second mapping sub-table is loaded into the mainboard memory.

[0083] In this embodiment, the dirty page bitmap of the second mapping table storing system data can be loaded into the mainboard memory, so that the SSD can be powered on quickly.

[0084] Optionally, the step of refreshing the second mapping sub-table to the storage area includes:

[0085] The second mapping sub-table is refreshed to the system data area at a preset time interval.

[0086] In this embodiment, the preset time interval can be adjusted according to the actual response speed, which is not limited in this application. For example, the second mapping sub-table can be refreshed to the system data area every 0.3 seconds.

[0087] Please refer to Figure 3 In a possible implementation manner, after step S110 in the above embodiment, steps S310 to S320 are further included. Each step S310 to S320 will be described in detail below.

[0088] S310, storing the dirty page bitmap of the second mapping table in the storage area;

[0089] S320: Load part of the second mapping table into the storage area according to the dirty page bitmap of the second mapping table.

[0090] In summary, the embodiments of the present application, upon detecting an abnormal voltage on the SSD's external power supply, flush the current first mapping table to the SSD's storage area. Upon detecting that the external power supply voltage has returned to normal, the second mapping table can be restored directly by reading the first mapping table in the SSD's storage area. This avoids the long recovery time and SSD power-on time associated with scanning all user data to restore the second mapping table, thereby shortening the SSD's power-on time. Furthermore, only necessary second mapping tables can be loaded based on the dirty page bitmap of the second mapping table, further shortening the SSD's power-on time.

[0091] Corresponding to the above method embodiment, the present application also provides a solid state drive.

[0092] Please refer to Figure 4 , the solid state drive 400 includes:

[0093] The detection module 410 is configured to update the current first mapping table to a storage area of ​​the solid-state drive when detecting that the power supply voltage of the solid-state drive is abnormal;

[0094] a reading module 420 configured to read the first mapping table in the storage area of ​​the solid-state drive when it is detected that the power supply voltage returns to normal, and restore a temporary mapping table based on the first mapping table;

[0095] A loading module 430 is configured to restore the second mapping table when the voltage is abnormal based on the dirty page bitmap of the second mapping table before the voltage is abnormal and the temporary mapping table;

[0096] The first mapping table is a mapping table from logical addresses to physical addresses, and the second mapping table is a mapping table from the physical addresses to the logical addresses.

[0097] The embodiment of the present application flushes the current first mapping table to the storage area of ​​the SSD when an abnormal voltage of the external power supply of the SSD is detected. When the voltage of the external power supply is detected to be back to normal, the second mapping table can be directly restored by reading the first mapping table in the storage area of ​​the SSD flash memory. This avoids the problems of long recovery time and long SSD power-on time caused by scanning all user data to restore the second mapping table, thereby shortening the power-on time of the SSD.

[0098] The specific implementation process of the solid-state drive, computer device, and computer-readable storage medium provided in this embodiment can refer to the specific implementation process of the accelerated power-on method based on the solid-state drive described above, and will not be repeated here.

[0099] The specific implementation process of the solid-state hard disk provided in this embodiment can refer to the specific implementation process of the accelerated power-on method based on the solid-state hard disk described above, and will not be repeated here.

[0100] The embodiments of the present application provide a solid-state drive-based accelerated power-on method, a solid-state drive, a computer device, and a computer-readable storage medium. When an abnormal voltage of an external power supply of the SSD is detected, the current first mapping table is flushed to the storage area of ​​the SSD. When the voltage of the external power supply is detected to be back to normal, the second mapping table can be directly restored by reading the first mapping table in the storage area of ​​the SSD. This avoids the problems of long recovery time and excessively long SSD power-on time caused by scanning all user data to restore the second mapping table, thereby shortening the power-on time of the SSD.

[0101] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architectures, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the module, program segment or a part of the code contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or flowchart, and the combination of boxes in the structure diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or can be implemented using a combination of dedicated hardware and computer instructions.

[0102] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A method for accelerating power-on based on a solid-state hard drive, characterized in that: The method comprises: When it is detected that the power supply voltage of the solid state drive is abnormal, the current first mapping table is flushed to the storage area of ​​the solid state drive; When it is detected that the power supply voltage returns to normal, reading the first mapping table in the storage area of ​​the solid-state drive, and restoring the temporary mapping table based on the first mapping table; Restoring the second mapping table when the voltage is abnormal according to the dirty page bitmap of the second mapping table before the voltage is abnormal and the temporary mapping table; The first mapping table is a mapping table from logical addresses to physical addresses, and the second mapping table is a mapping table from the physical addresses to the logical addresses; The step of restoring the second mapping table when the voltage is abnormal according to the dirty page bitmap of the second mapping table before the voltage is abnormal and the temporary mapping table includes: Loading the dirty page bitmap and the unupdated second mapping sub-table of the second mapping table in the storage area to the mainboard memory; Detecting a storage location where a complete second mapping table is stored at a preceding adjacent time before the voltage abnormality time; Loading the first mapping table from the storage location where the complete second mapping table is stored until the first mapping table corresponding to the voltage abnormality is completely loaded; The first mapping table in the storage area is loaded into the cache area of ​​the first mapping table, and all second mapping sub-tables are updated to complete the recovery of the second mapping table.

2. The method for accelerating power-on based on a solid-state hard drive according to claim 1, wherein: Before the step of flashing the current first mapping table to the storage area of ​​the solid state drive, the method includes: Splitting the second mapping table before the voltage abnormality into at least two second mapping sub-tables according to a preset splitting rule; Recording the update status of each second mapping sub-table according to the dirty page bitmap of the second mapping table; flushing all the second mapping sub-tables to the storage area, and storing the dirty page bitmap of the second mapping table in the management information in the storage area; Clearing the dirty page bitmap of the second mapping table; Writing the physical allocation address into the storage area of ​​the solid state drive, and writing the logical allocation address corresponding to the physical allocation address into the buffer of the first mapping table; If it is detected that the buffer area of ​​the first mapping table is full, the current first mapping table is flushed to the storage area of ​​the solid state drive.

3. The method for accelerating power-on based on a solid-state hard disk according to claim 2, wherein: The step of flashing the current first mapping table to the storage area of ​​the solid state drive includes: Flashing the first mapping table in the buffer to a storage area of ​​the solid-state drive; If the second mapping sub-table is not completely flushed to the storage area, the dirty page bitmaps of all the second mapping tables are stored in the storage area.

4. The method for accelerating power-on based on a solid-state hard disk according to claim 1, wherein: The step of loading the dirty page bitmap of the second mapping table and the unupdated second mapping sub-table in the storage area into the mainboard memory includes: Detecting the dirty page bitmap of the second mapping table in the storage area, and first loading all the dirty page bitmaps of the second mapping table storing system data into the mainboard memory; The unupdated second mapping sub-table is loaded into the mainboard memory.

5. The method for accelerating power-on based on a solid-state hard disk according to claim 2, wherein: The step of flushing the second mapping sub-table to the storage area includes: The second mapping sub-table is refreshed to the system data area at a preset time interval.

6. The method for accelerating power-on based on a solid-state hard disk according to claim 2, wherein: After the step of flashing the current first mapping table to the storage area of ​​the solid state drive, the method further includes: Storing the dirty page bitmap of the second mapping table in the storage area; A portion of the second mapping table is loaded into the storage area according to the dirty page bitmap of the second mapping table.

7. A solid state drive, characterized in that: The solid-state hard drive comprises: a detection module, configured to, when detecting that the power supply voltage of the solid-state hard disk is abnormal, flush the current first mapping table to the storage area of ​​the solid-state hard disk; a reading module, configured to read the first mapping table in the storage area of ​​the solid-state drive when it is detected that the power supply voltage returns to normal, and restore a temporary mapping table based on the first mapping table; A loading module, configured to restore the second mapping table when the voltage is abnormal according to the dirty page bitmap of the second mapping table before the voltage is abnormal and the temporary mapping table; The first mapping table is a mapping table from logical addresses to physical addresses, and the second mapping table is a mapping table from the physical addresses to the logical addresses; The step of restoring the second mapping table when the voltage is abnormal according to the dirty page bitmap of the second mapping table before the voltage is abnormal and the temporary mapping table includes: Loading the dirty page bitmap and the unupdated second mapping sub-table of the second mapping table in the storage area to the mainboard memory; Detecting a storage location where a complete second mapping table is stored at a preceding adjacent time before the voltage abnormality time; Loading the first mapping table from the storage location where the complete second mapping table is stored until the first mapping table corresponding to the voltage abnormality is completely loaded; The first mapping table in the storage area is loaded into the cache area of ​​the first mapping table, and all second mapping sub-tables are updated to complete the recovery of the second mapping table.

8. A computer device, characterized in that: The computer device includes a device body, a memory, and a processor, and the processor executes computer instructions stored in the memory, so that the computer device performs the steps of the accelerated power-on method based on the solid state drive according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that A computer program is stored thereon, and when the computer program is executed by a processor, the steps of the accelerated power-on method based on a solid state drive as claimed in any one of claims 1 to 6 are implemented.

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