Chip Mounting Method and Chip Mounting Device
By setting the design parameters and image processing technology of the alignment mark during the chip packaging process, the problem of alignment between the chip and the support plate is solved, and high-precision chip mount is achieved.
Patent Information
- Application Number
- CN202011085982.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-10-12
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2040-10-12
AI Technical Summary
During the chip packaging process, it is difficult to align the chip with the support plate, resulting in a reduction in mounting accuracy.
By setting the design parameters of the alignment mark on the first substrate, using image acquisition and theoretical cursor generation techniques to determine whether the alignment mark is in the design area, adjusting the substrate position to realize alignment, and using the alignment unit to perform precise alignment.
The precise alignment between the chip to be packaged and the support plate is achieved, and the accuracy of chip mounting is improved.
Smart Images

Figure CN114334770B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of chip packaging, and particularly to a chip mounting method and a chip mounting device. Background Art
[0002] With the development of technology, chips have been more and more widely used in social production and life, such as computers, sensors, displays, etc.
[0003] Currently, chips are increasingly developing towards miniaturization, intelligence, and high reliability. In the process of fabricating chips, it is necessary to package the chips to avoid adverse effects of external factors on the performance of the chips. During the process of packaging the chips, it is often necessary to mount the chips on a support plate. However, it is difficult to align the chips and the support plate during the packaging process, which reduces the mounting accuracy of the chips. Summary of the Invention
[0004] The purpose of the present disclosure is to provide a chip mounting method and a chip mounting device, which can achieve the alignment of the chip to be packaged and the support plate.
[0005] According to one aspect of the present disclosure, there is provided a chip mounting method for mounting after aligning a first substrate and a second substrate, one of the first substrate and the second substrate being a chip to be packaged and the other being a support plate, the chip mounting method comprising:
[0006] Judging whether a first alignment mark on the first substrate is located in a design area on the first substrate according to design parameters of the first alignment mark preset on the first substrate;
[0007] If the first alignment mark is located in the design area on the first substrate, aligning the first substrate and the second substrate according to the design parameters of the first alignment mark preset.
[0008] Further, the first alignment mark is an alignment hole, and the design parameter is a relative design coordinate. Judging whether the first alignment mark on the first substrate is located in the design area on the first substrate according to the design parameters of the first alignment mark preset on the first substrate includes:
[0009] Obtaining a physical image of the first substrate, the physical image showing the alignment hole;
[0010] Generating a theoretical cursor on the physical image according to the relative design coordinate of the center of the alignment hole preset, the coordinate of the center of the theoretical cursor being equal to the relative design coordinate of the center of the alignment hole preset;
[0011] If the center of the theoretical cursor is located within the alignment hole on the physical image, it is determined that the alignment hole on the first substrate is within the design area on the first substrate; if the center of the theoretical cursor is located outside the alignment hole on the physical image, it is determined that the alignment hole on the first substrate is outside the design area on the first substrate.
[0012] Further, the theoretical cursor includes two intersecting line segments, and the intersection point of the two line segments is the center of the theoretical cursor.
[0013] Further, the chip mounting method further includes:
[0014] If the first alignment mark is outside the design area on the first substrate, replace the first substrate or adjust the position of the first alignment mark on the first substrate until the first alignment mark is within the design area on the first substrate.
[0015] Further, the chip mounting method further includes:
[0016] Judge whether the second alignment mark on the second substrate is within the design area on the second substrate according to the design parameters of the second alignment mark preset on the second substrate;
[0017] If the first alignment mark is within the design area, aligning the first substrate and the second substrate according to the preset design parameters of the first alignment mark includes:
[0018] If the first alignment mark is within the design area of the first substrate and the second alignment mark is within the design area of the second substrate, align the first substrate and the second substrate according to the preset design parameters of the first alignment mark and the preset design parameters of the second alignment mark.
[0019] Further, if the second alignment mark is outside the design area on the second substrate, replace the second substrate or adjust the position of the second alignment mark on the second substrate until the second alignment mark is within the design area on the second substrate.
[0020] Further, the design parameter is a relative design coordinate. Aligning the first substrate and the second substrate according to the preset design parameters of the first alignment mark and the preset design parameters of the second alignment mark includes:
[0021] Determine the absolute design coordinates of the first alignment mark according to the relative design coordinates of the first alignment mark preset, and determine the absolute design coordinates of the second alignment mark according to the relative design coordinates of the second alignment mark preset;
[0022] Determine the offset between the first substrate and the second substrate according to the absolute design coordinates of the first alignment mark and the absolute design coordinates of the second alignment mark;
[0023] Translate or rotate one of the first substrate and the second substrate relative to the other substrate according to the offset.
[0024] According to one aspect of the present disclosure, there is provided a chip mounting device for mounting after aligning a first substrate and a second substrate, one of the first substrate and the second substrate being a chip to be encapsulated, and the other being a support plate. The chip mounting device includes:
[0025] A first judgment unit for judging whether the first alignment mark on the first substrate is located in the design area on the first substrate according to the design parameters of the first alignment mark preset on the first substrate;
[0026] An alignment unit for aligning the first substrate and the second substrate according to the design parameters of the first alignment mark preset when the first alignment mark is located in the design area on the first substrate.
[0027] Further, the first alignment mark is an alignment hole, the design parameter is a relative design coordinate, and the first judgment unit includes:
[0028] An image acquisition sub-unit for acquiring a physical image of the first substrate, the physical image showing the alignment hole;
[0029] A theoretical cursor generation sub-unit for generating a theoretical cursor on the physical image according to the relative design coordinates of the hole center of the alignment hole preset, the coordinate of the center of the theoretical cursor being equal to the relative design coordinates of the hole center of the alignment hole preset;
[0030] A judgment sub-unit for judging that the alignment hole on the first substrate is located in the design area on the first substrate when the center of the theoretical cursor is located in the alignment hole on the physical image, and for judging that the alignment hole on the first substrate is located outside the design area on the first substrate when the center of the theoretical cursor is located outside the alignment hole on the physical image.
[0031] Further, the chip mounting device further includes:
[0032] A second determination unit, configured to determine whether a second alignment mark on the second substrate is located in a design area on the second substrate according to design parameters of the second alignment mark preset on the second substrate;
[0033] The alignment unit is configured to align the first substrate and the second substrate according to the preset design parameters of the first alignment mark and the preset design parameters of the second alignment mark when the first alignment mark is located in the design area on the first substrate and the second alignment mark is located in the design area on the second substrate.
[0034] Further, the design parameter is a relative design coordinate, and the alignment unit includes:
[0035] An absolute design coordinate calculation sub-unit, configured to determine an absolute design coordinate of the first alignment mark according to the preset relative design coordinate of the first alignment mark when the first alignment mark is located in the design area on the first substrate, and configured to determine an absolute design coordinate of the second alignment mark according to the preset relative design coordinate of the second alignment mark when the second alignment mark is located in the design area on the second substrate;
[0036] An offset calculation sub-unit, configured to determine an offset between the first substrate and the second substrate according to the absolute design coordinate of the first alignment mark and the absolute design coordinate of the second alignment mark;
[0037] A driving sub-unit, configured to drive one of the first substrate and the second substrate to translate or rotate relative to the other substrate according to the offset.
[0038] In the chip mounting method and chip mounting device of the present disclosure, first, it is determined whether a first alignment mark on a first substrate is located in a design area on the first substrate according to design parameters of the first alignment mark preset on the first substrate. If the first alignment mark is located in the design area on the first substrate, then the first substrate and the second substrate are aligned according to the preset design parameters of the first alignment mark, thereby realizing the alignment of the chip to be encapsulated and the support plate. Description of the Drawings
[0039] Figure 1 is a flowchart of the chip mounting method according to an embodiment of the present disclosure.
[0040] Figure 2 is a schematic plan view of a first substrate in the chip mounting method according to an embodiment of the present disclosure.
[0041] Figure 3 is Figure 2 a sectional view taken along line A-A of the structure shown.
[0042] Figure 4 It is a flowchart of step S100 in the chip mounting method according to an embodiment of the present disclosure.
[0043] Figure 5 It is a schematic diagram after the completion of step S1002 in the chip mounting method according to an embodiment of the present disclosure.
[0044] Figure 6 is Figure 5 A partial schematic diagram of the shown structure.
[0045] Figure 7 is Figure 6 A schematic diagram of the theoretical cursor in the shown structure.
[0046] Figure 8 It is a block diagram of the chip mounting device according to an embodiment of the present disclosure.
[0047] Figure 9 It is a block diagram of the judgment unit in the chip mounting device according to an embodiment of the present disclosure.
[0048] Figure 10 It is another block diagram of the chip mounting device according to an embodiment of the present disclosure.
[0049] Figure 11 It is a block diagram of the alignment unit in the chip mounting device according to an embodiment of the present disclosure.
[0050] Explanation of reference numerals: 1, the first substrate; 2, the first alignment mark; 3, the theoretical cursor; 4, the line segment; 5, the intersection point; 6, the chip mounting device; 601, the first judgment unit; 6011, the image acquisition sub-unit; 6012, the theoretical cursor generation sub-unit; 6013, the judgment sub-unit; 602, the alignment unit; 6021, the absolute design coordinate calculation sub-unit; 6022, the offset calculation sub-unit; 6023, the driving sub-unit; 603, the second judgment unit. Detailed implementation manners
[0051] Here, the exemplary embodiments will be described in detail, and the examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are only examples of devices consistent with some aspects of the present disclosure as detailed in the appended claims.
[0052] The terms used in this disclosure are for the purpose of describing particular embodiments only and are not intended to limit the disclosure. Unless otherwise defined, the technical or scientific terms used in this disclosure should have the ordinary meaning as understood by those of ordinary skill in the art to which this disclosure pertains. The terms "first", "second" and similar words used in the specification and claims of this disclosure do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "a" or "an" do not denote a limitation of quantity, but rather denote the presence of at least one. "Plurality" or "several" means two or more. Unless otherwise indicated, words such as "front", "rear", "lower" and / or "upper" are for convenience only and are not limited to a single position or a spatial orientation. Words such as "comprising" or "including" mean that the elements or items appearing before "comprising" or "including" cover the elements or items listed after "comprising" or "including" and their equivalents, and do not exclude other elements or items. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, and may include electrical connections, whether direct or indirect. The singular forms "a", "the" and "said" used in the specification and appended claims of this disclosure are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
[0053] An embodiment of the present disclosure provides a chip mounting method. The chip mounting method is used for mounting after aligning a first substrate and a second substrate. One of the first substrate and the second substrate is a chip to be encapsulated, and the other is a support plate. That is to say, the chip mounting method is used for mounting after aligning the chip to be encapsulated and the support plate. The shapes of the chip to be encapsulated and the support plate can both be rectangular. Of course, they can also be other shapes. The support plate can be a steel plate or the like. In one embodiment of the present disclosure, the first substrate is the chip to be encapsulated, and the second substrate is the support plate. In another embodiment of the present disclosure, the first substrate is the support plate, and the second substrate is the chip to be encapsulated. As Figure 1 shown, the chip mounting method may include step S100 and step S110, where:
[0054] Step S100: Determine whether a first alignment mark on the first substrate is located in a design area on the first substrate according to design parameters of the first alignment mark preset on the first substrate.
[0055] Step S110: If the first alignment mark is located in the design area on the first substrate, align the first substrate and the second substrate according to the design parameters of the first alignment mark preset.
[0056] The chip mounting method according to the embodiments of the present disclosure first determines whether the first alignment mark on the first substrate is located in the design area on the first substrate according to the design parameters of the first alignment mark preset on the first substrate. If the first alignment mark is located in the design area on the first substrate, then the first substrate and the second substrate are aligned according to the preset design parameters of the first alignment mark, thereby realizing the alignment of the chip to be encapsulated and the support plate.
[0057] The following will detail each part of the chip mounting method according to the embodiments of the present disclosure:
[0058] In step S100, it is determined whether the first alignment mark on the first substrate is located in the design area on the first substrate according to the design parameters of the first alignment mark preset on the first substrate.
[0059] As Figure 2 and Figure 3 shown, the first alignment mark 2 can be an alignment hole. The center line of the alignment hole can be perpendicular to the first substrate 1, that is, the alignment hole extends along the thickness direction of the first substrate 1. The alignment hole can be a blind hole, but the embodiments of the present disclosure do not make special limitations on this. The shape of the alignment hole can be circular. Of course, it can also be square, but the present disclosure is not limited thereto. The shape of the alignment hole can also be other shapes such as triangular. The design parameters can be relative design coordinates. Taking the first alignment mark 2 as an alignment hole as an example, the relative design coordinates of the preset first alignment mark 2 can be the relative design coordinates of the center of the hole of the preset alignment hole. The relative design coordinates are coordinate values generated with a relative position as the reference origin. Taking the number of the alignment holes as two as an example, the relative design coordinates of the center of the hole of one alignment hole can be the coordinate values generated with the center of the hole of the other alignment hole as the reference origin. When the first alignment mark 2 is located in the design area on the first substrate 1, the present disclosure can determine that the position error of the first alignment mark 2 is within the design allowable error range. Among them, the present disclosure can determine the size of the above design area according to the process capability index (CpK) to ensure that the process capability index (CpK) is greater than 1 when the first alignment mark 2 is at any position in the design area, that is, the manufacturing process of the first substrate 1 meets the requirements and the position of the first alignment mark 2 meets the design requirements. As Figure 4 shown, taking the first alignment mark 2 as an alignment hole as an example, step S100 may include:
[0060] Step S1001, obtain a physical image of the first substrate, and the physical image shows the alignment hole.
[0061] As Figure 2As shown, the physical image is a plan view of the first substrate 1. The plan view of the first substrate 1 is a plan view of the first substrate 1 in the thickness direction. Taking the first substrate 1 placed horizontally as an example, the plan view of the first substrate 1 in the thickness direction can be a top view or a bottom view of the first substrate 1. The physical image can be obtained by a photodetector. The photodetector can be a camera, a scanner, etc., but the embodiments of the present disclosure do not make special limitations on this. The photodetector can be connected to a display for sending the obtained physical image information to the display so that the display displays the physical image. In order to improve the automation degree of the chip mounting method, a controller can also be adopted in the mounting process. The controller is connected to the photodetector. The controller is used to respond to an instruction information to control the photodetector to obtain the physical image of the first substrate 1 and control the photodetector to send the obtained physical image to the display.
[0062] Step S1002: Generate a theoretical cursor on the physical image according to the relative design coordinates of the hole centers of the pre-set alignment holes, and the coordinates of the center of the theoretical cursor are equal to the relative design coordinates of the hole centers of the pre-set alignment holes.
[0063] As Figure 5 , Figure 6 and Figure 7 shown, the theoretical cursor 3 can include a plurality of line segments 4. The plurality of line segments 4 all intersect at a point. The plurality of line segments 4 can be two line segments 4. Of course, it can also be three, four or more line segments 4. Taking the plurality of line segments 4 as two line segments 4 as an example, the intersection point 5 of the two line segments 4 can be the midpoint of each line segment 4. Of course, it can also be the end point of each line segment 4. The present disclosure is not limited thereto. The intersection point 5 of the two line segments 4 can be the center of the above-mentioned theoretical cursor 3, that is, the coordinates of the intersection point 5 of the two line segments 4 are the design coordinates of the hole center of the alignment hole. Taking the alignment hole as a circular hole as an example, the distances from the end points of each of the above line segments 4 to the intersection point 5 of the two line segments 4 are all equal and equal to the design radius of the alignment hole. By forming the theoretical cursor 3 with two intersecting line segments 4, the theoretical cursor 3 is made easier to identify, which provides convenience for subsequent steps. In addition, the two intersecting line segments 4 can be perpendicular to each other, but the embodiments of the present disclosure do not make special limitations on this. In other embodiments of the present disclosure, the theoretical cursor 3 can also be of other shapes, which will not be elaborated herein. The present disclosure can input the relative design coordinates of the hole centers of the pre-set alignment holes into the above-mentioned controller, and the controller generates the theoretical cursor 3 on the physical image according to the relative design coordinates of the hole centers of the pre-set alignment holes.
[0064] Step S1003: If the center of the theoretical cursor is within the alignment hole on the physical image, it is determined that the alignment hole on the first substrate is within the design area on the first substrate; if the center of the theoretical cursor is outside the alignment hole on the physical image, it is determined that the alignment hole on the first substrate is outside the design area on the first substrate.
[0065] As Figure 5 , Figure 6 and Figure 7 shown, taking the theoretical cursor 3 including two intersecting line segments 4 as an example, if the center of the theoretical cursor 3 is within the alignment hole on the physical image, determining that the alignment hole on the first substrate 1 is within the design area on the first substrate 1 includes: if the intersection point 5 of the two line segments 4 is within the alignment hole on the physical image, it is determined that the alignment hole on the first substrate 1 is within the design area on the first substrate 1. If the center of the theoretical cursor 3 is outside the alignment hole on the physical image, it is determined that the alignment hole on the first substrate 1 is outside the design area on the first substrate 1.
[0066] In step S110, if the first alignment mark is within the design area on the first substrate, the first substrate and the second substrate are aligned according to the pre-set design parameters of the first alignment mark.
[0067] Before aligning the first substrate and the second substrate, the chip mounting method of the present disclosure embodiment may further include: judging whether the second alignment mark on the second substrate is within the design area on the second substrate according to the pre-set design parameters of the second alignment mark on the second substrate. The second alignment mark may also be an alignment hole. Among them, the principle of judging whether the second alignment mark on the second substrate is within the design area on the second substrate is the same as that of the above step S100, and the present disclosure will not elaborate herein. Based on this, the above step S110 may include: if the first alignment mark is within the design area of the first substrate and the second alignment mark is within the design area of the second substrate, the first substrate and the second substrate are aligned according to the pre-set design parameters of the first alignment mark and the pre-set design parameters of the second alignment mark.
[0068] Taking the design parameters as the relative design coordinates as an example, the alignment of the first substrate and the second substrate according to the design parameters of the first alignment mark set in advance and the design parameters of the second alignment mark set in advance may include: determining the absolute design coordinates of the first alignment mark according to the relative design coordinates of the first alignment mark set in advance, and determining the absolute design coordinates of the second alignment mark according to the relative design coordinates of the second alignment mark set in advance; determining the offset between the first substrate and the second substrate according to the absolute design coordinates of the first alignment mark and the absolute design coordinates of the second alignment mark; translating or rotating one of the first substrate and the second substrate relative to the other substrate according to the offset. The absolute design coordinates are the coordinate values generated with a fixed position as the fixed origin.
[0069] In addition, the chip mounting method according to the embodiment of the present disclosure may further include: if the first alignment mark is outside the design area on the first substrate, replacing the first substrate or adjusting the position of the first alignment mark on the first substrate until the first alignment mark is within the design area on the first substrate; if the second alignment mark is outside the design area on the second substrate, replacing the second substrate or adjusting the position of the second alignment mark on the second substrate until the second alignment mark is within the design area on the second substrate.
[0070] The embodiment of the present disclosure also provides a chip mounting device for implementing the chip mounting method described in any of the above embodiments. The chip mounting device is used for mounting after aligning the first substrate and the second substrate. One of the first substrate and the second substrate is a chip to be encapsulated, and the other is a support plate. As Figure 8 shown, the chip mounting device 6 includes a first judgment unit 601 and an alignment unit 602, wherein:
[0071] The first judgment unit 601 is used for judging whether the first alignment mark on the first substrate is within the design area on the first substrate according to the design parameters of the first alignment mark set in advance on the first substrate. The alignment unit 602 is used for aligning the first substrate and the second substrate according to the design parameters of the first alignment mark set in advance when the first alignment mark is within the design area on the first substrate.
[0072] As Figure 8 shown, for the chip mounting device 6 according to the embodiment of the present disclosure, the first judgment unit 601 judges whether the first alignment mark on the first substrate is within the design area on the first substrate, and the alignment unit 602 can align the first substrate and the second substrate according to the design parameters of the first alignment mark set in advance when the first alignment mark is within the design area on the first substrate, thereby realizing the alignment of the chip to be encapsulated and the support plate.
[0073] The following will describe each part of the chip mounting device according to the embodiment of the present disclosure in detail:
[0074] As Figure 9 shown, the first determination unit 601 may include an image acquisition subunit 6011, a theoretical cursor generation subunit 6012, and a determination subunit 6013. Taking the first alignment mark as the alignment hole as an example, the image acquisition subunit 6011 is configured to acquire a physical image of the first substrate, and the physical image shows the alignment hole. The image acquisition subunit 6011 may include a photodetector to acquire the physical image. The photodetector may be a camera, a scanner, etc. Taking the photodetector as a camera as an example, the photodetector may be two coaxial cameras that shoot upward and downward.
[0075] As Figure 9 shown, the theoretical cursor generation subunit 6012 is configured to generate a theoretical cursor on the physical image according to the relative design coordinates of the hole center of the alignment hole set in advance, and the coordinates of the center of the theoretical cursor are equal to the relative design coordinates of the hole center of the alignment hole set in advance. The theoretical cursor generation subunit 6012 may include a controller, a display, and a memory. Both the display and the memory are connected to the controller. The controller is connected to the image acquisition subunit 6011 to send the physical image acquired by the image acquisition subunit 6011 to the display to display the physical image. The memory stores the relative design coordinates of the hole center of the alignment hole set in advance, and the controller can acquire the relative design coordinates and generate a theoretical cursor on the physical image according to the relative design coordinates.
[0076] As Figure 9 shown, the determination subunit 6013 is configured to determine that the alignment hole on the first substrate is located within the design area on the first substrate when the center of the theoretical cursor is within the alignment hole on the physical image, and is configured to determine that the alignment hole on the first substrate is located outside the design area on the first substrate when the center of the theoretical cursor is outside the alignment hole on the physical image. An image recognizer may be included in the determination subunit 6013. The image recognizer may be connected to the above-mentioned display to recognize the center of the theoretical cursor and the alignment hole on the physical image displayed on the display. An image recognition model may be included in the image recognizer, and the image recognition model may be obtained through model training.
[0077] As Figure 10As shown, the above chip mounting device 6 may further include a second determination unit 603. The second determination unit 603 is configured to determine whether the second alignment mark on the second substrate is located in the design area on the second substrate according to the design parameters of the second alignment mark preset on the second substrate. Among them, the working principle of the second determination unit 603 is the same as that of the above-mentioned first determination unit 601, and it may also include the above-mentioned photodetector, controller, display, memory, and image recognizer. Taking the photodetector as a camera as an example, the camera included in the first determination unit 601 may operate coaxially with the camera included in the second determination unit 603. In other embodiments of the present disclosure, the first determination unit 601 and the second determination unit 603 may share a photodetector, and the photodetector may first acquire an image of the first substrate and then acquire an image of the second substrate.
[0078] As Figure 11 shown, the above alignment unit 602 is configured to align the first substrate and the second substrate according to the preset design parameters of the first alignment mark and the preset design parameters of the second alignment mark when the first alignment mark is located in the design area on the first substrate and the second alignment mark is located in the design area on the second substrate. Taking the design parameter as the relative design coordinate as an example, the alignment unit 602 may include an absolute design coordinate calculation sub-unit 6021, an offset calculation sub-unit 6022, and a driving sub-unit 6023. The absolute design coordinate calculation sub-unit 6021 is configured to determine the absolute design coordinate of the first alignment mark according to the preset relative design coordinate of the first alignment mark when the first alignment mark is located in the design area on the first substrate, and is configured to determine the absolute design coordinate of the second alignment mark according to the preset relative design coordinate of the second alignment mark when the second alignment mark is located in the design area on the second substrate. The offset calculation sub-unit 6022 is configured to determine the offset between the first substrate and the second substrate according to the absolute design coordinate of the first alignment mark and the absolute design coordinate of the second alignment mark. In particular, setting the camera included in the first determination unit 601 to operate coaxially with the camera included in the second determination unit 603 can facilitate the calculation of the offset more. The driving sub-unit 6023 is configured to drive one of the first substrate and the second substrate to translate or rotate relative to the other substrate according to the offset to align the first substrate and the second substrate. The driving sub-unit 6023 may be a driving mechanism, such as a motor, etc.
[0079] The above are only the preferred embodiments of the present disclosure, and do not impose any form of limitation on the present disclosure. Although the present disclosure has been disclosed above in the preferred embodiments, it is not intended to limit the present disclosure. Any person skilled in the art can make some changes or modifications to equivalent embodiments with equivalent changes within the scope of the technical solution of the present disclosure. However, as long as it does not depart from the content of the technical solution of the present disclosure, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present disclosure still fall within the scope of the technical solution of the present disclosure.
Claims
1. A chip mounting method for performing mounting after aligning a first substrate and a second substrate, wherein one of the first substrate and the second substrate is a chip to be encapsulated and the other is a support plate, characterized in that The chip mounting method includes: Judging whether the first alignment mark on the first substrate is located in the design area on the first substrate according to the design parameters of the first alignment mark preset on the first substrate; If the first alignment mark is located in the design area on the first substrate, aligning the first substrate and the second substrate according to the design parameters of the first alignment mark preset; The first alignment mark is an alignment hole, and the design parameter is a relative design coordinate. Judging whether the first alignment mark on the first substrate is located in the design area on the first substrate according to the design parameters of the first alignment mark preset on the first substrate includes: Obtaining a physical image of the first substrate, where the physical image shows the alignment hole; Generating a theoretical cursor on the physical image according to the relative design coordinates of the center of the alignment hole preset, and the coordinates of the center of the theoretical cursor are equal to the relative design coordinates of the center of the alignment hole preset; If the center of the theoretical cursor is located within the alignment hole on the physical image, it is determined that the alignment hole on the first substrate is located in the design area on the first substrate; if the center of the theoretical cursor is located outside the alignment hole on the physical image, it is determined that the alignment hole on the first substrate is located outside the design area on the first substrate.
2. The chip mounting method according to claim 1, wherein The theoretical cursor includes two intersecting line segments, and the intersection point of the two line segments is the center of the theoretical cursor.
3. The chip mounting method according to claim 1, wherein, The chip mounting method further includes: If the first alignment mark is located outside the design area on the first substrate, replacing the first substrate or adjusting the position of the first alignment mark on the first substrate until the first alignment mark is located in the design area on the first substrate.
4. The chip mounting method according to claim 1, characterized in that The chip mounting method further includes: Judging whether the second alignment mark on the second substrate is located in the design area on the second substrate according to the design parameters of the second alignment mark preset on the second substrate; Aligning the first substrate and the second substrate according to the design parameters of the first alignment mark preset includes: If the first alignment mark is located in the design area of the first substrate and the second alignment mark is located in the design area of the second substrate, aligning the first substrate and the second substrate according to the design parameters of the first alignment mark preset and the design parameters of the second alignment mark preset.
5. The chip mounting method according to claim 4, characterized in that If the second alignment mark is located outside the design area on the second substrate, replacing the second substrate or adjusting the position of the second alignment mark on the second substrate until the second alignment mark is located in the design area on the second substrate.
6. The chip mounting method according to claim 4, wherein The design parameter is a relative design coordinate. Aligning the first substrate and the second substrate according to the design parameters of the first alignment mark preset and the design parameters of the second alignment mark preset includes: Determine the absolute design coordinates of the first alignment mark according to the relative design coordinates of the first alignment mark preset, and determine the absolute design coordinates of the second alignment mark according to the relative design coordinates of the second alignment mark preset; Determine the offset between the first substrate and the second substrate according to the absolute design coordinates of the first alignment mark and the absolute design coordinates of the second alignment mark; Translate or rotate one of the first substrate and the second substrate relative to the other substrate according to the offset.
7. A chip mounting device for performing mounting after aligning a first substrate and a second substrate, where one of the first substrate and the second substrate is a chip to be encapsulated and the other is a support plate, characterized in that The chip mounting device includes: A first judgment unit, configured to judge whether the first alignment mark on the first substrate is located in the design area on the first substrate according to the design parameters of the first alignment mark preset on the first substrate; An alignment unit, configured to align the first substrate and the second substrate according to the design parameters of the first alignment mark preset when the first alignment mark is located in the design area on the first substrate; The first alignment mark is an alignment hole, the design parameter is a relative design coordinate, and the first judgment unit includes: An image acquisition sub-unit, configured to acquire a physical image of the first substrate, and the physical image shows the alignment hole; A theoretical cursor generation sub-unit, configured to generate a theoretical cursor on the physical image according to the relative design coordinates of the center of the hole of the alignment hole preset, and the coordinates of the center of the theoretical cursor are equal to the relative design coordinates of the center of the hole of the alignment hole preset; A judgment sub-unit, configured to judge that the alignment hole on the first substrate is located in the design area on the first substrate when the center of the theoretical cursor is located inside the alignment hole on the physical image, and configured to judge that the alignment hole on the first substrate is located outside the design area on the first substrate when the center of the theoretical cursor is located outside the alignment hole on the physical image.
8. The chip mounting device according to claim 7, characterized in that, The chip mounting device further includes: A second judgment unit, configured to judge whether the second alignment mark on the second substrate is located in the design area on the second substrate according to the design parameters of the second alignment mark preset on the second substrate; The alignment unit is configured to align the first substrate and the second substrate according to the design parameters of the first alignment mark preset and the design parameters of the second alignment mark preset when the first alignment mark is located in the design area on the first substrate and the second alignment mark is located in the design area on the second substrate.
9. The chip mounting device according to claim 8, characterized in that, The design parameter is a relative design coordinate, and the alignment unit includes: An absolute design coordinate calculation sub-unit, configured to determine the absolute design coordinates of the first alignment mark according to the relative design coordinates of the first alignment mark preset when the first alignment mark is located in the design area on the first substrate, and configured to determine the absolute design coordinates of the second alignment mark according to the relative design coordinates of the second alignment mark preset when the second alignment mark is located in the design area on the second substrate; An offset calculation sub-unit, configured to determine an offset between the first substrate and the second substrate according to the absolute design coordinates of the first alignment mark and the absolute design coordinates of the second alignment mark; A driving sub-unit, configured to drive one of the first substrate and the second substrate to translate or rotate relative to the other substrate according to the offset.
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