Semiconductor devices

Abstract

The purpose is to provide a technology that can realize the miniaturization of a semiconductor device. The semiconductor device comprises: an insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member arranged on the insulating substrate and including a first opposing portion and a second opposing portion located on opposite sides relative to the first semiconductor element when viewed from above; a first wire connected to the first semiconductor element and the first opposing portion; and a second wire connected to the first semiconductor element and the second opposing portion, located on the opposite side of the first wire relative to the connection point between the first wire and the first semiconductor element when viewed from above.

Description

Technical Field

[0001] The present invention relates to semiconductor devices. Background Art

[0002] In recent years, with the miniaturization of semiconductor elements and the reduction in surface area, it is sometimes impossible to bond a sufficient number of wires on the semiconductor element, and the current density per wire increases. In addition, the heat generated by the wire caused by the increase in current density sometimes impairs the reliability of the semiconductor device. Various technologies for solving such problems have been proposed. For example, Patent Document 1 proposes the following technology, that is, by seam welding the wires on the busbar, on the semiconductor element, and on the busbar, twice the number of wires as usual can be bonded on the semiconductor element.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2009-206140

[0004] However, in the technology of Patent Document 1, the insulating layer provided with the busbar is configured separately from the semiconductor element. In such a structure, in order to prevent the busbar from being displaced from the upper part of the insulating layer, the size of the insulating layer needs to be set larger. As a result, there is a problem that it is difficult to miniaturize the semiconductor device. Summary of the invention

[0005] Therefore, the present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a technology capable of achieving miniaturization of a semiconductor device.

[0006] The semiconductor device of the present invention comprises: an insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member arranged on the insulating substrate and comprising a first relative portion and a second relative portion which are located on opposite sides of each other relative to the first semiconductor element and are electrically connected to each other when viewed from above; a first wire connected to the first semiconductor element and the first relative portion; and a second wire connected to the first semiconductor element and the second relative portion and located on the opposite side of the first wire relative to the connection point between the first wire and the first semiconductor element when viewed from above.

[0007] Effects of the Invention

[0008] According to the present invention, the second wire is located on the opposite side of the connection point between the first wire and the first semiconductor element in a plan view, and the conductive member is arranged on the insulating substrate connected to the first semiconductor element. With such a structure, the semiconductor device can be miniaturized. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1This is a cross-sectional view schematically showing the structure of the semiconductor device according to the first embodiment.

[0010] Figure 2 It is a plan view showing the structure of the semiconductor device according to the first embodiment.

[0011] Figure 3 It is a side view showing the structure of the semiconductor device according to the first embodiment.

[0012] Figure 4 This is a circuit diagram showing the structure of the semiconductor device according to the first embodiment.

[0013] Figure 5 It is a plan view showing the structure of a semiconductor device according to the second embodiment.

[0014] Figure 6 It is a plan view showing the structure of a semiconductor device according to a third embodiment.

[0015] Figure 7 It is a plan view showing the structure of a semiconductor device according to a third embodiment.

[0016] Figure 8 It is a top view showing the structure of a semiconductor device according to a fourth embodiment.

[0017] Fig. 9 It is a side view showing the structure of a semiconductor device according to a fourth embodiment.

[0018] Fig.10 It is a top view showing the structure of a semiconductor device according to the fifth embodiment.

[0019] Fig.11 It is a top view showing the structure of a semiconductor device according to a sixth embodiment.

[0020] Fig.12 It is a side view showing the structure of a semiconductor device according to a sixth embodiment.

[0021] Fig.13 It is a top view showing the structure of a semiconductor device according to a sixth embodiment.

[0022] Fig.14 It is a top view showing the structure of a semiconductor device according to a seventh embodiment. DETAILED DESCRIPTION

[0023] Below, while referring to the attached Figure 1The embodiments are described in the following. The features described in the following embodiments are all illustrative, and not all features are necessary. In addition, in the description shown below, in multiple embodiments, the same structural elements are marked with the same or similar reference numerals, and mainly different structural elements are described. In addition, in the description recorded below, specific positions and directions such as "upper", "lower", "left", "right", "front" or "back" are not necessarily consistent with the directions during actual implementation.

[0024] <Implementation method 1>

[0025] Next, a case where the semiconductor device according to the first embodiment is a semiconductor module will be described. Figure 1 is a cross-sectional view showing a schematic structure of a semiconductor device according to the first embodiment. Figure 1 is a diagram showing a schematic structure of a semiconductor device, and therefore Figure 2 The following figures are slightly different.

[0026] Figure 1 The semiconductor device includes a base plate 11, a housing 12, a cover 13, an external control terminal 21, an external connection terminal 22, an insulating substrate 31, a first semiconductor element 33a, a control wire 34, an emitter wire 35, a connection wire 36, a packaging material 37, and a plurality of circuit patterns 32. Figure 1 Although not shown in the figure, the semiconductor device has a second semiconductor element 33b similar to the first semiconductor element 33a.

[0027] The housing 12 is disposed on the base plate 11 made of a metal such as copper, and surrounds a portion of the base plate 11. A container body that accommodates the first semiconductor element 33a and the like in an internal space is formed by the base plate 11 and the housing 12. The lid 13 seals the internal space of the container body by blocking the opening of the housing 12.

[0028] The external control terminal 21 and the external connection terminal 22 are each made of, for example, a metal plate. One end of the external control terminal 21 is located outside the housing 12 and is connected to the outside of the semiconductor device (for example, an external terminal). The other end of the external control terminal 21 is located inside the housing 12, that is, the internal space of the container body, and is connected to the internal structural elements of the semiconductor device. Similarly, one end of the external connection terminal 22 is located outside the housing 12, and the other end of the external connection terminal 22 is located inside the housing 12.

[0029] Circuit patterns 32 made of metal are arranged on the upper surface and the lower surface of the insulating substrate 31. In addition, a plurality of circuit patterns 32 are arranged on the upper surface of the insulating substrate 31 so as to be separated from each other.

[0030] The insulating substrate 31 is connected to a portion of the base plate 11 surrounded by the case 12 via the circuit pattern 32 on the lower surface side of the insulating substrate 31 and the solder 38 a .

[0031] The first semiconductor element 33a is connected to the insulating substrate 31 via the circuit pattern 32 on the upper surface side and the solder 38b. The first semiconductor element 33a is, for example, a semiconductor switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

[0032] The control wire 34 connects the portion of the external control terminal 21 located in the internal space to the control electrode (e.g., gate electrode) disposed on the first semiconductor element 33a. The emitter wire 35 connects the controlled electrode (e.g., emitter electrode) disposed on the first semiconductor element 33a to the circuit pattern 32. The connection wire 36 connects the circuit pattern 32 to which the emitter wire 35 is connected to the portion of the external connection terminal 22 located in the internal space.

[0033] The sealing material 37 is, for example, gel, and seals the insulating substrate 31 , the first semiconductor element 33 a , the control wire 34 , the emitter wire 35 , the connection wire 36 , the plurality of circuit patterns 32 , and the like.

[0034] Figure 2 is a plan view showing the structure of the semiconductor device according to the first embodiment. Figure 3 is a side view showing the structure of the semiconductor device according to the first embodiment. Figure 2 and Figure 3 The picture shows Figure 1 part of the structure.

[0035] Figure 1 The circuit pattern 32 on the upper surface side of the insulating substrate 31 includes Figure 2 In addition, wet etching, which can form a pattern having a width of about 1 mm, is used to form the circuit pattern 32 such as the collector pattern 32a, the emitter pattern 32b, and the control pattern 32c.

[0036] The collector pattern 32a is a circuit pattern 32 connected to the first semiconductor element 33a via the solder 38b. Figure 2, similarly to the first semiconductor element 33a, a second semiconductor element 33b is shown connected to the collector pattern 32a via a solder 38b. The second semiconductor element 33b is, for example, a diode such as a PND (PN junction diode) or an SBD (Schottky barrier diode).

[0037] The emitter pattern 32b is a conductive member including a first opposing portion 32b1 and a second opposing portion 32b2. The first opposing portion 32b1 and the second opposing portion 32b2 are located on opposite sides of the first semiconductor element 33a when viewed from above. Figure 2 In the example, the second opposing portion 32b2 is located directly opposite to the first opposing portion 32b1 with respect to the first semiconductor element 33a, but as described later, the present invention is not limited to this. The first opposing portion 32b1 and the second opposing portion 32b2 are electrically connected to each other and have the same potential.

[0038] The control pattern 32 c is connected only to the control wire 34 between the external control terminal 21 and the first semiconductor element 33 a .

[0039] Figure 1 The emitter lead 35 comprises Figure 2 The first wire, namely the first emitter wire 35a, and the second wire, namely the second emitter wire 35b.

[0040] The first emitter wire 35a is connected to the controlled electrode of the first semiconductor element 33a and the first facing portion 32b1. The second emitter wire 35b is connected to the controlled electrode of the first semiconductor element 33a and the second facing portion 32b2.

[0041] And, if Figure 2 As shown in FIG. 1 , the second emitter wire 35b is located on the opposite side of the first emitter wire 35a relative to the connection point between the first emitter wire 35a and the first semiconductor element 33a when viewed from above. In the first embodiment, the extending direction of the first emitter wire 35a and the extending direction of the second emitter wire 35b form a right angle (an angle of 180 degrees) when viewed from above. However, as described in the seventh embodiment, the extending direction of the first emitter wire 35a and the extending direction of the second emitter wire 35b may form an obtuse angle (an angle greater than 90 degrees and less than 180 degrees) when viewed from above.

[0042] In addition, Figure 2 In the example of FIG. 5 , the first emitter wire 35 a and the second emitter wire 35 b are one wire bonded by seam welding, but the present invention is not limited thereto and may be separated.

[0043] Similar to the first semiconductor element 33a, the second semiconductor element 33b is connected to the first opposing portion 32b1 via the first emitter wire 35a, and is connected to the second opposing portion 32b2 via the second emitter wire 35b.

[0044] Figure 4 is with Figure 2 The second semiconductor element 33b, i.e., a diode, is connected in parallel with the first semiconductor element 33a, i.e., a semiconductor switch element, and functions as a freewheeling diode.

[0045] also, Figure 4 The collector wiring 41 is equivalent to Figure 2 The collector pattern 32a. Figure 4 The emitter wiring 42 is equivalent to Figure 2 The emitter pattern 32b, the first emitter wire 35a and the second emitter wire 35b. Figure 4 The control wiring 43 is equivalent to Figure 2 The control pattern 32c and the control wire 34 are provided.

[0046] <Summary of Implementation Method 1>

[0047] According to the semiconductor device of the present embodiment 1 as described above, the second emitter wire 35b is located on the opposite side of the first emitter wire 35a relative to the connection point between the first emitter wire 35a and the first semiconductor element 33a when viewed from above. According to such a structure, the wire can be bonded to the emitter pattern 32b, the first semiconductor element 33a and the emitter pattern 32b arranged roughly in a straight line. Therefore, even in the case where a sufficient number of wires cannot be bonded to the first semiconductor element 33a, the wire can be bonded. Therefore, the number of wires and the heat generation of the wires can be maintained without enlarging the size of the semiconductor device, thereby improving the reliability of the wire wiring.

[0048] In addition, in the first embodiment, the emitter pattern 32b is arranged on the insulating substrate 31 to which the first semiconductor element 33a is connected. As a result, the insulating space between the first semiconductor element 33a and the emitter pattern 32b can be reduced when viewed from above, so that the semiconductor device can be miniaturized. In addition, the layout of the emitter pattern 32b can be easily changed, so the versatility in the manufacture of the semiconductor device can be improved.

[0049] In addition, the semiconductor device according to the first embodiment has the control pattern 32c, but it is not necessary to have the control pattern 32c. However, by having the control pattern 32c, the degree of freedom in designing the layout can be increased, and thus further miniaturization of the semiconductor device can be expected. In addition, the semiconductor device according to the first embodiment has the second semiconductor element 33b, but it is not necessary to have the second semiconductor element 33b.

[0050] <Implementation method 2>

[0051] Figure 5 is a top view showing the structure of the semiconductor device according to the second embodiment, Figure 2 The corresponding figure.

[0052] like Figure 5 As shown, the semiconductor device according to the second embodiment includes a plurality of first semiconductor elements 33 a and a plurality of second semiconductor elements 33 b , but does not include the control pattern 32 c .

[0053] Each of the plurality of first semiconductor elements 33a is connected to the emitter pattern 32b through the first emitter wire 35a and the second emitter wire 35b, similarly to the first semiconductor element 33a of Embodiment 1. Thus, the plurality of first semiconductor elements 33a are connected in parallel to each other through the plurality of first emitter wires 35a, the plurality of second emitter wires 35b, and the emitter pattern 32b, and can be driven in parallel. Similarly, the plurality of second semiconductor elements 33b are connected in parallel to each other through the plurality of first emitter wires 35a, the plurality of second emitter wires 35b, and the emitter pattern 32b.

[0054] According to the semiconductor device according to the second embodiment as described above, the plurality of first semiconductor elements 33 a can be driven in parallel, and thus, an increase in the capacity of the semiconductor device can be expected.

[0055] <Implementation method 3>

[0056] Figure 6 and Figure 7 is a top view showing the structure of the semiconductor device according to the third embodiment, Figure 2 The corresponding figure.

[0057] In this embodiment 3, unlike the embodiment 2, Figure 5 The structure of the control pattern 32c is the same as that of the structure of the control pattern 32c. Figure 6 As shown, each of the plurality of first semiconductor elements 33a is provided with a control pattern 32c, and the control pattern 32c may be provided as shown in FIG. Figure 7As shown, a common control pattern 32c is provided in a plurality of first semiconductor elements 33a. According to such a structure, the degree of freedom in designing the layout can be improved compared with the structure of the second embodiment, and thus miniaturization of the semiconductor device can be expected.

[0058] Furthermore, as shown in the third embodiment, when the control pattern 32 c is arranged at the end of another circuit pattern 32 such as the collector pattern 32 a , the possibility of the control lead 34 being electrically connected to the other circuit pattern 32 can be reduced.

[0059] <Implementation method 4>

[0060] Figure 8 is a top view showing the structure of a semiconductor device according to the fourth embodiment, Figure 2 The corresponding figure. Fig. 9 is a side view showing the structure of a semiconductor device according to the fourth embodiment, Figure 3 The corresponding figure.

[0061] like Fig. 9 As shown, in the fourth embodiment, the control wires 34 between the control electrodes of the plurality of first semiconductor elements 33a are seam-welded to the control electrodes. Therefore, in the fourth embodiment, instead of providing a plurality of control wires 34 for each of the plurality of first semiconductor elements 33a, one control wire 34 is provided for each of the plurality of first semiconductor elements 33a. The control wire 34 only needs to be seam-welded to one or more control electrodes. According to the semiconductor device according to the fourth embodiment as described above, the wiring of the control wire 34 becomes easy.

[0062] In addition, if Figure 8 As shown in the fourth embodiment, the control wire 34 passes through the upper portion between the end of the first emitter wire 35a away from the second emitter wire 35b and the end of the second emitter wire 35b away from the first emitter wire 35a. With such a structure, the wiring of the control wire 34 becomes easy. Figure 8 Unlike the example, when the first emitter wire 35a and the second emitter wire 35b are separated, the control wire 34 is configured to pass over a portion between the first emitter wire 35a and the second emitter wire 35b.

[0063] <Implementation method 5>

[0064] Fig.10 is a top view showing the structure of a semiconductor device according to the fifth embodiment, Figure 2 The corresponding figure.

[0065] like Fig.10As shown, in the fifth embodiment, the second semiconductor element 33b is connected to the first emitter wire 35a between the first semiconductor element 33a and the first opposing portion 32b1 or the second emitter wire 35b between the first semiconductor element 33a and the second opposing portion 32b2.

[0066] According to the semiconductor device of the fifth embodiment, the first semiconductor element 33a and the second semiconductor element 33b share the first emitter wire 35a or the second emitter wire 35b. This can reduce the number of wires in the entire semiconductor device, and thus can reduce the size or increase the capacity of the semiconductor device.

[0067] <Implementation method 6>

[0068] Fig.11 is a top view showing the structure of a semiconductor device according to the sixth embodiment, Figure 2 The corresponding figure. Fig.12 is a side view showing the structure of a semiconductor device according to the sixth embodiment, Figure 3 The corresponding figure.

[0069] The conductive member according to the first to fifth embodiments is an emitter pattern 32b including a first opposing portion 32b1 and a second opposing portion 32b2. Fig.11 and Fig.12 The emitter pattern 32b shown includes the first copper block 32b3 and the second copper block 32b4, and the emitter pattern 32b does not include the first opposing portion 32b1 and the second opposing portion 32b2.

[0070] like Fig.12 As shown in the figure, the first copper block 32b3 and the second copper block 32b4 correspond to the first opposing portion 32b1 and the second opposing portion 32b2, and are arranged on the emitter pattern 32b via the solder 38c. In the case where the first copper block 32b3 and the second copper block 32b4 cannot be supported by the solder 38c alone, Fig.12 As shown, an insulating member 39 is disposed between the first copper block 32b3 and the second copper block 32b4 and the collector pattern 32a. Fig.13 As shown, a plurality of first copper blocks 32b3 and a plurality of second copper blocks 32b4 are arranged.

[0071] According to the semiconductor device according to the sixth embodiment, the emitter pattern 32b that does not include the first opposing portion 32b1 and the second opposing portion 32b2 can be used. As a result, the insulating space between the first semiconductor element 33a and the first opposing portion 32b1 and the second opposing portion 32b2 can be reduced when viewed from above, thereby miniaturizing the semiconductor device.

[0072] <Implementation method 7>

[0073] Fig.14 is a top view showing the structure of a semiconductor device according to the seventh embodiment, Figure 2 The corresponding figure.

[0074] In Embodiments 1 to 6, the second opposing portion 32b2 is located directly opposite the first opposing portion 32b1 relative to the first semiconductor element 33a in plan view. Also, in plan view, the extending direction of the first emitter wire 35a and the extending direction of the second emitter wire 35b form a right angle.

[0075] In contrast, in the present embodiment 7, Fig.14 As shown in FIG. 1 , when viewed from above, the second opposing portion 32b2 is offset from a position directly opposite to the first opposing portion 32b1 relative to the first semiconductor element 33a. Furthermore, the extending direction of the first emitter wire 35a and the extending direction of the second emitter wire 35b form an obtuse angle, and the angle θ therebetween is greater than 90 degrees and less than 180 degrees.

[0076] According to the semiconductor device according to the seventh embodiment as described above, the degree of freedom in designing the layout can be improved without impairing the reliability of the wire wiring, and thus miniaturization or increase in capacity of the semiconductor device can be expected.

[0077] <Implementation method 8>

[0078] In the eighth embodiment, at least one of the first semiconductor element 33a and the second semiconductor element 33b includes a wide bandgap semiconductor. The wide bandgap semiconductor includes, for example, silicon carbide (SiC), gallium nitride (GaN), and diamond. According to the eighth embodiment, miniaturization and parallelization of semiconductor devices can be expected.

[0079] In addition, the embodiments and the modifications can be freely combined, or the embodiments and the modifications can be appropriately modified or omitted.

[0080] Description of the label

[0081] 21 external control terminal, 31 insulating substrate, 32b emitter pattern, 32b1 first relative portion, 32b2 second relative portion, 32b3 first copper block, 32b4 second copper block, 32c control pattern, 33a first semiconductor element, 33b second semiconductor element, 34 control wire, 35a first emitter wire, 35b second emitter wire.

Claims

1. A semiconductor device comprising: Insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member disposed on the insulating substrate, including a first opposing portion and a second opposing portion located on opposite sides of the first semiconductor element and electrically connected to each other in a plan view; a first conductive line connected to the first semiconductor element and the first opposing portion; as well as a second wire connected to the first semiconductor element and the second opposing portion and located on the opposite side of the first wire relative to a connection point between the first wire and the first semiconductor element when viewed from above, The plurality of first semiconductor elements are connected in parallel to each other via the conductive member, the plurality of first conductive wires, and the plurality of second conductive wires. The control wire connected to the first semiconductor element passes through an upper portion between an end of the first wire that is remote from the second wire and an end of the second wire that is remote from the first wire.

2. The semiconductor device according to claim 1, wherein The conductive component comprises: an emitter pattern, which is disposed on the insulating substrate; and The first copper block and the second copper block are arranged on the emitter pattern and correspond to the first opposing portion and the second opposing portion, respectively.

3. A semiconductor device comprising: Insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member disposed on the insulating substrate, including a first opposing portion and a second opposing portion located on opposite sides of the first semiconductor element and electrically connected to each other in a plan view; a first conductive line connected to the first semiconductor element and the first opposing portion; as well as a second wire connected to the first semiconductor element and the second opposing portion and located on the opposite side of the first wire relative to a connection point between the first wire and the first semiconductor element when viewed from above, The conductive component comprises: an emitter pattern, which is disposed on the insulating substrate; and The first copper block and the second copper block are arranged on the emitter pattern and correspond to the first opposing portion and the second opposing portion, respectively.

4. The semiconductor device according to claim 3, wherein: The plurality of first semiconductor elements are connected in parallel to each other via the conductive member, the plurality of first conductive wires, and the plurality of second conductive wires.

5. The semiconductor device according to claim 1 or 3, wherein: The semiconductor device also has: an external control terminal connected to the outside of the semiconductor device; and The control pattern is arranged on the insulating substrate and is connected only to the control wire between the external control terminal and the first semiconductor element.

6. The semiconductor device according to claim 1 or 4, wherein: The control wires between the control electrodes of the plurality of first semiconductor elements are seam-welded and bonded to the control electrodes.

7. The semiconductor device according to claim 4, wherein: The control wire connected to the first semiconductor element passes through an upper portion between an end of the first wire that is remote from the second wire and an end of the second wire that is remote from the first wire.

8. The semiconductor device according to claim 1 or 3, wherein: A second semiconductor element is further provided, the second semiconductor element being arranged on the insulating substrate and connected to the first wire between the first semiconductor element and the first opposing portion, or the second wire between the first semiconductor element and the second opposing portion.

9. The semiconductor device according to claim 1 or 3, wherein: In a plan view, an extending direction of the first conductive wire and an extending direction of the second conductive wire form an obtuse angle.

10. The semiconductor device according to claim 1 or 3, wherein: The first semiconductor element includes a wide bandgap semiconductor.

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