A display test chip and its preparation method

Through the display test flow sheet imitating the pixel design of the micro display, the problem of restricted anode design is solved, the experiment and analysis of multiple pixels is realized, and the development efficiency and display effect of OLED displays are improved.

CN114335103BActive Publication Date: 2025-08-05KUNSHAN FANTAVIEW ELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202111628720.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-28
Publication Date
2025-08-05
Estimated Expiration
2041-12-28

AI Technical Summary

Technical Problem

In the prior art, the anode design of OLED displays is limited by the expensive wafer price and long processing cycle, making it difficult to achieve multiple pixel designs, resulting in difficulty in conducting tests and analysis, affecting the display effect.

Method used

A display test flow sheet is provided, including a substrate, a metal anode layer, a pixel definition layer, a light emitting layer and a common cathode layer. It is powered by an electrical signal receiving unit to form a pixel imitation structure to imitate the pixels in a micro display for luminescence, and supports a variety of pixel designs.

Benefits of technology

The experiment and analysis of multiple pixel designs have been realized, development efficiency has been improved, the final product specification design has been provided, and the display effect has been improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a display test wafer and a preparation method thereof, wherein the display test wafer is used to simulate a micro display, and comprises: a substrate; a metal anode layer, located on one side of the substrate; the metal anode layer is divided into at least two regions, each region including a plurality of anodes; the anodes in the same region are the same; the anodes in different regions are different in at least one of the shape, size and spacing between two adjacent anodes; a pixel definition layer, located on the side of the metal anode layer away from the substrate, the pixel definition layer including a plurality of first openings; a light-emitting layer, located in the first opening of the pixel definition layer; a common cathode layer, located on the side of the light-emitting layer and the pixel definition layer away from the substrate; an electrical signal receiving unit, used to supply power to the metal anode layer and the common cathode layer; by forming a plurality of pixel simulation structures, the pixels of the micro display are simulated to emit light, thereby facilitating the determination of the optimal pixel design of the product, improving development efficiency, and the display effect of the display.
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Description

Technical Field

[0001] The embodiments of the present invention relate to the field of display technology, and in particular to a display test wafer and a preparation method thereof. Background Art

[0002] Organic Light Emitting Diode (OLED) display is a self-luminous display with the advantages of being light, thin, high brightness, low power consumption, wide viewing angle, and high response speed. It is increasingly being used in various high-performance display fields.

[0003] The display effect of a monitor is affected by many factors, including the pixel's light-emitting area, shape, and cathode slope angle. Currently, the driver silicon base and anode in the monitor are generally processed and manufactured by semiconductor factories. Due to the high cost of wafers, long processing and production cycles, and the single anode design layout, it is difficult to achieve multiple pixel designs, and thus difficult to test and analyze different anodes or pixels to provide guidance for the final product specification design. Summary of the Invention

[0004] The embodiment of the present invention provides a display test tape-out and a preparation method thereof, so as to facilitate testing of better pixels of a product, improve development efficiency, and enhance the display effect of a display.

[0005] In a first aspect, an embodiment of the present invention provides a display test tape-out for simulating a microdisplay, comprising:

[0006] substrate;

[0007] a metal anode layer located on one side of the substrate; the metal anode layer is divided into at least two regions, each region including a plurality of anodes; the anodes in the same region are identical; and the anodes in different regions are different in at least one of shape, size, and spacing between two adjacent anodes;

[0008] a pixel definition layer, the pixel definition layer being located on a side of the metal anode layer away from the substrate; the pixel definition layer comprising a plurality of first openings, the first openings being used to expose the anode according to the shape and size of the anode;

[0009] a light-emitting layer, the light-emitting layer being located in the first opening of the pixel definition layer;

[0010] a common cathode layer, the common cathode layer being located on a side of the light-emitting layer away from the substrate and a side of the pixel definition layer away from the substrate;

[0011] An electrical signal receiving unit is used to supply power to the metal anode layer and the common cathode layer; wherein the metal anode layer, the pixel definition layer, the light-emitting layer and the common cathode layer are used to form a pixel mimicking structure to mimic the pixels in a micro display to emit light.

[0012] Optionally, the electrical signal receiving unit includes a common cathode connection pad and an anode connection pad;

[0013] The common cathode connection pad is connected to the common cathode layer and the cathode external power supply, and is used to transmit the cathode signal input by the cathode external power supply to the common cathode layer;

[0014] The anode connection pad is connected to the metal anode layer and the anode external power supply, and is used to transmit the anode signal input by the anode external power supply to the metal anode layer.

[0015] Optionally, the pixel definition layer is further located on a side of the common cathode connection pad away from the substrate, and on a side of the anode connection pad away from the substrate; the pixel definition layer covers a portion of the common cathode connection pad, and covers a portion of the anode connection pad;

[0016] In which, the common cathode connecting pad and the anode connecting pad are both located on the substrate and are arranged on the same layer as the metal anode layer; the pixel definition layer located on the side of the common cathode connecting pad away from the substrate includes a second opening, and the common cathode layer contacts the common cathode connecting pad through the second opening.

[0017] Optionally, the number of the anode connection pads is at least two, and the anode connection pads correspond one-to-one to the areas divided by the metal anode layer, and each of the anode connection pads supplies power to the anodes in the same area.

[0018] Optionally, the number of the anode connecting pads is at least three, and the number of the anode connecting pads corresponding to at least one region is at least two.

[0019] Optionally, the anodes are arranged in an array, and the anodes in the same column are sequentially connected in series and then connected to the anode connection pad.

[0020] Optionally, in the same region, two adjacent anodes are connected by a metal wire.

[0021] Optionally, the display test tape-out also includes:

[0022] The encapsulation layer is located on a side of the common cathode layer away from the substrate.

[0023] In a second aspect, an embodiment of the present invention provides a method for preparing a display test tape-out, comprising:

[0024] providing a substrate;

[0025] forming a metal anode layer, the metal anode layer being located on one side of the substrate; the metal anode layer being divided into at least two regions, each region including a plurality of anodes; the anodes in the same region being identical; and the anodes in different regions being different in at least one of shape, size, and spacing between two adjacent anodes;

[0026] forming a pixel definition layer, the pixel definition layer being located on a side of the metal anode layer away from the substrate; the pixel definition layer comprising a plurality of first openings, the first openings being used to expose the anode according to the shape and size of the anode;

[0027] forming a light-emitting layer, wherein the light-emitting layer is located in the first opening of the pixel definition layer;

[0028] forming a common cathode layer, wherein the common cathode layer is located on a side of the light-emitting layer away from the substrate and a side of the pixel definition layer away from the substrate;

[0029] An electrical signal receiving unit is formed, which is used to supply power to the metal anode layer and the common cathode layer; wherein the metal anode layer, pixel definition layer, light-emitting layer and common cathode layer are used to form a pixel mimicking structure to mimic the pixels in a micro display to emit light.

[0030] Optionally, the electrical signal receiving unit includes a common cathode connection pad and an anode connection pad; the common cathode connection pad is connected to the common cathode layer and the cathode external power supply, and is used to transmit the cathode signal input by the cathode external power supply to the common cathode layer; the anode connection pad is connected to the metal anode layer and the anode external power supply, and is used to transmit the anode signal input by the anode external power supply to the metal anode layer; forming the electrical signal receiving unit includes:

[0031] A cathode connection pad and an anode connection pad are formed on the substrate; the cathode connection pad and the anode connection pad are arranged in the same layer as the metal anode layer.

[0032] An embodiment of the present invention provides a display test wafer and a preparation method thereof, wherein the display test wafer is used to simulate a micro display, and includes: a substrate; a metal anode layer, located on one side of the substrate; the metal anode layer is divided into at least two regions, each region including multiple anodes; the anodes in the same region are the same; the anodes in different regions have at least one of a shape, a size, and a spacing between two adjacent anodes that is different; a pixel definition layer, the pixel definition layer is located on a side of the metal anode layer away from the substrate; the pixel definition layer includes multiple first openings, the first openings are used to expose the anodes according to the shape and size of the anodes; a light-emitting layer, the light-emitting layer is located in the first opening of the pixel definition layer; a common cathode layer, the common cathode layer is located on a side of the light-emitting layer away from the substrate and on a side of the pixel definition layer away from the substrate; an electrical signal receiving unit, the electrical signal receiving unit is used to supply power to the metal anode layer and the common cathode layer; wherein the metal anode layer, the pixel definition layer, the light-emitting layer, and the common cathode layer are used to form a pixel simulation structure to simulate the pixels in the micro display to emit light. The technical solution provided by the embodiment of the present invention provides a test wafer to simulate different pixels of a silicon-based OLED microdisplay for testing and analysis, which can realize the design of multiple pixels, and the design process is simple and low-cost, which is convenient for testing the best pixel design of the product, improves development efficiency, provides guidance for the final product specification design, and improves the display effect of the display. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 This is a schematic structural diagram of a driving substrate provided in the prior art;

[0034] Figure 2 This is a schematic structural diagram of a display test tape-out provided by an embodiment of the present invention;

[0035] Figure 3 yes Figure 2 Section along line A1-A2;

[0036] Figure 4 is a comparative schematic diagram of various pixel structures provided by an embodiment of the present invention;

[0037] Figure 5 1 is a schematic structural diagram of a metal layer for forming a metal anode layer and a pad, provided by an embodiment of the present invention;

[0038] Figure 6 1 is a schematic structural diagram of a pixel definition layer provided by an embodiment of the present invention;

[0039] Figure 7 The present invention provides a flowchart of a method for preparing a display test wafer. DETAILED DESCRIPTION

[0040] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0041] As background technology, Figure 1 This is a schematic diagram of the structure of a drive substrate provided in the prior art. Figure 1 At present, the anode 3 of silicon-based OLED is generally processed and manufactured by semiconductor factories. The anode 3 contacts the thin-film transistor (TFT) in the driving substrate 1 through the through hole 2, so as to provide a voltage signal to the anode through the TFT control driving module. Due to the high price of wafers, long processing and manufacturing cycle, and the single anode design layout, it is difficult to realize multiple pixel designs in subsequent processes. The pixel arrangement is relatively simple and fixed, generally presenting a rectangular array or polygonal structure. These structures cannot actually match better between semiconductors and panel displays, and various defects are easily produced in the final display effect. If the pixel design is revised and processed back and forth, it is time-consuming and labor-intensive, and is also limited by the production capacity and delivery period of semiconductor factories, and it is difficult to test and analyze different anodes or pixels. When the anode of the silicon-based OLED screen is produced, based on the high cost and long production cycle of the current silicon-based CMOS driver chip, and considering the light-emitting area, pixel size, cathode climbing angle and other aspects, it is necessary to provide a dummy piece (display test tape-out) to simulate different pixels of the micro display for testing.

[0042] In view of this, an embodiment of the present invention provides a display test tape-out for simulating a micro display. Figure 2 This is a schematic diagram of a structure of a display test tape-out provided by an embodiment of the present invention. Figure 3 yes Figure 2 Cross-section along line A1-A2, see Figure 2-Figure 3 , showing that the test tape-out includes:

[0043] substrate 10;

[0044] The metal anode layer 20 is located on one side of the substrate 10. The metal anode layer 20 is divided into at least two regions, each region including a plurality of anodes 21. The anodes 21 in the same region are identical; the anodes 21 in different regions are different in at least one of shape, size, and spacing between adjacent anodes 21.

[0045] A pixel definition layer 30 is located on a side of the metal anode layer 20 away from the substrate 10 ; the pixel definition layer 30 includes a plurality of first openings, the first openings being used to expose the anode 21 according to the shape and size of the anode;

[0046] a light-emitting layer 60 , the light-emitting layer 60 being located in the first opening of the pixel definition layer 30 ;

[0047] a common cathode layer 40 , the common cathode layer 40 being located on a side of the light emitting layer 60 away from the substrate 10 and a side of the pixel definition layer 30 away from the substrate 10 ;

[0048] The electrical signal receiving unit 50 is used to supply power to the metal anode layer 20 and the common cathode layer 40; wherein the metal anode layer 20, the pixel definition layer 30, the light-emitting layer 60 and the common cathode layer 40 are used to form a pixel mimicking structure to mimic the pixels in the micro display to emit light.

[0049] Specifically, the substrate 10 refers to a film structure that can provide protection and support for the display test tape-out. The substrate 10 can be flexible and can be formed of any suitable insulating material with flexibility. For example, the flexible substrate 10 can be formed of a polymer material such as polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyarylate (PAR) or glass fiber reinforced plastic (FRP). The substrate 10 can also be rigid, and the material may include silicon. Before forming the metal anode layer 20 on the substrate 10, a buffer layer can be provided on the substrate 10, and the buffer layer covers the entire upper surface of the substrate 10. In one embodiment, the buffer layer includes an inorganic layer or an organic layer. For example, the buffer layer may be formed of a material selected from inorganic materials such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (AlOx), or aluminum nitride (AlNx), or organic materials such as acryl, polyimide (PI), or polyester. The buffer layer blocks oxygen and moisture, prevents moisture or impurities from diffusing through the substrate, and provides a flat surface on the upper surface of the substrate 10.

[0050] The metal anode layer 20 is divided into at least two regions, each region including a plurality of anodes 21. The anodes 21 in the same region are identical. The anodes 21 in different regions are different in at least one of shape, size, area, and spacing between two adjacent anodes. Figure 2The metal anode layer 20 is exemplarily divided into four areas. The shape of the anode 21 may include a square, a rectangle, a regular hexagon, a circle, an ellipse, etc. The size can be understood as the side length or radius of the anode pattern, etc. It can be flexibly adjusted in accordance with the actual product development needs, so as to facilitate finding the pixel luminous area corresponding to the optimal product size. The pixel definition layer 30 is located on the side of the metal anode layer 20 away from the substrate 10; the pixel definition layer 30 includes a plurality of first openings, and the first openings expose the corresponding anodes according to the shape and size of the anode. The pixel definition layer (PDL) covers the edge of the anode. The PDL surrounding the edge of the anode defines the emission area of each sub-pixel, thereby limiting the size of the luminous area of each pixel. The pixel definition layer 30 is insulating, and the PDL can be formed of organic materials such as polyimide (PI), polyamide, benzocyclobutene (BCB), acrylic resin or phenolic resin; it can also be formed of inorganic materials such as silicon oxide.

[0051] The light-emitting layer 60 is located in the first opening of the pixel definition layer 30 and contacts the anode through the first opening. The light-emitting layer 60 can be formed of a low molecular weight organic material or a high molecular weight organic material. The light-emitting layer 60 can also include at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). The common cathode layer 40 is located on the light-emitting layer 60 and is a single film layer. Its material can be formed of Ag, magnesium (Mg), Al, Pt, Pd, Au, Ni, Nd, iridium (Ir), or a mixture thereof.

[0052] The anode 21 and the common cathode layer 40 are insulated from each other by a luminescent material. If a voltage is applied between the anode 21 and the common cathode layer 40, the luminescent layer 60 emits visible light, thereby realizing an image that can be recognized by the user. The electrical signal receiving unit 50 is used to power the metal anode layer 20 and the common cathode layer 40. The metal anode layer 20, the pixel definition layer 30, the luminescent layer 60, and the common cathode layer 40 are used to form a pixel emulation structure to mimic the light emission of pixels in a microdisplay. This dummy sheet can be directly illuminated by an external power supply to achieve the same effect as the product. Figure 4 is a comparative schematic diagram of various pixel structures provided by an embodiment of the present invention, with reference to Figure 4 , divided into four regions according to the metal anode layer 20, Figure 4 The dummy sheet includes four pixel shapes: square, rectangular, and regular hexagonal. The rectangles in the first and fourth regions have different side lengths, and the spacing between adjacent pixels is different. Designing these different pixels helps analyze the impact of the PDL taper angle on cathode ramping, helping to mitigate defects such as cathode breakage. The dummy sheet design also simplifies the process and is cost-effective.

[0053] The display test tape-out provided in an embodiment of the present invention is used to simulate a microdisplay and includes: a substrate; a metal anode layer located on one side of the substrate; the metal anode layer is divided into at least two regions, each region including multiple anodes; the anodes in the same region are identical; the anodes in different regions differ in at least one of the shape, size, and spacing between adjacent anodes; a pixel definition layer located on the side of the metal anode layer away from the substrate, including multiple first openings, the first openings being used to expose the anodes according to their shape and size; a light-emitting layer located in the first openings of the pixel definition layer; a common cathode layer located on the side of the light-emitting layer away from the substrate and on the side of the pixel definition layer away from the substrate; and an electrical signal receiving unit for supplying power to the metal anode layer and the common cathode layer. The metal anode layer, pixel definition layer, light-emitting layer, and common cathode layer are used to form a pixel simulation structure to simulate the light emission of pixels in a microdisplay. This allows for multiple pixel designs, and the design process is simple and cost-effective. This facilitates testing of optimal pixel designs for a product, improves development efficiency, provides guidance for final product specification design, and enhances the display quality of the display.

[0054] Optional, reference Figure 2 , the electrical signal receiving unit 50 includes a common cathode connection pad 52 and an anode connection pad 51;

[0055] The common cathode connection pad 52 is connected to the common cathode layer 40 and the cathode external power supply, and is used to transmit the cathode signal input by the cathode external power supply to the common cathode layer 40;

[0056] The anode connection pad 51 is connected to the metal anode layer 20 and the anode external power supply, and is used to transmit the anode signal input by the anode external power supply to the metal anode layer 20 .

[0057] Specifically, Figure 5 This is a schematic diagram of the structure of a metal layer for forming a metal anode layer and a pad provided by an embodiment of the present invention, with reference to Figure 2 and Figure 5, the common cathode connection pad 52 and the anode connection pad 51 can both be located on the substrate 10 and arranged in the same layer as the metal anode layer 20. After a metal layer is plated on the substrate 10, the anode, common cathode connection pad 52 and anode connection pad 51 of corresponding shapes are made by exposure and etching. The common cathode connection pad 52 and the anode connection pad 51 can be located on opposite sides of the metal anode layer 20, increasing the distance between the common cathode connection pad 52 and the anode connection pad 51 to avoid increasing the probability of short circuit between the common cathode connection pad 52 and the anode connection pad 51 when they are located on the same side of the metal anode layer 20. The common cathode connection pad 52 and the anode connection pad 51 are arranged in the same layer as the metal anode layer 20, and the metal film can be evaporated once, which simplifies the display test wafer preparation process. Through the reserved Pad end pin, this dummy piece can be directly lit up by an external power supply, imitating an independent IC drive to achieve the effect of imitating the product light-emitting.

[0058] Optional, Figure 6 This is a schematic diagram of the structure of a pixel definition layer provided by an embodiment of the present invention, with reference to Figure 6 and Figure 2 The pixel definition layer 30 is also located on the side of the common cathode connection pad 52 away from the substrate 10, and on the side of the anode connection pad 51 away from the substrate 10; the pixel definition layer 30 covers a portion of the common cathode connection pad 52, and covers a portion of the anode connection pad 51;

[0059] Among them, the common cathode connecting pad 52 and the anode connecting pad 51 are both located on the substrate 10 and are arranged on the same layer as the metal anode layer 20; the pixel definition layer 30 located on the side of the common cathode connecting pad 52 away from the substrate 10 includes a second opening 31, and the common cathode layer 40 contacts the common cathode connecting pad 52 through the second opening 31.

[0060] Specifically, the pixel definition layer 30 is also located on the side of the anode connection pad 51 away from the substrate 10, and the pixel definition layer 30 covers a portion of the common anode connection pad 51 to reduce the probability of the common cathode layer 40 contacting the anode connection pad 51 when the metal is evaporated to form the common cathode layer 40. The anode connection pad 51 is connected to the anode, and the contact between the common cathode layer 40 and the anode connection pad 51 will cause the anode and the common cathode layer 40 to short-circuit, thereby causing the OLED light-emitting material between the common cathode layer 40 and the anode to fail to emit light normally. In addition, the pixel definition layer 30 covers a portion of the common anode connection pad 51, and the pins of the common anode connection pad 51 can be reserved to connect to the anode external power supply through the pins, and transmit the anode signal input by the anode external power supply to the metal anode layer 20.

[0061] The pixel definition layer 30 is also located on the side of the common cathode connection pad 52 away from the substrate 10, and the pixel definition layer 30 also covers a portion of the common cathode connection pad 52. Compared to the area not covered by the pixel definition layer 30, the area covered by the pixel definition layer 30 is closer to the metal anode layer 20. Since the common cathode connection pad 52 needs to be in contact with the common cathode layer 40, the cathode signal input by the cathode external power supply is transmitted to the common cathode layer 40. Therefore, when the common cathode layer 40 is formed on the side of the common cathode connection pad 52 away from the substrate 10, if the pixel definition layer 30 is not provided in the area of the common cathode connection pad 52 close to the metal anode layer 20, the common cathode layer 40 located above the display area and the common cathode layer 40 on the cathode connection pad will have a large height difference. Since the common cathode layer 40 is a thinner metal layer, it is easy for the common cathode layer 40 to break, resulting in the display test chip not being able to emit light normally. It can be understood that disposing the pixel definition layer 30 in the area of the common cathode connection pad 52 near the metal anode layer 20 can provide a relatively flat surface for the formation of the common cathode layer 40. Furthermore, the pixel definition layer 30 can also provide insulation and protection for the covered portion of the common cathode connection pad 52. The portion of the common cathode connection pad 52 not covered by the pixel definition layer 30 can serve as an external pin, which can be connected to the cathode external power supply through the pin, transmitting the cathode signal input by the cathode external power supply to the common cathode layer 40 through the second opening 31.

[0062] Optional, reference Figure 2 The number of the anode connection pads 51 is at least two, and the anode connection pads 51 correspond one to one with the areas divided by the metal anode layer 20 , and each anode connection pad 51 supplies power to the anodes in the same area.

[0063] Specifically, the metal anode layer 20 is divided into at least two regions, each region including multiple anodes; the anodes in the same region are identical. The anodes have the same shape, size, area, and spacing between adjacent anodes. The anodes in different regions differ in at least one of their shape, size, area, and spacing between adjacent anodes. There are at least two anode connection pads 51, each corresponding to a region of the metal anode layer 20. Each anode connection pad 51 supplies power to the anodes in the same region. Figure 2 The metal anode layer 20 is exemplarily shown as being divided into four regions, and the number of anode connection pads 51 is four. The anodes can be arranged in an array, and the anodes in the same column are sequentially connected in series and then connected to the corresponding anode connection pads 51. The anode connection pads 51 are arranged to correspond one-to-one with the regions divided by the metal anode layer 20, so that light emission control can be performed in different regions. Optionally, the number of anode connection pads 51 is at least three, and the number of anode connection pads 51 corresponding to at least one region is at least two (not shown in the figure), that is, for pixels in the same region, partial control can also be achieved.

[0064] Optional, reference Figure 4 In the same region, two adjacent anodes are connected by a metal wire 211.

[0065] Specifically, to prevent the resistance between pixels from being too large and affecting the final luminous brightness, the edges of each pixel in the same area can be connected in series through metal wires 211. This can also prevent the situation where a pixel is damaged and other pixels connected in series with it cannot emit light normally. Figure 4 An auxiliary electrode layer 22 may be provided in a certain area. The auxiliary electrode layer 22 may be located on the side of the anode close to the substrate. The auxiliary electrode layer 22 may be a whole metal film layer. The auxiliary electrode layer 22 may further reduce the resistance between pixels.

[0066] Optionally, the display test tape-out also includes:

[0067] The encapsulation layer is located on a side of the common cathode layer 40 away from the substrate 10 .

[0068] Specifically, the encapsulation layer is located on the side of the second electrode layer away from the driving backplane. The encapsulation layer is used to protect the OLED material after vapor deposition to prevent failure due to water vapor. The encapsulation layer may include multiple inorganic layers stacked together. For example, the materials of each layer of the encapsulation layer may be Al2O3, SiNx, Al2O3, and TiO2, respectively, and the thickness of the encapsulation is between 40-80nm, 1000-15000nm, 30-50nm, and 5-15nm, respectively. Among them, the film layer made of Al2O3 and the film layer made of TiO2 have strong density. However, the thicker the film layers of the two materials, the greater the stress in the film layer, which makes the encapsulation layer prone to cracking. Therefore, a 1000-15000nm film layer made of SiNx is provided between the two layers of Al2O3 film, which can ensure the water and oxygen barrier properties of the encapsulation layer and also ensure that the encapsulation layer is not prone to cracking. The encapsulation layer may also include multiple inorganic layers and organic layers stacked together. Similarly, inorganic layers made of Al2O3 or TiO2 are denser, but the thicker the film, the greater the stress, which can easily cause the thin film encapsulation layer to crack. Therefore, the organic layer between the two inorganic layers can not only ensure the water and oxygen barrier properties of the thin film encapsulation layer, but also further ensure that the thin film encapsulation layer is not prone to cracking.

[0069] The embodiments of the present invention provide a display test tape-out to simulate a silicon-based OLED microdisplay, enabling the design of multiple pixels with a simple design process and low cost. Different anode pixels can be tested and analyzed, facilitating the identification of optimal pixel designs for the product, improving development efficiency, providing guidance for the final product specification design, and enhancing the display quality. Furthermore, by designing different pixel shapes, it is helpful to analyze the effect of the PDL taper angle on cathode ramping, thereby helping to improve defects caused by cathode breakage and other issues.

[0070] The embodiment of the present invention further provides a method for preparing a display test wafer, which is used to form the display test wafer described in any of the above embodiments. Figure 7 This is a flow chart of a method for preparing a display test wafer provided by an embodiment of the present invention, with reference to Figure 7 , the preparation method comprises:

[0071] S110 , providing a substrate.

[0072] Specifically, the substrate refers to a film structure that can provide protection and support for display test tape-out. The substrate can be flexible and can be formed of any suitable insulating material with flexibility. For example, the flexible substrate can be formed of polymer materials such as polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyarylate (PAR) or fiberglass reinforced plastic (FRP). The substrate can also be rigid and the material can include silicon. Before forming the metal anode layer on the substrate, a buffer layer can be provided on the substrate, and the buffer layer covers the entire upper surface of the substrate. In one embodiment, the buffer layer includes an inorganic layer or an organic layer. For example, the buffer layer can be formed of a material selected from inorganic materials such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (AlOx) or aluminum nitride (AlNx), or organic materials such as acryl, polyimide (PI) or polyester. The buffer layer blocks oxygen and moisture, prevents moisture or impurities from diffusing through the substrate, and provides a flat surface on the upper surface of the substrate.

[0073] S120. Form a metal anode layer, where the metal anode layer is located on one side of the substrate; the metal anode layer is divided into at least two regions, each region including a plurality of anodes; the anodes in the same region are identical; and at least one of the shape, size, and spacing between two adjacent anodes in different regions is different.

[0074] Specifically, a metal layer is formed on one side of the substrate. A layer of photoresist is coated on the side of the metal layer away from the substrate, and after exposure and development, the photoresist forms a photoresist pattern. The photoresist pattern includes openings to expose the metal layer, and the pattern left after etching the metal layer is the same as the shape of the pixel to be formed later. The metal layer after etching is the metal anode layer. The metal anode layer is divided into at least two areas, each area includes multiple anodes; the anodes in the same area are the same. The shape, size, area and spacing between adjacent anodes are all equal. At least one of the shape, size, area and spacing between adjacent anodes of the anodes in different areas is different (simulating the design of pixels of multiple different products). Flexible adjustments are made according to actual product development needs to facilitate finding the pixel luminous area corresponding to the optimal product size.

[0075] S130 , forming a pixel definition layer, the pixel definition layer being located on a side of the metal anode layer away from the substrate; the pixel definition layer comprising a plurality of first openings, the first openings being used to expose the anode according to the shape and size of the anode.

[0076] Specifically, the pixel definition layer is formed on the side of the metal anode layer away from the substrate; the pixel definition layer includes a plurality of first openings, and the first openings expose the corresponding anodes according to the shape and size of the anode. The pixel definition layer covers the edge of the anode. The pixel definition layer surrounding the edge of the anode defines the emission area of each sub-pixel, thereby limiting the size of the light-emitting area of each pixel. The pixel definition layer has insulating properties and can be formed of organic materials such as polyimide (PI), polyamide, benzocyclobutene (BCB), acrylic resin or phenolic resin; it can also be formed of inorganic materials such as silicon oxide.

[0077] S140 , forming a light-emitting layer, where the light-emitting layer is located in the first opening of the pixel definition layer.

[0078] Specifically, a light-emitting layer is formed in the first opening of the pixel definition layer by evaporation, and the light-emitting layer contacts the anode through the first opening. The light-emitting layer can be formed of a low molecular weight organic material or a high molecular weight organic material. The light-emitting layer can also include at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL).

[0079] S150 , forming a common cathode layer, where the common cathode layer is located on a side of the light emitting layer away from the substrate and a side of the pixel definition layer away from the substrate.

[0080] Specifically, the common cathode layer is a whole film layer, and its material can be formed of Ag, magnesium (Mg), Al, Pt, Pd, Au, Ni, Nd, iridium (Ir), Cr, or a mixture thereof.

[0081] S160. Form an electrical signal receiving unit, which is used to supply power to the metal anode layer and the common cathode layer; wherein the metal anode layer, the pixel definition layer, the light-emitting layer and the common cathode layer are used to form a pixel simulation structure to simulate the pixels in the micro display to emit light.

[0082] Specifically, the anode and the common cathode layer are insulated from each other by a light-emitting material. If a voltage is applied between the anode and the common cathode layer, the light-emitting layer emits visible light, thereby realizing an image that can be recognized by the user. The electrical signal receiving unit is used to power the metal anode layer and the common cathode layer. Among them, the metal anode layer, the pixel definition layer, the light-emitting layer and the common cathode layer are used to form a pixel mimicking structure to imitate the pixels in the micro display to emit light. This dummy piece can be directly lit up by means of an external power supply to achieve the same effect of the product. Designing different pixel shapes is helpful to analyze the influence of the size of the PDL taper angle on the cathode climbing, and helps to improve the defects caused by cathode disconnection, etc., and the dummy piece design process is simple and low-cost.

[0083] Optionally, the electrical signal receiving unit includes a common cathode connection pad and an anode connection pad; the common cathode connection pad is connected to the common cathode layer and the cathode external power supply, and is used to transmit the cathode signal input by the cathode external power supply to the common cathode layer; the anode connection pad is connected to the metal anode layer and the anode external power supply, and is used to transmit the anode signal input by the anode external power supply to the metal anode layer; forming the electrical signal receiving unit includes:

[0084] A cathode connection pad and an anode connection pad are formed on the substrate; the cathode connection pad and the anode connection pad are arranged on the same layer as the metal anode layer.

[0085] Specifically, after coating a metal film on the substrate, exposure and etching are used to create anode, common cathode connection pads, and anode connection pads of corresponding shapes. The cathode and anode connection pads can be located on opposite sides of the metal anode layer, increasing the spacing between them to avoid increasing the probability of short circuits when they are located on the same side of the metal anode layer. The common cathode and anode connection pads are arranged on the same layer as the metal anode layer, allowing for a single metal film deposition, simplifying the display test wafer preparation process. Through the reserved pad terminal pins, the dummy chip can be directly illuminated by an external power supply, simulating an independent IC driver and achieving a product-like luminescence effect. A pixel definition layer is also formed on the side of the common cathode connection pad facing away from the substrate, as well as on the side of the anode connection pad facing away from the substrate; the pixel definition layer covers a portion of the common cathode connection pad and a portion of the anode connection pad; the pixel definition layer located on the side of the common cathode connection pad facing away from the substrate includes a second opening, through which the common cathode layer contacts the common cathode connection pad.

[0086] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display test tape-out, characterized in that: Used to emulate microdisplays, including: substrate; a metal anode layer located on one side of the substrate; the metal anode layer is divided into at least two regions, each region including a plurality of anodes; the anodes in the same region are identical; and the anodes in different regions are different in at least one of shape, size, and spacing between two adjacent anodes; a pixel definition layer, the pixel definition layer being located on a side of the metal anode layer away from the substrate; the pixel definition layer comprising a plurality of first openings, the first openings being used to expose the anode according to the shape and size of the anode; a light-emitting layer, the light-emitting layer being located in the first opening of the pixel definition layer; a common cathode layer, the common cathode layer being located on a side of the light-emitting layer away from the substrate and a side of the pixel definition layer away from the substrate; an electrical signal receiving unit, the electrical signal receiving unit being used to supply power to the metal anode layer and the common cathode layer; wherein the metal anode layer, the pixel definition layer, the light-emitting layer and the common cathode layer are used to form a pixel mimicking structure to mimic the light emission of pixels in a microdisplay; The metal anode layer simulates the design of pixels of various products.

2. The display test tape-out according to claim 1, characterized in that: The electrical signal receiving unit includes a common cathode connection pad and an anode connection pad; The common cathode connection pad is connected to the common cathode layer and the cathode external power supply, and is used to transmit the cathode signal input by the cathode external power supply to the common cathode layer; The anode connection pad is connected to the metal anode layer and the anode external power supply, and is used to transmit the anode signal input by the anode external power supply to the metal anode layer.

3. The display test tape-out according to claim 2, characterized in that: The pixel definition layer is also located on a side of the common cathode connection pad away from the substrate, and on a side of the anode connection pad away from the substrate; the pixel definition layer covers a portion of the common cathode connection pad and a portion of the anode connection pad; In which, the common cathode connecting pad and the anode connecting pad are both located on the substrate and are arranged on the same layer as the metal anode layer; the pixel definition layer located on the side of the common cathode connecting pad away from the substrate includes a second opening, and the common cathode layer contacts the common cathode connecting pad through the second opening.

4. The display test tape-out according to claim 2, characterized in that: The number of the anode connection pads is at least two, and the anode connection pads correspond one-to-one to the areas divided by the metal anode layer. Each of the anode connection pads supplies power to the anodes in the same area.

5. The display test tape-out according to claim 2, characterized in that: The number of the anode connection pads is at least three, and the number of the anode connection pads corresponding to at least one region is at least two.

6. The display test tape-out according to claim 4 or 5, characterized in that: The anodes are arranged in an array, and the anodes in the same column are sequentially connected in series and then connected to the anode connection pads.

7. The display test tape-out according to claim 1, characterized in that: In the same area, two adjacent anodes are connected by metal wires.

8. The display test tape-out according to claim 1, characterized in that: Also includes: The encapsulation layer is located on a side of the common cathode layer away from the substrate.

9. A method for preparing a display test tape-out, characterized in that: include: providing a substrate; forming a metal anode layer, the metal anode layer being located on one side of the substrate; the metal anode layer being divided into at least two regions, each region including a plurality of anodes; The anodes in the same region are the same; at least one of the shape, size, and spacing between two adjacent anodes of the anodes in different regions is different; forming a pixel definition layer, wherein the pixel definition layer is located on a side of the metal anode layer away from the substrate; The pixel definition layer includes a plurality of first openings, wherein the first openings are used to expose the anode according to the shape and size of the anode; forming a light-emitting layer, wherein the light-emitting layer is located in the first opening of the pixel definition layer; forming a common cathode layer, wherein the common cathode layer is located on a side of the light-emitting layer away from the substrate and a side of the pixel definition layer away from the substrate; forming an electrical signal receiving unit for supplying power to the metal anode layer and the common cathode layer; wherein the metal anode layer, the pixel definition layer, the light-emitting layer, and the common cathode layer are used to form a pixel mimicking structure to mimic the light emission of pixels in a microdisplay; The metal anode layer simulates the design of pixels of various products.

10. The method for preparing a display test wafer according to claim 9, wherein: The electrical signal receiving unit includes a common cathode connection pad and an anode connection pad; the common cathode connection pad is connected to the common cathode layer and the cathode external power supply, and is used to transmit the cathode signal input by the cathode external power supply to the common cathode layer; the anode connection pad is connected to the metal anode layer and the anode external power supply, and is used to transmit the anode signal input by the anode external power supply to the metal anode layer; The electrical signal receiving unit includes: A cathode connection pad and an anode connection pad are formed on the substrate; the cathode connection pad and the anode connection pad are arranged in the same layer as the metal anode layer.

Citation Information

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