Display panel and display device

Abstract

The present disclosure relates to the field of display technology, and in particular to a display panel and a display device for improving the display effect of the display device. The display panel includes a substrate, an anode layer, a pixel defining layer, a light-emitting functional layer, and at least one conductive pattern. The anode layer includes a plurality of anodes; the pixel defining layer is provided with a plurality of openings, one opening being provided corresponding to one anode; the light-emitting functional layer is in contact with the anode through the opening; at least one conductive pattern is provided on the side of the light-emitting functional layer close to the substrate, the orthographic projection of the conductive pattern on the substrate is located between the orthographic projections of two adjacent anodes on the substrate, and the conductive pattern is in contact with the light-emitting functional layer, and the conductive pattern is configured to transmit a blocking voltage, which is less than the operating voltage transmitted by the anode adjacent to the conductive pattern. By providing the conductive pattern, the crosstalk current generated between adjacent sub-pixels in the display panel is reduced, thereby improving the display effect of the display device.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the continuous development of the field of display technology, organic light-emitting diode (OLED) display devices have been widely used due to their full screen, narrow frame, high resolution, curlable wearable and foldable features.

[0003] The display effect of a display device is one of the most important performance characteristics of electronic products. How to reduce the crosstalk current generated between adjacent sub-pixels, thereby improving the display effect of the display device and enhancing the picture quality of electronic products is a problem that the industry has been exploring. Summary of the Invention

[0004] Embodiments of the present disclosure provide a display panel and a display device, which are intended to reduce crosstalk current generated between adjacent sub-pixels in the display panel and improve the display effect of the display device.

[0005] To achieve the above objectives, the embodiments of the present disclosure adopt the following technical solutions:

[0006] In one aspect, a display panel is provided, comprising: a substrate, an anode layer, a pixel defining layer, a light-emitting functional layer, and at least one conductive pattern.

[0007] The anode layer is provided on the substrate, and the anode layer includes a plurality of anodes. The pixel defining layer is provided on a side of the anode layer away from the substrate, and the pixel defining layer is provided with a plurality of openings, one opening being provided corresponding to one anode. The light-emitting functional layer is provided on a side of the pixel defining layer away from the substrate, and the light-emitting functional layer is in contact with the anode through the opening. The at least one conductive pattern is provided on a side of the light-emitting functional layer close to the substrate; the orthographic projection of the conductive pattern on the substrate is located between the orthographic projections of two adjacent anodes on the substrate, and the conductive pattern is in contact with the light-emitting functional layer, and the conductive pattern is configured to transmit a blocking voltage, and the blocking voltage is less than the operating voltage transmitted by the anode adjacent to the conductive pattern.

[0008] The display panel provided by some embodiments of the present disclosure, by setting a conductive pattern, receives part of the carriers in the light-emitting functional layer corresponding to the anode adjacent to the conductive pattern, interrupts the transmission path of the carriers in the part corresponding to one anode in the light-emitting functional layer to the part corresponding to the other anode, avoids the generation of crosstalk current between the sub-pixels corresponding to the two anodes, thereby avoiding the problem of poor display of the sub-pixels under the influence of the crosstalk current, and improving the display effect of the display device.

[0009] In some embodiments, the at least one conductive pattern is disposed between the pixel defining layer and the substrate.

[0010] In some embodiments, the at least one conductive pattern is provided on the anode layer; the pixel defining layer is provided with at least one first via hole, the first via hole is provided between two adjacent openings of the pixel defining layer, and the light-emitting functional layer contacts the conductive pattern through the first via hole.

[0011] In some embodiments, the display panel further includes: at least one conductive layer and an insulating layer. The at least one conductive layer is disposed between the substrate and the anode layer, the conductive layer closest to the anode layer among the at least one conductive layer is a target conductive layer, and the conductive pattern is disposed in the target conductive layer; the insulating layer is disposed between the target conductive layer and the anode layer.

[0012] The pixel defining layer is provided with at least one first via hole, the first via hole being provided between two adjacent openings of the pixel defining layer. The insulating layer is provided with at least one second via hole, the second via hole being connected to the first via hole. The light-emitting functional layer is in contact with the conductive pattern through the connected first and second via holes.

[0013] In some embodiments, the display panel includes a source-drain conductive layer disposed between the substrate and the anode layer, and the source-drain conductive layer is the target conductive layer; or, the display panel includes a source-drain conductive layer disposed between the substrate and the anode layer, and at least one transition conductive layer disposed between the source-drain conductive layer and the anode layer, and the transition conductive layer closest to the anode layer among the at least one transition conductive layer is the target conductive layer.

[0014] In some embodiments, the at least one conductive pattern is disposed between the pixel defining layer and the light-emitting functional layer.

[0015] In some embodiments, the display panel further comprises: a first power line and / or an initialization signal line disposed between the substrate and the anode layer. The first power line is configured to transmit a low-level voltage signal, and the initialization signal line is configured to transmit an initialization signal. At least one of the conductive patterns is electrically connected to the first power line; and / or at least one of the conductive patterns is electrically connected to the initialization signal line.

[0016] In some embodiments, a first conductive pattern and a second conductive pattern are provided between two adjacent anodes; and along a direction of a line connecting the centers of the two adjacent anodes, the first conductive pattern and the second conductive pattern are arranged side by side.

[0017] In some embodiments, the two adjacent anodes are a first anode and a second anode, the first anode being adjacent to the first conductive pattern, and the second anode being adjacent to the second conductive pattern. The first conductive pattern is configured to transmit a first blocking voltage, and the second conductive pattern is configured to transmit a second blocking voltage, wherein the first blocking voltage is greater than the second blocking voltage. The first anode is configured to transmit an operating voltage greater than or equal to a first initial lighting voltage, and the second anode is configured to transmit an operating voltage greater than or equal to a second initial lighting voltage, wherein the second initial lighting voltage is greater than the first initial lighting voltage.

[0018] In some embodiments, the light-emitting functional layer includes a plurality of light-emitting patterns, each light-emitting pattern being arranged corresponding to an anode. The light-emitting pattern arranged corresponding to the first anode can emit green light, and the light-emitting pattern arranged corresponding to the second anode can emit red light.

[0019] In some embodiments, the display panel further comprises: a first power line and an initialization signal line disposed between the substrate and the anode layer. The first power line is configured to transmit a low-level voltage signal, and the initialization signal line is configured to transmit an initialization signal, wherein the voltage of the low-level voltage signal is greater than the voltage of the initialization signal. The first conductive pattern is electrically connected to the first power line, and the second conductive pattern is electrically connected to the initialization signal line.

[0020] In some embodiments, the display panel further includes initialization signal lines disposed between the substrate and the anode layer, the initialization signal lines including a first initialization signal line and a second initialization signal line. The first initialization signal line is configured to transmit a first initialization signal, and the second initialization signal line is configured to transmit a second initialization signal, wherein a voltage of the first initialization signal is greater than a voltage of the second initialization signal. The first conductive pattern is electrically connected to the first initialization signal line, and the second conductive pattern is electrically connected to the second initialization signal line.

[0021] In some embodiments, the conductive pattern is in the shape of a strip, and a length extension direction of the conductive pattern is consistent with an extension direction of a side of an opening adjacent to the conductive pattern.

[0022] In some embodiments, the display panel includes a plurality of sub-pixels, each sub-pixel includes an anode, and one of the two sub-pixels to which the two anodes adjacent to the conductive pattern belong can emit light of a different color than the other.

[0023] In some embodiments, the light-emitting functional layer includes: a first sub-light-emitting functional layer, a heterojunction structure layer, and a second sub-light-emitting functional layer stacked along the thickness direction of the substrate, and the heterojunction structure layer is located between the first sub-light-emitting functional layer and the second sub-light-emitting functional layer.

[0024] The display panel includes a plurality of sub-pixels, each sub-pixel includes a first light-emitting pattern and a second light-emitting pattern, the first light-emitting pattern is arranged in the first sub-light-emitting functional layer, and the second light-emitting pattern is arranged in the second sub-light-emitting functional layer, and the first light-emitting pattern and the second light-emitting pattern are arranged corresponding to the same opening of the pixel defining layer.

[0025] On the other hand, a display device is provided, comprising: the display panel described in any one of the aforementioned embodiments.

[0026] It can be understood that the beneficial effects that can be achieved by the display device provided by the above embodiments of the present disclosure can be referred to the beneficial effects of the display panel mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below should be considered schematic diagrams and are not intended to limit the actual dimensions of the products involved in the embodiments of the present disclosure.

[0028] Figure 1 is a structural diagram of a display device according to some embodiments;

[0029] Figure 2 is a top view of a display panel provided according to some embodiments;

[0030] Figure 3 For the Figure 2 A cross-sectional view taken along section line A-A';

[0031] Figure 4 A schematic diagram of carrier transport according to some embodiments;

[0032] Figure 5 Another schematic diagram of carrier transport according to some embodiments;

[0033] Figure 6 For the Figure 2 Another cross-sectional view of the section line AA' in FIG.

[0034] Figure 7 For the Figure 2 Another cross-sectional view of the section line AA' in FIG.

[0035] Figure 8 For the Figure 2 Another cross-sectional view of the section line AA' in FIG.

[0036] Figure 9 for Figure 3 A structural diagram corresponding to area B in the middle;

[0037] Figure 10 Another schematic diagram of carrier transport according to some embodiments;

[0038] Figure 11 for Figure 3 Another structural diagram corresponding to area B in the middle;

[0039] Figure 12 for Figure 3 Another structural diagram corresponding to area B in the middle;

[0040] Figure 13 A diagram showing an arrangement structure of sub-pixels according to some embodiments;

[0041] Figure 14 FIG. 1 is another structural diagram of an arrangement of sub-pixels according to some embodiments;

[0042] Figure 15 4 is a cross-sectional view of a light-emitting functional layer provided according to some embodiments. DETAILED DESCRIPTION

[0043] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0044] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the particular features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0045] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0046] When describing some embodiments, the terms "electrically connected" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "electrically connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the contents herein.

[0047] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0048] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present therebetween.

[0049] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0050] Figure 1 FIG. 1 shows a top view of a display device 100. Figure 1 As shown, some embodiments of the present disclosure provide a display device 100, which can be any device that displays images, whether in motion (e.g., video) or stationary (e.g., still images), and whether textual or electronic. More specifically, it is contemplated that embodiments may be implemented in or associated with a variety of electronic devices, such as, but not limited to, mobile phones, wireless devices, personal data assistants (PDAs), handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, camcorders, game consoles, watches, clocks, calculators, television monitors, flat-panel displays, computer monitors, automotive displays (e.g., speedometer displays, etc.), navigation systems, cockpit controls and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of images of a piece of jewelry), and the like. Figure 1 In the figure, the display device 100 is taken as a mobile phone as an example for illustration.

[0051] like Figure 1 As shown, the display device 100 includes a display panel 200. The display panel 200 may be an electroluminescent display panel. In the case where the display panel 200 is an electroluminescent display panel, the electroluminescent display panel may be an organic light-emitting diode (OLED) display panel.

[0052] Figure 2 Shown Figure 1 A top view of the display panel 200 in FIG. Figure 2As shown, the display panel 200 includes a plurality of sub-pixels P. The plurality of sub-pixels P include at least a sub-pixel capable of emitting a first color light, a sub-pixel capable of emitting a second color light, and a sub-pixel capable of emitting a third color light. The first color, the second color, and the third color are three primary colors (e.g., red, green, and blue).

[0053] Figure 3 Shown Figure 2 The cross-sectional view of the display panel 200 at the section line AA' is shown in FIG. Figure 3 As shown, some embodiments of the present disclosure provide a display panel 200 , which includes a substrate 10 , an anode layer 301 , a pixel defining layer 302 , a light-emitting functional layer 303 , and at least one conductive pattern R.

[0054] For example, the substrate 10 may be a single-layer structure or a multi-layer structure. Figure 3 As shown, the substrate 10 may include a flexible base layer 101 and a buffer layer 102 stacked in sequence. For another example, the substrate 10 may include multiple flexible base layers 101 and multiple buffer layers 102 arranged alternately. The flexible base layer 101 may be made of polyimide, and the buffer layer 102 may be made of silicon nitride and / or silicon oxide to achieve the effect of blocking water, oxygen, and alkaline ions.

[0055] like Figure 3 As shown, an anode layer 301 is provided on the substrate 10, and the anode layer 301 includes a plurality of anodes L1. The anodes L1 are configured to transmit an operating voltage.

[0056] Exemplarily, the operating voltage transmitted by the anode L1 is a high-level voltage, for example, the operating voltage is greater than 0V. Different operating voltages correspond to different grayscales, and can drive the light-emitting functional layer 303 to emit light of different brightness.

[0057] Illustratively, anode layer 301 may have a stacked structure of transparent conductive oxide, metal, and transparent conductive oxide. Examples of the transparent conductive oxide material include indium tin oxide and indium zinc oxide, and examples of the metal material include gold, silver, nickel, and platinum. For example, anode layer 301 may have a stacked structure of indium tin oxide, silver, and indium zinc oxide.

[0058] Exemplarily, the display panel 200 includes a driving circuit layer 20 , which is disposed between the substrate 10 and the anode layer 301 . The driving circuit layer 20 is electrically connected to the anode L1 to provide a voltage to the anode L1 .

[0059] like Figure 3 As shown, the pixel defining layer 302 is disposed on a side of the anode layer 301 away from the substrate 10 . The pixel defining layer 301 is provided with a plurality of openings K, and one opening K is correspondingly provided to one anode L1 .

[0060] It can be understood that each opening K exposes at least a portion of the anode L1 , that is, the orthographic projection of the opening K on the substrate 10 is within the range of the orthographic projection of the anode L1 on the substrate 10 .

[0061] For example, the material of the pixel defining layer 302 may include an organic material.

[0062] like Figure 3 As shown, the light emitting functional layer 303 is disposed on a side of the pixel defining layer 302 away from the substrate 10 , and the light emitting functional layer 303 is in contact with the anode L1 through the opening K.

[0063] For example, at least a portion of the light-emitting functional layer 303 is located in the opening K of the pixel defining layer 302 and contacts the anode L1 located on a side of the pixel defining layer 302 close to the substrate 10 .

[0064] Exemplarily, the light-emitting functional layer 303 includes a light-emitting pattern L3, which may include small molecule organic materials or polymer molecule organic materials, and may be fluorescent materials or phosphorescent materials, and may emit red light, blue light, green light or white light.

[0065] Exemplarily, the materials of the light emitting patterns L3 capable of emitting light of different colors are different.

[0066] like Figure 3 As shown, the display panel 200 further includes a cathode layer 304 disposed on a side of the light-emitting functional layer 303 away from the substrate 10. The cathode layer 304 serves as the cathode L2 and is configured to provide a low-level voltage, such as 0V, to the light-emitting functional layer 303. The light-emitting pattern L3 is disposed between the anode layer 301 and the cathode layer 304. The high-level voltage applied to the anode layer 301 (i.e., the anode L1) and the low-level voltage applied to the cathode layer 304 (i.e., the cathode L2) form an electric field, thereby driving holes in the anode L1 and electrons in the cathode L2 to migrate toward the light-emitting functional layer 303 and recombine in the light-emitting pattern L3, causing the light-emitting layer L3 to emit light.

[0067] Illustratively, the cathode layer 304 is made of metal or alloy material, wherein the metal material is, for example, aluminum, silver, magnesium, etc., and the alloy material is, for example, magnesium-silver alloy or silver-lithium alloy.

[0068] Exemplarily, the light-emitting functional layer 303 further includes a common layer 305, which includes one or more layers of an electron transporting layer (ETL), an electron injection layer (EIL), a hole blocking layer (HBL), a hole transporting layer (HTL), a hole injection layer (HIL), and an electron blocking layer (EBL).

[0069] The common layer 305 acts as a transition medium for carriers (including the aforementioned electrons and holes) to migrate toward the luminescent pattern L3, reducing the potential barrier height that carriers need to overcome for transition and improving the luminous efficiency of the display panel 200. The higher the conductivity of the common layer 305, the higher the luminous efficiency of the display panel 200.

[0070] Exemplarily, the common layer 305 is a structure in which the entire layer is connected, that is, the light emitting patterns L3 emitting different colors share the common layer 305 .

[0071] like Figure 3 As shown, at least one conductive pattern R is provided on a side of the light-emitting functional layer 303 close to the substrate 10; the orthographic projection of the conductive pattern R on the substrate 10 is located between the orthographic projections of two adjacent anodes L1 on the substrate 10, and the conductive pattern R is in contact with the light-emitting functional layer 303, and the conductive pattern R is configured to transmit a blocking voltage, which is less than the operating voltage transmitted by the anode L1 adjacent to the conductive pattern R.

[0072] It should be noted that the “adjacent” in the aforementioned “anode L1 adjacent to the conductive pattern R” means that the orthographic projection of the anode L1 on the substrate 10 is adjacent to the orthographic projection of the conductive pattern R on the substrate 10 .

[0073] For example, the conductive pattern R contacts the common layer 305 in the light emitting functional layer 303. Figure 3 As shown, the conductive pattern R is in contact with the hole transport layer HTL in the light emitting functional layer 303 .

[0074] Exemplarily, the blocking voltage transmits a low-level voltage, for example, the blocking voltage is 0V, -1V, -2V, etc.

[0075] In related technologies, in order to improve the luminous efficiency of the display panel, the material of the common layer is usually selected to have a higher conductivity, which leads to the charge transfer phenomenon in the common layer between two adjacent sub-pixels (i.e., the flow and transmission of carriers between adjacent sub-pixels); and, as the resolution of the display panel increases, the distance between adjacent sub-pixels becomes closer and closer, the difficulty of charge transfer in the common layer between adjacent sub-pixels decreases, and the charge transfer phenomenon intensifies; in addition, the two parts of the common layer corresponding to two adjacent sub-pixels that emit different colors have different carrier densities, and carriers tend to flow from the side with higher density to the side with lower density, exacerbating the charge transfer phenomenon; in addition, when the luminous brightness of two adjacent sub-pixels is different, that is, the operating voltage of the anode is different, a weak electric field is formed between the two adjacent sub-pixels, and the charge in the common layer is more easily transferred under the drive of the electric field.

[0076] like Figure 4 As shown, the inventors of the present disclosure have discovered through research that charge transfer is prone to occur between adjacent sub-pixels P', thereby generating crosstalk current (arrow Z represents the direction of carrier transmission), which affects the display effect of the display panel. For example, when one of two adjacent sub-pixels P' needs to emit light and the other does not, the sub-pixel P' that does not need to emit light will be slightly bright due to the crosstalk current flowing into it due to the charge transfer phenomenon, resulting in poor display. For another example, when a sub-pixel P' needs to emit light that meets brightness requirements, when crosstalk current is generated due to charge migration, the luminance of the sub-pixel P' will deviate, resulting in the inability to display accurate colors. Especially at low grayscale, the color changes are obvious, and the crosstalk current will seriously affect the color accuracy of the display panel.

[0077] In the display panel 200 provided in some embodiments of the present disclosure, by arranging a conductive pattern R between adjacent sub-pixels P and making the conductive pattern R contact (i.e., electrically connected) with the light-emitting functional layer 303, when the blocking voltage transmitted by the conductive pattern R is lower than the operating voltage transmitted by the anode L1 of the adjacent sub-pixel P, the transmission of carriers in the common layer 305 between two adjacent sub-pixels P can be blocked.

[0078] For example, Figure 5 As shown, the charges diffused between two adjacent sub-pixels P are transferred toward the conductive pattern R (the first arrow Z1 and the second arrow Z2 are the transmission directions of the carriers), thereby interrupting the charge transfer between the two adjacent sub-pixels P, avoiding the generation of crosstalk current between the two sub-pixels P, thereby avoiding problems such as poor display caused by the crosstalk current, improving the accuracy of the display brightness of the sub-pixels P, and thus improving the display effect of the display panel 200.

[0079] like Figure 3As shown, the driving circuit layer 20 exemplarily includes an active layer 201, a first gate insulating layer 202, a first gate conductive layer 203, a second gate insulating layer 204, a second gate conductive layer 205, an interlayer dielectric layer 206, a source-drain conductive layer 21, and a planarization layer 22, which are sequentially stacked on the substrate 10. The anode layer 301 is provided above the planarization layer 22.

[0080] Optionally, the source-drain conductive layer 21 may be provided in a single layer or in multiple layers. In the case where the source-drain conductive layer 21 is provided in multiple layers, the planarization layer 22 is also provided in multiple layers.

[0081] Optionally, the driving circuit layer 20 may be provided with only one gate conductive layer (for example, only the first gate conductive layer 203 or only the second gate conductive layer 205). In this case, correspondingly, only one gate insulating layer is also provided (for example, only the first gate insulating layer 202).

[0082] Exemplarily, the driving circuit layer 20 is provided with a plurality of thin film transistors and a plurality of capacitor structures Cst.

[0083] Optionally, the thin film transistor may be a top-gate, bottom-gate or dual-gate structure.

[0084] The thin film transistor includes a gate T1 , a source T2 , a drain T3 and an active layer pattern T4 , wherein the gate T1 is located in the first gate conductive layer 203 , the source T2 and the drain T3 are located in the source-drain conductive layer 21 , and the active layer pattern T4 is located in the active layer 201 .

[0085] For example, the source electrode T2 or the drain electrode T3 of the thin film transistor may be electrically connected to the anode electrode L1 .

[0086] The capacitor structure Cst includes a first plate Cst1 and a second plate Cst2 , wherein the first plate Cst1 is located in the first gate conductive layer 203 , and the second plate Cst2 is located in the second gate conductive layer 205 .

[0087] Exemplarily, the display panel 200 further includes an encapsulation layer 40 disposed on a side of the cathode layer 304 away from the substrate 10. The encapsulation layer 40 may include a first encapsulation sublayer 41, a second encapsulation sublayer 42, and a third encapsulation sublayer 43, stacked in sequence away from the substrate 10. Exemplarily, the materials of the first and third encapsulation sublayers 41 and 43 include inorganic materials, while the material of the second encapsulation sublayer 42 includes an organic material. The first and third encapsulation sublayers 41 and 43 function as water vapor and oxygen barriers, while the second encapsulation sublayer 42 has a certain degree of flexibility and functions as a water vapor absorber.

[0088] In some embodiments, at least one conductive pattern R is disposed between the pixel defining layer 302 and the substrate 10 .

[0089] like Figure 3 As shown, in some embodiments, at least one conductive pattern R is provided on the anode layer 301. The pixel defining layer 302 is provided with at least one first via hole H1, which is provided between two adjacent openings K of the pixel defining layer 302. The light-emitting functional layer 303 contacts the conductive pattern R through the first via hole H1.

[0090] It should be noted that the conductive pattern R is insulated from the anode L1 .

[0091] It is understood that the conductive pattern R and the anode L1 are provided in the same layer. "In the same layer" refers to a layer structure formed by using the same film-forming process to form the film layer used to form the specific pattern, and then using the same mask through a single patterning process. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the resulting layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses.

[0092] By setting a conductive pattern R on the anode layer 301, the crosstalk current generated between two adjacent sub-pixels P is blocked, thereby improving the display effect of the display panel 200. At the same time, the conductive pattern R can be manufactured simultaneously with the process of manufacturing the anode L1, without adding a process of separately preparing the conductive pattern R, thereby reducing the difficulty of the manufacturing process of the display panel 200 and reducing the process cost.

[0093] like Figure 6 As shown, in some embodiments, at least one conductive pattern R is disposed between the pixel defining layer 302 and the light emitting functional layer 303 . The conductive pattern R is in contact with the light emitting functional layer 303 .

[0094] By setting the conductive pattern R above the pixel defining layer 302, the crosstalk current generated between two adjacent sub-pixels P is blocked, thereby improving the display effect of the display panel 200. At the same time, since the setting of the conductive pattern R is not restricted by the position of the anode L1, the operating space during preparation is increased, further reducing the process difficulty.

[0095] like Figure 7 and Figure 8 As shown, in some embodiments, the display panel 200 further includes at least one conductive layer M and an insulating layer N.

[0096] At least one conductive layer M is arranged between the substrate 10 and the anode layer 301, the conductive layer closest to the anode layer 301 in the at least one conductive layer M is the target conductive layer M', and the conductive pattern R is arranged in the target conductive layer M'; the insulating layer N is arranged between the target conductive layer M' and the anode layer 301.

[0097] The pixel definition layer 302 is provided with at least one first via hole H1, which is located between two adjacent openings K in the pixel definition layer 302. The insulating layer N is provided with at least one second via hole H2, which is connected to the first via hole H1. The light-emitting functional layer 303 contacts the conductive pattern R through the connected first and second via holes H1 and H2.

[0098] The conductive pattern R is provided on the side of the anode layer 301 close to the substrate 10 , which blocks the crosstalk current generated between two adjacent sub-pixels P, thereby improving the display effect of the display panel 200 , and facilitates the electrical connection between the conductive pattern R and the signal line transmitting the low-level voltage in the driving circuit layer 20 .

[0099] Exemplarily, the display panel 200 includes a source-drain conductive layer 21 disposed between the substrate 10 and the anode layer 301. The source-drain conductive layer 21 is a target conductive layer M', and the conductive pattern R is disposed on the source-drain conductive layer 21. The insulating layer N includes a planarization layer 22 located between the anode layer 301 and the source-drain conductive layer 21.

[0100] Exemplarily, when the source-drain conductive layer 21 is provided with multiple layers, the layer closest to the anode layer 301 is the target conductive layer M′.

[0101] For example, Figure 7 As shown, the source-drain conductive layer 21 includes a first source-drain conductive layer 207 and a second source-drain conductive layer 210. Correspondingly, the planarization layer 22 includes a first planarization layer 209 and a second planarization layer 211. The first planarization layer 209 is arranged between the first source-drain conductive layer 207 and the second source-drain conductive layer 210, and the second planarization layer 211 is arranged between the second source-drain conductive layer 210 and the anode layer 301.

[0102] Relative to the first source-drain conductive layer 207, the second source-drain conductive layer 210 closer to the anode layer 301 is the target conductive layer M', and the conductive pattern R is arranged on the second source-drain conductive layer 210. At this time, the insulating layer N includes a second planarization layer 211 located between the anode layer 301 and the second source-drain conductive layer 210. The second planarization layer 211 is provided with a second via H2. The conductive pattern R is electrically connected to the light-emitting functional layer 303 through the second via H2 and the first via H1 of the pixel defining layer 302.

[0103] Exemplarily, the display panel 200 further includes a passivation layer 208 disposed between the first source-drain conductive layer 207 and the first planarization layer 209 .

[0104] Exemplarily, the second source-drain conductive layer 210 is provided with a connection pattern 210 ′, and the anode L1 is electrically connected to the thin film transistor via the connection pattern 210 ′.

[0105] like Figure 8As shown, the display panel 200 exemplarily further includes at least one transition conductive layer 31 and a sub-insulating layer 32. The at least one transition conductive layer 31 is disposed between the source-drain conductive layer 21 and the anode layer 301, and the sub-insulating layer 32 is disposed between the transition conductive layer 31 and the anode layer 301. Exemplarily, the anode L1 is electrically connected to the thin film transistor via the transition conductive layer 31.

[0106] The transfer conductive layer closest to the anode layer 301 in the at least one transfer conductive layer 31 is the target conductive layer M', and the conductive pattern R is provided on the transfer conductive layer 31. The insulating layer N includes a sub-insulating layer 32, which is located between the anode layer 301 and the transfer conductive layer closest to the anode layer 301. The sub-insulating layer 32 is provided with a second via H2. The conductive pattern R is electrically connected to the light-emitting functional layer 303 via the second via H2 and the first via H1 of the pixel defining layer 302.

[0107] Exemplarily, the material of the transfer conductive layer 31 is a transparent material, for example, indium tin oxide.

[0108] like Figure 9 As shown, in some embodiments, a first conductive pattern R1 and a second conductive pattern R2 are provided between two adjacent anodes L1; along the direction of the center line Li of the two adjacent anodes L1, the first conductive pattern R1 and the second conductive pattern R2 are arranged side by side.

[0109] That is, the plurality of conductive patterns R include a first conductive pattern R1 and a second conductive pattern R2 , and two conductive patterns R are disposed between two adjacent anodes L1 , one of which is the first conductive pattern R1 and the other is the second conductive pattern R2 .

[0110] Among them, the first conductive pattern R1 is configured to transmit a first blocking voltage, and the second conductive pattern R2 is configured to transmit a second blocking voltage. Both the first blocking voltage and the second blocking voltage are lower than the operating voltage transmitted by the sub-pixel P adjacent to the two conductive patterns R (i.e., the operating voltage transmitted by the anode L1).

[0111] For example, Figure 9 As shown, a first conductive pattern R1 and a second conductive pattern R2 are provided between two adjacent sub-pixels P, and the charges diffused by the sub-pixel P relatively closer to the first conductive pattern R1 are transferred toward the first conductive pattern R1, while the charges diffused by the sub-pixel P relatively closer to the second conductive pattern R2 are transferred toward the second conductive pattern R2.

[0112] The first conductive pattern R1 transmits a first blocking voltage that is lower than the operating voltage of the sub-pixel P, thereby allowing charges in the light-emitting functional layer 303 of the sub-pixel P adjacent to the first conductive pattern R1 to transfer toward the first conductive pattern R1. Even if some residual charges remain after the charges are transferred to the first conductive pattern R1 and are transferred toward another sub-pixel P, these residual charges can be blocked by the second conductive pattern R2. Similarly, the second conductive pattern R2 transmits a second blocking voltage that is lower than the operating voltage of the sub-pixel P, thereby allowing charges in the light-emitting functional layer 303 of the sub-pixel P adjacent to the second conductive pattern R2 to transfer toward the second conductive pattern R2. Even if some residual charges remain after the charges are transferred to the second conductive pattern R2 and are transferred toward another sub-pixel P, these residual charges can be blocked by the first conductive pattern R1. By providing two conductive patterns R (the first conductive pattern R1 and the second conductive pattern R2) between two adjacent sub-pixels P, the blocking effect of the conductive patterns R on crosstalk current can be further enhanced, thereby improving the accuracy of the luminance of the sub-pixels P and enhancing the display quality of the display panel 200.

[0113] It should be noted that the aforementioned “a first conductive pattern R1 and a second conductive pattern R2 are provided between two adjacent anodes L1” is not limited to a scheme in which the first conductive pattern R1 and the second conductive pattern R2 are provided in the anode layer 301, but may also include schemes in which they are provided in other film layers (for example, provided above the pixel defining layer 302, provided in the anode layer 301, provided in the source-drain conductive layer 21 or provided in the transition conductive layer 31, etc.). That is, “a first conductive pattern R1 and a second conductive pattern R2 are provided between two adjacent anodes L1” here may refer to a scheme in which the first conductive pattern R1 and the second conductive pattern R2 are provided between two sub-pixels P corresponding to the two adjacent anodes L1.

[0114] like Figure 9 As shown, exemplarily, the two adjacent anodes L1 are respectively the first anode L11 and the second anode L12, the first anode L11 is adjacent to the first conductive pattern R1, and the second anode L12 is adjacent to the second conductive pattern R2, that is, the first anode L11 is closer to the first conductive pattern R1 relative to the second anode L12, and the second anode L12 is closer to the second conductive pattern R2 relative to the first anode L11.

[0115] In which, the first conductive pattern R1 is configured to transmit a first blocking voltage, the second conductive pattern R2 is configured to transmit a second blocking voltage, and the first blocking voltage is greater than the second blocking voltage; the first anode L11 is configured to transmit an operating voltage greater than or equal to the first initial lighting voltage, and the second anode L12 is configured to transmit an operating voltage greater than or equal to the second initial lighting voltage, and the second initial lighting voltage is greater than the first initial lighting voltage.

[0116] It should be noted that the "first initial lighting voltage" is the luminous threshold voltage of the luminous pattern L3 corresponding to the first anode L11, that is, the lowest voltage that can cause the luminous pattern L3 corresponding to the first anode L11 to emit light; the "second initial lighting voltage" is the luminous threshold voltage of the luminous pattern L3 corresponding to the second anode L12, that is, the lowest voltage that can cause the luminous pattern L3 corresponding to the second anode L12 to emit light.

[0117] By setting a first conductive pattern R1 adjacent to the first anode L11 and a second conductive pattern R2 adjacent to the second anode L12, and the first blocking voltage transmitted by the first conductive pattern R1 is greater than the second blocking voltage transmitted by the second conductive pattern R2, the two conductive patterns R (the first conductive pattern R1 and the second conductive pattern R2) between the two adjacent sub-pixels P form an inverter, that is, a blocking current is formed between the first conductive pattern R1 and the second conductive pattern R2, and the transfer direction of the charge in the blocking current is opposite to the charge transfer trend between the two adjacent sub-pixels P, further enhancing the blocking effect of the crosstalk current between the adjacent sub-pixels P, avoiding problems such as poor display caused by the crosstalk current, and improving the accuracy of the luminous brightness of the sub-pixels P, thereby enhancing the display effect of the display panel 200.

[0118] For example, Figure 10 As shown, when the operating voltage transmitted by the second anode L12 is greater than the operating voltage transmitted by the first anode L11, an electric field exists between the sub-pixel P corresponding to the second anode L12 and the sub-pixel P corresponding to the first anode L11, causing charge transfer in the light-emitting functional layer 303 and forming a crosstalk current directed from the second anode L12 to the first anode L11 (arrow Z indicates the direction of charge transfer in the crosstalk current), affecting the accuracy of the luminous brightness of the two sub-pixels P. By providing the first and second conductive patterns R1 and R2 and ensuring that the first blocking voltage is greater than the second blocking voltage, an electric field exists between the first and second conductive patterns R1 and R2, forming a blocking current directed from the first conductive pattern R1 to the second conductive pattern R2 (arrow Z3 indicates the direction of charge transfer in the blocking current). The first conductive pattern R1 is closer to the first anode L11 than the second conductive pattern R2. The transmission direction of this blocking current is opposite to the transmission direction of the aforementioned crosstalk current, further preventing the charge transfer between the two adjacent sub-pixels P and enhancing the blocking effect of the conductive patterns R.

[0119] In some embodiments, the display panel 200 further includes a first power line VSS and / or an initialization signal line Vinit disposed between the substrate 10 and the anode layer 301. At least one conductive pattern R is electrically connected to the first power line VSS and / or at least one conductive pattern R is electrically connected to the initialization signal line Vinit.

[0120] The first power line VSS is configured to transmit a low-level voltage signal, and the initialization signal line Vinit is configured to transmit an initialization signal. The voltage of the low-level voltage signal is greater than the voltage of the initialization signal. For example, the voltage of the low-level voltage signal is 0V, and the voltage of the initialization signal is -1V, -2V, -3V, -4.5V, or -5V.

[0121] Exemplarily, the initialization signal line Vinit includes a first initialization signal line Vinit1 and a second initialization signal line Vinit2 .

[0122] The first initialization signal line Vinit1 is configured to transmit a first initialization signal, and the second initialization signal line Vinit2 is configured to transmit a second initialization signal. The voltage of the first initialization signal is greater than the voltage of the second initialization signal. For example, the voltage of the first initialization signal is -1V, and the voltage of the second initialization signal is -2V or -3V; for example, the voltage of the first initialization signal is -3V, and the voltage of the second initialization signal is -4V or -5.5V.

[0123] In some embodiments, the first power line VSS is disposed in the source-drain conductive layer 21. For example, the first power line VSS is disposed in the second source-drain conductive layer 210.

[0124] In some embodiments, the initialization signal line Vinit is disposed in the gate conductive layer. For example, the first initialization signal line Vinit1 is disposed in the second gate conductive layer 205 .

[0125] In some embodiments, the initialization signal line Vinit is disposed in the source-drain conductive layer 21 . For example, the second initialization signal line Vinit2 is disposed in the first source-drain conductive layer 207 .

[0126] In some embodiments, the conductive pattern R is electrically connected to the first power line VSS. That is, the first power line VSS provides a blocking voltage for the conductive pattern R. The operating voltage of the sub-pixel P is greater than the low-level voltage transmitted by the first power line VSS, that is, greater than the blocking voltage transmitted by the conductive pattern R. As a result, the charge in the light-emitting functional layer 303 of the sub-pixel P adjacent to the conductive pattern R can be transferred to the conductive pattern R, thereby preventing crosstalk current from forming between adjacent sub-pixels P, thereby improving the accuracy of the light-emitting brightness of the sub-pixel P and enhancing the display effect of the display panel 200.

[0127] In some embodiments, the conductive pattern R is electrically connected to the first initialization signal line Vinit1. That is, the first initialization signal line Vinit1 provides a blocking voltage for the conductive pattern R. The operating voltage of the sub-pixel P is greater than the voltage of the first initialization signal transmitted by the first initialization signal line Vinit1, that is, greater than the blocking voltage transmitted by the conductive pattern R. As a result, the charge in the light-emitting functional layer 303 of the sub-pixel P adjacent to the conductive pattern R can be transferred to the conductive pattern R, avoiding the formation of crosstalk current between adjacent sub-pixels P, thereby improving the luminance accuracy of the sub-pixel P and enhancing the display effect of the display panel 200.

[0128] In some embodiments, the conductive pattern R is electrically connected to the second initialization signal line Vinit2. That is, the second initialization signal line Vinit2 provides a blocking voltage for the conductive pattern R. The operating voltage of the sub-pixel P is greater than the voltage of the second initialization signal transmitted by the second initialization signal line Vinit2, that is, greater than the blocking voltage transmitted by the conductive pattern R. As a result, the charge in the light-emitting functional layer 303 of the sub-pixel P adjacent to the conductive pattern R can be transferred to the conductive pattern R, avoiding the formation of crosstalk current between adjacent sub-pixels P, thereby improving the accuracy of the light-emitting brightness of the sub-pixel P and enhancing the display effect of the display panel 200.

[0129] In some embodiments, the conductive pattern R is electrically connected to the first power line VSS and the initialization signal line Vinit.

[0130] Exemplarily, the first conductive pattern R1 is electrically connected to the first power line VSS, and the second conductive pattern R2 is electrically connected to the initialization signal line Vinit.

[0131] Optionally, the second conductive pattern R2 is electrically connected to the first initialization signal line Vinit1 , or the second conductive pattern R2 is electrically connected to the second initialization signal line Vinit2 .

[0132] For example, Figure 11 As shown, the first conductive pattern R1 is electrically connected to the first power line VSS, and the second conductive pattern R2 is electrically connected to the second initialization signal line Vinit2. That is, the first power line VSS provides a first blocking voltage to the first conductive pattern R1, and the second initialization signal line Vinit2 provides a second blocking voltage to the second conductive pattern R2.

[0133] The operating voltages of the two sub-pixels P adjacent to the first conductive pattern R1 and the second conductive pattern R2, respectively, are both greater than the low-level voltage transmitted by the first power line VSS and the voltage of the second initialization signal transmitted by the second initialization signal line Vinit2. In other words, they are both greater than the first blocking voltage and the second blocking voltage. The low-level voltage transmitted by the first power line VSS is greater than the voltage of the second initialization signal transmitted by the second initialization signal line Vinit2. This causes the first blocking voltage to be greater than the second blocking voltage, thereby causing the first conductive pattern R1 and the second conductive pattern R2 to form an inverter. This creates a blocking current between the first conductive pattern R1 and the second conductive pattern R2, flowing from the first conductive pattern R1 to the second conductive pattern R2. This blocking current travels in a direction opposite to the direction of crosstalk current between the two adjacent sub-pixels P, further preventing charge transfer between the two adjacent sub-pixels P and enhancing the blocking effect of the conductive patterns R.

[0134] like Figure 12 As shown, for example, the first conductive pattern R1 is electrically connected to the first initialization signal line Vinit1, and the second conductive pattern R2 is electrically connected to the second initialization signal line Vinit2. That is, the first initialization signal line Vinit1 provides a first blocking voltage to the first conductive pattern R1, and the second initialization signal line Vinit2 provides a second blocking voltage to the second conductive pattern R2.

[0135] The operating voltages of the two sub-pixels P adjacent to the first conductive pattern R1 and the second conductive pattern R2, respectively, are both greater than the voltage of the first initialization signal transmitted by the first initialization signal line Vinit1 and the voltage of the second initialization signal transmitted by the second initialization signal line Vinit2. In other words, they are both greater than the first blocking voltage and the second blocking voltage. The voltage of the first initialization signal transmitted by the first initialization signal line Vinit1 is greater than the voltage of the second initialization signal transmitted by the second initialization signal line Vinit2. This makes the first blocking voltage greater than the second blocking voltage, thereby forming an inverter between the first conductive pattern R1 and the second conductive pattern R2. This creates a blocking current between the first conductive pattern R1 and the second conductive pattern R2, flowing from the first conductive pattern R1 to the second conductive pattern R2. This blocking current travels in a direction opposite to the direction of crosstalk current between the two adjacent sub-pixels P, further preventing charge transfer between the two adjacent sub-pixels P and enhancing the blocking effect of the conductive pattern R.

[0136] In some embodiments, one of the two sub-pixels P adjacent to the conductive pattern R (i.e., the two sub-pixels to which the two anodes L1 adjacent to the conductive pattern R belong) can emit light of a different color than the other. That is, the light-emitting patterns L3 of the two sub-pixels P adjacent to the conductive pattern R are configured to emit light of different colors. For example, one of the two sub-pixels P emits red light, and the other emits green or blue light.

[0137] It is understandable that the light-emitting patterns L3 of two sub-pixels P for emitting light of different colors have different light-emitting threshold voltages, that is, the minimum operating voltages provided by the anode L3 that can illuminate the light-emitting pattern L3 are different. When two adjacent sub-pixels P need to be illuminated, the operating voltages of the two sub-pixels P are different during the illumination process (for example, at a display brightness of 0 to 3 grayscales), which can easily form an electric field, causing crosstalk current to be generated between the two sub-pixels P, affecting the light-emitting accuracy of the sub-pixels P. The above-mentioned embodiment of the present disclosure, by providing a conductive pattern R between the sub-pixels P for emitting light of different colors, can effectively prevent the formation of crosstalk current between the sub-pixels P, thereby improving the light-emitting accuracy of the sub-pixels P, especially improving the light-emitting accuracy of the sub-pixels P in the low grayscale light-emitting state.

[0138] In some embodiments, one of the two sub-pixels P adjacent to the conductive pattern R can emit light of the same color as the other, that is, the light-emitting patterns L3 of the two sub-pixels P adjacent to the conductive pattern R are configured to emit light of the same color. For example, both sub-pixels P emit green light.

[0139] In some sub-pixel arrangements, there are two adjacent sub-pixels P that emit the same color. In this case, when one does not emit light while the other does, or when the brightness of the light emitted by one is lower than that of the other, that is, when the two sub-pixels P operate at different voltages, an electric field will form between them, resulting in crosstalk current between the two sub-pixels P, affecting the light emission accuracy of the sub-pixels P. By providing a conductive pattern R between two adjacent sub-pixels P that emit the same color, the crosstalk current between the sub-pixels P can be effectively blocked, thereby improving the light emission accuracy of the sub-pixels P.

[0140] In some embodiments, a conductive pattern R is disposed between the sub-pixel P emitting green light and the sub-pixel P emitting red light.

[0141] Exemplarily, when the conductive pattern R includes a first conductive pattern R1 and a second conductive pattern R2 , the light emitting pattern L3 of the subpixel P adjacent to the first conductive pattern R1 can emit green light, and the light emitting pattern L3 of the subpixel P adjacent to the second conductive pattern R2 can emit red light.

[0142] In some sub-pixel arrangements, a green-emitting sub-pixel P and a red-emitting sub-pixel P are positioned adjacent to each other. The materials of the green-emitting and red-emitting light-emitting functional layers 303 have high electrical conductivity, leading to a significant impact of crosstalk current, particularly in low-grayscale lighting conditions. Providing a conductive pattern R between the green-emitting and red-emitting sub-pixels P effectively blocks crosstalk current and improves the light-emitting accuracy of the sub-pixels P.

[0143] like Figure 13 and Figure 14 As shown, in some embodiments, the planar shapes of the openings K of the pixel defining layer 302 of different sub-pixels P may be different or the same. For example, the arrangement of the plurality of sub-pixels P may be various. For example, the arrangement of the plurality of sub-pixels P may be a traditional RGB arrangement (e.g., Figure 13 As shown), for another example, the arrangement of the plurality of sub-pixels P may be an RGBG arrangement.

[0144] like Figure 13 and Figure 14 As shown, in some embodiments, a conductive pattern R is provided on at least one side of the sub-pixel P (the side having an area facing other sub-pixels P), which can effectively block the crosstalk current formed between any two sub-pixels P, improve the luminous accuracy of all sub-pixels P, and enhance the full-screen display effect of the display panel 200.

[0145] like Figure 13 and Figure 14 As shown, in some embodiments, the conductive pattern R is in the shape of a strip, and the length extension direction Y of the conductive pattern R is consistent with the extension direction of the side KL of the opening K adjacent to the conductive pattern R.

[0146] Exemplarily, the length of the conductive pattern R is substantially equal to the length of the side KL of the opening K adjacent to the conductive pattern R.

[0147] In some embodiments, multiple conductive patterns P are integrally formed. For example, the film layer where the conductive pattern R is located is a mesh structure, and the sub-pixels P are arranged in the grid of the mesh structure. The grid lines of the mesh structure pass between two adjacent sub-pixels P. The grid lines serve as the conductive pattern R to block the crosstalk current between the two adjacent sub-pixels P.

[0148] For example, the film layer containing the integrally formed conductive pattern R is electrically connected to a signal line transmitting a low-level voltage (e.g., the first power line VSS or the initialization signal line Vinit) at only one location. This eliminates the need for each conductive pattern R to be connected to a signal line transmitting a low-level voltage, thus reducing the number of holes required and the complexity of the process.

[0149] like Figure 15 As shown, in some embodiments, the aforementioned light-emitting functional layer 303 includes: a first sub-light-emitting functional layer 303a, a heterojunction structure layer 303b, and a second sub-light-emitting functional layer 303c stacked along the thickness direction of the substrate 10 (i.e., perpendicular to the light-emitting surface of the display panel 200), with the heterojunction structure layer 303b located between the first sub-light-emitting functional layer 303a and the second sub-light-emitting functional layer 303c. In other words, the light-emitting functional layer 303 corresponding to each sub-pixel P includes two light-emitting devices connected in series. This can greatly reduce the light-emitting current of the sub-pixel P at the same light-emitting intensity, thereby increasing the lifespan of the sub-pixel P, which is beneficial to the development, mass production and introduction of new technologies with high lifespans, such as in-vehicle equipment.

[0150] like Figure 15 As shown, illustratively, each sub-pixel P includes a first light-emitting pattern L3a and a second light-emitting pattern L3c. The first light-emitting pattern L3a is provided in the first sub-light-emitting functional layer 303a, and the second light-emitting pattern L3c is provided in the second sub-light-emitting functional layer 303c. The first light-emitting pattern L3a and the second light-emitting pattern L3c are provided corresponding to the same opening K of the pixel defining layer 302. That is, the light-emitting functional layer 303 corresponding to each sub-pixel P includes two layers of light-emitting patterns L3 connected in series.

[0151] like Figure 15 As shown, exemplarily, in the two layers of light-emitting patterns L3 connected in series, each layer of the light-emitting pattern L3 is correspondingly provided with a common layer 305. For example, the first light-emitting pattern L3a is provided with at least one layer of the common layer 305 on both the side close to the substrate 10 and the side away from the substrate 10, and the second light-emitting pattern L3c is also provided with at least one layer of the common layer 305 on both the side close to the substrate 10 and the side away from the substrate 10.

[0152] In some embodiments, the heterojunction structure layer 303b includes at least two semiconductor thin films. Figure 15 As shown, the heterojunction structure layer 303b includes a first semiconductor thin film P-CGL and a second semiconductor thin film N-CGL.

[0153] Illustratively, the materials of different semiconductor thin films in the at least two semiconductor thin films are different.

[0154] Illustratively, the material of the semiconductor film is a compound such as gallium arsenide, or a semiconductor alloy such as silicon-germanium.

[0155] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A display panel, characterized in that: The display panel includes: substrate; an anode layer, disposed on the substrate, the anode layer comprising a plurality of anodes; a pixel defining layer, disposed on a side of the anode layer away from the substrate, wherein the pixel defining layer is provided with a plurality of openings, with one opening being provided corresponding to one anode; a light-emitting functional layer, disposed on a side of the pixel defining layer away from the substrate, wherein the light-emitting functional layer contacts the anode through the opening; At least one conductive pattern is provided on a side of the light-emitting functional layer close to the substrate; the orthographic projection of the conductive pattern on the substrate is located between the orthographic projections of two adjacent anodes on the substrate, and the conductive pattern is in contact with the light-emitting functional layer, and the conductive pattern is configured to transmit a blocking voltage, wherein the blocking voltage is lower than an operating voltage transmitted by the anode adjacent to the conductive pattern; A first conductive pattern and a second conductive pattern are provided between two adjacent anodes; along the direction of the center line connecting the two adjacent anodes, the first conductive pattern and the second conductive pattern are arranged side by side; The two adjacent anodes are respectively a first anode and a second anode, the first anode is adjacent to the first conductive pattern, and the second anode is adjacent to the second conductive pattern; The first conductive pattern is configured to transmit a first blocking voltage, and the second conductive pattern is configured to transmit a second blocking voltage, wherein the first blocking voltage is greater than the second blocking voltage; The first anode is configured to transmit an operating voltage greater than or equal to a first initial lighting voltage, and the second anode is configured to transmit an operating voltage greater than or equal to a second initial lighting voltage, the second initial lighting voltage being greater than the first initial lighting voltage.

2. The display panel according to claim 1, wherein: The at least one conductive pattern is disposed between the pixel defining layer and the substrate.

3. The display panel according to claim 2, wherein: The at least one conductive pattern is provided on the anode layer; The pixel defining layer is provided with at least one first via hole, the first via hole being provided between two adjacent openings of the pixel defining layer, and the light emitting functional layer is in contact with the conductive pattern through the first via hole.

4. The display panel according to claim 2, wherein: The display panel further includes: At least one conductive layer is provided between the substrate and the anode layer, wherein the conductive layer closest to the anode layer among the at least one conductive layer is a target conductive layer, and the conductive pattern is provided in the target conductive layer; an insulating layer disposed between the target conductive layer and the anode layer; The pixel defining layer is provided with at least one first via hole, and the first via hole is provided between two adjacent openings of the pixel defining layer; The insulating layer is provided with at least one second via hole, and the second via hole is connected to the first via hole; The light-emitting functional layer contacts the conductive pattern through the first via hole and the second via hole that are connected to each other.

5. The display panel according to claim 4, wherein: The display panel includes a source-drain conductive layer disposed between the substrate and the anode layer, and the source-drain conductive layer is the target conductive layer; or, The display panel includes a source-drain conductive layer arranged between the substrate and the anode layer, and at least one transition conductive layer arranged between the source-drain conductive layer and the anode layer. The transition conductive layer closest to the anode layer among the at least one transition conductive layer is the target conductive layer.

6. The display panel according to claim 1, wherein: The at least one conductive pattern is disposed between the pixel defining layer and the light emitting functional layer.

7. The display panel according to claim 1, wherein: The display panel further includes: a first power line and / or an initialization signal line disposed between the substrate and the anode layer; the first power line being configured to transmit a low-level voltage signal, and the initialization signal line being configured to transmit an initialization signal; Wherein, at least one of the conductive patterns is electrically connected to the first power line; and / or, at least one of the conductive patterns is electrically connected to an initialization signal line.

8. The display panel according to claim 1, wherein: The light-emitting functional layer includes a plurality of light-emitting patterns, and one light-emitting pattern is correspondingly arranged to one anode; The light emitting pattern corresponding to the first anode can emit green light, and the light emitting pattern corresponding to the second anode can emit red light.

9. The display panel according to claim 1, wherein: The display panel further includes: a first power line and an initialization signal line disposed between the substrate and the anode layer; the first power line being configured to transmit a low-level voltage signal, the initialization signal line being configured to transmit an initialization signal, the voltage of the low-level voltage signal being greater than the voltage of the initialization signal; The first conductive pattern is electrically connected to the first power line, and the second conductive pattern is electrically connected to the initialization signal line.

10. The display panel according to claim 1, wherein The display panel further includes: an initialization signal line disposed between the substrate and the anode layer, the initialization signal line comprising a first initialization signal line and a second initialization signal line; the first initialization signal line is configured to transmit a first initialization signal, the second initialization signal line is configured to transmit a second initialization signal, and a voltage of the first initialization signal is greater than a voltage of the second initialization signal; The first conductive pattern is electrically connected to the first initialization signal line, and the second conductive pattern is electrically connected to the second initialization signal line.

11. The display panel according to any one of claims 1 to 7, wherein: The conductive pattern is in a strip shape, and a length extension direction of the conductive pattern is consistent with an extension direction of a side of an opening adjacent to the conductive pattern.

12. The display panel according to any one of claims 1 to 7, wherein: The display panel includes a plurality of sub-pixels, each sub-pixel including an anode; In two sub-pixels to which two anodes adjacent to the conductive pattern belong, light emitted by one of them is light of different colors from light emitted by the other.

13. The display panel according to any one of claims 1 to 7, wherein: The light-emitting functional layer comprises: a first sub-light-emitting functional layer, a heterojunction structure layer, and a second sub-light-emitting functional layer stacked along the thickness direction of the substrate, wherein the heterojunction structure layer is located between the first sub-light-emitting functional layer and the second sub-light-emitting functional layer; The display panel includes a plurality of sub-pixels, each sub-pixel includes a first light-emitting pattern and a second light-emitting pattern, the first light-emitting pattern is arranged in the first sub-light-emitting functional layer, and the second light-emitting pattern is arranged in the second sub-light-emitting functional layer, and the first light-emitting pattern and the second light-emitting pattern are arranged corresponding to the same opening of the pixel defining layer.

14. A display device, characterized in that: include: The display panel according to any one of claims 1 to 13.

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