Method for manufacturing a semiconductor device
By forming a combined structure of carbon-containing film and silicon oxide film on silicon nitride film and conductive film, etching to form openings and connecting the conductive film, the short circuit problem caused by insufficient etching selectivity is solved, achieving efficient contact connection and area reduction.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TOKYO ELECTRON LTD
- Filing Date
- 2020-09-07
- Publication Date
- 2026-04-24
AI Technical Summary
Insufficient etch selectivity during the formation of vias connected to the gate electrode and vias connected to trench contacts can lead to short circuits, affecting yield.
A carbon-containing film is formed on a silicon nitride film and a conductive film, and a silicon oxide film surrounds the film. An opening is formed by etching, and then a conductive film is formed in the opening to connect in a contact manner. Finally, the conductive film is exposed by grinding the silicon oxide film and the silicon nitride film to form an opening for contact and avoid short circuit.
It effectively suppresses the generation of short circuits, can reduce the cell area, and improves the yield by selectively etching to form connections with the gate electrode and the active region.
Smart Images
Figure CN114375493B_ABST
Abstract
Description
Technical Field
[0001] The following disclosure relates to a method for manufacturing a semiconductor device. Background Technology
[0002] Patent document 1 discloses the following technology: as a so-called COAG (Contact Over Active Gate) structure in which the contacts with the gate electrode are arranged on the active region, the cell area is reduced.
[0003] Patent Document 1: US Patent No. 9,461,143 Summary of the Invention
[0004] This disclosure provides techniques for suppressing the generation of short circuits.
[0005] A method for manufacturing a semiconductor device according to one aspect of the present disclosure includes: a step of forming a first carbon-containing film on a silicon nitride film and a first conductive film; a step of forming a first silicon oxide film surrounding the first film, wherein the first silicon oxide film is located on the silicon nitride film and the first conductive film; a step of removing the first film and forming a first opening in the first silicon oxide film that exposes at least a portion of the silicon nitride film and at least a portion of the first conductive film; and a step of forming a second conductive film in contact with the first conductive film within the first opening.
[0006] According to this disclosure, the generation of short circuits can be suppressed. Attached Figure Description
[0007] Figure 1 This is a flowchart illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0008] Figure 2A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0009] Figure 2B yes Figure 2A The illustrated wafer is shown in section A-A'.
[0010] Figure 2C This is a cross-sectional view showing other structural examples of semiconductor devices.
[0011] Figure 3A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0012] Figure 3B yes Figure 3A The illustrated wafer is shown in section A-A'.
[0013] Figure 4AThis figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0014] Figure 4B yes Figure 4A The illustrated wafer is shown in section A-A'.
[0015] Figure 5A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0016] Figure 5B yes Figure 5A The illustrated wafer is shown in section A-A'.
[0017] Figure 6A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0018] Figure 6B yes Figure 6A The illustrated wafer is shown in section A-A'.
[0019] Figure 7A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0020] Figure 7B yes Figure 7A The illustrated wafer is shown in section A-A'.
[0021] Figure 8A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0022] Figure 8B yes Figure 8A The illustrated wafer is shown in section A-A'.
[0023] Figure 9A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0024] Figure 9B yes Figure 9A The illustrated wafer is shown in section A-A'.
[0025] Figure 10A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0026] Figure 10B yes Figure 10A The illustrated wafer is shown in section A-A'.
[0027] Figure 11AThis figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0028] Figure 11B yes Figure 11A The illustrated wafer is shown in section A-A'.
[0029] Figure 12A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0030] Figure 12B yes Figure 12A The illustrated wafer has cross-sectional views along lines A-A' and B-B'.
[0031] Figure 13A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0032] Figure 13B yes Figure 13A The illustrated wafer has cross-sectional views along lines A-A' and B-B'.
[0033] Figure 14A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0034] Figure 14B yes Figure 14A The illustrated wafer has cross-sectional views along lines A-A' and B-B'.
[0035] Figure 15A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0036] Figure 15B yes Figure 15A The illustrated wafer has cross-sectional views along lines A-A' and B-B'.
[0037] Figure 16A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment.
[0038] Figure 16B yes Figure 16A The illustrated wafer has cross-sectional views along lines A-A' and B-B'.
[0039] Figure 17 This is a flowchart illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0040] Figure 18A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0041] Figure 18B yes Figure 18A The illustrated wafer is shown in section A-A'.
[0042] Figure 19A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0043] Figure 19B yes Figure 19A The illustrated wafer is shown in section A-A'.
[0044] Figure 20A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0045] Figure 20B yes Figure 20A The illustrated wafer is shown in section A-A'.
[0046] Figure 21A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0047] Figure 21B yes Figure 21A The illustrated wafer is shown in section A-A'.
[0048] Figure 22A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0049] Figure 22B yes Figure 22A The illustrated wafer is shown in section A-A'.
[0050] Figure 23A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0051] Figure 23B yes Figure 23A The illustrated wafer is shown in section A-A'.
[0052] Figure 24A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0053] Figure 24B yes Figure 24A The illustrated wafer is shown in section A-A'.
[0054] Figure 25A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0055] Figure 25B yes Figure 25A The illustrated wafer is shown in section A-A'.
[0056] Figure 26A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0057] Figure 26B yes Figure 26A The illustrated wafer is shown in section A-A'.
[0058] Figure 27A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0059] Figure 27B yes Figure 27A The illustrated wafer is shown in section A-A'.
[0060] Figure 28A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0061] Figure 28B yes Figure 28A The illustrated wafer is shown in section A-A'.
[0062] Figure 29A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0063] Figure 29B yes Figure 29A The illustrated wafer has cross-sectional views along lines A-A' and B-B'.
[0064] Figure 30A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment.
[0065] Figure 30B yes Figure 30A The illustrated wafer has cross-sectional views along lines A-A' and B-B'. Detailed Implementation
[0066] Hereinafter, embodiments of the method for manufacturing the semiconductor device disclosed in this application will be described in detail with reference to the accompanying drawings. Furthermore, the method for manufacturing the semiconductor device disclosed is not limited to these embodiments. Additionally, in this disclosure, ordinal numbers such as "first," "second," etc., are used for convenience to avoid confusion regarding constituent elements. Therefore, even in terms that use ordinal numbers in this disclosure, there are instances where different ordinal numbers are used in the claims, or instances where ordinal numbers are omitted.
[0067] However, reducing cell area is a pressing issue in front-end logic devices. However, when using selective etching to form vias connected to the gate electrode and vias connected to trench contacts, insufficient selectivity in the etching can lead to short circuits, potentially worsening the yield.
[0068] Therefore, a technology to suppress the generation of short circuits is desired.
[0069] [First Implementation Method]
[0070] The method for manufacturing a semiconductor device according to the first embodiment will be described. In the embodiment described below, the process of manufacturing a FET (Field Effect Transistor) logic device as a logic device will be used as an example. Examples of logic devices include microprocessors such as CPUs (central processing units).
[0071] Figure 1 This is a flowchart illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 1 The steps for forming contacts with the active region and gate electrode of the FET are illustrated. In this embodiment, by... Figure 1 The flowchart illustrates the steps for fabricating a semiconductor device on wafer W. Refer to the following... Figures 2A to 16B An example of a method for manufacturing a semiconductor device will be given.
[0072] First, prepare the wafer W to be processed (step S10). The wafer W to be processed is, for example, a... Figure 2A and Figure 2B The structure shown is as shown. Figure 2A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 2A The image shows a top view of an example of a wafer W used to fabricate a semiconductor device. Figure 2B yes Figure 2A The illustrated cross-sectional view of wafer W along line A-A'.
[0073] A conductive film 12, such as tungsten (W), is stacked on the wafer W. A silicon nitride (SiN) film 13 is stacked on the conductive film 12 as an insulating film.
[0074] The sides of the conductive film 12 and the silicon nitride film 13 are covered by an insulating separator 14. The separator 14 is formed of an insulating material such as SiOCN. Figure 2A and Figure 2BAs shown, structures 30, each having a conductive film 12 and a silicon nitride film 13 covered by an isolator 14, are arranged at predetermined intervals in the y-axis direction, and each structure 30 extends along the x-axis direction. Furthermore, an insulating film 15 is embedded between adjacent structures 30 in the y-axis direction. The insulating film 15 is formed, for example, of silicon oxide such as SiO2. On the underlayer of the conductive film 12, the isolator 14, and the insulating film 15 on the wafer W, according to the region of each FET cell, a semiconductor such as silicon with p-type and n-type impurities introduced, i.e., an active region, and an insulating region, such as that made of silicon oxide, are formed. Furthermore, the semiconductor device fabricated on the wafer W can also have the following structure. Figure 2C yes Figure 2A The illustrated cross-sectional view of wafer W along line A-A'. Figure 2C This is a cross-sectional view showing other structural examples of semiconductor devices. Furthermore, in Figure 2C In the wafer W shown, for the pair with Figure 2B The same reference numerals are used for the same parts. In this structure, the conductive film 12 is covered around (lower surface and side surface) by a stacked structure of films 12a and 12b. Film 12a is formed, for example, by HfO2, and functions as a gate insulating film. In addition to HfO2, film 12a can also be made of ZrO2 or HfZrO2. Film 12b is formed, for example, by TiN, and serves as a metal film for setting the work function. As an example of other materials that can be used as film 12b, TiAlN is listed. The material used for film 12b varies depending on the conductivity type of the transistor formed; for example, TiN can be used in the case of PMOSFET, and TiAlN can be used in the case of NMOSFET. The conductive film 12 is formed, for example, by W, and is used as a low-resistance metal film for the purpose of reducing the overall resistance. Thus, Figure 2C The structure shown can be applied to both PMOSFETs and NMOSFETs. The conductive film 12, which will be described later in Figure 3, can also be configured as... Figure 2C The structure shown.
[0075] Next, the insulating film 15 is removed, and a conductive film 16 is formed (step S11). The conductive film 16 is formed, for example, from a conductive metallic material such as ruthenium (Ru), cobalt, or tungsten. In this embodiment, the conductive film 16 is formed, for example, from ruthenium. The insulating film 15 is removed, for example, by dry etching using a fluorocarbon gas. Then, the conductive film 16 is formed, for example, by CVD (Chemical Vapor Deposition) using dimethylbutadieneruthenium tricarbonyl (Ru(DMBD)(CO)3) and oxygen. Thus, the wafer W becomes, for example, a... Figure 3A and Figure 3B The state shown. Figure 3AThis figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 3A The image shows a top view of a wafer W on which a conductive film 16 is formed. Figure 3B yes Figure 3A The illustrated cross-sectional view of wafer W along line A-A'.
[0076] Next, the conductive film 16 is polished to expose the upper surfaces of the silicon nitride film 13 and the separator 14 (step S12). For example, the conductive film 16 is polished using CMP (Chemical Mechanical Polishing) until the upper surfaces of the silicon nitride film 13 and the separator 14 are exposed. Thus, the wafer W becomes, for example, a... Figure 4A and Figure 4B The state shown. Figure 4A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 4A The image shows a top view of a wafer W in which the upper surface of the silicon nitride film 13 and the separator 14 are exposed by grinding the conductive film 16. Figure 4B yes Figure 4A The illustrated cross-sectional view of wafer W along line A-A'.
[0077] Next, the conductive film 16 is recessed so that the upper surface of the conductive film 16 is lower than the upper surface of the silicon nitride film 13 and the separator 14 (step S13). For example, the upper part of the conductive film 16 is etched using dry etching with oxygen. Thus, the wafer W becomes, for example, a... Figure 5A and Figure 5B The state shown. Figure 5A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 5A The image shows a top view of the wafer W in which the conductive film 16 is recessed. Figure 5B yes Figure 5A The illustrated cross-sectional view of wafer W along line A-A'.
[0078] Next, a carbon-containing film 17 is formed on the silicon nitride film 13 and the conductive film 16 (step S14). For example, the film 17 is formed at the locations where the active regions are formed on the silicon nitride film 13 and the conductive film 16. For example, the film is formed on the entire surface of the silicon nitride film 13 and the conductive film 16 using a carbon-containing hard mask and a photoresist. Then, a mask film is formed on the formed film, and a pattern is formed on the mask film by photolithography, so that the mask film remains in the areas where the contacts with the conductive film 16 are formed. Then, the mask film is used as a mask to pattern the carbon-containing film, and the film 17 is formed at the locations where the contacts are formed. Thus, the wafer W becomes, for example, a... Figure 6A and Figure 6B The state shown. Figure 6A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 6A The image shows a top view of a wafer W on which a carbon-containing film 17 is formed. Figure 6B yes Figure 6A The illustrated cross-sectional view of wafer W along line A-A'.
[0079] Next, a silicon oxide film 18 surrounding the film 17 is formed on the silicon nitride film 13 and the conductive film 16 (step S15). For example, the silicon oxide film 18 is formed on the entire surface of the silicon nitride film 13 and the conductive film 16 by CVD and coating. Then, the silicon oxide film 18 is polished by CMP or the like until the upper surface of the film 17 is exposed. Thus, the wafer W becomes, for example, a... Figure 7A and Figure 7B The state shown. Figure 7A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 7A The image shows a top view of a wafer W having a silicon oxide film 18 surrounding a carbon-containing film 17. Figure 7B yes Figure 7A The illustrated cross-sectional view of wafer W along line A-A'.
[0080] Next, the carbon-containing film 17 is removed (step S16). For example, the carbon-containing film 17 is etched using dry etching with oxygen. Furthermore, since the etch selectivity ratio between the carbon-containing film 17 and the silicon oxide film 18 is sufficiently large, the removal of film 17 can be performed by anisotropic etching or isotropic etching. Thus, the wafer W becomes, for example, a... Figure 8A and Figure 8B The state shown. Figure 8A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 8A The image shows a top view of the wafer W after the carbon-containing film 17 has been removed. Figure 8B yes Figure 8A A-A' cross-sectional view of the illustrated wafer W. By removing film 17, an opening 19 is formed in silicon oxide film 18, exposing at least a portion of silicon nitride film 13 and at least a portion of conductive film 16.
[0081] Next, a conductive film 20 is formed in contact with the conductive film 16 within the opening 19 (step S17). The conductive film 20 can be the same metal material as the conductive film 16, or it can be a different metal material. In this embodiment, the conductive film 20 is formed from ruthenium, for example, the same metal material as the conductive film 16. For example, a CVD of Ru(DMBD)(CO)3 and oxygen is used to form the conductive film 16 on the entire surface. Then, the conductive film 20 is polished by CMP or the like until the upper surface of the silicon oxide film 18 is exposed. Furthermore, the upper part of the conductive film 20 is etched, for example, by dry etching with oxygen. As a result, the wafer W becomes, for example, a... Figure 9A and Figure 9B The state shown. Figure 9A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 9A The image shows a top view of a wafer W on which a conductive film 20 is formed. Figure 9B yes Figure 9A The illustrated wafer W is shown in cross-sectional view along line A-A'. The conductive film 20 corresponds to the second conductive film of this disclosure. The portion where the conductive films 16 and 20 are stacked functions as a contact point with the active region.
[0082] Next, the silicon oxide film 18 is polished to expose the upper surface of the silicon nitride film 13 (step S18). For example, the silicon oxide film 18 is polished by CMP or the like until the upper surface of the silicon nitride film 13 is exposed. Thus, the wafer W, for example, as shown... Figure 10A and Figure 10B As shown, the upper surface of the conductive film 20 and the upper surface of the silicon nitride film 13 are exposed. Figure 10A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 10A The image shows a top view of wafer W after the silicon oxide film 18 has been ground. Figure 10B yes Figure 10A The illustrated cross-sectional view of wafer W along line A-A'.
[0083] Next, the exposed silicon nitride film 13 is removed (step S19). For example, the silicon nitride film 13 is etched using a dry etching process employing a mixed gas comprising a fluorine-containing gas and an oxygen-containing gas. As a result, the wafer W becomes, for example, a... Figure 11A and Figure 11B The state shown. Figure 11A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 11A The image shows a top view of the wafer W after the exposed silicon nitride film 13 has been removed. Figure 11B yes Figure 11AA-A' cross-sectional view of the illustrated wafer W. By removing the silicon nitride film 13, the conductive film 12 formed on the underside of the silicon nitride film 13 is exposed.
[0084] Next, a carbon-containing film 21 is formed on the silicon oxide film 18 and the conductive film 12 (step S20). For example, the film 21 is formed on the silicon oxide film 18 and the conductive film 12 at the locations where the contacts with the gate electrodes are formed. For example, the film is formed on the entire surface of the silicon oxide film 18 and the conductive film 12 using a carbon-containing hard mask and a photoresist. Then, a mask film is formed on the formed film, and a pattern is formed on the mask film by photolithography, so that the mask film remains in the areas where the contacts with the conductive film 12 are formed. Then, the mask film is patterned as a mask, and the film 21 is formed at the locations where the contacts are formed. Thus, the wafer W becomes, for example, a... Figure 12A and Figure 12B The state shown. Figure 12A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 12A The image shows a top view of a wafer W on which a carbon-containing film 21 is formed. Figure 12B yes Figure 12A The illustrated cross-sectional views of wafer W along line A-A' and line B-B'.
[0085] Next, a silicon oxide film 22 surrounding the film 21 is formed on the silicon oxide film 18 (step S21). For example, the silicon oxide film 22 is formed on the entire surface of the silicon oxide film 18, the conductive film 20, and the film 21 by CVD or coating. Then, the silicon oxide film 22 is polished by CMP or the like until the upper surface of the film 21 is exposed. Thus, the wafer W becomes, for example, a... Figure 13A and Figure 13B The state shown. Figure 13A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 13A The image shows a top view of a wafer W having a silicon oxide film 22 surrounding a carbon-containing film 21. Figure 13B yes Figure 13A The illustrated cross-sectional views of wafer W along line A-A' and line B-B'.
[0086] Next, the carbon-containing film 21 is removed (step S22). For example, the carbon-containing film 21 is etched using dry etching with oxygen. Furthermore, since the etching selectivity ratio between the carbon-containing film 21 and the silicon oxide film 22 is sufficiently large, the removal of film 21 can be performed by anisotropic etching or isotropic etching. Thus, the wafer W becomes, for example, a... Figure 14A and Figure 14B The state shown. Figure 14AThis figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 14A The image shows a top view of the wafer W after the carbon-containing film 21 has been removed. Figure 14B yes Figure 14A The illustrated wafer W is shown in cross-sectional views along lines A-A' and B-B'. By removing film 21, an opening 23 is formed in silicon oxide film 22, exposing at least a portion of conductive film 12 and at least a portion of silicon oxide film 18.
[0087] Next, a conductive film 24 is formed on the conductive film 12 in contact within the opening 23 (step S23). For example, the conductive film 24 is formed over the entire surface using CVD with Ru(DMBD)(CO)3 and oxygen. Then, the conductive film 24 is polished by CMP or the like until the upper surface of the silicon oxide film 22 is exposed. Then, the upper part of the conductive film 24 is etched, for example, using dry etching with oxygen. Thus, the wafer W becomes, for example, a... Figure 15A and Figure 15B The state shown. Figure 15A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 15A The image shows a top view of a wafer W on which a conductive film 24 is formed. Figure 15B yes Figure 15A The illustrated cross-sectional views of wafer W along line A-A' and line B-B'.
[0088] Next, the silicon oxide film 22 is polished to expose the upper surfaces of the conductive films 20 and 24 (step S24). For example, the silicon oxide film 22 is polished by CMP or the like until the upper surfaces of the conductive films 20 and 24 are exposed. Thus, the wafer W, for example, becomes... Figure 16A and Figure 16B The state shown. Figure 16A This figure illustrates an example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 16A The image shows a top view of wafer W after grinding the silicon oxide film 22. Figure 16B yes Figure 16A The illustrated cross-sectional views of wafer W along lines A-A' and B-B' are shown. The portions where conductive films 12 and 24 are stacked function as contacts with the gate electrode. Additionally, the portions where conductive films 16 and 20 are stacked function as contacts with the active region. On wafer W, wiring connecting the conductive films 20 and 24 is also formed on the upper portion, as needed.
[0089] Thus, the semiconductor device fabrication method according to the first embodiment can form the opening 19 without selective etching of the silicon nitride film 13 by removing the film 17. Furthermore, the semiconductor device fabrication method according to the first embodiment can form the opening 23 by removing the film 21. Therefore, the semiconductor device fabrication method according to the embodiments can suppress short circuits when forming the opening 19 connected to the gate electrode and the opening 23 connected to the active region. In addition, the semiconductor device fabrication method according to the first embodiment can arrange the contacts with the gate electrode on the active region, thereby reducing the cell area. Furthermore, the semiconductor device fabrication method according to the first embodiment can form vias connected to the gate electrode and vias connected to trench contacts by etching with a sufficiently large selective etching ratio.
[0090] Thus, in the semiconductor device fabrication method according to the first embodiment, a carbon-containing film 17 is formed on a silicon nitride film 13 and a conductive film 16. The semiconductor device fabrication method forms a silicon oxide film 18 surrounding the film 17, wherein the silicon oxide film 18 is located on the silicon nitride film 13 and the conductive film 16. The semiconductor device fabrication method removes the film 17 and forms an opening 19 in the silicon oxide film 18, exposing at least a portion of the silicon nitride film 13 and at least a portion of the conductive film 16. Furthermore, the semiconductor device fabrication method forms a conductive film 20 in contact with the conductive film 16 within the opening 19. Thus, the semiconductor device fabrication method according to the first embodiment can form an opening 19 for forming contacts by removing the carbon-containing film 17, thereby suppressing the generation of short circuits.
[0091] Furthermore, in the semiconductor device fabrication method according to the first embodiment, the silicon oxide film 18 is ground to expose the upper surfaces of the conductive film 20 and the silicon nitride film 13. The exposed silicon nitride film 13 is removed to expose the conductive film 12 formed on the lower layer of the silicon nitride film 13. A carbon-containing film 21 is formed on the silicon oxide film 18 and the conductive film 12. A silicon oxide film 22 surrounding the film 21 is formed on the silicon oxide film 18. The film 21 is removed, and an opening 23 is formed on the silicon oxide film 22, exposing at least a portion of the conductive film 12 and at least a portion of the silicon oxide film 18. A conductive film 24 is formed in contact with the conductive film 12 within the opening 23. Thus, the semiconductor device fabrication method according to the first embodiment can form an opening 23 for forming contacts by removing the carbon-containing film 21, thereby suppressing the generation of short circuits.
[0092] Furthermore, conductive film 16 and conductive film 20 are contacts formed with the active region of the FET in the semiconductor device. Therefore, the semiconductor device fabrication method can suppress the generation of short circuits in the active region of the FET.
[0093] Furthermore, conductive film 12 and conductive film 24 serve as contacts with the gate of the FET. Therefore, the semiconductor device fabrication method can suppress the generation of short circuits at the gate of the FET.
[0094] Furthermore, an insulating separator 14 is provided between the silicon nitride film 13 and the conductive film 16, and between the conductive film 12 and the conductive film 16. Thus, the semiconductor device fabrication method can insulate the conductive film 12 and the conductive film 16 using the separator 14.
[0095] Furthermore, the conductive film 16 is formed such that its upper surface is lower than the upper surface of the silicon nitride film 13. Therefore, the semiconductor device fabrication method can suppress short circuits between the conductive film 16 and other conductive films 16 at the top.
[0096] [Second Implementation]
[0097] Next, the method for manufacturing the semiconductor device according to the second embodiment will be described. In the second embodiment, the formation of the silicon nitride film 13 covering the conductive film 12 will be omitted.
[0098] Figure 17 This is a flowchart illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. A portion of the method for manufacturing a semiconductor device according to the second embodiment involves processing and... Figure 1 The semiconductor device involved in the first embodiment shown is manufactured using the same method; therefore, the same reference numerals are used for the same processes and descriptions are omitted. The description mainly focuses on the parts with different processes. Figure 17 The steps for forming contacts with the active region and gate electrode of the FET are illustrated. In this embodiment, by... Figure 17 The steps shown in the flowchart are used to fabricate a semiconductor device on wafer W. Hereinafter, refer to... Figures 18A to 30B An example of a method for fabricating a semiconductor device will be described. Furthermore, a portion of the structure of the wafer W formed by the semiconductor device fabrication method according to the second embodiment is the same as that of the first embodiment; therefore, the same reference numerals will be used to describe the same parts.
[0099] First, prepare the wafer W to be processed (step S50). The wafer W to be processed is, for example, Figure 18A and Figure 18B The structure shown is as shown. Figure 18A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 18A The image shows a top view illustrating an example of fabricating a semiconductor device according to the second embodiment. Figure 18B yes Figure 18A The illustrated cross-sectional view of wafer W along line A-A'.
[0100] The wafer W has a conductive film 12, such as tungsten, stacked on it. Furthermore, as... Figure 2C As shown, the conductive film 12 can also be configured such that a stacked structure of films 12a and 12b covers its surroundings (lower surface and side surfaces). The side surfaces of the conductive film 12 are covered by an insulating separator 14. The separator 14 is formed, for example, of an insulating material such as SiOCN. A structure 30 having a conductive film 12 covered by the separator 14 is, for example, as shown in the diagram. Figure 18A and Figure 18B As shown, the structures are arranged at predetermined intervals along the y-axis, with each structure 30 extending along the x-axis. Furthermore, an insulating film 15 is embedded between adjacent structures 30 along the y-axis. The insulating film 15 is formed, for example, of silicon oxide such as SiO2. On the wafer W, beneath such conductive film 12, separator 14, and insulating film 15, are formed semiconductors such as silicon with p-type impurities introduced, i.e., active regions, and insulating regions such as those made of silicon oxide.
[0101] Next, an insulating film 40 is formed on the conductive film 12 by selective growth (step S51). The insulating film 40 can be a nitride film such as silicon nitride, or a metal oxide such as titanium oxide. In this embodiment, the insulating film 40 is, for example, a nitride film. For example, by selective growth using a mixed gas including a nitrogen-containing gas and a silicon-containing gas, the insulating film 40 is formed on the conductive film 12, which is a metallic material, by the nitride film. Thus, the wafer W becomes, for example, a... Figure 19A and Figure 19B The state shown. Figure 19A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 19A The image shows a top view of a wafer W on which an insulating film 40 is formed on a conductive film 12. Figure 19B yes Figure 19A The illustrated cross-sectional view of wafer W along line A-A'.
[0102] Next, the width of the insulating film 40 is increased to cover the upper surface of the separator 14 (step S52). For example, an insulating film of the same type as the insulating film 40 is formed on the entire surface of the insulating film 15 and the insulating film 40 by CVD coating, and the formed insulating film is etched back, thereby increasing the width of the insulating film 40. Thus, the wafer W becomes, for example, a... Figure 20A and Figure 20B The state shown. Figure 20AThis figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 20A The image shows a top view of the wafer W after the width of the insulating film 40 has been increased. Figure 20B yes Figure 20A A-A' cross-sectional view of the illustrated wafer W. The width of the insulating film 40 is increased to cover the upper surface of the separator 14.
[0103] Next, the insulating film 15 is removed to form the conductive film 16 (step S53). The conductive film 16 is formed of a conductive metal material such as ruthenium (Ru), cobalt, or tungsten. In this embodiment, the conductive film 16 is formed of ruthenium, for example. For example, the same process as steps S11 to S13 of the first embodiment is performed, such as removing the insulating film 15 by dry etching with a fluorocarbon gas and forming the conductive film 16, and grinding the conductive film 16 to expose the upper surface of the insulating film 40. Furthermore, the conductive film 16 is recessed so that the upper surface of the conductive film 16 is lower than the upper surface of the insulating film 40. As a result, the wafer W becomes, for example, a Figure 21A and Figure 21B The state shown. Figure 21A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 21A The image shows a top view of a wafer W on which a conductive film 16 is formed. Figure 21B yes Figure 21A The illustrated cross-sectional view of wafer W along line A-A'.
[0104] Next, a carbon-containing film 17 is formed on the insulating film 40 and the conductive film 16 (step S54). For example, the film 17 is formed at the locations where the active regions are formed on the insulating film 40 and the conductive film 16. For example, the film is formed over the entire surface of the insulating film 40 and the conductive film 16 using a carbon-containing hard mask and a photoresist. Then, a mask film is formed on the formed film, and a pattern is formed on the mask film by photolithography, so that the mask film remains in the areas where the contacts with the conductive film 16 are formed. Then, the mask film is patterned as a mask, and the film 17 is formed at the locations where the contacts are formed. Thus, the wafer W becomes, for example, a... Figure 22A and Figure 22B The state shown. Figure 22A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 22A The image shows a top view of a wafer W on which a carbon-containing film 17 is formed. Figure 22B yes Figure 22A The illustrated cross-sectional view of wafer W along line A-A'.
[0105] Next, a silicon oxide film 18 surrounding the film 17 is formed on the insulating film 40 and the conductive film 16 (step S55). For example, the silicon oxide film 18 is formed on the entire surface of the film 17, the insulating film 40, and the conductive film 16 by CVD or coating. Furthermore, the silicon oxide film 18 is polished by CMP or the like until the upper surface of the film 17 is exposed. Thus, the wafer W becomes, for example, a... Figure 23A and Figure 23B The state shown. Figure 23A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 23A The image shows a top view of a wafer W having a silicon oxide film 18 surrounding a carbon-containing film 17. Figure 23B yes Figure 23A The illustrated cross-sectional view of wafer W along line A-A'.
[0106] Next, the carbon-containing film 17 is removed (step S56). For example, the carbon-containing film 17 is etched using dry etching with oxygen. Furthermore, since the etch selectivity ratio between the carbon-containing film 17 and the silicon oxide film 18 is sufficiently large, the removal of film 17 can be performed by anisotropic etching or isotropic etching. Thus, the wafer W becomes, for example, a... Figure 24A and Figure 24B The state shown. Figure 24A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 24A The image shows a top view of the wafer W after the carbon-containing film 17 has been removed. Figure 24B yes Figure 24A A-A' cross-sectional view of the illustrated wafer W. By removing film 17, an opening 19 is formed in silicon oxide film 18, exposing at least a portion of insulating film 40 and at least a portion of conductive film 16.
[0107] Next, a conductive film 20 is formed in contact with the conductive film 16 within the opening 19 (step S57). The conductive film 20 can be the same metal material as the conductive film 16, or it can be a different metal material. In this embodiment, the conductive film 20 is formed from ruthenium, for example, the same material as the conductive film 16. For example, the conductive film 16 is formed over the entire surface using CVD with Ru(DMBD)(CO)3 and oxygen. Then, the conductive film 20 is ground by CMP or the like until the upper surface of the silicon oxide film 18 is exposed. Then, the upper part of the conductive film 20 is etched, for example, by dry etching with oxygen. As a result, the wafer W becomes, for example, a... Figure 25A and Figure 25B The state shown. Figure 25A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 25AThe image shows a top view of a wafer W on which a conductive film 20 is formed. Figure 25B yes Figure 25A The illustrated cross-sectional view of wafer W along line A-A'.
[0108] Next, the silicon oxide film 18 is polished to expose the upper surface of the insulating film 40 (step S58). For example, the silicon oxide film 18 is polished by CMP or the like until the upper surface of the insulating film 40 is exposed. Thus, the wafer W, for example, as shown... Figure 26A and Figure 26B As shown, the upper surface of the conductive film 20 and the upper surface of the insulating film 40 are exposed. Figure 26A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 26A The image shows a top view of wafer W after the silicon oxide film 18 has been ground. Figure 26B yes Figure 26A The illustrated cross-sectional view of wafer W along line A-A'.
[0109] Next, the exposed insulating film 40 is removed (step S59). This is done, for example, by dry etching using a mixed gas including a fluorine-containing gas and an oxygen-containing gas. As a result, the wafer W becomes, for example, a... Figure 27A and Figure 27B The state shown. Figure 27A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 27A The image shows a top view of the wafer W after the exposed insulating film 40 has been removed. Figure 27B yes Figure 27A A-A' cross-sectional view of the illustrated wafer W. By removing the insulating film 40, the conductive film 12 formed on the lower layer of the insulating film 40 is exposed.
[0110] Next, the width of the silicon oxide film 18 is increased to cover the upper surface of the separator 14 (step S60). For example, a silicon oxide film of the same type as the silicon oxide film 18 is deposited on the entire surface of the separator 14, the conductive film 12, the silicon oxide film 18, and the conductive film 20 by CVD coating, and the silicon oxide film is etched back, thereby increasing the width of the silicon oxide film 18. Thus, the wafer W becomes, for example, a... Figure 28A and Figure 28B The state shown. Figure 28A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 28A The image shows a top view of the wafer W after the width of the silicon oxide film 18 has been increased. Figure 28B yes Figure 28A A-A' cross-sectional view of the illustrated wafer W. The width of the silicon oxide film 18 is increased to cover the upper surface of the separator 14.
[0111] Next, a carbon-containing film 21 is formed on the silicon oxide film 18 and the conductive film 12 (step S61). For example, the film 21 is formed on the silicon oxide film 18 and the conductive film 12 at the locations where the contacts with the gate electrode of the FET are formed. For example, the film is formed over the entire surface of the silicon oxide film 18 and the conductive film 12 using a carbon-containing hard mask and a photoresist. Then, a mask film is formed on the formed film, and a pattern is formed on the mask film by photolithography, so that the mask film remains in the areas where the contacts with the conductive film 12 are formed. Then, the mask film is patterned as a mask, and the film 21 is formed at the locations where the contacts are formed. Thus, the wafer W becomes, for example, a... Figure 29A and Figure 29B The state shown. Figure 29A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 29A The image shows a top view of a wafer W on which a carbon-containing film 21 is formed. Figure 29B yes Figure 29A The illustrated cross-sectional views of wafer W along line A-A' and line B-B'.
[0112] Furthermore, the processes S21 to S24 are performed in the same manner as in the first embodiment. After forming the conductive film 24 through the opening 23 created by removing the film 21, the silicon oxide film 22 is ground to expose the upper surfaces of the conductive films 20 and 24. Thus, the wafer W, for example, becomes... Figure 30A and Figure 30B The state shown. Figure 30A This figure illustrates an example of a method for manufacturing a semiconductor device according to the second embodiment. Figure 30A The image shows a top view of wafer W after grinding the silicon oxide film 22. Figure 30B yes Figure 30A The illustrated cross-sectional views of wafer W along lines A-A' and B-B' are shown. The portions where conductive films 12 and 24 are stacked function as contacts with the gate electrode. Additionally, the portions where conductive films 16 and 20 are stacked function as contacts with the active region. On wafer W, wiring connecting conductive films 20 and 24 is formed, as needed, on the upper part. Furthermore, silicon oxide films 18 and 22 are sometimes not clearly distinguished and are considered as a single silicon oxide film.
[0113] Thus, even in the semiconductor device fabrication method according to the second embodiment, openings 19 and 23 can be formed by removing films 17 and 21. Therefore, the semiconductor device fabrication method according to the embodiment can form vias connected to the gate electrode and vias connected to the trench contacts by selecting an etching ratio that is sufficiently large. Furthermore, the semiconductor device fabrication method according to the second embodiment can suppress short circuits that occur during the formation of vias connected to the gate electrode and vias connected to the trench contacts.
[0114] Furthermore, the semiconductor device fabrication method according to the second embodiment can omit the complex process of forming a cover film on the gate electrode by selectively growing an insulating film 40 on a metal.
[0115] Thus, in the semiconductor device fabrication method according to the second embodiment, an insulating film 40 is formed on the upper part of the conductive film 12. Therefore, the semiconductor device fabrication method can omit the complex step of forming a cover film on the gate electrode.
[0116] The embodiments have been described above, but it should be considered that the embodiments disclosed herein are merely illustrative in all respects and are not intended to be limiting. In fact, the above embodiments can be embodied in various ways. Furthermore, the above embodiments can also be omitted, substituted, or modified in various ways without departing from the claims and their spirit.
[0117] Explanation of reference numerals in the attached figures
[0118] 12…conductive film; 13…silicon nitride film; 14…isolated material; 15…insulating film; 16…conductive film; 17…film; 18…silicon oxide film; 19…opening; 20…conductive film; 21…film; 22…silicon oxide film; 23…opening; 24…conductive film; 30…structure; 40…insulating film; W…wafer.
Claims
1. A method for manufacturing a semiconductor device, comprising: The process of forming a carbon-containing first film on a silicon nitride film and a first conductive film; The process of forming a first silicon oxide film surrounding the aforementioned first film, wherein, The first silicon oxide film is located on the silicon nitride film and the first conductive film; The process of removing the first film and forming a first opening in the first silicon oxide film to expose at least a portion of the silicon nitride film and at least a portion of the first conductive film. The process of forming a second conductive film in contact with the first conductive film within the first opening; The process of grinding the first silicon oxide film to expose the upper surfaces of the second conductive film and the silicon nitride film. The process of removing the exposed silicon nitride film to expose the third conductive film formed on the lower layer of the silicon nitride film. The process of forming a carbon-containing second film on the first silicon oxide film and the third conductive film; The process of forming a second silicon oxide film surrounding the second film, wherein the second silicon oxide film is located on the first silicon oxide film; The process of removing the second film and forming a second opening in the second silicon oxide film that exposes at least a portion of the third conductive film and at least a portion of the first silicon oxide film; and The process of forming a fourth conductive film in contact with the third conductive film within the second opening.
2. The method for manufacturing a semiconductor device according to claim 1, wherein, It also includes a step of forming the silicon nitride film on the upper part of the third conductive film. After the process of forming the silicon nitride film described above, the process of forming the first film described above is performed.
3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein, The first conductive film and the second conductive film are contacts formed in the active region of the FET (Field Effect Transistor) of the semiconductor device.
4. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein, The aforementioned third conductive film and the aforementioned fourth conductive film are contacts with the gate of the FET.
5. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein, An insulating separator is provided between the silicon nitride film and the first conductive film, and between the third conductive film and the first conductive film.
6. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein, The first conductive film is formed such that its upper surface is lower than the upper surface of the silicon nitride film.
Citation Information
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