A method for batch growing high-uniform crystalline silicon nanowires

Abstract

The present invention discloses a method for growing high-uniform crystalline silicon nanowires in batches, comprising: a first step of spin-coating a photoresist on a target substrate provided with guide grooves, defining a pattern by photolithography, exposing an area where a catalyst metal is to be deposited, and etching downward by plasma to form a shadow step; a second step of horizontally inwardly etching the photoresist by oxygen plasma to form a deposition step; a third step of rotating and fixing a target substrate sample, using the photoresist as a shadow, and vapor-depositing a catalyst metal strip of a target width on the target substrate; a fourth step of ultrasonically cleaning the target sample in an acetone solution after the vapor deposition is completed to remove excess photoresist, and treating the catalyst metal by hydrogen plasma to obtain metal balls with uniform diameter; and a fifth step of covering the entire target substrate structure with a layer of amorphous silicon precursor and performing an annealing treatment, so that the catalyst metal balls move along the guide grooves and absorb the amorphous silicon precursor to form nanowires with a target uniform diameter.

Description

Technical Field

[0001] The present invention relates to the field of microelectronics technology, and in particular to a method for growing high-uniformity crystalline silicon nanowires in batches. Background Art

[0002] Crystalline silicon semiconductor nanowires have become a core material in modern microelectronics due to their high carrier mobility and the ability to achieve efficient, stable, and reliable doping processes. Compared to traditional silicon wafer etching processes, the in-plane guided silicon nanowire (IPSLS) growth method for producing guided silicon nanowires has low substrate selectivity and holds great promise for back-end device fabrication.

[0003] As the size of devices continues to shrink, the requirements for the size of nanowires are becoming increasingly stringent. The inventors of this application have discovered that the above technology has at least the following technical problems:

[0004] During the growth and preparation process of nanowires, the particle size of the catalyst directly affects the diameter size and fluctuation of the later nanowires. Due to the presence of a large amount of excess and unnecessary catalysts in the growth and preparation process, the catalysts excessively fuse into particles with larger diameters during the nanowire growth process, growing nanowires with greatly different diameters, which is extremely detrimental to the quality of the nanowire channel and the device performance.

[0005] Although high-precision photolithography techniques (such as electron beam lithography and extreme ultraviolet lithography) can currently define the size of catalyst metals, the high cost and difficulty in large-scale fabrication limit their application in electronic devices. Therefore, precise control of catalyst size is particularly important. Summary of the Invention

[0006] The present application provides a method for batch growing of highly uniform crystalline silicon nanowires, thereby reducing preparation costs and further improving the process of preparing semiconductor structures.

[0007] The present invention provides a method for growing high-uniformity crystalline silicon nanowires in batches, which includes the following steps:

[0008] In the first step, photoresist is spin-coated on a target substrate with guide grooves, and a pattern is defined by photolithography to expose the area where the catalyst metal is to be deposited. Then, plasma etching is used to form a shadow step.

[0009] In the second step, oxygen plasma is used to etch the photoresist horizontally inward to form a deposition step;

[0010] The third step is to rotate and fix the target substrate sample, use the photoresist as a shadow, and deposit catalytic metal strips of target width on the target substrate by evaporation;

[0011] In the fourth step, after the evaporation is completed, the target sample is placed in an acetone solution for ultrasonic cleaning to remove excess photoresist, and the catalytic metal is treated with hydrogen plasma to obtain metal spheres with uniform diameter;

[0012] In the fifth step, the entire target substrate structure is covered with a layer of amorphous silicon precursor and annealed, so that the catalytic metal balls move along the guide grooves and absorb the amorphous silicon precursor to form multiple nanowires with uniform target diameters.

[0013] The technical solution further defined in the present invention is: in the second step, the method for forming the deposition step includes: utilizing oxygen plasma etching to horizontally and inwardly etch the target width along the edge to expose the substrate of the target width.

[0014] Furthermore, in the third step, the method of depositing the catalytic metal includes: adjusting different angles α to fix the sample on the sample stage, and depositing the target catalytic metal.

[0015] Furthermore, the catalytic metal is an alloy of one or more of indium, tin, bismuth, gallium, and gold.

[0016] Furthermore, the target substrate layer is silicon, silicon / nitrogen oxide, an organic substrate or a glass substrate, and the photoresist layer is AZ5214 or PMMA.

[0017] Furthermore, in the first step, the substrate layer is patterned to expose the portion to be etched, and the process includes: using fluorine-containing plasma etching such as SF6 or C4F8 or CF4 to etch downward along the edge of the pattern, etching the area except the area covered by the pattern.

[0018] The present invention utilizes conventional photolithography to pattern the target area, etching the substrate to form shadow steps. Oxygen plasma is then used to shrink the photoresist, forming deposition steps. The steps are then tilted and metal evaporated to produce nanoscale catalyst metal strips. Hydrogen plasma treatment is then used to batch-produce catalyst metal with the target nanometer-scale width, enabling precise control of nanowire diameter. This invention utilizes low-precision photolithography to achieve batch growth of highly uniform nanowires at a low cost.

[0019] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0020] By precisely controlling the diameter of the catalyst particles within the grooves, the present invention can directly guide the production of nanowires of target diameters in batches, providing a material basis for the preparation of large-scale, high-stability devices. The present invention has a wide range of control over the catalyst particle diameter, eliminating the reliance on high-precision instruments such as electronic book exposure. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1It is a principle diagram of a specific embodiment of the present invention;

[0022] Figure 2 Schematic diagram of the process of guiding nanowires on a substrate with four guiding steps in Example 1 of the present invention;

[0023] Figure 3 Schematic diagram of the process of guiding nanowires on a substrate with multiple guiding steps in Example 2 of the present invention;

[0024] Figure 4 Schematic diagram of catalytic metal evaporation in an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to better understand the above technical solution, the above technical solution will be described in detail below with reference to the accompanying drawings and specific implementation methods.

[0026] This embodiment provides a method for growing high-uniform crystalline silicon nanowires in batches. Figure 1 a-1l, Figure 4 As shown, Figure 1 a is a schematic diagram of a substrate in an embodiment of the present invention; Figure 1 b is Figure 1 a is a cross-sectional schematic diagram; Figure 1 c is a schematic diagram of the structure after spin coating photoresist and development; Figure 1 d is Figure 1 b is a schematic cross-sectional view; Figure 1 e is a schematic diagram of the structure of shadow steps formed by plasma etching; Figure 1 f is Figure 1 e schematic cross-sectional view; Figure 1 g is a schematic diagram of the structure of the deposition step formed by oxygen plasma treatment; Figure 1 h is Figure 1 Schematic cross-section of g; Figure 1 i is a schematic diagram of the structure after metal is evaporated at different evaporation angles, i.e., angle α, 0°<α<90°; Figure 1 j is Figure 1 i is a schematic cross-sectional view; Figure 1 k is a schematic diagram of the structure after the photoresist is washed away with an organic reagent; Figure 1 l is Figure 1 k is a cross-sectional schematic diagram; the specific steps of the present invention include:

[0027] The first step, such as Figure 1 As shown in a and 1b, a certain thickness of photoresist is spin-coated on the target substrate, and the coated substrate is patterned, as shown in FIG. Figure 1 c and 1d, exposing the area to be etched, where the thickness of the photoresist is A1, and the value of A1 can be adjusted arbitrarily according to needs.

[0028] In the second step, the substrate is patterned and plasma etched to form shadow steps of a certain depth, such as Figure 1 e and 1f, the depth is A2, and the value of A2 can be adjusted as needed; the above substrate is subjected to oxygen plasma shrinkage etching to shrink the photoresist layer inward to a certain width such as Figure 1 g and 1h, forming a deposition step, the shrinkage width is A3, and the A3 value can be adjusted arbitrarily according to needs.

[0029] The third step is to adjust the different evaporation angles α and use the photoresist as a shadow to deposit metal. The structure formed is as follows Figure 1 i, its cross-sectional view is as follows Figure 1 As shown in j.

[0030] The fourth step is to place the sample in an organic solvent to wash away the photoresist, and the structure formed is as follows Figure 1 k, its cross-section is shown in Figure 1 l shown.

[0031] The above is an introduction to the preparation principle of the present invention. In order to better understand the above technical solution, the following Figure 2-3 And specific implementation methods are used to describe the above technical solutions in detail.

[0032] Example 1

[0033] This embodiment provides a method for growing high-uniformity crystalline silicon nanowires in batches, the specific steps of which include:

[0034] In the first step, a photoresist (AZ5214) is spin-coated on the substrate with four closely packed guide grooves. The pattern is defined using photolithography to expose the area where the catalyst metal is to be deposited. The area is then etched down by about 100 nm using C4F8 plasma to form a shadow step. The photoresist is then etched inward by about 100 nm using oxygen plasma to form a deposition step. The structure is shown in the figure below. Figure 2 a; Figure 2 a is a schematic diagram of the structure after photoresist is etched back on a substrate with four guide steps;

[0035] In the second step, the sample is rotated at different angles and fixed on the thermal evaporation sample stage to evaporate the target thickness of catalytic metal In. The structural diagram is shown in the figure. Figure 2 b; Figure 2 b is a schematic diagram of the structure of evaporating metal In by adjusting the angle α;

[0036] In the third step, after the evaporation is completed, the sample is placed in an acetone solution for ultrasonic cleaning to remove excess photoresist, and the metal is treated with hydrogen plasma to obtain metal In balls with uniform diameter, the structure of which is as follows: Figure 2 As shown in c; Figure 2 c Schematic diagram of the structure of metal In after hydrogen plasma treatment;

[0037] In the fourth step, the entire structure is covered with a layer of amorphous silicon precursor and annealed, so that the catalytic metal moves along the four-layer guide groove and absorbs the amorphous precursor to form four nanowires with uniform target diameters. The structure is shown in the figure below. Figure 2 d, its top view is as follows Figure 2 e and the actual sample picture Figure 2 f shown; where: Figure 2 d is a schematic diagram of the structure after metal In is used as a catalyst to guide the growth of nanowires in PECVD; Figure 2 e is a top view of the metal In as a catalyst guiding the growth of nanowires in PECVD; Figure 2 f is the SEM image of nanowire growth.

[0038] Example 2

[0039] This embodiment provides a method for growing high-uniformity crystalline silicon nanowires in batches, the specific steps of which include:

[0040] In the first step, a photoresist (AZ5214) is spin-coated on the substrate with multiple layers of closely packed guide grooves. The pattern is defined using photolithography to expose the area where the catalyst metal is to be deposited. SF6 plasma is then used to etch down about 120 nm to form a shadow step. Oxygen plasma is then used to etch the photoresist inward about 80 nm to form a deposition step. The structure is shown in the figure below. Figure 3 a; Figure 3 a is a schematic diagram of the structure after oxygen stripping of photoresist on a substrate with multiple guide steps;

[0041] In the second step, the sample is rotated at different angles and fixed on the thermal evaporation sample stage to evaporate the target thickness of catalytic metal In. The structural diagram is shown in the figure. Figure 3 b; Figure 3 b is a schematic diagram of the structure of evaporating metal In by adjusting the angle α;

[0042] In the third step, after the evaporation, the sample is placed in an acetone solution for ultrasonic cleaning to remove the photoresist, and the metal is treated with hydrogen plasma to obtain metal In balls with uniform diameter, the structure of which is as follows: Figure 3 As shown in c; Figure 3 c Schematic diagram of the structure of metal In after hydrogen plasma treatment;

[0043] In the fourth step, the entire structure is covered with a layer of amorphous silicon precursor and annealed, so that the catalytic metal moves along the multi-layer guide grooves and absorbs the amorphous precursor, forming densely packed nanowires with uniform target diameters in batches. Figure 3 d, its top view is as follows Figure 3 e; among them Figure 3 d is a schematic diagram of the structure after metal In is used as a catalyst to guide the growth of close-packed nanowires in PECVD; Figure 3e is a top view of the growth of densely packed nanowires guided by metal In as a catalyst in PECVD.

[0044] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements can be made without departing from the principles of the present invention. These improvements should also be regarded as the scope of protection of the present invention.

Claims

1. A method for growing high-uniformity crystalline silicon nanowires in batches, characterized in that: The steps include: In the first step, photoresist is spin-coated on a target substrate with guide grooves, and a pattern is defined by photolithography to expose the area where the catalyst metal is to be deposited. Then, plasma etching is used to form a shadow step. In the second step, oxygen plasma is used to etch the photoresist horizontally inward to form a deposition step; The third step is to tilt and fix the target substrate sample, use the photoresist as a shadow, and deposit catalytic metal strips of target width on the target substrate by evaporation; In the fourth step, after the evaporation is completed, the target sample is placed in an acetone solution for ultrasonic cleaning to remove excess photoresist, and the catalytic metal is treated with hydrogen plasma to obtain metal spheres with uniform diameter; In the fifth step, the entire target substrate structure is covered with a layer of amorphous silicon precursor and annealed, so that the catalytic metal balls move along the guide grooves and absorb the amorphous silicon precursor to form multiple nanowires with uniform target diameters.

2. The method for growing high-uniformity crystalline silicon nanowires in batches according to claim 1, wherein: In the second step, the method for forming the deposition step includes: utilizing oxygen plasma etching to horizontally and inwardly etch the target width along the edge to expose the substrate of the target width.

3. The method for growing high-uniformity crystalline silicon nanowires in batches according to claim 1, wherein: In the third step, the method of depositing the catalytic metal includes: adjusting different angles α to fix the sample on the sample stage, and depositing the target catalytic metal.

4. The method for growing high-uniformity crystalline silicon nanowires in batches according to claim 1, wherein: The catalytic metal is an alloy of one or more of indium, tin, bismuth, gallium, and gold.

5. The method for growing high-uniformity crystalline silicon nanowires in batches according to claim 1, wherein: The target substrate layer is silicon, silicon / nitrogen oxide, an organic substrate or a glass substrate, and the photoresist layer is AZ5214 or PMMA.

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