A low noise, high gain, broadband fully differential transimpedance amplifier

Abstract

The present invention relates to optical interconnection communication technology, and in particular to a low-noise, high-gain, broadband fully differential transimpedance amplifier, comprising an input circuit and an amplifier circuit, a weak differential photocurrent input signal I generated by a photodetector, a first differential photocurrent input signal I inp and the second differential photocurrent input signal I inn Convert and amplify the differential voltage signal V into a large swing differential voltage output signal. outp and the second differential voltage signal V outn , used to drive the circuit with a 100Ω differential matching impedance in the rear stage. Low noise design is performed in the input circuit, while high gain broadband design is performed in the amplifier circuit. Both the input circuit and the amplifier circuit adopt a fully differential structure, which can reduce the power supply V DD The amplifier is suitable for silicon-based ultra-high-speed monolithic integrated optical receiver systems, providing low-latency signal transmission for data centers and high-performance computing based on optical interconnection.

Description

Technical Field

[0001] The present invention belongs to the technical field of optical interconnection communication, and in particular relates to a low-noise, high-gain, broadband fully differential transimpedance amplifier. Background Art

[0002] In recent years, global data traffic has been growing rapidly with the widespread adoption of smartphones, tablets, ultra-high-definition television (UHDTV), and related network services such as high-quality video streaming and social networking. Consequently, data center communications have become a rapidly developing market, collecting and transmitting vast amounts of information. Consequently, higher-speed and larger-capacity data processing and transmission have become increasingly important. Compared to electrical interconnects, optical interconnects offer significant advantages, such as high communication capacity, wide bandwidth, extremely low loss, minimal crosstalk, robustness to electromagnetic interference, and low jitter. Therefore, they can provide low-power, ultra-high-speed data interconnects for applications such as data centers and high-performance computing (HPC).

[0003] In optical interconnect communication systems, optical receivers, as key components, have a significant impact on the entire system. Within the overall optical receiver circuit, the transimpedance amplifier (TIA), as the first-stage circuit, sits at the forefront. Its noise contributes the vast majority of the system's total noise, and its performance virtually determines the overall performance of the entire optical receiver system. Currently, with the continuous advancement of silicon-based nanophotonics processes and integrated circuit design technologies, the design of SiGe BiCMOS monolithic fully differential transimpedance amplifier circuit chips for ultra-high-speed optical receivers, featuring low noise, high gain, and broadband, is key to achieving ultra-high-speed, high-performance integrated optical receiver systems. Summary of the Invention

[0004] In view of the problems existing in the background technology, the present invention provides a low-noise, high-gain, broadband fully differential transimpedance amplifier.

[0005] In order to solve the above technical problems, the present invention adopts the following technical solution: a low-noise, high-gain, broadband fully differential transimpedance amplifier, comprising an input circuit and an amplifier circuit, wherein the amplifier receives the first differential photocurrent input signal I generated by the photodetector. inp and the second differential photocurrent input signal I inn Convert and amplify the first differential voltage signal V outp and the second differential voltage signal V outn , used to drive the circuit with a post-stage differential matching impedance of 100Ω;

[0006] The input circuit includes a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a first resistor R1, a second resistor R2, a third resistor R E1 , the fourth resistor R E2The bases of the first transistor Q1 and the second transistor Q2 are both connected to the first bias voltage V b1 The emitters of the first transistor Q1 and the second transistor Q2 are respectively connected to the first differential photocurrent input signal I inp and the second differential photocurrent input signal I inn The collectors of the first transistor Q1 and the second transistor Q2 are connected to the power supply voltage V through the first resistor R1 and the second resistor R2 respectively. DD The emitters of the first transistor Q1 and the second transistor Q2 are connected to the collectors of the third transistor Q3 and the fourth transistor Q4 respectively; the bases of the third transistor Q3 and the fourth transistor Q4 are both connected to the second bias voltage V b2 The emitters of the third transistor Q3 and the fourth transistor Q4 are connected to the third resistor R E1 , the fourth resistor R E2 grounding;

[0007] The amplifier circuit includes a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, an eighth transistor Q8, a ninth transistor Q9, a fifth resistor R3, a sixth resistor R4, a seventh resistor R E3 , the eighth resistor R E4 , the first feedback resistor R F1 , the second feedback resistor R F2 , first inductor L1, second inductor L2, first capacitor C D The base of the fifth transistor Q5 is connected to the collector of the first transistor Q1, the base of the sixth transistor Q6 is connected to the collector of the second transistor Q2, and the collectors of the fifth transistor Q5 and the sixth transistor Q6 are connected to the power supply voltage V through the fifth resistor R3, the sixth resistor R4 and the first inductor L1 and the second inductor L2 respectively. DD The emitters of the fifth transistor Q5 and the sixth transistor Q6 are connected to the collector of the seventh transistor Q7 and the capacitor C D The base of the seventh transistor Q7 is connected to the third bias voltage V b3 , the emitter of the seventh transistor Q7 is grounded; the bases of the eighth transistor Q8 and the ninth transistor Q9 are connected to the collectors of the fifth transistor Q5 and the sixth transistor Q6 respectively, and the collectors of the eighth transistor Q8 and the ninth transistor Q9 are connected to the power supply voltage V DD The emitters of the eighth transistor Q8 and the ninth transistor Q9 are respectively connected to the first feedback resistor R F1 , the second feedback resistor R F2 Connected to the base of the fifth transistor Q5 and the sixth transistor Q6, and respectively through the seventh resistor R E3 , the eighth resistor R E4 The emitters of the eighth transistor Q8 and the ninth transistor Q9 respectively output the first differential voltage signal V outp and the second differential voltage signal V outn .

[0008] Compared to the prior art, the present invention proposes a two-stage fully differential pre-transimpedance amplifier structure consisting of an input circuit and an amplifier circuit. This differential circuit structure effectively reduces common-mode noise and features a simple design, making it suitable for ultra-high-speed integrated circuit design. Furthermore, cascading an amplifier circuit after the input circuit allows for separate designs for noise reduction and gain-bandwidth improvement. The input circuit primarily features a low-noise design. Specifically, the input circuit isolates the input and output capacitances, minimizing the impact of the input capacitance on the overall transimpedance amplifier circuit's bandwidth and gain. The bandwidth is primarily determined by the smaller output capacitance, effectively extending the bandwidth. However, the overall circuit noise characteristics are primarily influenced by the input circuit, so a low-noise design is implemented in the input circuit; while a high-gain-bandwidth design is implemented in the amplifier circuit. The large-swing differential voltage output signal, after high-gain broadband amplification, drives the subsequent differential matching circuit with a 100Ω impedance, effectively improving the output eye opening. Consequently, the low-noise, high-gain, and wide-bandwidth performance requirements of an ultra-high-speed, monolithic, fully differential transimpedance amplifier circuit chip are achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is a circuit schematic diagram of a low-noise, high-gain, broadband fully differential transimpedance amplifier according to an embodiment of the present invention. DETAILED DESCRIPTION

[0010] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0011] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0012] The present invention will be further described below with reference to specific examples, but they are not intended to limit the present invention.

[0013] This embodiment presents a low-noise, high-gain, broadband, fully differential transimpedance amplifier (TIA) based on a standard SiGe BiCMOS process. The amplifier employs a fully differential, two-stage pre-TIA circuit to reduce noise and increase gain bandwidth at ultra-high-speed transmission rates. This amplifier is suitable for use in silicon-based ultra-high-speed monolithic integrated optical receiver systems, providing low-latency signal transmission for next-generation optical interconnect-based data centers and high-performance computing (HPC).

[0014] This embodiment is achieved through the following technical solutions: Figure 1As shown, a low-noise, high-gain, broadband fully differential transimpedance amplifier includes an input circuit and an amplifier circuit. The amplifier converts the weak differential photocurrent input signal generated by the photodetector into a first differential photocurrent input signal I inp and the second differential photocurrent input signal I inn Convert and amplify the differential voltage signal V into a large swing differential voltage output signal. outp and the second differential voltage signal V outn , used to drive the subsequent differential matching circuit with an impedance of 100Ω.

[0015] The input circuit includes a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a first resistor R1, a second resistor R2, a third resistor R E1 , the fourth resistor R E2 , (C in the figure L1 、C L2 The bases of the first transistor Q1 and the second transistor Q2 are both connected to the first bias voltage V b1 The emitters of the first transistor Q1 and the second transistor Q2 are respectively connected to the first differential photocurrent input signal I inp and the second differential photocurrent input signal I inn The collectors of the first transistor Q1 and the second transistor Q2 are connected to the power supply voltage V through the first resistor R1 and the second resistor R2 respectively. DD The emitters of the first transistor Q1 and the second transistor Q2 are connected to the collectors of the third transistor Q3 and the fourth transistor Q4 respectively; the bases of the third transistor Q3 and the fourth transistor Q4 are both connected to the second bias voltage V b2 The emitters of the third transistor Q3 and the fourth transistor Q4 are connected to the third resistor R E1 , the fourth resistor R E2 grounding;

[0016] The amplifier circuit includes a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, an eighth transistor Q8, a ninth transistor Q9, a fifth resistor R3, a sixth resistor R4, a seventh resistor R E3 , the eighth resistor R E4 , the first feedback resistor R F1 , the second feedback resistor R F2 , first inductor L1, second inductor L2, first capacitor C D The base of the fifth transistor Q5 is connected to the collector of the first transistor Q1, the base of the sixth transistor Q6 is connected to the collector of the second transistor Q2, and the collectors of the fifth transistor Q5 and the sixth transistor Q6 are connected to the power supply voltage V through the fifth resistor R3, the sixth resistor R4 and the first inductor L1 and the second inductor L2 respectively. DDThe emitters of the fifth transistor Q5 and the sixth transistor Q6 are connected to the collector of the seventh transistor Q7 and the capacitor C D The base of the seventh transistor Q7 is connected to the third bias voltage V b3 The emitter of the seventh transistor Q7 is grounded. The bases of the eighth transistor Q8 and the ninth transistor Q9 are connected to the collectors of the fifth transistor Q5 and the sixth transistor Q6 respectively. The collectors of the eighth transistor Q8 and the ninth transistor Q9 are connected to the power supply voltage V DD The emitters of the eighth transistor Q8 and the ninth transistor Q9 are respectively connected through the first feedback resistor R F1 , the second feedback resistor R F2 Connected to the base of the fifth transistor Q5 and the sixth transistor Q6, and respectively through the seventh resistor R E3 , the eighth resistor R E4 The emitters of the eighth transistor Q8 and the ninth transistor Q9 respectively output the first differential voltage signal V outp and the second differential voltage signal V outn .

[0017] The amplifier in this embodiment converts the weak differential photocurrent signal I generated by the photodetector into inp and I inn Input to the fully differential transimpedance amplifier, converted into a differential voltage signal and amplified into a large swing differential voltage output signal V outp and V outn , to drive subsequent circuits. At the same time, noise must be effectively reduced within a reasonable bandwidth to achieve a high signal-to-noise ratio, thereby improving the sensitivity of the optical receiver. Typically, large capacitance at the input of a transimpedance amplifier not only significantly reduces the bandwidth of the overall circuit but also degrades transimpedance flatness, resulting in large jitter and a degraded signal eye diagram.

[0018] To this end, this embodiment employs a two-stage fully differential pre-transimpedance amplifier circuit structure, comprising input and amplification stages, to suppress the impact of large input capacitance on bandwidth, with separate designs for noise reduction and gain-bandwidth improvement. The input circuit primarily employs a low-noise design, specifically isolating the input capacitance from the output capacitance, resulting in minimal impact of the input capacitance on the overall transimpedance amplifier circuit's bandwidth gain. The bandwidth is primarily determined by the smaller output capacitance, effectively extending the bandwidth. However, the overall circuit noise characteristics are primarily affected by the input circuit, so a low-noise design is employed in the input circuit; while a high-gain-bandwidth design is employed in the amplification circuit. The large-swing differential voltage output signal, after high-gain broadband amplification, drives a subsequent differential matching circuit with a 100Ω impedance, effectively improving the output eye opening.

[0019] The fully differential transimpedance amplifier of this embodiment includes a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a first resistor R1, a second resistor R2, a third resistor R E1 , the fourth resistor R E2 The input circuit (Note: C L1 、C L2 It is a parasitic capacitor, not an actual circuit device, which is convenient for the analysis of the following circuit principle), and is composed of a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, an eighth transistor Q8, a ninth transistor Q9, a fifth resistor R3, a sixth resistor R4, and a seventh resistor R E3 , the eighth resistor R E4 , the first feedback resistor R F1 , the second feedback resistor R F2 , first inductor L1, second inductor L2, capacitor C D The first differential photocurrent input signal I inp and the second differential photocurrent input signal I inn (μA level) flows into the emitters of the first transistor Q1 and the second transistor Q2 in the input circuit respectively, and is output from their collectors to drive the bases of the fifth transistor Q5 and the sixth transistor Q6 in the amplifier circuit respectively. After parallel feedback amplification, a large swing differential voltage output signal, the first differential voltage signal V outp and the second differential voltage signal V outn (mV level) to drive the subsequent load circuit with a differential impedance of 100Ω.

[0020] At the input end of the input circuit, the emitters of the first transistor Q1 and the second transistor Q2 are also connected to the input end parasitic large capacitance C caused by the photodetector PD, the bonding pad PAD and the electrostatic discharge ESD protection circuit. IN , will directly affect the bandwidth of the entire circuit, resulting in large output jitter, which significantly reduces the horizontal eye opening and inter-symbol crosstalk, affecting the overall performance of the entire optical receiver system. IN In order to reduce the bandwidth caused by this, a two-stage pre-differential transimpedance amplifier circuit consisting of an input circuit and an amplifier circuit is proposed. Its transimpedance can be expressed as:

[0021]

[0022] Among them C L1,2 are the collector parasitic capacitances of the first transistor Q1 and the second transistor Q2 in the input circuit (output port load capacitance), and A(s) is the capacitance of the amplifier circuit consisting of the fifth transistor Q5, the sixth transistor Q6, the seventh transistor Q7, the fifth resistor R3, the sixth resistor R4, the first inductor L1, the second inductor L2, and the capacitor C. DThe voltage amplification gain of the circuit is obtained from formula (1): On the one hand, when |A(s)| is large enough, the transimpedance of the two-stage pre-differential transimpedance amplifier is approximately R F On the other hand, bandwidth is mainly determined by C L (C L ≤C IN ) decision, not C IN , because the input circuit provides low input impedance, even if C IN The larger the gain, the lower the bandwidth degradation. It is suitable for high-frequency, broadband, and low input impedance applications. Therefore, it is possible to consider separating the two-stage preamplifier structure to reduce noise and increase gain bandwidth. Since the bandwidth is mainly determined by the output load capacitance C of the input circuit, L The input circuit will determine the input capacitor C IN and the output load capacitance C L Isolation, therefore C IN It has little impact on the overall circuit bandwidth, thereby effectively expanding the bandwidth. At this time, the overall circuit noise is mainly affected by the input circuit, so the input circuit part is mainly designed for low noise without considering gain and bandwidth; while the amplifier circuit part is designed for high gain and broadband.

[0023] For the input circuit, the best way to reduce noise is to reduce the thermal noise contribution of the base resistance of the first transistor Q1, the second transistor Q2 and the current source transistor Q3, the fourth transistor Q4 by increasing the emitter length of the first transistor Q1, the second transistor Q2 and the current source transistor Q3, the fourth transistor Q4 without increasing the collector current of the first transistor Q1, the second transistor Q2. In addition, a negative feedback resistor R is added to the emitter of each current source transistor. E1 , the fourth resistor R E2 , the noise of the third transistor Q3 and the fourth transistor Q4 can be reduced.

[0024] The amplifier circuit can expand the bandwidth by generating a zero point to compensate for the bandwidth degradation. In order to improve the gain and bandwidth, a capacitor C is introduced into the amplifier circuit. D , whose two ends are connected to the emitters of the fifth transistor Q5 and the sixth transistor Q6 respectively, generating peaking to expand the bandwidth. The above voltage amplification gain A(s) is given by the following formula:

[0025]

[0026] As shown in formula (2), the molecule will pass through the capacitor C D A zero point is generated with the first inductor L1 and the second inductor L2 to improve the bandwidth of the amplifier circuit, and at the same time, the flatness of the transimpedance gain is improved by suppressing the peak value through peaking.

[0027] The input circuit and amplifier circuit both adopt a fully differential structure, which can not only convert the weak differential photocurrent input signal I in Convert and amplify the differential voltage output signal V out To drive the circuit with 100Ω differential input impedance, it can also reduce the power supply V DD It can also reduce the common mode noise between the silicon base line GND and the silicon base line GND, further improving the transmission quality of high-speed data.

[0028] In summary, this embodiment achieves the low noise, high gain, wide bandwidth and other performance requirements required by the ultra-high-speed monolithic integrated fully differential transimpedance amplifier circuit chip, thereby reducing output jitter, significantly reducing the horizontal eye opening and inter-symbol crosstalk, and improving the overall performance of the entire optical receiver monolithic integrated system chip.

[0029] The above are only preferred embodiments of the present invention and do not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the contents of the present invention specification should be included in the protection scope of the present invention.

Claims

1. A low noise, high gain, broadband fully differential transimpedance amplifier, characterized in that: The amplifier comprises an input circuit and an amplifier circuit, wherein the amplifier converts the first differential photocurrent input signal ( I inp ) and the second differential photocurrent input signal ( I inn ) is converted and amplified into a first differential voltage signal ( V outp ) and the second differential voltage signal ( V outn ), used to drive the circuit with a post-stage differential matching impedance of 100Ω; The input circuit includes a first transistor ( Q 1) The second transistor ( Q 2) The third transistor ( Q 3) The fourth transistor ( Q 4), the first resistor ( R 1) Second resistor ( R 2) The third resistor ( R E1 )、The fourth resistor( R E2 ), the first transistor ( Q 1) and the second transistor ( Q 2) are connected to the base of the first bias voltage ( V b1 ), the first transistor ( Q 1) and the second transistor ( Q 2) are connected to the emitter of the first differential photocurrent input signal ( I inp ) and the second differential photocurrent input signal ( I inn ), the first transistor ( Q 1) and the second transistor ( Q 2) are connected to the collector through the first resistor ( R 1) Second resistor ( R 2) Connect the power supply voltage ( V DD ), the first transistor ( Q 1) and the second transistor ( Q 2) are connected to the emitter of the third transistor ( Q 3) The fourth transistor ( Q 4) collector of the third transistor ( Q 3) The fourth transistor ( Q 4) are connected to the base of the second bias voltage ( V b2 ), the third transistor ( Q 3) The fourth transistor ( Q 4) are connected to the emitter through the third resistor ( R E1 )、The fourth resistor( R E2 ) Grounding; The amplifier circuit includes a fifth transistor ( Q 5) The sixth transistor ( Q 6) The seventh transistor ( Q 7) The eighth transistor ( Q 8) The ninth transistor ( Q 9), the fifth resistor ( R 3) The sixth resistor ( R 4) The seventh resistor ( R E3 )、The eighth resistor( R E4 ), the first feedback resistor ( R F1 )、Second feedback resistor( R F2 ), the first inductor ( L 1) Second inductor ( L 2), the first capacitor ( C D ); The fifth transistor ( Q 5) The base is connected to the first transistor ( Q 1) Collector, sixth transistor ( Q 6) The base is connected to the second transistor ( Q 2) Collector, fifth transistor ( Q 5) Collector through the fifth resistor ( R 3) The first inductor ( L 1) Connect the power supply voltage ( V DD ), the sixth transistor ( Q 6) Collector through the sixth resistor ( R 4) Second inductor ( L 2) Connect the power supply voltage ( V DD ), the fifth transistor ( Q 5) The sixth transistor ( Q 6) is connected to the emitter of the seventh transistor ( Q 7) The collector of the fifth transistor ( Q 5) The sixth transistor ( Q 6) are connected to the emitter of the first capacitor ( C D ) at both ends, the seventh transistor ( Q 7) The base is connected to the third bias voltage ( V b3 ), the seventh transistor ( Q 7) Emitter grounded; the eighth transistor ( Q 8) The ninth transistor ( Q 9) The base is connected to the fifth transistor ( Q 5) The sixth transistor ( Q 6) Collector, the eighth transistor ( Q 8) The ninth transistor ( Q 9) The collector is connected to the power supply voltage ( V DD ), the eighth transistor ( Q 8) The ninth transistor ( Q 9) The emitter is connected through the first feedback resistor ( R F1 )、Second feedback resistor( R F2 ) connected to the fifth transistor ( Q 5) The sixth transistor ( Q 6) base, and at the same time through the seventh resistor ( R E3 )、The eighth resistor( R E4 ) is grounded; the eighth transistor ( Q 8) The ninth transistor ( Q 9) The emitter outputs the first differential voltage signal ( V outp ) and the second differential voltage signal ( V outn ).

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