A method, system, and related apparatus for converting one-hot codes to sequential binary codes.

Abstract

This application provides a method for converting one-hot codes to sequential binary codes, comprising: obtaining a code to be processed; initializing the code to be processed as a one-hot code; taking the logical OR value of the j-th bit of the one-hot code corresponding to the i-th bit in the sequential binary code as the value of the i-th bit according to a preset conversion formula; and sequentially determining the values ​​of all i to obtain the sequential binary code. This application uses a simple OR gate conversion circuit to implement the conversion from one-hot codes to sequential binary codes, resulting in a simple logic circuit, a small overall circuit area, and optimized circuit area by ignoring illegal logic states, while also offering a flexible parameterized coding method. This application also provides a one-hot code to sequential binary code conversion system, a computer-readable storage medium, and an electronic device, which have the aforementioned beneficial effects.

Description

Technical Field

[0001] This application relates to the field of circuit design, and in particular to a method, system and related apparatus for converting one-hot codes to sequential binary codes. Background Technology

[0002] One-hot code is used in digital circuits to represent a special combination of bits in which only one bit is allowed to be 1, and all other bits must be 0.

[0003] In circuits, N state registers are used to encode N other state registers. Each state has a corresponding independent register control, and only one bit is active at any given time. However, one-hot codes also have drawbacks. One-hot codes can have many illegal states. Therefore, for interactions between circuit designs using different encoding methods, it may be necessary to convert between one-hot codes and sequential binary codes. Currently, the conversion of one-hot codes commonly uses a for loop, checking each bit of the one-hot code from low to high to see if it is 1, and finally recording the exponent of the highest bit being 1 as its sequential binary code. This method is constrained for all illegal states, wasting too much area to support illegal states. That is, for all initial codes, there is not only one state with a 1 bit; its corresponding sequential binary code is the exponent of the first 1 bit from high to low. Therefore, the existing method of converting one-hot codes to sequential binary codes requires a large circuit area. Summary of the Invention

[0004] The purpose of this application is to provide a method, system, computer-readable storage medium, and electronic device for converting one-hot codes to sequential binary codes, which can optimize the conversion from one-hot codes to sequential binary codes and thereby reduce the circuit area used.

[0005] To address the aforementioned technical problems, this application provides a method for converting one-hot codes to sequential binary codes, the specific technical solution of which is as follows:

[0006] Obtain the code to be processed;

[0007] Initialize the code to be processed as a one-hot code;

[0008] The logical OR value of the j-th one-hot code in the one-hot code encoding corresponding to the i-th bit in the sequential binary is taken as the value of the i-th bit according to the preset conversion formula.

[0009] By sequentially determining the values ​​of all i, the ordered binary representation is obtained;

[0010] The preset conversion formula is j mod 2. i+1 >2 i-1, j is the j-th bit of the one-hot code, and i is the i-th bit of the sequential binary code.

[0011] Optionally, if the number of bits in the code to be processed is a power of 2, the method further includes:

[0012] The result of bitwise ORing the high-order bits of the code to be processed is the value of the highest bit of the sequential binary representation.

[0013] Perform a symmetric OR operation on the code to be processed, and calculate the value of the second highest bit of the symmetric OR result of the current code to be processed.

[0014] Repeat the previous step to obtain the sequential binary corresponding to the code to be processed, in descending order of the binary sequence.

[0015] Optionally, performing symmetric OR processing on the code to be processed includes:

[0016] The first half of the code to be processed is used as the high-order code, and the second half is used as the low-order code.

[0017] Perform a logical OR operation on the high-order bits and the low-order bits.

[0018] Optionally, initializing the code to be processed as a one-hot code includes:

[0019] Configure the width variable and the number of codes to be processed for the code to be processed;

[0020] Wherein, the width variable and the number of codes to be processed are intermediate variables in the process of converting the one-hot code into sequential binary, and the sequential binary is obtained when the variable to be processed is 0.

[0021] This application provides a one-hot code to sequential binary conversion system, including:

[0022] The acquisition module is used to acquire the code to be processed;

[0023] An initialization module is used to initialize the code to be processed as a one-hot code;

[0024] The conversion module is used to take the logical OR value of the j-th one-hot code in the one-hot code encoding corresponding to the i-th bit in the sequential binary as the value of the i-th bit according to a preset conversion formula; and to determine the values ​​of all i in sequence to obtain the sequential binary;

[0025] The preset conversion formula is j mod 2. i+1 >2 i -1, j is the j-th bit of the one-hot code, and i is the i-th bit of the sequential binary code.

[0026] Optionally, if the number of bits in the code to be processed is a power of 2, the method further includes:

[0027] The highest bit value module is used to obtain the value of the highest bit of the high-order bit of the code to be processed by bitwise OR.

[0028] The symmetric OR processing module is used to perform symmetric OR processing on the code to be processed and to calculate the value of the second highest bit of the symmetric OR result of the current code to be processed.

[0029] The loop module is used to repeatedly enter the symmetric OR module and obtain the sequential binary corresponding to the code to be processed in descending order of the sequential binary.

[0030] Optional, symmetric or processing modules include:

[0031] The high-low encoding determination unit is used to take the first half of the encoding to be processed as the high-bit encoding and the second half of the encoding as the low-bit encoding.

[0032] The logical OR operation unit is used to perform a logical OR operation on the high-order code and the low-order code.

[0033] Optionally, the initialization module includes:

[0034] The parameter configuration unit is used to configure the width variable and the number of codes to be processed of the code to be processed;

[0035] Wherein, the width variable and the number of codes to be processed are intermediate variables in the process of converting the one-hot code into sequential binary, and the sequential binary is obtained when the variable to be processed is 0.

[0036] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method described above.

[0037] This application also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method described above when it invokes the computer program in the memory.

[0038] This application provides a method for converting one-hot codes to sequential binary codes, comprising: obtaining an encoding to be processed; initializing the encoding to be processed as a one-hot code; taking the logical OR value of the j-th bit of the one-hot code corresponding to the i-th bit in the sequential binary code as the value of the i-th bit according to a preset conversion formula; and sequentially determining the values ​​of all i to obtain the sequential binary code; wherein, the preset conversion formula is j mod 2. i+1 >2 i -1, j is the j-th bit of the one-hot code, and i is the i-th bit of the sequential binary code.

[0039] This application uses a simple OR gate conversion circuit to convert one-hot code to sequential binary. The logic circuit is simple and the overall circuit area is small. The circuit area is optimized by ignoring the logic of illegal states, while the code method is flexible and parameterized.

[0040] This application also provides a one-hot code to sequential binary conversion system, a computer-readable storage medium, and an electronic device, which have the above-mentioned beneficial effects, and will not be elaborated here. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0042] Figure 1 A flowchart illustrating a method for converting one-hot codes to sequential binary codes, provided in an embodiment of this application;

[0043] Figure 2 A 4-bit one-hot OR gate is converted into a 2-bit sequential binary NAND gate.

[0044] Figure 3 A NAND gate circuit that converts a 4-bit one-hot code in priority case mode into a 2-bit sequential binary code.

[0045] Figure 4 A NAND gate circuit that converts an 8-bit one-hot OR code into a 3-bit sequential binary code.

[0046] Figure 5 A NAND gate circuit that converts an 8-bit one-hot code in priority case mode into a 3-bit sequential binary code.

[0047] Figure 6 This is a schematic diagram of a one-hot code to sequential binary conversion system provided in an embodiment of this application. Detailed Implementation

[0048] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0049] One-hot codes have many illegal states. For example, for N bits, there are a total of 2^N states, but only N valid states, while there are 2^N-1 invalid states. Furthermore, N states require N flip-flops. Compared to sequential codes or Gray codes, one-hot codes require more registers and area resources. Therefore, one-hot codes are not suitable for all encoding designs. Thus, for interactions between circuit designs using different encoding methods, it may be necessary to convert between one-hot codes and sequential binary codes.

[0050] Currently, a common approach is to use a for loop to check each bit of the one-hot code from low to high, determining if it is 1. The exponent of the highest bit being 1 is recorded as its sequential binary code. In fact, it is equivalent to a case-conditional circuit with priority, such as... Figure 2 Taking a 4-bit one-hot code as an example, if the highest bit of the one-hot code is 1, its corresponding sequential binary code is '11b'. If the two highest bits of the one-hot code are '01b', its corresponding sequential binary code is '10b'. If the three highest bits of the one-hot code are '001b', its corresponding sequential binary code is '01b'. Finally, the one-hot code '0001b' corresponds to the sequential binary code '00b'.

[0051] This method imposes constraints on all illegal states, wasting too much area to support illegal states. That is, for all initial codes, there is not only one state with a 1 bit. The corresponding sequential binary is the exponent of the first 1 bit from high to low.

[0052] Please refer to Figure 1 , Figure 1 A flowchart illustrating a method for converting one-hot codes to sequential binary codes, provided in an embodiment of this application, is included.

[0053] S101: Obtain the code to be processed;

[0054] S102: Initialize the code to be processed as a one-hot code;

[0055] S103: According to the preset conversion formula, the logical OR value of the j-th one-hot code in the one-hot code encoding corresponding to the i-th bit in the sequential binary is taken as the value of the i-th bit;

[0056] S104: Determine the values ​​of all i sequentially to obtain the ordered binary;

[0057] The preset conversion formula is j mod 2. i+1 >2 i -1, where j is the j-th bit of the one-hot code, and i is the i-th bit of the sequential binary representation. That is, the remainder of the number of bits in the one-hot code raised to a power of 2 must be greater than 2. i-1.

[0058] When executing step S102, the width variable and the number of codes to be processed can be configured. Both the width variable and the number of codes to be processed are intermediate variables in the process of converting the one-hot code into sequential binary. When the processing variable is 0, the sequential binary is obtained. Since the code to be processed needs to perform a logical OR operation, its width gradually decreases. The width variable can be used to record the width change during the conversion process.

[0059] When performing step S103, it should be noted that, according to the preset conversion formula, any value of j that satisfies the condition of i must participate in the logical OR operation. Furthermore, during the conversion, one can choose to start the conversion from the most significant bit of the sequential binary number or from the least significant bit.

[0060] For example, taking the conversion of a 16-bit one-hot code to a 4-bit sequential binary code as an example, the final step is to substitute i=0 into the above preset conversion formula, 2 i -1 = 0, 2 i+1 If the value is 2, then j should be an odd number. The value of the 0th bit of the sequential binary code is the OR value of the 1st, 3rd, 5th, 7th, 9th, 11th, 13th, and 15th bits of the one-hot code.

[0061] Similarly, the value of the first bit of the sequential binary code is the OR value of the 2nd, 3rd, 7th, 6th, 10th, 11th, 14th, and 15th bits of the one-hot code; the value of the second bit of the sequential binary code is the OR value of the 4th, 5th, 6th, 7th, 12th, 13th, 14th, and 15th bits of the one-hot code; and the value of the third bit of the sequential binary code is the OR value of the 8th, 9th, 10th, 11th, 12th, 13th, 14th, and 15th bits of the one-hot code. Thus, a 4-bit sequential binary code can be obtained.

[0062] In particular, if the number of bits in the code to be processed is a power of 2, there is another conversion method:

[0063] The first step is to take the result of the bitwise OR operation of the high-order bits of the code to be processed, which is the value of the highest bit of the sequential binary representation.

[0064] The second step is to perform a symmetric OR operation on the code to be processed, and calculate the value of the second highest bit of the symmetric OR result of the current code to be processed.

[0065] Repeat the previous step to obtain the sequential binary corresponding to the code to be processed, in descending order of the binary sequence.

[0066] First, initialize the one-hot code encoding. The result of a bitwise OR operation on the most significant bits of the code to be processed is the value of the most significant bit of the sequential binary sequence, indicating whether any of the most significant bits of the one-hot code contain a logical 1. Then, set the code to be processed to the result of a symmetric OR operation on the current code. For example, if the current code has a bit width of 8, the new code to be processed is the OR operation of the most significant 4 bits of the current code and the least significant 4 bits. The second most significant bit of the sequential binary sequence is then equal to the new code to be processed. Finally, following this pattern, the sequential binary sequence is derived bit by bit.

[0067] Continuing with the example of converting a 16-bit one-hot code to a 4-bit sequential binary code, assuming the input one-hot code value is "16'b0010_0000_0000_0000", the highest bit of the sequential binary code is the bitwise OR of the high 8 bits of the one-hot code, which is '1'. The new code to be processed is the OR of the high 8 bits and low 8 bits of the one-hot code, which is "8'b0010_0000". Then, the second bit of the sequential binary code is the bitwise OR of the high 4 bits of the 8-bit code to be processed, which is '1'. The new code to be processed is the OR of the high 4 bits and low 4 bits of the code to be processed, which is "4'b0010". Then, the first bit of the sequential binary code is the bitwise OR of the high 2 bits of the 4-bit code to be processed, which is '0'. The new code to be processed is the OR of the high 2 bits and low 2 bits of the code to be processed, which is "2'b10". Therefore, the value of the higher 1 bit of the 4-bit code to be processed, which is the 0th bit of the sequential binary, is '1'. Finally, the converted sequential binary is "4'b1101".

[0068] As can be seen, when performing symmetric OR processing, the first half of the code to be processed is used as the high-order bit code, and the second half is used as the low-order bit code. Then, a logical OR operation is performed between the high-order and low-order bit codes. However, this method is only suitable for applications where the number of bits in the one-hot code of the code to be processed is a power of 2. Compared with conventional methods, its conversion efficiency is higher.

[0069] The closest existing conversion code method will be referred to as the priority case method, and the code method proposed in the above embodiments of this application will be referred to as the OR gate method. Figures 2 to 5 These are logic diagrams inferred from the logic circuits represented by the two methods.

[0070] Figure 2 A 4-bit one-hot OR gate to convert a 2-bit sequential binary NAND gate. Figure 3 This is a NAND gate circuit that converts a 4-bit one-hot code in priority case mode into a 2-bit sequential binary code. Figure 4 This is a NAND gate circuit that converts an 8-bit one-hot OR code into a 3-bit sequential binary code. Figure 5The 8-bit one-hot code of the priority case method is converted into a 3-bit sequential binary NAND gate. It can be clearly seen that the OR gate method implemented in this application can effectively simplify the circuit structure and reduce the circuit area.

[0071] The following describes the conversion system from one-hot code to sequential binary provided in the embodiments of this application. The conversion system described below can be referred to in correspondence with the conversion method from one-hot code to sequential binary described above.

[0072] See Figure 6 , Figure 6 This is a schematic diagram of a one-hot code to sequential binary conversion system provided in an embodiment of this application. This application provides a one-hot code to sequential binary conversion system, including:

[0073] The acquisition module is used to acquire the code to be processed;

[0074] An initialization module is used to initialize the code to be processed as a one-hot code;

[0075] The conversion module is used to take the logical OR value of the j-th one-hot code in the one-hot code encoding corresponding to the i-th bit in the sequential binary as the value of the i-th bit according to a preset conversion formula; and to determine the values ​​of all i in sequence to obtain the sequential binary;

[0076] The preset conversion formula is j mod 2. i+1 >2 i -1, j is the j-th bit of the one-hot code, and i is the i-th bit of the sequential binary code.

[0077] Based on the above embodiments, as a preferred embodiment, if the number of bits of the code to be processed is a power of 2, the method further includes:

[0078] The highest bit value module is used to obtain the value of the highest bit of the high-order bit of the code to be processed by bitwise OR.

[0079] The symmetric OR processing module is used to perform symmetric OR processing on the code to be processed and to calculate the value of the second highest bit of the symmetric OR result of the current code to be processed.

[0080] The loop module is used to repeatedly enter the symmetric OR module and obtain the sequential binary corresponding to the code to be processed in descending order of the sequential binary.

[0081] Based on the above embodiments, as a preferred embodiment, the symmetry or processing module includes:

[0082] The high-low encoding determination unit is used to take the first half of the encoding to be processed as the high-bit encoding and the second half of the encoding as the low-bit encoding.

[0083] The logical OR operation unit is used to perform a logical OR operation on the high-order code and the low-order code.

[0084] Based on the above embodiments, as a preferred embodiment, the initialization module includes:

[0085] The parameter configuration unit is used to configure the width variable and the number of codes to be processed of the code to be processed;

[0086] Wherein, the width variable and the number of codes to be processed are intermediate variables in the process of converting the one-hot code into sequential binary, and the sequential binary is obtained when the variable to be processed is 0.

[0087] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed, can perform the steps provided in the above embodiments. The storage medium may include various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0088] This application also provides an electronic device that may include a memory and a processor. The memory stores a computer program, and when the processor calls the computer program in the memory, it can implement the steps provided in the above embodiments. Of course, the electronic device may also include various network interfaces, power supplies, and other components.

[0089] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. As the system provided in the embodiments corresponds to the method provided in the embodiments, the description is relatively simple; relevant parts can be found in the method section.

[0090] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

[0091] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A method for converting one-hot codes to sequential binary codes based on NAND gates, characterized in that, include: Obtain the code to be processed; Initialize the code to be processed as a one-hot code; According to a preset conversion formula, and through several levels of logic circuit units, the sequential binary number is converted into the first... In the one-hot code encoding corresponding to the bit The logical OR value of the unique hot code is used as the first... The value of the bit; wherein, each level of logic circuit unit includes one or more logic circuit units, and the logic circuit units in each level of logic circuit unit are NAND gate circuits. The logic circuit unit in any level of logic circuit unit obtains the one-hot code in the one-hot code encoding or the output result of the logic circuit unit in the previous level of logic circuit unit through its own input terminal. The logic circuit unit in any level of logic circuit unit transmits its own output result to the next level of logic circuit unit through its own output terminal or uses its own output result as the value of the corresponding bit in the sequential binary; Determine all in sequence The value of is used to obtain the sequential binary; Wherein, the preset conversion formula is > , The first one encoded by the one-hot code Bit, The first of the sequential binary Bit.

2. The conversion method according to claim 1, characterized in that, If the number of bits in the code to be processed is a power of 2, it also includes: The result of bitwise ORing the high-order bits of the code to be processed is the value of the highest bit of the sequential binary representation. Perform a symmetric OR operation on the code to be processed, and calculate the symmetric OR result of the current code to be processed as the value of the second highest bit; Repeat the previous step to obtain the sequential binary corresponding to the code to be processed, in descending order of the binary sequence.

3. The conversion method according to claim 2, characterized in that, Performing a symmetric OR operation on the code to be processed includes: The first half of the code to be processed is used as the high-order code, and the second half is used as the low-order code. Perform a logical OR operation on the high-order bits and the low-order bits.

4. The conversion method according to claim 1, characterized in that, Initializing the code to be processed as a one-hot code includes: Configure the width variable and the number of codes to be processed for the code to be processed; The width variable and the number of codes to be processed are intermediate variables in the sequential binary process of the one-hot code encoding conversion.

5. A conversion system from one-hot code to sequential binary based on NAND gate circuits, characterized in that, include: The acquisition module is used to acquire the code to be processed; An initialization module is used to initialize the code to be processed as a one-hot code; The conversion module is used to convert the sequential binary number into the first binary number according to a preset conversion formula and through several levels of logic circuit units. In the one-hot code encoding corresponding to the bit The logical OR value of the unique hot code is used as the first... The value of the bit; wherein, each level of logic circuit unit includes one or more logic circuit units, and the logic circuit units in each level of logic circuit unit are NAND gate circuits. The logic circuit unit in any level of logic circuit unit obtains the one-hot code in the one-hot code encoding or the output result of the logic circuit unit in the previous level of logic circuit unit through its own input terminal. The logic circuit unit in any level of logic circuit unit transmits its own output result to the next level of logic circuit unit through its own output terminal or uses its own output result as the value of the corresponding bit in the sequential binary; Determine all in sequence The value of is used to obtain the sequential binary; Wherein, the preset conversion formula is > , The first one encoded by the one-hot code Bit, The first of the sequential binary Bit.

6. The conversion system according to claim 5, characterized in that, If the number of bits in the code to be processed is a power of 2, it also includes: The highest bit value module is used to obtain the value of the highest bit of the high-order bit of the code to be processed by bitwise OR. The symmetric OR processing module is used to perform symmetric OR processing on the code to be processed and calculate the symmetric OR result of the current code to be processed as the value of the second highest bit. The loop module is used to repeatedly enter the symmetric OR module and obtain the sequential binary corresponding to the code to be processed in descending order of the sequential binary.

7. The conversion system according to claim 6, characterized in that, The symmetric OR processing module includes: The high-low encoding determination unit is used to take the first half of the encoding to be processed as the high-bit encoding and the second half of the encoding as the low-bit encoding. The logical OR operation unit is used to perform a logical OR operation on the high-order code and the low-order code.

8. The conversion system according to claim 5, characterized in that, The initialization module includes: The parameter configuration unit is used to configure the width variable and the number of codes to be processed of the code to be processed; The width variable and the number of codes to be processed are intermediate variables in the sequential binary process of the one-hot code encoding conversion.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method for converting one-hot codes to sequential binary codes based on NAND gates as described in any one of claims 1-4.

10. An electronic device, characterized in that, The system includes a memory and a processor, wherein the memory stores a computer program, and the processor, when calling the computer program in the memory, implements the steps of the method for converting one-hot codes to sequential binary codes based on NAND gates as described in any one of claims 1-4.

Images