Display substrate and display device

Abstract

An embodiment of the present disclosure provides a display substrate and a display device, wherein the display substrate includes: a plurality of sub-pixels located on a base substrate; the sub-pixels include: a first conductive layer located on one side of the base substrate, the first conductive layer including: signal lines arranged in sequence along a first direction and extending toward a second direction, signal line protrusions and anode transition portions located on the same side of the signal lines and spaced apart from each other; an anode located between the first conductive layer and the pixel defining layer; each of the anodes includes an effective portion exposed by the sub-pixel opening; wherein the effective portions of at least some of the sub-pixels have overlapping areas with the signal line protrusions and the anode transition portions in the second direction, and the second direction is perpendicular to the first direction.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of display technology, and in particular to a display substrate and a display device. Background Art

[0002] With the continuous development of display technology, organic light-emitting diode (OLED) display substrates have been increasingly used in various electronic devices due to their advantages such as self-luminescence, wide viewing angle, high contrast, low power consumption, and fast response time. However, existing OLED display substrates suffer from a significant color shift, resulting in a visual appearance similar to red on one side and bluish on the other. Summary of the Invention

[0003] The display substrate provided by the embodiment of the present disclosure includes:

[0004] A plurality of sub-pixels are located on a substrate;

[0005] a first conductive layer located on one side of the base substrate, the first conductive layer comprising: signal lines arranged sequentially along a first direction and extending in a second direction, a signal line protrusion and an anode transfer portion located between at least two adjacent signal lines and spaced apart from each other, the signal line protrusion being integrally connected to the signal line;

[0006] a pixel defining layer, located on a side of the first conductive layer away from the base substrate, and comprising a plurality of sub-pixel openings corresponding to the sub-pixels;

[0007] an anode located between the first conductive layer and the pixel defining layer; each of the anodes includes an effective portion exposed by the sub-pixel opening, and the anode transition portion is connected to the anode through an insulating layer via;

[0008] The effective portions of at least some of the sub-pixels have overlapping areas with both the signal line protrusion and the anode transfer portion in the second direction, and the second direction is perpendicular to the first direction.

[0009] In a possible implementation, the plurality of sub-pixels include a first sub-pixel and a second sub-pixel, and an area of ​​the anode of the first sub-pixel is greater than an area of ​​the anode of the second sub-pixel;

[0010] The effective portion of the first sub-pixel has overlapping areas with both the signal line protrusion and the anode transfer portion in the second direction.

[0011] In a possible implementation, an overlapping area between the effective portion of the first sub-pixel and the protruding portion of the signal line is a first overlapping area, and an overlapping area between the effective portion of the first sub-pixel and the anode transfer portion is a second overlapping area.

[0012] In the second direction, the first overlapping region and the second overlapping region are respectively located on two sides of a center of the effective portion of the first sub-pixel.

[0013] In a possible implementation manner, a ratio of the distances between the first overlapping area and the second overlapping area and the center of the effective portion of the first sub-pixel is 0.8 to 1.2.

[0014] In one possible embodiment, the orthographic projection of the anode transition portion of the second sub-pixel on the base substrate covers the center of the orthographic projection of the effective portion on the base substrate, and the dimension of the anode transition portion of the second sub-pixel in the second direction is greater than the maximum dimension of the effective portion in the second direction.

[0015] In a possible implementation, a length of the anode transition portion of the second sub-pixel in the second direction is greater than a length of the anode transition portion of the first sub-pixel in the second direction.

[0016] In a possible implementation manner, the signal line protrusion includes: a protruding main portion, and a protruding connecting portion connecting the protruding main portion and the signal line;

[0017] A length of the protruding main portion in the second direction is greater than a length of the protruding connecting portion in the second direction.

[0018] In a possible implementation manner, a ratio of a length of the protruding main portion in the first direction to a length of the anode transition portion in the first direction is 0.8 to 1.2.

[0019] In a possible implementation manner, a length of the protruding main portion in the second direction is smaller than a length of the anode transition portion in the second direction.

[0020] In a possible implementation manner, in a direction from the protruding connecting portion to the protruding main portion, there is a gap between the protruding main portion and the nearest adjacent signal line.

[0021] In a possible implementation manner, a ratio of a length of the interval in the first direction to a length of the protruding connection portion in the first direction is 0.8 to 1.2.

[0022] In a possible implementation manner, the effective portion of the first sub-pixel is rhombus-shaped;

[0023] The overlapping area between the effective part of the first sub-pixel and the protruding main part is roughly a triangular area; the overlapping area between the effective part of the first sub-pixel and the anode transition part is roughly a triangular area; the overlapping area between the effective part of the first sub-pixel and the protruding main part, and the overlapping area between the effective part of the first sub-pixel and the anode transition part respectively correspond to two opposite corners of a rhombus.

[0024] In one possible embodiment, the anode includes a main portion and an auxiliary portion electrically connected to each other; the main portion includes the effective portion and an anode extension portion extending from the effective portion;

[0025] The anode extension portion of the first sub-pixel also includes an anode blocking portion on the side facing the second sub-pixel, and the anode blocking portion covers a first area on the positive projection of the substrate, wherein the first area includes at least part of the area between the two channel regions of the threshold compensation transistor in the pixel circuit corresponding to the second sub-pixel.

[0026] In a possible implementation, in the same sub-pixel, a side of the protruding main portion away from the anode transition portion and a side of the protruding connecting portion away from the anode transition portion are substantially in the same straight line.

[0027] In a possible implementation manner, the effective portion of the second sub-pixel is substantially a quadrilateral region;

[0028] In the column direction, the size of the portion where the effective portion overlaps the anode transfer portion accounts for 50% to 100% of the size of the effective portion.

[0029] In a possible implementation, a first insulating layer is provided between the anode and the first conductive layer; the auxiliary portion is electrically connected to the anode transition portion via a first via hole penetrating the first insulating layer;

[0030] The orthographic projection of the first via hole on the base substrate and the orthographic projection of the region of the anode transfer portion overlapping with the effective portion on the base substrate do not overlap with each other.

[0031] In a possible implementation manner, patterns of the signal line protrusions of two adjacent overlapping sub-pixels in a column are different.

[0032] In a possible implementation, the first sub-pixel includes: a first color sub-pixel and a third color sub-pixel; the second sub-pixel includes: a second color sub-pixel and a fourth color sub-pixel;

[0033] The first color sub-pixel is a red sub-pixel, the third color sub-pixel is a blue sub-pixel, and the second color sub-pixel and the fourth color sub-pixel are green sub-pixels.

[0034] In a possible embodiment, each of the signal lines further includes a signal line protrusion, and the signal line protrusion and the signal line protrusion have the same structure; the plurality of signal lines include a first signal line and a second signal line; wherein one column of sub-pixels corresponds to one first signal line and one second signal line; the signal line protrusions of the first signal lines are respectively electrically connected to the sub-pixels in odd-numbered rows, and the signal line protrusions of the second signal lines are respectively electrically connected to the sub-pixels in even-numbered rows;

[0035] Among the two first signal lines and two second signal lines corresponding to two adjacent columns of sub-pixels, two of the first signal lines are adjacent to form a first signal line group, or two of the second signal lines are adjacent to form a second signal line group.

[0036] In a possible implementation manner, the effective portions of at least some of the sub-pixels have overlapping areas with two adjacent signal lines in the first direction.

[0037] In a possible embodiment, in the sub-pixel, there is a third overlapping area between the effective portion and the first signal line, and there is a fourth overlapping area between the effective portion and the second signal line; the third overlapping area and the fourth overlapping area are located on both sides of the effective portion of the anode in the first direction.

[0038] An embodiment of the present disclosure further provides a display device, comprising the display substrate provided by the embodiment of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A schematic structural diagram of a display substrate provided in an embodiment of the present disclosure;

[0040] Figure 2a A schematic structural diagram of a pixel circuit provided in an embodiment of the present disclosure;

[0041] Figure 2b A signal timing diagram provided for an embodiment of the present disclosure;

[0042] Figure 3 Schematic diagram of the layout structure of some display substrates provided in the embodiments of the present disclosure;

[0043] Figure 4a A schematic diagram of the layout structure of the active semiconductor layer provided in an embodiment of the present disclosure;

[0044] Figure 4b A schematic diagram of the layout structure of the gate conductive layer provided in an embodiment of the present disclosure;

[0045] Figure 4c A schematic diagram of the layout structure of a reference conductive layer provided in an embodiment of the present disclosure;

[0046] Figure 4d A schematic diagram of the layout structure of the source and drain metal layers provided in an embodiment of the present disclosure;

[0047] Figure 4e A schematic diagram of the layout structure of the first conductive layer provided in an embodiment of the present disclosure;

[0048] Figure 4f for Figure 4e A partial enlarged schematic diagram;

[0049] Figure 4g A schematic diagram of the layout structure of the anode layer provided in an embodiment of the present disclosure;

[0050] Figure 4h A schematic diagram of the layout structure after the source / drain metal layer and the first conductive layer are stacked according to an embodiment of the present disclosure;

[0051] Figure 5a A schematic diagram of the structure of the first conductive layer and the anode layer after lamination provided by an embodiment of the present disclosure;

[0052] Figure 5b for Figure 5a Schematic diagram of the enlarged structure of the third color sub-pixel in FIG;

[0053] Figure 6a for Figure 5a The schematic cross-sectional view of the layout structure along the AA' direction shown in the figure;

[0054] Figure 6b for Figure 5a The schematic diagram of the cross-sectional structure along the BB' direction in the layout structure schematic diagram shown. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0056] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0057] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present disclosure. The same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions.

[0058] like Figure 1 As shown, the display substrate provided by the embodiments of the present disclosure may include: a base substrate 10. A plurality of repeating units PX are located on the base substrate 10, and at least one of the plurality of repeating units PX (e.g., each repeating unit) may include a plurality of sub-pixels spx. For example, the plurality of sub-pixels may include a first color sub-pixel spx1, a second color sub-pixel spx2, a third color sub-pixel spx3, and a fourth color sub-pixel spx4. In other words, the repeating unit may include a first color sub-pixel spx1, a second color sub-pixel spx2, a third color sub-pixel spx3, and a fourth color sub-pixel spx4. This allows the display substrate to use the first color sub-pixel spx1, the second color sub-pixel spx2, the third color sub-pixel spx3, and the fourth color sub-pixel spx4 to mix light to achieve color display. In some examples, the first color, the second color, the third color, and the fourth color may be selected from red, green, and blue. For example, the first color is red, the second color is green, the third color is blue, and the fourth color is green. Of course, the embodiments of the present disclosure include but are not limited to this. The following description takes as an example that the repeating unit includes a first color sub-pixel spx1, a second color sub-pixel spx2, a third color sub-pixel spx3 and a fourth color sub-pixel spx4, and the second and fourth colors are green, the first color is red, and the third color is blue.

[0059] For example, in combination Figure 1As shown, multiple repeating units are arranged along a second direction F2 to form a repeating unit group PXZ, and the repeating unit group PXZ is arranged along a first direction F1. The first direction F1 is different from the second direction F2. For example, the first direction F1 is perpendicular to the second direction F2. For example, the first direction F1 is the row direction, and the second direction F2 is the column direction. Alternatively, the first direction F1 is the column direction, and the second direction F2 is the row direction.

[0060] For example, in combination Figure 1 and Figure 2a As shown, at least one sub-pixel spx (e.g., each sub-pixel) among the multiple sub-pixels spx may include: a pixel circuit 0121 and a light-emitting element 0120. The pixel circuit 0121 includes a transistor and a capacitor, and generates an electrical signal through the interaction between the transistor and the capacitor. The generated electrical signal (e.g., current) is input into the light-emitting element 0120, which can drive the light-emitting element 0120 to emit light. The anode of the light-emitting element 0120 is connected to the pixel circuit 0121, and the cathode of the light-emitting element 0120 is connected to a power supply terminal.

[0061] Combine Figure 2a As shown, the pixel circuit 0121 may include: a driving control circuit 0122 , a first light emitting control circuit 0123 , a second light emitting control circuit 0124 , a data writing circuit 0126 , a storage circuit 0127 , a threshold compensation circuit 0128 and a reset circuit 0129 .

[0062] The drive control circuit 0122 may include a control terminal, a first terminal, and a second terminal. The drive control circuit 0122 is configured to provide a drive current to the light-emitting element 0120 to drive the light-emitting element 0120 to emit light. For example, the first light-emission control circuit 0123 is connected to the first terminal of the drive control circuit 0122 and the first voltage terminal VDD. The first light-emission control circuit 0123 is configured to connect or disconnect the drive control circuit 0122 and the first voltage terminal VDD.

[0063] The second light emitting control circuit 0124 is electrically connected to the second terminal of the driving control circuit 0122 and the anode of the light emitting element 0120 , and is configured to connect or disconnect the driving control circuit 0122 and the light emitting element 0120 .

[0064] The data writing circuit 0126 is electrically connected to a first terminal of the driving control circuit 0122 and is configured to write a signal on the data line VD into the storage circuit 0127 .

[0065] The storage circuit 0127 is electrically connected to the control terminal and the first voltage terminal VDD of the driving control circuit 0122 , and is configured to store the data signal and information of the driving control circuit 0122 .

[0066] The threshold compensation circuit 0128 is electrically connected to the control terminal and the second terminal of the driving control circuit 0122 , respectively, and is configured to perform threshold compensation on the driving control circuit 0122 .

[0067] The reset circuit 0129 is also electrically connected to the control terminal of the drive control circuit 0122 and the anode of the light emitting element 0120 , and is configured to reset the anode of the light emitting element 0120 and the control terminal of the drive control circuit 0122 .

[0068] The light-emitting element 0120 can be configured as an electroluminescent diode, such as at least one of an OLED, a QLED, a micro LED, or a micro OLED. The light-emitting element 0120 can include a stacked anode, a light-emitting layer, and a cathode. Furthermore, the light-emitting layer can include layers such as a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. Of course, in actual applications, the light-emitting element 0120 can be designed and determined based on the requirements of the actual application environment and is not limited here.

[0069] For example, in combination Figure 2a As shown, the driving control circuit 0122 includes: a driving transistor T1, the control end of the driving control circuit 0122 includes the driving gate of the driving transistor T1, the first end of the driving control circuit 0122 includes the first electrode of the driving transistor T1, and the second end of the driving control circuit 0122 includes the second electrode of the driving transistor T1.

[0070] For example, in combination Figure 2a As shown, the data write circuit 0126 includes a data write transistor T2. The storage circuit 0127 includes a storage capacitor CST. The threshold compensation circuit 0128 includes a threshold compensation transistor T3. The first light emission control circuit 0123 includes a first light emission control transistor T4. The second light emission control circuit 0124 includes a second light emission control transistor T5. The reset circuit 0129 includes an initialization transistor T6 and a reset transistor T7.

[0071] Specifically, the first electrode of the data write transistor T2 is electrically connected to the first electrode of the driving transistor T1, the second electrode of the data write transistor T2 is configured to be electrically connected to the data line VD to receive a data signal, and the gate of the data write transistor T2 is configured to be electrically connected to the scan line GA to receive a scan signal.

[0072] A first electrode of the storage capacitor CST is electrically connected to the first power supply terminal VDD, and a second electrode of the storage capacitor CST is electrically connected to the driving gate of the driving transistor T1 .

[0073] The first electrode of the threshold compensation transistor T3 is electrically connected to the second electrode of the driving transistor T1, the second electrode of the threshold compensation transistor T3 is electrically connected to the driving gate of the driving transistor T1, and the gate of the threshold compensation transistor T3 is configured to be electrically connected to the scan line GA to receive the scan signal.

[0074] A first electrode of the initialization transistor T6 is electrically connected to the initialization line VINIT to receive a reset signal, a second electrode of the initialization transistor T6 is electrically connected to the driving gate of the driving transistor T1, and a gate of the initialization transistor T6 is electrically connected to the reset line RST to receive a reset control signal.

[0075] A first electrode of the reset transistor T7 is electrically connected to the initialization line VINIT to receive a reset signal, a second electrode of the reset transistor T7 is electrically connected to the anode of the light emitting element 0120, and a gate of the reset transistor T7 is electrically connected to the reset line RST to receive a reset control signal.

[0076] The first electrode of the first light-emitting control transistor T4 is electrically connected to the first power supply terminal VDD, the second electrode of the first light-emitting control transistor T4 is electrically connected to the first electrode of the driving transistor T1, and the gate of the first light-emitting control transistor T4 is configured to be electrically connected to the light-emitting control line EM to receive the light-emitting control signal.

[0077] The first electrode of the second light-emitting control transistor T5 is electrically connected to the second electrode of the driving transistor T1, the second electrode of the second light-emitting control transistor T5 is electrically connected to the anode of the light-emitting element 0120, and the gate of the second light-emitting control transistor T5 is configured to be electrically connected to the light-emitting control line EM to receive a light-emitting control signal.

[0078] The cathode of the light-emitting element 0120 is electrically connected to the second power supply terminal VSS. The first and second electrodes of the transistors can be determined as either source or drain electrodes based on actual applications, and are not limited here. The transistors can be P-type transistors, N-type transistors, or a pixel circuit composed of a mixture of P-type and N-type transistors, and are not limited here. The disclosed embodiments are described using the example of each transistor being a P-type transistor.

[0079] Exemplarily, one of the first power supply terminal VDD and the second power supply terminal VSS is a high voltage terminal, and the other is a low voltage terminal. Figure 2a In the illustrated embodiment, the first power supply terminal VDD is a voltage source that outputs a constant first voltage, for example, a positive voltage or a high voltage; and the second power supply terminal VSS is a voltage source that outputs a constant second voltage, for example, a low voltage or 0, or a negative voltage. For example, in some examples, the second power supply terminal VSS can be grounded.

[0080] Figure 2aThe signal timing diagram corresponding to the pixel circuit shown in FIG. Figure 2b As shown in Figure 1, the pixel circuit operates in three phases during a frame: T10, T20, and T30. Here, rst represents the signal transmitted on the reset line RST, ga represents the signal transmitted on the scan line GA, and em represents the signal transmitted on the emission control line EM.

[0081] During stage T10, signal rst turns on initialization transistor T6, allowing the signal transmitted on initialization line VINIT to be supplied to the drive gate of drive transistor T1, thereby resetting the drive gate of drive transistor T1. Signal rst turns on reset transistor T7, allowing the signal transmitted on initialization line VINIT to be supplied to the anode of the previous-stage light-emitting element 0120, thereby resetting the anode of the previous-stage light-emitting element 0120. Furthermore, during this stage, signal ga turns off both data write transistor T2 and threshold compensation transistor T3. Signal em turns off both first emission control transistor T4 and second emission control transistor T5.

[0082] During stage T20, signal ga turns on data write transistor T2 and threshold compensation transistor T3. The turned-on data write transistor T2 causes the data signal transmitted on data line VD to charge the drive gate of drive transistor T1, causing the voltage of the drive gate of drive transistor T1 to become: Vdata + Vth. Vth represents the threshold voltage of drive transistor T1, and Vdata represents the voltage of the data signal. Furthermore, during this stage, signal rst turns off both initialization transistor T6 and reset transistor T7. Signal em turns off both first emission control transistor T4 and second emission control transistor T5.

[0083] During stage T30, signal em turns on both the first and second emission control transistors T4 and T5. The turned-on first emission control transistor T4 supplies the voltage Vdd from the first power supply terminal VDD to the first electrode of the driving transistor T1, causing the voltage at the first electrode of the driving transistor T1 to be Vdd. The driving transistor T1 generates a drive current based on its gate voltage Vdata + |Vth| and the voltage Vdd at its first electrode. This drive current is supplied to the light-emitting element O120 via the turned-on second emission control transistor T5, driving the light-emitting element O120 to emit light. Furthermore, during this stage, signal rst turns off the initialization transistor T6 and the reset transistor T7. Signal ga turns off the data writing transistor T2 and the threshold compensation transistor T3.

[0084] It should be noted that, in the embodiment of the present disclosure, the first electrode of the transistor can be its source electrode and the second electrode can be its drain electrode; or the first electrode can be its drain electrode and the second electrode can be its source electrode. This can be designed and determined according to the needs of actual application. Figure 2a and Figure 2b In addition to the structure shown, it can also be a structure including other numbers of transistors, which is not limited in the embodiments of the present disclosure. Figure 2a The structure shown is used as an example for explanation.

[0085] Exemplarily, the display substrate includes a base substrate 10, a transistor array layer disposed on the base substrate 10, a first conductive layer located on the side of the transistor array layer facing away from the base substrate 10, a first insulating layer located on the side of the first conductive layer facing away from the base substrate 10, an anode located on the side of the first insulating layer facing away from the base substrate 10, a light-emitting layer located on the side of the anode facing away from the base substrate 10, and a cathode located on the side of the light-emitting layer facing away from the base substrate 10. The transistor array layer can be used to form transistors and capacitors in pixel circuits, as well as scan lines, reset lines, emission control lines EM, initialization lines VINIT, and first power signal lines VDD for a first power supply terminal VDD. Exemplarily, the transistor array layer may include an active semiconductor layer 0310, a gate conductive layer 0320, a reference conductive layer 0330, and a source / drain metal layer 0340.

[0086] For example, Figure 3 and Figure 4a The active semiconductor layer 0310 of the pixel circuit 0121 is shown. The active semiconductor layer 0310 can be formed by patterning a semiconductor material. For example, the active semiconductor layer 0310 is formed of polycrystalline silicon. The active semiconductor layer 0310 can be used to form the aforementioned driving active layer T1-A of the driving transistor T1, the active layer T2-A of the data writing transistor T2, the active layer T3-A of the threshold compensation transistor T3, the active layer T4-A of the first emission control transistor T4, the active layer T5-A of the second emission control transistor T5, the active layer T6-A of the first reset transistor T6, and the active layer T7-A of the second reset transistor T7. Each active layer may include a source region, a drain region, and a channel region between the source and drain regions. For example, the active layers of each transistor are integrally provided.

[0087] Exemplarily, the active semiconductor layer 0310 can be made of amorphous silicon, polycrystalline silicon, oxide semiconductor materials, etc. It should be noted that the above-mentioned source region and drain region can be regions doped with n-type impurities or p-type impurities. For example, the channel region can be an undoped region, or a region with a different doping type from the source region and the drain region. For example, the channel region can be a portion that overlaps with the gate electrode in a direction perpendicular to the substrate. In the active layer, the source region and drain region of the same transistor can be portions on both sides of the channel region, respectively, and basically have no overlap with the corresponding gate electrode (excluding the influence of ion diffusion).

[0088] Exemplarily, a gate insulating layer is formed on the active semiconductor layer 0310 to protect the active semiconductor layer 0310. Figure 3 and Figure 4b , which shows a gate conductive layer 0320 of the pixel circuit 0121. The gate conductive layer 0320 is disposed on the gate insulating layer, thereby being insulated from the active semiconductor layer 0310. The gate conductive layer 0320 may include the second electrode cc2 of the storage capacitor CST, the scan line GA, the reset line RST, the emission control line EM, and the gates of the drive transistor T1, the data write transistor T2, the threshold compensation transistor T3, the first emission control transistor T4, the second emission control transistor T5, the first reset transistor T6, and the second reset transistor T7.

[0089] For example, Figure 4b As shown, the gate of the data write transistor T2 may be the portion where the scan line GA overlaps with the active semiconductor layer 0310, the gate of the first emission control transistor T4 may be the first portion where the emission control line EM overlaps with the active semiconductor layer 0310, the gate of the second emission control transistor T5 may be the second portion where the emission control line EM overlaps with the active semiconductor layer 0310, the gate of the first reset transistor T6 may be the first portion where the reset line RST overlaps with the active semiconductor layer 0310, the gate of the second reset transistor T7 may be the second portion where the reset line RST overlaps with the active semiconductor layer 0310, the threshold compensation transistor T3 may be a thin film transistor with a dual-gate structure, the first gate of the threshold compensation transistor T3 may be the portion where the scan line GA overlaps with the active semiconductor layer 0310, and the second gate of the threshold compensation transistor T3 may be the portion where the protrusion protruding from the scan line GA overlaps with the active semiconductor layer 0310. Figure 3 and Figure 4b As shown, the driving gate of the driving transistor T1 may be the second electrode cc2 of the storage capacitor CST.

[0090] It should be noted that Figure 4a The dashed lines in FIG. 3 show portions where the gate conductive layer 0320 overlaps with the active semiconductor layer 0310 .

[0091] For example, Figure 3 and Figure 4b As shown, the scan line GA, the reset line RST and the light control line EM are arranged along the second direction F2. The scan line GA, the reset line RST and the light control line EM extend substantially along the first direction F1. For example, the scan line GA is located between the reset line RST and the light control line EM of the same row. For example, Figure 3 The description is made by taking the second direction F2 as the column direction and the first direction F1 as the row direction as an example.

[0092] For example, in the second direction F2, the second electrode cc2 of the storage capacitor CST is located between the scan line GA and the emission control line EM, and the protrusion protruding from the scan line GA is located on a side of the scan line GA away from the emission control line EM.

[0093] For example, an interlayer dielectric layer is formed on the gate conductive layer 0320 to protect the gate conductive layer 0320. Figure 3 and Figure 4c FIG. 1 shows a reference conductive layer 0330 of the pixel circuit 120 a. The reference conductive layer 0330 includes a first electrode cc1 of the storage capacitor CST, an initialization line VINIT, and a light shielding layer ZG. The first electrode cc1 of the storage capacitor CST at least partially overlaps with the second electrode cc2 of the storage capacitor CST to form the storage capacitor CST. For example, the first electrode cc1 of the storage capacitor CST has a hollowed-out region that exposes a portion of the second electrode cc2 of the storage capacitor CST.

[0094] For example, Figure 3 and Figure 4c As shown, the orthographic projection of the light shielding layer ZG on the base substrate 10 overlaps with the orthographic projection of the source region of the second reset transistor T7 in the active semiconductor layer 0310 (e.g., the source region of the second reset transistor T7 and the source region of the first reset transistor T6 are an integrated structure) on the base substrate 10. This can reduce the impact of light on the second reset transistor T7 and improve reset accuracy. For example, the threshold compensation transistor T3 is a dual-gate transistor. For example, the light shielding layer ZG blocks the active layer portion between the two gates of the threshold compensation transistor T3. Since the threshold compensation transistor T3 is directly connected to the driving transistor T1, it can stabilize the working state of the driving transistor T1. For example, the projection of the light shielding layer ZG on the base substrate is located between the data line and the first power signal line VDD that are directly electrically connected to the pixel circuit in the pixel circuit area where it is located, thereby shielding signal interference.

[0095] For example, Figure 3 and Figure 4cAs shown, the orthographic projection of the light shielding layer ZG on the base substrate 10 overlaps with the orthographic projection of the drain region of the first reset transistor T6 in the active semiconductor layer 0310 on the base substrate 10. This can reduce the influence of light on the first reset transistor T6 and improve reset accuracy.

[0096] For example, Figure 3 and Figure 4c As shown, the orthographic projection of the light shielding layer ZG on the base substrate 10 overlaps with the orthographic projection of the conductive region between the active layer T3-A of the threshold compensation transistor T3 in the active semiconductor layer 0310 on the base substrate 10. This can reduce the effect of light on the threshold compensation transistor T3 and improve the accuracy of threshold compensation.

[0097] Exemplarily, a first interlayer insulating layer is formed on the reference conductive layer 0330 to protect the reference conductive layer 0330. Figure 3 and Figure 4d FIG. 1 shows a source / drain metal layer 0340 of the pixel circuit 0121. The source / drain metal layer 0340 may include a first power signal line VDD, connecting portions LB1, LB2, LB3, and LB4. For example, the first color sub-pixel spx1, the second color sub-pixel spx2, the third color sub-pixel spx3, and the fourth color sub-pixel spx4 include connecting portions LB1, LB2, LB3, and LB4, respectively.

[0098] Exemplarily, a second interlayer insulating layer is formed on the source / drain metal layer 0340 to protect the source / drain metal layer 0340. Figure 3 、 Figure 4e 、 Figure 4f 、 Figure 5a As shown, the first conductive layer 0350 of the pixel circuit 0121 is shown, wherein: Figure 4f for Figure 4eIn the enlarged diagram of the dotted box, the first conductive layer 0350 includes: signal lines Vd arranged sequentially along the first direction F1 and extending in the second direction F2; signal line protrusions TQ (TQ1 / TQ2 / TQ3 / TQ4) and anode transitions YZ (YZ1 / YZ2 / YZ3 / YZ4) spaced apart from each other on the same side of the signal lines Vd; the signal line protrusions TQ are integrally connected to the signal lines Vd. Specifically, the signal lines Vd can be configured as data lines Vd that transmit data signals. For example, the first color sub-pixel spx1 may include a signal line protrusion TQ1 and an anode transition portion YZ1, the second color sub-pixel spx2 may include a signal line protrusion TQ2 and an anode transition portion YZ2, the third color sub-pixel spx3 may include a signal line protrusion TQ3 and an anode transition portion YZ3, and the fourth color sub-pixel spx4 may include a signal line protrusion TQ4 and an anode transition portion YZ4, and the anode transition portion YZ is connected to the anode through an insulating layer via. Specifically, the patterns of the overlapping signal line protrusions of two adjacent sub-pixels in a column are different, specifically, for example, combined with Figure 4f As shown, the first signal line protrusion TQ1 located in the first row from the left and the first signal line protrusion TQ5 located in the second row from the left belong to two signal line protrusions of two adjacent sub-pixels in a column. The first signal line protrusion TQ1 located in the first row from the left includes a protruding connection portion TQL1 extending to the right, and the first signal line protrusion TQ5 located in the second row from the left includes a protruding connection portion TQL5 extending to the left. That is, the pattern of the first signal line protrusion TQ1 located in the first row from the left is different from that of the first signal line protrusion TQ5 located in the second row from the left.

[0099] For example, in combination Figure 4eAs shown, each signal line Vd further includes a signal line protrusion, and the signal line protrusion TQ can specifically have the same structure as the signal line protrusion; the multiple signal lines Vd include a first signal line Vd1 and a second signal line Vd2; wherein, one column of sub-pixels corresponds to one first signal line Vd1 and one second signal line Vd2; the signal line protrusion of the first signal line Vd1 is electrically connected to the sub-pixels in odd rows, and the signal line protrusion of the second signal line Vd2 is electrically connected to the sub-pixels in even rows; among the two first signal lines Vd1 and the two second signal lines Vd2 corresponding to two adjacent columns of sub-pixels, two of the first signal lines Vd1 are adjacent (it can be understood that there is no other corresponding signal line between the two first signal lines Vd1, for example, there is no other data line between the two adjacent data lines) to form a first signal line group, or two of the second signal lines Vd2 are adjacent (it can be understood that there is no other corresponding signal line between the two second signal lines Vd2, for example, there is no other data line between the two adjacent data lines) to form a second signal line group. Specifically, the plurality of signal lines Vd are divided into a plurality of signal line groups Vdx (Vdx1 / Vdx2 / Vdx3 / Vdx4), and the plurality of signal line groups Vdx are periodically arranged. Each signal line group Vdx includes a first signal line Vd1 and a second signal line Vd2 located on both sides of the same column of sub-pixels. For example, the first signal line Vd1 is located on the first side of a column of sub-pixels, and the second signal line Vd2 is located on the second side of the column of sub-pixels. For example, the first side may be the left side, and the second side may be the right side; for another example, the first column may be the right side, and the second side may be the left side. The spacing of the gaps between adjacent signal line groups may be ax. In the same signal line group, the spacing of the gaps between the first signal line Vd1 and the second signal line Vd2 may be ay. Wherein, ax may be smaller than ay. For example, ax may be 3-7 microns. For example, ay may be 12-20 microns. A column of subpixels corresponds to a first signal line Vd1 and a second signal line Vd2 of a signal line group Vdx. For example, the pixel circuits of a column of subpixels are adjacent to a first signal line Vd1 and a second signal line Vd2 on their left and right sides, respectively. The first signal line Vd1 drives the subpixels in odd rows, and the second signal line Vd2 drives the subpixels in even rows. Specifically, the signal line protrusion TQ can be a signal line protrusion integrally electrically connected to the data line Vd, which helps simplify the display substrate manufacturing process and reduces the wiring complexity of the display substrate. Of course, if the manufacturing process difficulty and wiring complexity of the display substrate are not considered, the signal line protrusion can also be a structure independent of the signal line protrusion. The data lines Vd extend along the second direction F2 and are arranged sequentially along the first direction F1. The signal line protrusions of the first signal line Vd1 are electrically connected to the subpixels in odd rows, and the signal line protrusions of the second signal line Vd2 are electrically connected to the subpixels in even rows.

[0100] For example, a first insulating layer is formed on the first conductive layer 0350 to protect the first conductive layer 0350. Figure 3 、 Figure 4g 、 Figure 5a , an anode layer 0360 is shown located on the side of the first conductive layer 0350 facing away from the substrate 10. The anode layer 0360 includes anodes Y (Y1 / Y2 / Y3 / Y4). For example, the first color sub-pixel spx1 may include anode Y1, the second color sub-pixel spx2 may include anode Y2, the third color sub-pixel spx3 may include anode Y3, and the fourth color sub-pixel spx4 may include anode Y4.

[0101] like Figures 3 to 4f As shown, the first power signal line VDD is electrically connected to the source region of the corresponding first light-emitting control transistor T4 in the active semiconductor layer 0310 through at least one via hole penetrating the gate insulating layer, the interlayer dielectric layer, and the first interlayer insulating layer. The first power signal line VDD is electrically connected to the first electrode cc1 of the storage capacitor CST in the reference conductive layer 0330 through at least one via hole penetrating the first interlayer insulating layer. The first power signal line VDD is also electrically connected to the light-shielding layer ZG through at least one via hole penetrating the first interlayer insulating layer.

[0102] like Figures 3 to 4f As shown, one end of the connection portion LB1 is electrically connected to the drain region of the corresponding threshold compensation transistor T3 in the active semiconductor layer 0310 through at least one via hole penetrating the gate insulation layer, the interlayer dielectric layer, and the first interlayer insulation layer. The other end of the connection portion LB1 is electrically connected to the initialization line VINIT through at least one via hole penetrating the first interlayer insulation layer.

[0103] like Figures 3 to 4h As shown, one end of the connecting portion LB2 is electrically connected to the signal line protrusion TQ (TQ1 / TQ2 / TQ3 / TQ4) through a third via K3 (K31 / K32 / K33 / K34) passing through the second interlayer insulating layer, and the other end of the connecting portion LB2 is electrically connected to the source region of the data writing transistor T2 in the active semiconductor layer 0310 through at least one via passing through the gate insulating layer, the interlayer dielectric layer and the first interlayer insulating layer.

[0104] like Figures 3 to 4f As shown, one end of the connection portion LB3 is electrically connected to the second electrode cc2 of the storage capacitor CST through at least one via hole penetrating the interlayer dielectric layer and the first interlayer insulating layer. The other end of the connection portion LB3 is electrically connected to the drain region of the first reset transistor T6 in the active semiconductor layer 0310 through at least one via hole penetrating the gate insulating layer, the interlayer dielectric layer, and the first interlayer insulating layer.

[0105] like Figures 3 to 4f As shown, the connection portion LB4 is electrically connected to the drain region of the second light emission control transistor T5 in the active semiconductor layer 0310 through at least one via hole penetrating the gate insulating layer, the interlayer dielectric layer and the first interlayer insulating layer.

[0106] In some examples, such as Figures 3 to 5a as well as Figure 6a As shown, the first insulating layer includes a first via K1 (K11 / K12 / K13 / K14), which exposes a portion of the anode transition portion YZ. The anode Y includes a main portion and an auxiliary portion that are electrically connected to each other. The main portion may include an effective portion exposed by a subpixel opening in a subsequently formed pixel-defining layer, and an anode extension portion extending from the effective portion. The auxiliary portion extends from the anode extension portion along a second direction toward one side of the anode transition portion. The outer contour of the anode extension portion is similar to that of the effective portion. The auxiliary portion is electrically connected to the anode transition portion YZ via the first via K1. For example, in the first color subpixel spx1, the anode Y1 includes a main portion Y11 and an auxiliary portion Y12 that are electrically connected to each other. The main portion Y11 includes an effective portion Y13 and an anode extension portion Y14. The auxiliary portion Y12 is electrically connected to the anode transition portion YZ1 via the first via K11. The anode transition portion YZ1 is electrically connected to the corresponding connection portion LB4 via a second via K21 that penetrates the second interlayer insulating layer. In the second color sub-pixel spx2, the anode Y2 includes a main portion Y21 and an auxiliary portion Y22 that are electrically connected to each other. The main portion Y21 includes an effective portion Y23 and an anode extension portion Y24. The auxiliary portion Y22 is electrically connected to the anode transition portion YZ2 via a first via K12. The anode transition portion YZ2 is electrically connected to the corresponding connection portion LB4 via a second via K22 that penetrates the second interlayer insulating layer. In the third color sub-pixel spx3, the anode Y3 includes a main portion Y31 and an auxiliary portion Y32 that are electrically connected to each other. The main portion Y31 includes an effective portion Y33 and an anode extension portion Y34. The auxiliary portion Y32 is electrically connected to the anode transition portion YZ3 via a first via K13. The anode transition portion YZ3 is electrically connected to the corresponding connection portion LB4 via a second via K23 that penetrates the second interlayer insulating layer. In the fourth color sub-pixel spx4, the anode Y4 includes a main portion Y41 and an auxiliary portion Y42 electrically connected to each other, the main portion Y41 includes an effective portion Y43 and an anode extension portion Y44, the auxiliary portion Y42 is electrically connected to the anode transition portion YZ4 through a first via K14, and the anode transition portion YZ4 is electrically connected to the corresponding connection portion LB4 through a second via K24 penetrating the second interlayer insulating layer. In some examples, Figure 4gAs shown, within the same repeating unit, the center Q1 of the effective portion Y13 of the first color sub-pixel spx1, the center O2 of the effective portion Y23 of the second color sub-pixel spx2, the center O3 of the effective portion Y33 of the third color sub-pixel spx3, and the center O4 of the effective portion Y43 of the fourth color sub-pixel spx4 generally form a quadrilateral, such as a parallelogram. For example, the center O1 of the effective portion Y13 of the first color sub-pixel spx1 and the center O3 of the effective portion Y33 of the third color sub-pixel spx3 are located at two adjacent vertices of the quadrilateral, and the line connecting them is perpendicular to the second direction F2. For example, the center O2 of the effective portion Y23 of the second color sub-pixel spx2 and the center O4 of the effective portion Y43 of the fourth color sub-pixel spx4 are located at two other adjacent vertices of the quadrilateral, and the line connecting them is perpendicular to the second direction F2. For example, the perpendicular bisector of a line connecting the center O1 of the effective portion Y13 of the first color sub-pixel spx1 and the center O3 of the effective portion Y33 of the third color sub-pixel spx3 may pass through the effective portion Y23 of a second color sub-pixel spx2, for example, through the center O2 of the effective portion Y23 of the second color sub-pixel spx2. For example, the perpendicular bisector of a line connecting the center O2 of the effective portion Y23 of the second color sub-pixel spx2 and the center O4 of the effective portion Y43 of the fourth color sub-pixel spx4 may pass through the effective portion Y33 of the third color sub-pixel spx3, for example, through the center O3 of the effective portion Y33 of the third color sub-pixel spx3.

[0107] In some examples, combined Figure 4g and Figure 4aAs shown, in a first subpixel, the anode extension further includes an anode shielding portion on the side facing the second subpixel. The orthographic projection of the anode shielding portion on the substrate covers a first area, wherein the first area includes at least a portion of the area between the two channel regions of the threshold compensation transistor in the pixel circuit corresponding to the second subpixel. For example, the first area includes more than half the area of ​​the area between the two channel regions of the threshold compensation transistor in the pixel circuit corresponding to the second subpixel. For example, in a first-color subpixel spx1, the anode extension Y14 further includes an anode shielding portion YA1 on the side facing the second-color subpixel spx3. The orthographic projection of the anode shielding portion YA1 on the substrate 10 covers the orthographic projection of the first area in the active semiconductor layer 0310 of the adjacent second-color subpixel spx2 in the same subpixel on the substrate 10. The first area includes at least a portion of the area between the two channel regions T3-A of the threshold compensation transistor T3 in the pixel circuit corresponding to the second-color subpixel spx2. For another example, in the third color sub-pixel spx3, the anode extension portion Y34 also includes an anode blocking portion YA3 on the side facing the fourth color sub-pixel spx4, and the orthographic projection of the anode blocking portion YA3 on the substrate 10 covers the orthographic projection of the first area in the active semiconductor layer 0310 of the adjacent fourth color sub-pixel spx4 in the same sub-pixel on the substrate 10, wherein the first area includes at least part of the area between the two channel regions T3-A of the threshold compensation transistor T3 in the pixel circuit corresponding to the fourth color sub-pixel spx4.

[0108] It should be noted that the anode includes a main part and an auxiliary part that are electrically connected to each other and form an integrated structure, that is, the main part and the auxiliary part are formed continuously.

[0109] In some examples, combined Figure 5aAs shown, a pixel-defining layer is formed on the side of the anode layer facing away from the base substrate 10. The pixel-defining layer includes a plurality of sub-pixel openings corresponding one-to-one to each sub-pixel. For example, the effective portions of at least some sub-pixels have overlapping regions with the signal line protrusion TQ and the anode transition portion YZ connected to the corresponding pixel circuit in the second direction F2. That is, a straight line parallel to the second direction F2 can pass through both the signal line protrusion TQ and the anode transition portion YZ. For example, a straight line parallel to the second direction F2 can pass through the signal line protrusion TQ and the anode transition portion YZ of all sub-pixels in the same column, and the signal line protrusion TQ and the anode transition portion YZ it passes through are alternately distributed in the second direction F2. For example, the effective portion Y13 of the first color sub-pixel spx1 has a first overlapping region S1 with the signal line protrusion TQ1 connected to the corresponding pixel circuit, and a second overlapping region S1' with the anode transition portion YZ1 connected to the corresponding pixel circuit. For example, the effective portion Y33 of the third color subpixel spx3 overlaps with the signal line protrusion TQ3 connected to the corresponding pixel circuit in a first overlapping region S3, and overlaps with the anode transition portion YZ3 connected to the corresponding pixel circuit in a second overlapping region S3'. In the disclosed embodiment, the effective portion of at least some subpixels overlaps with both the signal line protrusion TQ and the anode transition portion YZ connected to the corresponding pixel circuit in the second direction. This can improve the problem of color shift that can occur when the effective portion of the anode Y only overlaps with the anode transition portion YZ, resulting in the effective portion being relatively high at the end corresponding to the anode transition portion YZ.

[0110] In a specific implementation, the active portion of the anode exposed by the sub-pixel opening can contact the subsequently formed light-emitting layer, thereby defining the light-emitting area of ​​the sub-pixel. The area of ​​the pixel-defining layer other than the sub-pixel opening can be a covering portion that covers the anode and other areas outside the anode area. Its pattern is simple and can be consistent with the pattern of the pixel-defining layer of a conventional display substrate. It is not shown in the present embodiment.

[0111] In some examples, combined Figure 5aAs shown, multiple sub-pixels are divided into a first sub-pixel 01 and a second sub-pixel 02. The area of ​​the anode of the first sub-pixel 01 is larger than that of the anode of the second sub-pixel 02. The effective portion of the first sub-pixel 01 overlaps with the signal line protrusion TQ and the anode transition portion YZ connected to the corresponding pixel circuit in the second direction F2. The orthographic projection of the anode transition portion YZ of the second sub-pixel 02 on the substrate 10 passes through the orthographic projection of the effective portion on the substrate 10, for example, through the center of the orthographic projection of the effective portion on the substrate 10. Specifically, for example, the first sub-pixel 01 may include a first color sub-pixel spx1 and a third color sub-pixel spx3, and the second sub-pixel 02 may include a second color sub-pixel and a fourth color sub-pixel spx4. The first color sub-pixel spx1 may be a red sub-pixel, the third color sub-pixel spx1 may be a blue sub-pixel, and the second color sub-pixel spx2 and the fourth color sub-pixel spx4 may be green sub-pixels. Specifically, for example, the effective portion Y13 of the first color sub-pixel spx1 overlaps with the signal line protrusion TQ1 and the anode transition portion YZ1 connected to the corresponding pixel circuit in the second direction F2. For example, the effective portion Y33 of the third color sub-pixel spx3 overlaps with the signal line protrusion TQ3 and the anode transition portion YZ3 connected to the corresponding pixel circuit in the second direction F2. For example, the orthographic projection of the anode transition portion YZ2 of the second color sub-pixel spx2 on the substrate 10 overlaps with the orthographic projection of the effective portion Y23 on the substrate 10, for example, covers the center O2 of the orthographic projection of the effective portion Y23 on the substrate 10. For example, the orthographic projection of the anode transition portion YZ4 of the fourth color sub-pixel spx4 on the substrate 10 overlaps with the orthographic projection of the effective portion Y43 on the substrate 10, for example, covers the center O4 of the orthographic projection of the effective portion Y43 on the substrate 10. In the embodiment of the present disclosure, since the overlapping area between the anode transition portion YZ of the first sub-pixel 01 and the effective portion is smaller, while the overlapping area between the anode transition portion YZ of the second sub-pixel 02 and the effective portion is generally larger (the area occupied by the hole through which the anode transition portion YZ of the second sub-pixel 02 is connected to the source-drain metal layer 0340 is closer to the center of the effective portion), when improving the color deviation of the first sub-pixel 01 and the second sub-pixel 02, the effective portion of the first sub-pixel 01 is made to overlap with both the signal line protrusion TQ and the anode transition portion YZ in the second direction F2, so that the orthographic projection of the anode transition portion YZ of the second sub-pixel 02 on the substrate 10 covers the orthographic projection of the effective portion on the substrate 10, for example, covers the center of the orthographic projection of the effective portion YZ on the substrate 10, thereby improving the color deviation problem of the first sub-pixel 01 and the second sub-pixel 02.

[0112] In specific implementation, combined with Figure 5a as well as Figure 6bAs shown, the orthographic projection of the anode transition portion YZ of the second sub-pixel 02 on the substrate 10 covers the center of the orthographic projection of the effective portion on the substrate 10, and covers more than 60% of the orthographic projection of the effective portion on the substrate 10, for example, more than 70%, for example, more than 80%. For example, combined with Figure 5a As shown, the orthographic projection of the anode transition portion YZ2 of the second color sub-pixel spx2 on the substrate 10 covers the center O2 of the orthographic projection of the effective portion Y23 on the substrate 10, and covers more than 60% of the orthographic projection of the effective portion Y23 on the substrate 10, for example, more than 70%, or more than 80%. For example, the orthographic projection of the anode transition portion YZ of the second sub-pixel O2 on the substrate 10 passes through a majority of the orthographic projection of the effective portion on the substrate 10, for example, more than 60%, for example, more than 70%, or more than 80%. For example, the orthographic projection of the anode transition portion of the second sub-pixel O2 on the substrate 10 may also pass through the entire orthographic projection of the effective portion on the substrate. For example, the anode transition portion YZ extends along the second direction F2, and the orthographic projection of the anode transition portion YZ of the second sub-pixel O2 on the substrate 10 covers the center of the orthographic projection of the effective portion on the substrate 10. For example, the orthographic projection of the anode transfer portion YZ of the second sub-pixel 02 on the base substrate 10 passes through the center of the orthographic projection of the effective portion on the base substrate 10 in the second direction F2.

[0113] In some examples, combined Figure 5a As shown, the first overlapping area S1 and the second overlapping area S2 are similar in shape and have the same area. Figure 5b As shown, Figure 5b for Figure 5aIn an enlarged schematic diagram of a first sub-pixel O1 (third color sub-pixel spx3), the maximum length of the first overlapping region in the second direction accounts for one-tenth to one-third of the maximum length of the effective portion in the second direction. For example, the maximum length of the second overlapping region in the second direction accounts for one-tenth to one-third of the maximum length of the effective portion in the second direction. For example, in the third color sub-pixel spx3, the maximum length k1 of the first overlapping region S1 in the second direction F2 accounts for one-tenth to one-third of the maximum length k of the effective portion Y33 in the second direction F2; and the maximum length k2 of the second overlapping region S2 in the second direction F2 accounts for one-tenth to one-third of the maximum length k of the effective portion Y33 in the second direction F2. Furthermore, the first overlapping region and the second overlapping region are symmetrical about a line passing through the center of the effective portion and perpendicular to the second direction. For example, in the third sub-pixel spx3, the first overlapping region S1 and the second overlapping region S2 are symmetrical about a line X passing through the center O3 of the effective portion Y33 and perpendicular to the second direction F2. In the embodiment of the present disclosure, the first overlapping region and the second overlapping region are symmetrical about a line passing through the center of the effective portion and perpendicular to the second direction, which can effectively improve the color shift problem of the first sub-pixel. Of course, it is understandable that in a specific implementation, it is difficult to achieve complete and precise symmetry between the first overlapping region and the second overlapping region about a line passing through the center of the effective portion and perpendicular to the second direction. Therefore, the symmetry between the first overlapping region and the second overlapping region about a line passing through the center of the effective portion and perpendicular to the second direction in the embodiment of the present disclosure can be understood as the first overlapping region and the second overlapping region being roughly symmetrical about a line passing through the center of the effective portion and perpendicular to the second direction.

[0114] In some examples, combined Figure 4f As shown, the length h2 of the anode transition portion YZ of the second sub-pixel O2 in the second direction F2 is greater than the length h1 of the anode transition portion YZ of the first sub-pixel O1 in the second direction F2. For example, the length h2 of the anode transition portion YZ2 of the second color sub-pixel spx2 in the second direction F2 is greater than the length h1 of the anode transition portion YZ1 of the first color sub-pixel spx1 in the second direction F2. In the disclosed embodiment, by setting the anode transition portion YZ of the second sub-pixel O2 to be longer in the second direction F2, the anode transition portion YZ of the second sub-pixel O2 can compensate for the flatness below the active portion of the anode.

[0115] In some examples, combined Figure 4fAs shown, the signal line protrusions TQ (TQ1 / TQ2 / TQ3 / TQ4) include: a protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) and a protruding connection portion TQL (TQL1 / TQL2 / TQL3 / TQL4) connecting the protruding main portion TQZ and the signal line Vd. For example, the length h3 of the protruding main portion TQZ in the second direction F2 is greater than the length h4 of the protruding connection portion TQL in the second direction F2. In the disclosed embodiment, by providing the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) longer in the second direction F2, a greater overlap between the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) and the effective portion of the anode can be achieved, thereby improving the color shift problem.

[0116] In some examples, combined Figure 4f As shown, the length h5 of the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) in the first direction F1 is substantially the same as the length h6 of the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) in the first direction F1. For example, the ratio of the length h5 of the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) in the first direction F1 to the length h6 of the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) in the first direction F1 is substantially 0.8-1.2. In the disclosed embodiment, by making the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) and the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) have the same length in the first direction F1, the overlap areas of the effective portion of the anode, the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) and the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) are substantially the same. For example, the overlap area ratio of the effective portion of the anode, the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) and the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) is approximately 0.8-1.2.

[0117] In some examples, combined Figure 4fAs shown, in the same sub-pixel, the length h3 of the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) in the second direction F2 is less than the length h1 of the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) in the second direction F2. For example, in the first color sub-pixel, the length h3 of the protruding main portion TQZ1 in the second direction F2 is less than the length h1 of the anode transition portion YZ1 in the second direction F2. In the disclosed embodiment, the length h3 of the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) in the second direction F2 is less than the length h1 of the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) in the second direction F2, which facilitates electrical connection between the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) and other film layers through the via. For example, the length h3 of the main protruding portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) in the second direction F2 is less than 15 microns. For example, h3 is less than 12 microns. For example, h3 is greater than 6 microns. For example, h4 is less than 5 microns. For example, h4 is less than 4 microns. For example, h5 is greater than half the distance between two signal lines on either side of the main protruding portion. For example, h5 is between 8 and 20 microns. For example, h5 is between 10 and 15 microns. Because the main protruding portion is used to electrically connect the signal lines to other film layers, typically through vias. That is, the main protruding portion is provided with vias that connect the integrally connected signal lines to other film layers, the corresponding dimensions h3 and h5 cannot be too small and must be at least larger than the dimensions of the vias. For example, the dimensions of a via are 4*4 microns. For example, the dimensions of a via are 3*3 microns. For example, the dimensions of a via are circular, with a diameter of 2-4 microns. For example, the protruding main portion transmits data signals for displaying each sub-pixel. To reduce interference with other signals, h3 and h5 cannot be too large. For example, in the first direction, there is a gap between the protruding main portion and another adjacent signal line, such as a data line. This gap is, for example, approximately equal to h4, or a ratio of approximately 0.8-1.2. For example, there is also a gap between the anode transition portion YZ and the two adjacent signal lines on both sides of the first direction. The gaps on the left and right sides are approximately equal. This gap is, for example, approximately equal to h4, or a ratio of approximately 0.8-1.2. For example, the gap between the anode transition portion YZ and the signal line adjacent to its left is less than 5 microns. For example, the gap between the anode transition portion YZ and the signal line adjacent to its left is less than 4 microns. For example, the gap between the anode transition portion YZ and the signal line adjacent to its right is less than 5 microns. For example, the gap between the anode transition portion YZ and the signal line adjacent to its right is less than 4 microns.

[0118] In some examples, combined Figure 4fAs shown, the shape of the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) is similar to the shape of the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4). Specifically, the shape of the protruding main portion TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) and the shape of the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) are both rectangular. In the embodiment of the present disclosure, the shape of the protruding main part TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) is similar to the shape of the anode transition part YZ (YZ1 / YZ2 / YZ3 / YZ4), which is beneficial for the effective part of the anode to overlap with the protruding main part TQZ (TQZ1 / TQZ2 / TQZ3 / TQZ4) and the anode transition part YZ (YZ1 / YZ2 / YZ3 / YZ4) to produce the same overlapping area.

[0119] In some examples, combined Figure 4g or Figure 5a As shown, the effective portion of the first sub-pixel is a rhombus, for example, a square. For example, the effective portion Y13 of the first color sub-pixel spx1 is a rhombus, for example, a square. For example, the effective portion Y33 of the third color sub-pixel spx3 is a rhombus, for example, a square. One of the diagonals of the rhombus is parallel to the second direction F2. For example, Figure 5a , the vertical diagonal line of the first color sub-pixel spx1 is parallel to the second direction F2. For example, the overlapping area of ​​the effective part of the first sub-pixel and the protruding main part is roughly a triangular area, corresponding to one corner of the rhombus. For example, the overlapping area of ​​the effective part of the first sub-pixel and the anode transition part is roughly a triangular area, corresponding to one corner of the rhombus. For example, the overlapping area of ​​the effective part of the first sub-pixel and the protruding main part, and the overlapping area of ​​the effective part of the first sub-pixel and the anode transition part respectively correspond to two opposite corners of the rhombus. For example, combined with Figure 5a As shown, the overlapped area between the effective portion Y13 of the first color sub-pixel spx1 and the protruding main portion TQZ1 is roughly a triangular area. For example, the overlapped area between the effective portion Y13 of the first color sub-pixel spx1 and the anode transition portion YZ1 is roughly a triangular area. In some examples, Figure 4g or Figure 5a As shown, the effective portion of the second sub-pixel 02 is a quadrilateral, for example, a rounded quadrilateral, combined with Figure 5aAs shown, in the column direction, the overlap between the active portion Y23 and the anode transition portion YZ accounts for 50% to 100% of the active portion Y23. That is, the anode transition portion YZ passes through most of the active portion Y23. Specifically, the overlap between the active portion Y23 and the anode transition portion YZ accounts for 60% to 90% of the active portion Y23, and the overlap between the active portion Y23 and the anode transition portion YZ accounts for 70% to 80% of the active portion Y23. The overlap between the active portion Y23 and the anode transition portion YZ accounts for 80% of the active portion Y23. For example, the orthographic projection of the anode transition portion on the substrate passes through the orthographic projections of two diagonal regions of the active portion of the second subpixel on the substrate. For example, the active portion Y23 of the second color subpixel spx2 is a quadrilateral, such as a rounded quadrilateral. For example, the orthographic projection of the anode transition portion Y22 on the base substrate 10 passes through the orthographic projections of the upper and lower diagonal regions of the effective portion Y23 of the second color sub-pixel spx2 on the base substrate 10. In a specific implementation, due to actual process limitations, the quadrilateral effective portion of the second sub-pixel O2 may also have non-right-angle transitions at the corners, for example, arc-shaped transitions.

[0120] In some examples, combined Figure 4e or Figure 4f As shown, in the same sub-pixel 01, the side of the protruding main portion TQZ away from the anode transition portion YZ and the side of the protruding connection portion TQL away from the anode transition portion YZ are in the same straight line, that is, in the first sub-pixel 01, the side of the signal line protruding portion TQZ away from the anode transition portion YZ is flush, and in the second sub-pixel, the side of the signal line protruding portion TQZ away from the anode transition portion YZ is flush.

[0121] In some examples, combined Figure 5aAs shown, the orthographic projections of the first vias K1 (K11 / K12 / K13 / K14) on the substrate 10 do not overlap with the orthographic projections of the regions of the anode transition portions YZ (YZ1 / YZ2 / YZ3 / YZ4) that overlap with the effective portion on the substrate 10. For example, in the first color sub-pixel spx1, the orthographic projections of the first via K11 (which connects the auxiliary portion Y12 of the anode Y1 to the anode transition portion YZ1) on the substrate 10 do not overlap with the orthographic projections of the region of the anode transition portion YZ1 that overlaps with the effective portion Y13 (i.e., the first overlapping region S1) on the substrate 10. In the embodiment of the present disclosure, the orthographic projection of the first via K1 (K11 / K12 / K13 / K14) on the base substrate 10 and the orthographic projection of the area where the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) overlaps with the effective portion on the base substrate 10 do not overlap with each other. This can avoid the overlapping area becoming uneven when the anode transition portion YZ (YZ1 / YZ2 / YZ3 / YZ4) overlaps with the effective portion in the area where the first via K1 is located, thereby making it impossible to achieve flatness compensation.

[0122] In some examples, combined Figure 5a As shown, in at least some sub-pixels, the effective portion of the anode overlaps with two adjacent signal lines Vd in the first direction F1. For example, in the first color sub-pixel spx1, the effective portion Y13 of the anode Y1 overlaps with two adjacent signal lines Vd in the first direction F1. In the disclosed embodiments, in at least some sub-pixels, the effective portion of the anode overlaps with both adjacent signal lines in the first direction, or the effective portion of the anode does not overlap with either adjacent signal line in the first direction. This avoids the color shift that can occur when the effective portion of the anode overlaps only one signal line in the first direction.

[0123] In some examples, in all sub-pixels, the effective portion of the anode has an overlapping area with two adjacent signal lines Vd in the first direction F1.

[0124] Specifically, the overlapping area of ​​the effective part of the anode and the first signal line in the first direction is used as the third overlapping area, and the overlapping area of ​​the effective part of the anode and the second signal line in the first direction is used as the fourth overlapping area. The third overlapping area and the fourth overlapping area are located on both sides of the effective part of the anode in the first direction. For example, the ratio of the distance from the third overlapping area to the straight line passing through the center of the effective part and perpendicular to the first direction is 0.8-1.2, and the distance from the third overlapping area to the straight line passing through the center of the effective part and perpendicular to the first direction can be equal. For example, the third overlapping area and the fourth overlapping area are roughly symmetrical with respect to the straight line passing through the center of the effective part and perpendicular to the first direction. For example, combined with Figure 5bAs shown, in the third color sub-pixel spx3, the overlapping area of ​​the effective portion Y33 of the anode Y3 and the first signal line Vd1 in the first direction F1 is referred to as the third overlapping area S3", and the overlapping area of ​​the effective portion Y33 of the anode Y3 and the second signal line Vd2 in the first direction F1 is referred to as the fourth overlapping area S3'". The third overlapping area S3' and the fourth overlapping area S3'' are located on both sides of the effective portion Y33 of the anode Y3 in the first direction F1. For example, the ratio of the distances from the third overlapping area S3'' and the fourth overlapping area S3'' to the straight line Y passing through the center O3 of the effective portion Y33 and perpendicular to the first direction F1 is 0.8-1.2. Furthermore, the distances from the third overlapping area S3'' and the fourth overlapping area S3'' to the straight line Y passing through the center O3 of the effective portion Y33 and perpendicular to the first direction F1 may be equal. For example, the third overlapping region S3 ″ and the fourth overlapping region S3 ′″ are substantially symmetrical with respect to a straight line Y passing through the center O3 of the effective portion Y33 and perpendicular to the first direction F1 .

[0125] An embodiment of the present disclosure further provides a display device, which includes a display substrate provided by the embodiment of the present disclosure.

[0126] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0127] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if such changes and modifications of the embodiments of the present invention fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. A display substrate, wherein: include: A plurality of sub-pixels are located on a substrate; a first conductive layer located on one side of the base substrate, the first conductive layer comprising: signal lines arranged sequentially along a first direction and extending in a second direction, a signal line protrusion and an anode transfer portion located between at least two adjacent signal lines and spaced apart from each other, the signal line protrusion being integrally connected to the signal line; a pixel defining layer, located on a side of the first conductive layer away from the base substrate, and comprising a plurality of sub-pixel openings corresponding to the sub-pixels; an anode located between the first conductive layer and the pixel defining layer; each of the anodes includes an effective portion exposed by the sub-pixel opening, and the anode transition portion is connected to the anode through an insulating layer via; The effective portions of at least some of the sub-pixels have overlapping areas with both the signal line protrusion and the anode transfer portion in the second direction, and the second direction is perpendicular to the first direction.

2. The display substrate according to claim 1, wherein: The plurality of sub-pixels include a first sub-pixel and a second sub-pixel, wherein the area of ​​the anode of the first sub-pixel is greater than the area of ​​the anode of the second sub-pixel; The effective portion of the first sub-pixel has overlapping areas with both the signal line protrusion and the anode transfer portion in the second direction.

3. The display substrate according to claim 2, wherein: An overlapping area between the effective portion of the first sub-pixel and the protruding portion of the signal line is a first overlapping area, and an overlapping area between the effective portion of the first sub-pixel and the anode transfer portion is a second overlapping area; In the second direction, the first overlapping region and the second overlapping region are respectively located on two sides of a center of the effective portion of the first sub-pixel.

4. The display substrate according to claim 3, wherein: A ratio of distances between the first overlapping region and the second overlapping region and the center of the effective portion of the first sub-pixel is 0.8 to 1.

2.

5. The display substrate according to claim 2, wherein: The orthographic projection of the anode transition portion of the second sub-pixel on the base substrate covers the center of the orthographic projection of the effective portion of the second sub-pixel on the base substrate, and the maximum dimension of the anode transition portion of the second sub-pixel in the second direction is greater than the maximum dimension of the effective portion in the second direction.

6. The display substrate according to claim 2, wherein: A length of the anode transition portion of the second sub-pixel in the second direction is greater than a length of the anode transition portion of the first sub-pixel in the second direction.

7. The display substrate according to any one of claims 2 to 6, wherein: The signal line protrusion includes: a protruding main portion, and a protruding connection portion connecting the protruding main portion and the signal line; A length of the protruding main portion in the second direction is greater than a length of the protruding connecting portion in the second direction.

8. The display substrate according to claim 7, wherein: A ratio of a length of the protruding main portion in the first direction to a length of the anode transfer portion in the first direction is 0.8 to 1.

2.

9. The display substrate according to claim 8, wherein: The length of the protruding main portion in the second direction is smaller than the length of the anode transfer portion in the second direction.

10. The display substrate according to claim 7, wherein: In a direction from the protruding connection portion to the protruding main portion, there is a gap between the protruding main portion and the nearest adjacent signal line.

11. The display substrate according to claim 8, wherein In a direction from the protruding connection portion to the protruding main portion, there is a gap between the protruding main portion and the nearest adjacent signal line.

12. The display substrate according to claim 9, wherein: In a direction from the protruding connection portion to the protruding main portion, there is a gap between the protruding main portion and the nearest adjacent signal line.

13. The display substrate according to claim 10, wherein: A ratio of a length of the interval in the first direction to a length of the protruding connection portion in the first direction is 0.8 to 1.

2.

14. The display substrate according to claim 11, wherein: A ratio of a length of the interval in the first direction to a length of the protruding connection portion in the first direction is 0.8 to 1.

2.

15. The display substrate according to claim 12, wherein: A ratio of a length of the interval in the first direction to a length of the protruding connection portion in the first direction is 0.8 to 1.

2.

16. The display substrate according to claim 2, wherein: The signal line protrusion includes: a protruding main portion, and a protruding connection portion connecting the protruding main portion and the signal line; The effective portion of the first sub-pixel is substantially diamond-shaped; The overlapping area between the effective part of the first sub-pixel and the protruding main part is roughly a triangular area; the overlapping area between the effective part of the first sub-pixel and the anode transition part is roughly a triangular area; the overlapping area between the effective part of the first sub-pixel and the protruding main part, and the overlapping area between the effective part of the first sub-pixel and the anode transition part respectively correspond to two opposite corners of a rhombus.

17. The display substrate according to claim 16, wherein: The anode includes a main body portion and an auxiliary portion electrically connected to each other; the main body portion includes the effective portion and an anode extension portion extending from the effective portion; The anode extension portion of the first sub-pixel also includes an anode blocking portion on the side facing the second sub-pixel, and the anode blocking portion covers a first area on the positive projection of the substrate, wherein the first area includes at least part of the area between the two channel regions of the threshold compensation transistor in the pixel circuit corresponding to the second sub-pixel.

18. The display substrate according to claim 7, wherein: In the same sub-pixel, a side of the protruding main portion away from the anode transition portion and a side of the protruding connecting portion away from the anode transition portion are substantially in the same straight line.

19. The display substrate according to any one of claims 2 to 5, wherein: The effective portion of the second sub-pixel is substantially in the shape of a quadrilateral area; In the column direction, the size of the portion where the effective portion overlaps the anode transfer portion accounts for 50% to 100% of the size of the effective portion.

20. The display substrate according to claim 1, wherein The anode includes a main portion and an auxiliary portion electrically connected to each other; A first insulating layer is provided between the anode and the first conductive layer; the auxiliary portion is electrically connected to the anode transition portion via a first via hole penetrating the first insulating layer; The orthographic projection of the first via hole on the base substrate and the orthographic projection of the region of the anode transfer portion overlapping with the effective portion on the base substrate do not overlap with each other.

21. The display substrate according to claim 1, wherein The patterns of the signal line protrusions of two adjacent overlapping sub-pixels in a column are different.

22. The display substrate according to claim 2, wherein: The first sub-pixel includes: a first color sub-pixel and a third color sub-pixel; the second sub-pixel includes: a second color sub-pixel and a fourth color sub-pixel; The first color sub-pixel is a red sub-pixel, the third color sub-pixel is a blue sub-pixel, and the second color sub-pixel and the fourth color sub-pixel are green sub-pixels.

23. The display substrate according to claim 2, wherein: Each of the signal lines further includes a signal line protrusion, and the signal line protrusion and the signal line protrusion have the same structure; the signal lines include a first signal line and a second signal line; wherein one column of sub-pixels corresponds to one first signal line and one second signal line; the signal line protrusions of the first signal line are respectively electrically connected to the sub-pixels in odd-numbered rows, and the signal line protrusions of the second signal line are respectively electrically connected to the sub-pixels in even-numbered rows; Among the two first signal lines and two second signal lines corresponding to two adjacent columns of sub-pixels, two of the first signal lines are adjacent to form a first signal line group, or two of the second signal lines are adjacent to form a second signal line group.

24. The display substrate according to claim 1, wherein: The effective portions of at least some of the sub-pixels have overlapping areas with two adjacent signal lines in the first direction.

25. The display substrate according to claim 24, wherein: The signal lines adjacent to the sub-pixel are respectively a first signal line and a second signal line; In the sub-pixel, the effective portion and the first signal line have a third overlapping region, and the effective portion and the second signal line have a fourth overlapping region; the third overlapping region and the fourth overlapping region are located on both sides of the effective portion of the anode in the first direction.

26. A display device, wherein: Comprising the display substrate according to any one of claims 1-25.

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