Chip welding line defect detection method and device

Abstract

The present invention relates to a chip bond line defect detection method, comprising the following steps: acquiring images directly above a target chip and multiple images taken from other directions as a first image set; performing preprocessing operations on the first image set to obtain a second image set; segmenting the images in the second image set using a swarm intelligence optimization algorithm to obtain a third image set; inputting the images directly above the target chip in the third image set into a pretrained first deep convolutional neural network for two-dimensional defect detection, and directly outputting the defect type if a chip bond line defect is present; if no chip bond line defect is present, performing three-dimensional reconstruction by combining multiple images taken from other directions in the third image set to obtain reconstructed three-dimensional data; and inputting the reconstructed three-dimensional data into a pretrained second deep convolutional neural network for three-dimensional defect detection. The present invention utilizes a method of fusion detection of two-dimensional and three-dimensional information to overcome the shortcomings of incomplete two-dimensional information and avoid the computationally intensive and slow performance of using only three-dimensional detection technology.

Description

Technical Field

[0001] The present invention relates to the technical field of defect detection, and in particular to a chip bonding line defect detection method and device. Background Art

[0002] When a circuit board is completed, its chip bonding wires often need to be inspected to control defects.

[0003] In today's market, the method for inspecting chip bonding wires on circuit boards is usually manual inspection by experienced employees. This inspection process is highly dependent on the employee's level of experience. In addition, manual inspection is very difficult due to factors such as the size of the chip. Summary of the Invention

[0004] The purpose of the present invention is to solve at least one of the deficiencies of the prior art and to provide a chip bonding line defect detection method and device.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] Specifically, a chip bonding line defect detection method is proposed, including the following:

[0007] Acquire images directly above the target chip and multiple images in other directions as a first image set;

[0008] performing a preprocessing operation on the first image set to obtain a second image set;

[0009] Segmenting the images in the second image set using a swarm intelligence optimization algorithm to obtain a third image set;

[0010] Inputting the image directly above the target chip in the third image set into a pre-trained first deep convolutional neural network for two-dimensional defect detection, and directly outputting the defect type if a chip welding line defect exists;

[0011] If there is no chip bonding line defect, performing three-dimensional reconstruction by combining multiple images in other directions in the third image set to obtain reconstructed three-dimensional data;

[0012] The reconstructed three-dimensional data is input into a pre-trained second deep convolutional neural network for three-dimensional defect detection. If there is still no three-dimensional defect, the target chip is judged to be a qualified chip. If there is a three-dimensional defect, the defect type is output.

[0013] In this embodiment 1, two-dimensional defects mainly include broken lines, multiple lines, missing lines, bending, adhesion, etc. Three-dimensional defects mainly include: intersection, adhesion, space spacing, arc height, arc collapse, etc. between lines and between lines and boards.

[0014] Further, specifically, the preprocessing operations performed on the first image set include the following:

[0015] The images in the first image set are respectively subjected to grayscale conversion, geometric transformation, and image enhancement processing to obtain a second image set.

[0016] Further, specifically, the images in the second image set are segmented by a swarm intelligence optimization algorithm to obtain a third image set, including:

[0017] A two-dimensional maximum conditional entropy model is established for the images in the second image set, and a swarm intelligence optimization algorithm is used to optimize the two-dimensional maximum entropy problem and solve the optimal threshold, thereby achieving effective two-dimensional threshold segmentation of the chip welding line image and providing high-quality test images for the next step of defect detection.

[0018] Furthermore, specifically, the first deep convolutional neural network is trained in the following manner:

[0019] First, the collected images are subjected to a series of geometric transformations such as rotation, flipping, displacement, denoising, and blurring to expand the dataset. Each image is normalized to the same size, and the dataset is divided into training and test sets in a 4:1 ratio.

[0020] Input the processed image into the neural network model. This network model consists of an input layer, a convolutional layer, an activation function, a pooling layer, a fully connected layer, and an output layer. The proposed convolutional neural network has 12 layers, and the proposed activation function is ReLU. Specifically, the following are: input layer, convolutional layer 1, pooling layer 1, convolutional layer 2, convolutional layer 3, pooling layer 2, convolutional layer 4, convolutional layer 5, pooling layer 3, fully connected layer 1, fully connected layer 2, output layer. The pooling layer size is 3*3, with a stride of 2.

[0021] The gradient descent method is used to obtain the minimum loss function in the weight space. The weights of each layer are initialized from a zero-mean Gaussian distribution with a standard deviation of 0.001. The bias values of the first convolutional layer and the last fully connected layer are initialized to 0, and the biases of the remaining layers are initialized to 1. The size of the image dataset for each training is 50, the momentum coefficient is set to 0.9, the decay parameter is set to 0.01, and the learning rate is initialized to 0.001 and reduced by 0.1 every 1000 times.

[0022] Furthermore, specifically, the second deep convolutional neural network is trained in the following manner:

[0023] The three-dimensional convolutional neural network adds a spatial dimension to the two-dimensional convolutional neural network, and the overall structure of the network is roughly the same.

[0024] The input layer is a 3D image containing 3D information. The convolutional layer has a kernel size of 3*3*3, the pooling layer is 2*2*2 with a stride of 2, and there is a fully connected layer and output layer. The training process is also based on batch gradient descent, with multiple forward and backward propagations. Weighted cross entropy is used as the loss function, ReLU is used as the activation function, the learning rate is initially set to 0.001, and is reduced by 0.1 every 10,000 iterations. The random dropout rate is 0.5.

[0025] Further, specifically, the three-dimensional reconstruction is performed in combination with multiple images in other directions in the third image set to obtain reconstructed three-dimensional data, including:

[0026] Take the left and right images of the target chip in the third image set, and extract feature points, feature lines, and regions from the left and right images respectively;

[0027] Stereo matching is performed based on the extracted features, and the imaging points in the two different images are matched one to one.

[0028] The matching results are combined with the internal and external parameters calibrated by the camera to obtain the three-dimensional data information of the chip bonding line.

[0029] The present invention also provides a chip bonding line defect detection device, comprising:

[0030] An image acquisition module, configured to acquire images directly above the target chip and multiple images in other directions as a first image set;

[0031] an image preprocessing module, configured to perform a preprocessing operation on the first image set to obtain a second image set;

[0032] An image segmentation module, configured to segment the images in the second image set using a swarm intelligence optimization algorithm to obtain a third image set;

[0033] a two-dimensional defect detection module, configured to input the image directly above the target chip in the third image set into a pre-trained first deep convolutional neural network for two-dimensional defect detection, and directly output the defect type if a chip welding line defect exists;

[0034] a three-dimensional reconstruction module, configured to perform three-dimensional reconstruction by combining multiple images in other directions in the third image set to obtain reconstructed three-dimensional data when there are no chip bonding line defects;

[0035] The three-dimensional defect detection module is used to input the reconstructed three-dimensional data into a pre-trained second deep convolutional neural network for three-dimensional defect detection. If there is still no three-dimensional defect, the target chip is judged to be a qualified chip. If there is a three-dimensional defect, the defect type is output.

[0036] The present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the chip bonding line defect detection method as described in any one of the above items are implemented.

[0037] The beneficial effects of the present invention are:

[0038] This invention proposes a chip bond line defect detection method that integrates two-dimensional and three-dimensional fusion. First, the image to be inspected is segmented using a swarm intelligence optimization algorithm to provide a high-quality image for subsequent defect detection. A trained deep convolutional neural network is then used to perform two-dimensional defect detection on the image. If a two-dimensional defect exists in the chip bond line, the detection result is directly output. If no two-dimensional defect exists in the chip bond line, the chip bond line is reconstructed in three dimensions using multiple images taken at different angles. Based on the reconstructed three-dimensional data, the trained neural network is used to identify defect features in the three-dimensional data to achieve three-dimensional defect detection. This fusion of two-dimensional and three-dimensional detection compensates for the incompleteness of two-dimensional information while avoiding the computationally intensive and slow performance of using only three-dimensional detection technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The above and other features of the present disclosure will become more apparent through a detailed description of the embodiments shown in conjunction with the accompanying drawings. The same reference numerals in the drawings of the present disclosure represent the same or similar elements. Obviously, the drawings described below are only some embodiments of the present disclosure. It is possible for a person skilled in the art to derive other drawings based on these drawings without inventive effort. In the drawings:

[0040] Figure 1 Shown is a flow chart of a chip bonding line defect detection method of the present invention. DETAILED DESCRIPTION

[0041] The following will be combined with the embodiments and drawings to clearly and completely describe the concept, specific structure and technical effects of the present invention so as to fully understand the purpose, scheme and effect of the present invention. It should be noted that the embodiments and features in the embodiments of this application can be combined with each other unless there is a conflict. The same reference numerals used throughout the drawings indicate the same or similar parts.

[0042] Reference Figure 1 In embodiment 1, the present invention provides a chip bonding line defect detection method, comprising the following steps:

[0043] Step 110: Acquire images directly above the target chip and multiple images in other directions as a first image set;

[0044] Step 120: performing a preprocessing operation on the first image set to obtain a second image set;

[0045] Step 130: Segment the images in the second image set using a swarm intelligence optimization algorithm to obtain a third image set;

[0046] Step 140: Input the image directly above the target chip in the third image set into a pre-trained first deep convolutional neural network for two-dimensional defect detection. If a chip welding line defect exists, the defect type is directly output;

[0047] Step 150: If there is no chip bonding line defect, perform three-dimensional reconstruction by combining multiple images in other directions in the third image set to obtain reconstructed three-dimensional data;

[0048] Step 160: Input the reconstructed three-dimensional data into a pre-trained second deep convolutional neural network for three-dimensional defect detection. If there is still no three-dimensional defect, the target chip is judged to be a qualified chip. If there is a three-dimensional defect, the defect type is output.

[0049] In this first embodiment, a two-dimensional and three-dimensional fusion chip bond line detection method is proposed. A trained deep convolutional neural network is used to first perform two-dimensional defect detection on the image. If a two-dimensional defect exists in the chip bond line, the detection result is directly output. If the chip bond line does not have a two-dimensional defect, the chip bond line is reconstructed in three dimensions by combining multiple images taken at different angles. Based on the reconstructed three-dimensional data, the trained neural network is used to identify the defect features of the three-dimensional data to achieve three-dimensional defect detection. This further increases the detection dimension and improves the detection accuracy. The two-dimensional and three-dimensional fusion detection method not only compensates for the shortcomings of incomplete two-dimensional information but also avoids the shortcomings of high computational complexity and slow speed of using only three-dimensional detection technology.

[0050] Among them, two-dimensional defects mainly include broken lines, multiple lines, missing lines, bending, adhesion, etc. Three-dimensional defects mainly include: intersection, adhesion, spatial spacing, line arc height, line arc collapse, etc. between lines and between lines and boards.

[0051] Further, specifically, the preprocessing operations performed on the first image set include the following:

[0052] The images in the first image set are respectively subjected to grayscale conversion, geometric transformation, and image enhancement processing to obtain a second image set.

[0053] Further, specifically, the images in the second image set are segmented by a swarm intelligence optimization algorithm to obtain a third image set, including:

[0054] A two-dimensional maximum conditional entropy model is established for the images in the second image set, and a swarm intelligence optimization algorithm is used to optimize the two-dimensional maximum entropy problem and solve the optimal threshold, thereby achieving effective two-dimensional threshold segmentation of the chip welding line image and providing high-quality test images for the next step of defect detection.

[0055] The specific operation process includes the following, assuming r ij The joint probability density is defined as the frequency of the co-occurrence of the pixel gray value i in the image I and the pixel gray value j at the corresponding position of the domain average gray image. (H×W is the size of the grayscale image I). The grayscale level of the image is L, and the probability density of the background area A (0~s, 0~t) is The probability density of the target area B (s~L-1, t~L-1) is

[0056] Normalized

[0057] The two-dimensional entropy of the background area A and the target area B are defined as follows:

[0058]

[0059]

[0060] Then the two-dimensional entropy of the image corresponding to the threshold (s, t) is:

[0061]

[0062] According to the maximum entropy principle, if H(s,t) reaches its maximum value at (s=s′,t=t′), (s′,t′) is the optimal segmentation threshold solution for regions A and B, that is,

[0063] (s′,t′)=argmaxH(s,t).

[0064] The above two-dimensional maximum entropy model is used as the objective function of the swarm intelligence optimization algorithm, and the optimal threshold is solved by the intelligent optimization algorithm to segment the image.

[0065] As a preferred embodiment of the present invention, specifically, the first deep convolutional neural network is trained in the following manner:

[0066] First, the collected images are subjected to a series of geometric transformations such as rotation, flipping, displacement, denoising, and blurring to expand the dataset. Each image is normalized to the same size, and the dataset is divided into training and test sets in a 4:1 ratio.

[0067] Input the processed image into the neural network model. This network model consists of an input layer, a convolutional layer, an activation function, a pooling layer, a fully connected layer, and an output layer. The proposed convolutional neural network has 12 layers, and the proposed activation function is ReLU. Specifically, the following are: input layer, convolutional layer 1, pooling layer 1, convolutional layer 2, convolutional layer 3, pooling layer 2, convolutional layer 4, convolutional layer 5, pooling layer 3, fully connected layer 1, fully connected layer 2, output layer. The pooling layer size is 3*3, with a stride of 2.

[0068] The gradient descent method is used to obtain the minimum loss function in the weight space. The weights of each layer are initialized from a zero-mean Gaussian distribution with a standard deviation of 0.001. The bias values of the first convolutional layer and the last fully connected layer are initialized to 0, and the biases of the remaining layers are initialized to 1. The size of the image dataset for each training is 50, the momentum coefficient is set to 0.9, the decay parameter is set to 0.01, and the learning rate is initialized to 0.001 and reduced by 0.1 every 1000 times.

[0069] As a preferred embodiment of the present invention, specifically, the second deep convolutional neural network is trained in the following manner:

[0070] The three-dimensional convolutional neural network adds a spatial dimension to the two-dimensional convolutional neural network, and the overall structure of the network is roughly the same.

[0071] The input layer is a 3D image containing 3D information. The convolutional layer has a kernel size of 3*3*3, the pooling layer is 2*2*2 with a stride of 2, and there is a fully connected layer and output layer. The training process is also based on batch gradient descent, with multiple forward and backward propagations. Weighted cross entropy is used as the loss function, ReLU is used as the activation function, the learning rate is initially set to 0.001, and is reduced by 0.1 every 10,000 iterations. The random dropout rate is 0.5.

[0072] As a preferred embodiment of the present invention, specifically, the three-dimensional reconstruction is performed in combination with multiple images in other directions in the third image set to obtain reconstructed three-dimensional data, including:

[0073] Take the left and right images of the target chip in the third image set, and extract feature points, feature lines, and regions from the left and right images respectively;

[0074] Stereo matching is performed based on the extracted features, and the imaging points in the two different images are matched one to one.

[0075] The matching results are combined with the internal and external parameters calibrated by the camera to obtain the three-dimensional data information of the chip bonding line.

[0076] The present invention also provides a chip bonding line defect detection device, comprising:

[0077] An image acquisition module, configured to acquire images directly above the target chip and multiple images in other directions as a first image set;

[0078] Specifically, the image acquisition module can utilize an industrial ultra-high-resolution microscope camera, an optical system, and computer processing equipment. The camera captures three images from directly above, to the left, and to the right of the chip under test. The image directly above is used for two-dimensional defect detection, while the images to the left and right are used for three-dimensional reconstruction of the chip's bond lines, further enabling three-dimensional defect detection. The optical system features unique annular lighting technology, along with oblique illumination, transmitted light, and polarized light, achieving a depth of field greater than 20 times that of an optical microscope system. The computer processing equipment performs graphic processing on the captured ultra-high-definition chip images.

[0079] an image preprocessing module, configured to perform a preprocessing operation on the first image set to obtain a second image set;

[0080] An image segmentation module, configured to segment the images in the second image set using a swarm intelligence optimization algorithm to obtain a third image set;

[0081] a two-dimensional defect detection module, configured to input the image directly above the target chip in the third image set into a pre-trained first deep convolutional neural network for two-dimensional defect detection, and directly output the defect type if a chip welding line defect exists;

[0082] a three-dimensional reconstruction module, configured to perform three-dimensional reconstruction by combining multiple images in other directions in the third image set to obtain reconstructed three-dimensional data when there are no chip bonding line defects;

[0083] The three-dimensional defect detection module is used to input the reconstructed three-dimensional data into a pre-trained second deep convolutional neural network for three-dimensional defect detection. If there is still no three-dimensional defect, the target chip is judged to be a qualified chip. If there is a three-dimensional defect, the defect type is output.

[0084] The present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the chip bonding line defect detection method as described in any one of the above items are implemented.

[0085] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

[0086] In addition, the functional modules in various embodiments of the present invention may be integrated into a single processing module, or each module may exist physically separately, or two or more modules may be integrated into a single module. The aforementioned integrated modules may be implemented in the form of hardware or software functional modules.

[0087] If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the process in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, it can implement the steps of the above-mentioned various method embodiments. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or system that can carry the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content included in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0088] Although the present invention has been described in considerable detail and with particularity with respect to several described embodiments, it is not intended to be limited to any of these details or embodiments or any particular embodiment, but rather should be construed as providing a broad possible interpretation of these claims in view of the prior art by reference to the appended claims, thereby effectively encompassing the intended scope of the invention. In addition, the invention has been described above in terms of embodiments foreseen by the inventors for the purpose of providing a useful description, and those insubstantial modifications of the invention that are not currently foreseen may still represent equivalent modifications of the invention.

[0089] The above description is merely a preferred embodiment of the present invention. The present invention is not limited to the above-described embodiments. As long as the technical effects of the present invention are achieved by the same means, they shall fall within the scope of protection of the present invention. Within the scope of protection of the present invention, various modifications and variations of the technical solutions and / or implementation methods may be made.

Claims

1. A chip bonding line defect detection method, characterized in that: These include: Acquire images directly above the target chip and multiple images in other directions as a first image set; performing a preprocessing operation on the first image set to obtain a second image set; Segmenting the images in the second image set using a swarm intelligence optimization algorithm to obtain a third image set; Inputting the image directly above the target chip in the third image set into a pre-trained first deep convolutional neural network for two-dimensional defect detection, and directly outputting the defect type if a chip welding line defect exists; If there is no chip bonding line defect, performing three-dimensional reconstruction by combining multiple images in other directions in the third image set to obtain reconstructed three-dimensional data; Inputting the reconstructed three-dimensional data into a pre-trained second deep convolutional neural network for three-dimensional defect detection, and if no three-dimensional defects are found, determining that the target chip is a qualified chip; if three-dimensional defects are found, outputting the defect type; Specifically, the images in the second image set are segmented by a swarm intelligence optimization algorithm to obtain a third image set, including: A two-dimensional maximum conditional entropy model is established for the images in the second image set, and a swarm intelligence optimization algorithm is used to solve the two-dimensional maximum entropy problem to find the optimal threshold, thereby achieving effective two-dimensional threshold segmentation of the chip welding line image, providing high-quality test images for the next step of defect detection; The specific operation process includes the following: For images Gray value of a pixel in The grayscale value of the pixel at the corresponding position of the domain average grayscale image The frequency of co-occurrence, the joint probability density is defined as , is an image The size of the image is , the probability density of the background area A (0~s, 0~t) is , the probability density of the target area B(s~L-1,t~L-1) is ; Normalized , ; The two-dimensional entropy of the background area A and the target area B are defined as follows: ； ； The threshold The corresponding two-dimensional entropy of the image is: ； According to the maximum entropy principle, if exist( , ) to obtain the maximum value, Then it is the optimal segmentation threshold solution for regions A and B, that is ； The above two-dimensional maximum entropy model is used as the objective function of the swarm intelligence optimization algorithm, and the optimal threshold is solved by the intelligent optimization algorithm to segment the image.

2. A chip bonding line defect detection method according to claim 1, characterized in that: Specifically, the preprocessing operations performed on the first image set include the following: The images in the first image set are respectively subjected to grayscale conversion, geometric transformation, and image enhancement processing to obtain a second image set.

3. The chip bonding line defect detection method according to claim 1, characterized in that: Specifically, the first deep convolutional neural network is trained in the following manner: First, the collected images are subjected to a series of geometric transformations such as rotation, flipping, displacement, denoising, and blurring to expand the dataset. Each image is normalized to the same size and the dataset is divided into a training set and a test set in a ratio of 4:

1. The processed image is input into the neural network model, which includes input layer, convolution layer, activation function, pooling layer, fully connected layer and output layer. The proposed convolutional neural network has 12 layers, and the activation function to be used is ReLU. Specifically: input layer, convolution layer 1, pooling layer 1, convolution layer 2, convolution layer 3, pooling layer 2, convolution layer 4, convolution layer 5, pooling layer 3, fully connected layer 1, fully connected layer 2, output layer, where the pooling layer size is 3*3 and the stride is 2. The gradient descent method is used to obtain the minimum loss function in the weight space. The weights of each layer are initialized from a zero-mean Gaussian distribution with a standard deviation of 0.

001. The bias values of the first convolutional layer and the last fully connected layer are initialized to 0, and the biases of the remaining layers are initialized to 1. The size of the image dataset for each training is 50, the momentum coefficient is set to 0.9, the decay parameter is set to 0.01, and the learning rate is initialized to 0.001 and reduced by 0.1 every 1000 times.

4. The chip bonding line defect detection method according to claim 3, characterized in that: Specifically, the second deep convolutional neural network is trained in the following way: The three-dimensional convolutional neural network adds a spatial dimension to the two-dimensional convolutional neural network, and the overall structure of the network is roughly the same. The input layer is a three-dimensional image containing three-dimensional information, the convolution kernel of the convolution layer is 3*3*3, the pooling layer is 2*2*2, the step size is 2, the fully connected layer, the output layer, the training process is also based on the batch gradient descent method, multiple forward propagation and back propagation are performed, weighted cross entropy is used as the loss function, ReLU is the activation function, the initial value of the learning rate is 0.001, and it decreases by 0.1 every 10,000 times, and the random inactivation rate is 0.

5.

5. The chip bonding line defect detection method according to claim 1, characterized in that: Specifically, the three-dimensional reconstruction is performed in combination with multiple images in other directions in the third image set to obtain reconstructed three-dimensional data, including: Take the left and right images of the target chip in the third image set, and extract feature points, feature lines, and regions from the left and right images respectively; Stereo matching is performed based on the extracted features, and the imaging points in the two different images are matched one by one. The matching results are combined with the internal and external parameters calibrated by the camera to obtain the three-dimensional data information of the chip bonding line.

6. A chip bonding line defect detection device, characterized in that: The method according to any one of claims 1 to 5 is applied, comprising: An image acquisition module, configured to acquire images directly above the target chip and multiple images in other directions as a first image set; an image preprocessing module, configured to perform a preprocessing operation on the first image set to obtain a second image set; An image segmentation module, configured to segment the images in the second image set using a swarm intelligence optimization algorithm to obtain a third image set; a two-dimensional defect detection module, configured to input the image directly above the target chip in the third image set into a pre-trained first deep convolutional neural network for two-dimensional defect detection, and directly output the defect type if a chip welding line defect exists; a three-dimensional reconstruction module, configured to perform three-dimensional reconstruction by combining multiple images in other directions in the third image set to obtain reconstructed three-dimensional data when there are no chip bonding line defects; The three-dimensional defect detection module is used to input the reconstructed three-dimensional data into a pre-trained second deep convolutional neural network for three-dimensional defect detection. If there is still no three-dimensional defect, the target chip is judged to be a qualified chip. If there is a three-dimensional defect, the defect type is output.

7. A computer-readable storage medium storing a computer program, wherein: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

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