Charging box and circuit thereof, wireless earphone charging system and communication method

Abstract

The application relates to a charging box and a circuit thereof, a wireless earphone charging system and a communication method. The charging box circuit comprises a first battery, a first charging management unit for charging management of the first battery, a voltage boosting unit for adjusting the voltage of the first battery into a charging voltage and then outputting, a first capacitor connected with the output end of the voltage boosting unit, a first communication unit having a first branch and a second branch for connecting with a charging end of a wireless earphone circuit, a first application processor for receiving data information sent by a terminal device and capable of outputting a control signal to the first communication unit, the control signal making one of the first branch and the second branch conductive and the other one non-conductive, and the output end of the voltage boosting unit outputting the charging voltage to the charging end through the conductive first branch, and the first application processor sending the data information to the wireless earphone circuit through the conductive second branch and the charging end. The charging box circuit of the application can communicate with the wireless earphone, and the communication delay is small and the communication speed is high.

Description

TECHNICAL FIELD

[0001] The present application relates to the earphone technical field, especially relates to a charging box and circuit thereof, wireless earphone charging system and communication method. BACKGROUND

[0002] Compared with wired earphones, wireless earphones have the advantages of convenient carrying and using, and therefore are more and more welcomed by people. With the continuous development of technology, it is inevitable to transmit data information to wireless earphones. The conventional scheme is inconvenient to transmit data to wireless earphones, or has large communication delay, which affects the communication speed. SUMMARY

[0003] The present application relates to the earphone technical field, especially relates to a charging box and circuit thereof, wireless earphone charging system and communication method.

[0004] In order to achieve the above-mentioned purpose, the present application provides a charging box circuit, which comprises: a first battery; a first charging management unit for charging management of the first battery; a voltage boosting unit for adjusting the voltage of the first battery to a charging voltage and then outputting; a first capacitor connected with the output end of the voltage boosting unit; a first communication unit having a first branch and a second branch for connecting with a charging end of a wireless earphone circuit; a first application processor for receiving data information sent by a terminal device, and capable of outputting a control signal to the first communication unit, the control signal making one of the first branch and the second branch conductive and the other one non-conductive, when the first branch is conductive, the output end of the voltage boosting unit outputs the charging voltage to the charging end through the first branch; when the second branch is conductive, the first application processor sends the data information to the wireless earphone circuit through the second branch and the charging end.

[0005] Optionally, the first branch comprises a first switch connected between the output end of the voltage boosting unit and the charging end; the second branch comprises a second switch connected between the first application processor and the charging end; the first communication unit further comprises a first inverter, the output end of the first inverter being connected with the first switch, and the input end of the first inverter and the second switch being used for receiving the control signal, the control signal making one of the first switch and the second switch closed and the other one opened.

[0006] Optionally, the first branch comprises a resistor and a first switch device, the second branch comprises a second switch device, the first communication unit further comprises a second inverter and a third switch device, an output terminal of the second inverter is connected with a control terminal of the third switch device, a second terminal of the third switch device is grounded, a first terminal of the third switch device and one terminal of the resistor are connected with a control terminal of the first switch device, the other terminal of the resistor and a first terminal of the first switch device are connected with an output terminal of the voltage boosting unit, a second terminal of the first switch device and a first terminal of the second switch device are connected with the charging terminal, a second terminal of the second switch device is connected with the first application processor, an input terminal of the second inverter and a control terminal of the second switch device are used for receiving the control signal, the control signal makes the third switch device and the first switch device conductive and makes the second switch device non-conductive; or, the control signal makes the third switch device and the first switch device non-conductive and makes the second switch device conductive.

[0007] Optionally, the first switch device is a PMOS transistor, a first terminal of the first switch device is a source of the PMOS transistor, a second terminal of the first switch device is a drain of the PMOS transistor, and a control terminal of the first switch device is a gate of the PMOS transistor; or the first switch device is a PNP transistor, a first terminal of the first switch device is an emitter of the PNP transistor, a second terminal of the first switch device is a collector of the PNP transistor, and a control terminal of the first switch device is a base of the PNP transistor; and / or, the third switch device and the second switch device are NMOS transistors, a first terminal of the third switch device and the second switch device is a drain of the NMOS transistor, a second terminal of the third switch device and the second switch device is a source of the NMOS transistor, and a control terminal of the third switch device and the second switch device is a gate; or the third switch device and the second switch device are NPN transistors, a first terminal of the third switch device and the second switch device is a collector of the NPN transistor, a second terminal of the third switch device and the second switch device is an emitter of the NPN transistor, and a control terminal of the third switch device and the second switch device is a base of the NPN transistor.

[0008] Optionally, the first application processor sends the data information to the wireless earphone circuit after converting the data information into a high-low level signal, a voltage value of the high-low level signal is less than a minimum charging voltage value required by the wireless earphone circuit for charging; and / or, the charging box circuit comprises a first memory, and the first application processor stores the received data information in the first memory.

[0009] The second aspect of the present application provides a charging case, which comprises the charging case circuit of the first aspect.

[0010] The third aspect of the present application provides a wireless earphone charging system, which comprises: a wireless earphone circuit; and the charging case circuit of the first aspect.

[0011] Optionally, the wireless earphone circuit comprises a second battery, a second charging management unit, a second application processor and a second memory, the second charging management unit is used for charging management of the second battery and has a charging end that is disconnectably connected with the charging case circuit, the second application processor is used for receiving data information sent by the charging case circuit through the charging end and storing the data information in the second memory; the wireless earphone circuit further comprises: a second capacitor connected with the charging end; or a second capacitor and a wireless communication unit, the second capacitor is connected with the charging end, and the wireless communication unit is used for communication with a terminal device.

[0012] Optionally, the wireless earphone circuit further comprises a second communication unit, which is used for adjusting a high-low level signal representing the data information sent by the charging case circuit to a high-low level signal suitable for the second application processor.

[0013] Optionally, the second communication unit comprises one of a comparator, a Schmitt trigger and a level shifting circuit.

[0014] The fourth aspect of the present application provides an earphone assembly, which comprises a wireless earphone and the charging case of the first aspect, the wireless earphone can be accommodated in the charging case, and the charging case can charge the wireless earphone.

[0015] The fifth aspect of the present application provides a wireless earphone communication method, which comprises: a first application processor of a charging case circuit outputs a control signal to a first communication unit of the charging case circuit, the control signal makes one of a first branch and a second branch of the first communication unit conductive and the other one of the first branch and the second branch of the first communication unit disconnected, a first capacitor of the charging case circuit is connected with an output end of a voltage boosting unit of the charging case circuit, wherein: when the first branch is conductive, the output end of the voltage boosting unit outputs a charging voltage to a charging end of a wireless earphone circuit through the first branch; and when the second branch is conductive, the first application processor outputs data information to the wireless earphone circuit through the second branch and the charging end.

[0016] Because of the existence of negative feedback loop in the boost unit, when charging voltage is output through the boost unit to charge the wireless earphone circuit, a large capacitor (specifically, a micro-farad level capacitor value, for example, 10 micro-farad) is needed to maintain the stable operation of the boost unit, and when the charging box circuit and the wireless earphone communicate, that is, data information is transmitted, the larger the capacitor, the greater the communication delay, which affects the communication speed. Therefore, the application sets a communication unit with two branches, and the first capacitor is connected to the output end of the boost unit. In this way, when the first application processor outputs a logic low level as a control signal to the first communication unit to make the first branch conductive and the second branch disconnected, the output end of the boost unit outputs charging voltage to the charging end through the first branch. Because of the existence of the first capacitor, the boost unit can work stably. When the first application processor outputs a logic high level as a control signal to the first communication unit to make the first branch disconnected and the second branch conductive, the first application processor can send data information to the wireless earphone circuit through the second branch and the charging end. Because the first capacitor is not connected to the second branch, the transmission of data information through the second branch will not be affected by the first capacitor, which can reduce the communication delay and improve the communication speed.

[0017] Other features and advantages of the present application will be described in detail in the following specific embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0019] Figure 1 It is a structure schematic diagram of a wireless earphone charging system;

[0020] Figure 2 It is a structure schematic diagram of a charging box circuit provided by the embodiment of the present application;

[0021] Figure 3 It is a structure schematic diagram of the first scheme of the first communication unit;

[0022] Figure 4 It is a structure schematic diagram of the second scheme of the first communication unit;

[0023] Figure 5 It is a structure schematic diagram of a wireless earphone charging system provided by the embodiment of the present application;

[0024] Figure 6 It is a structure schematic diagram of the first scheme of the second communication unit;

[0025] Figure 7 Structure diagram of a second scheme for a second communication unit;

[0026] Figure 8 Structure diagram of a third scheme for a second communication unit;

[0027] Figure 9 Flow chart of a wireless earphone communication method provided by an embodiment of the present application. DETAILED DESCRIPTION

[0028] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0029] It should be noted that the meaning of “connection / coupling” used in the present application includes direct connection between two or more circuit objects without any intervening circuit object, and also includes indirect connection between two or more circuit objects through one or more intervening circuit objects. For example, two circuit objects directly connected to each other are referred to as being “connected / coupled” to each other. Similarly, two circuit objects are also referred to as being “connected / coupled” to each other if one or more intervening circuit objects are connected between them.

[0030] Figure 1 Structure diagram of a wireless earphone charging system. The wireless earphone can be a true wireless stereo (TWS) earphone. As shown in FIG. 4, the wireless earphone charging system includes a wireless earphone 400 and a charging device 410. The wireless earphone 400 includes a first wireless earphone 400a and a second wireless earphone 400b. The first wireless earphone 400a and the second wireless earphone 400b are connected to each other through a first wireless earphone communication unit 420 and a second wireless earphone communication unit 430. Figure 1As shown, the charging system includes a first circuit 100 located in the TWS earbuds and a second circuit 200 located in the charging case. The first circuit 100 includes a first battery BAT1, a first charging management circuit 101, a setting module 102, an analog-to-digital converter (ADC) 103, and a radio frequency (RF) circuit 104. The first charging management circuit 101 charges the first battery BAT1, the setting module 102 sets the charging current of the first charging management circuit 101, the ADC 103 measures the charge level of the first battery BAT1, and the RF 104 receives audio signals. The second circuit 200 includes a second battery BAT2, a second charging tube circuit 201, and a boost circuit 202. The second charging tube circuit 201 charges the second battery BAT2. The boost circuit 202 boosts the voltage of the second battery BAT2 to a set voltage and outputs it to the charging terminal VCHG. The set voltage is, for example, 5V, meaning the voltage of VCHG is 5V. The first charging management circuit 101 in the TWS earphone charges the first battery BAT1 using this 5V voltage. The above charging system is inconvenient for transmitting data to the wireless earphone. Furthermore, other types of charging systems have significant communication delays when transmitting data to the wireless earphone, affecting communication speed.

[0031] In view of this, embodiments of this application provide a charging case and its circuit, a wireless earphone charging system and a communication method. The charging case circuit can communicate with the wireless earphone, which facilitates the transmission of data to the wireless earphone, and the communication latency is small and the communication speed is high.

[0032] Figure 2 This is a schematic diagram of a charging box circuit provided in an embodiment of this application. Figure 2As shown, the charging case circuit includes a first battery BAT1, a first charging management unit 11, a boost unit 12, a first capacitor C1, a first communication unit 13, and a first application processor 14. The first charging management unit 11 manages the charging of the first battery BAT1. The boost unit 12 adjusts the voltage of the first battery BAT1 to a charging voltage, for example, 5V, before outputting it. The first capacitor C1 is connected to the output terminal of the boost unit 12; specifically, one end of the first capacitor C1 can be connected to the output terminal of the boost unit 12, and the other end can be grounded. The first communication unit 13 has a first branch B1 and a second branch B2 for connecting to the charging terminal VCHG of the wireless earphone circuit. For example, the first branch B1 and the second branch B2 can be connected to the charging output terminal of the charging case circuit. During charging, the charging output terminal is connected to the charging terminal VCHG of the wireless earphone circuit, thereby connecting the first branch B1 and the second branch B2 to the charging terminal VCHG. The first application processor 14 receives data information sent by the terminal device and can output a control signal ComEN to the first communication unit 13. Furthermore, the charging case circuit may also include a first memory 15, in which the first application processor 14 stores the received data information. The control signal ComEN turns on one of the first branch B1 and the second branch B2 and turns off the other. When the first branch B1 is turned on, the output terminal of the boost unit 12 outputs the charging voltage to the charging terminal VCHG through the first branch B1; when the second branch B2 is turned on, the first application processor 14 sends the data information to the wireless earphone circuit through the second branch B2 and the charging terminal VCHG.

[0033] For example, the first application processor 14 can receive information from an external USB interface, which can be connected to a computer device. The external computer device can send software upgrade requests to the first application processor 14 via the USB interface, and the first application processor 14 then transmits the information to the TWS earphones via the first communication unit 13. Additionally, the first branch B1 can be coupled between the boost unit 12 and the charging output terminal, and the second branch B2 can be coupled between the communication terminal and the charging output terminal of the first application processor 14. As described above, the "charging output terminal" here refers to the end where the charging case circuit and the wireless earphone circuit connect to the charging terminal VCHG.

[0034] In this circuit, the first application processor 14 converts data information into high and low level signals and sends them to the wireless earphone circuit. If the voltage value of the high and low level signals is greater than the minimum charging voltage required for the wireless earphone circuit to charge, the wireless earphone circuit can utilize the high and low levels at the charging terminal VCHG for charging when the first application processor 14 sends data information represented by high and low level signals to the wireless earphone circuit through the charging terminal VCHG. To reduce power consumption, the voltage value of the high and low level signals can be less than the minimum charging voltage required for the wireless earphone circuit to charge. In this way, when the first application processor 14 sends data information represented by high and low level signals to the wireless earphone circuit through the charging terminal VCHG, the wireless earphone circuit will not utilize the high and low levels at the charging terminal VCHG for charging.

[0035] It should be noted that data information, such as upgrade program code or other programs, is generally binary numbers composed of 0s and 1s, and can consist of multiple binary digits, such as 8 bits, 16 bits, 32 bits, or 64 bits. Of course, data information can also include instructions, which can be encoded according to certain rules. Furthermore, digital signals can also be designed based on the pulse width of a time pulse; for example, a high-level time greater than a certain duration represents a binary digit 1, and a high-level time less than a certain duration represents a binary digit 0.

[0036] Because a negative feedback loop exists in the boost unit 12, when the wireless earphone circuit is charged by the charging voltage output from the boost unit 12, a large capacitor (specifically, a microfarad level capacitor, such as 10 microfarads) is required to maintain the stable operation of the boost unit 12. However, when the charging case circuit communicates with the wireless earphone, i.e., transmits data, a larger capacitor will lead to a larger communication delay, affecting the communication speed. Therefore, this application sets up a communication unit with two branches, and connects the first capacitor C1 to the output terminal of the boost unit 12. Thus, when the first application processor 14 outputs a logic low level as a control signal to the first communication unit 13, the first branch B1 is turned on and the second branch B1 is turned on. When the circuit is disconnected (e.g., when the first communication unit 12 outputs a charging voltage to the charging terminal VCHG via the first branch B1), the first application processor 14 can maintain stable operation of the boost unit 12 due to the presence of the first capacitor C1. When the first application processor 14 outputs a logic high level as a control signal to the first communication unit 13, causing the first branch B1 to disconnect and the second branch B2 to connect, the first application processor 14 can send data information to the wireless earphone circuit via the second branch B2 and the charging terminal VCHG. Since the first capacitor C1 is not connected to the second branch B2, the data information transmitted through the second branch B2 is not affected by the first capacitor C1, thus reducing communication latency and improving communication speed. In other words, the solution of this application can quickly burn or upgrade the software in the TWS earphones through the charging case, improving communication speed and reducing software upgrade time, thereby improving work efficiency.

[0037] The principle of this invention is time-division multiplexing of the charging terminal VCHG. Specifically, communication cannot be performed while charging is in progress, and vice versa. To improve communication speed, the capacitance of the VCHG node should be minimized as much as possible during communication, because a larger capacitance leads to greater communication delay and affects communication speed.

[0038] Figure 3 This is a schematic diagram of the first scheme for the first communication unit. (Example:) Figure 3 As shown, the first branch B1 includes a first switch S1 connected between the output of the boost unit 12 and the charging terminal VCHG; the second branch B2 includes a second switch S2 connected between the first application processor 14 and the charging terminal VCHG; the first communication unit 13 also includes a first inverter INV1, the output of which is connected to the first switch S1. The input of the first inverter INV1 and the second switch S2 are used to receive the control signal ComEN. The control signal ComEN causes one of the first switches S1 and the second switch S2 to close and the other to open. Specifically, when the control signal ComEN is high, the second switch S2 is closed and the first switch S1 is open, allowing digital information DA from the first application processor to be transmitted to the charging terminal VCHG, thereby enabling data transmission to the headphones, such as for software upgrades. When the control signal ComEN is low, the second switch S2 is open and the first switch S1 is closed, at which point the VBST signal is transmitted to the charging terminal VCHG. VBST is the output voltage of the boost unit 12, thus providing charging power to the headphones. In addition, the withstand voltage of switches S1 and S2 needs to be greater than or equal to the output voltage of boost unit 12. For example, if the output voltage of boost unit 12 is 5V, the withstand voltage of switches S1 and S2 needs to reach 5V or higher. The first communication unit 13 of this first scheme has a simple structure, which helps to reduce costs.

[0039] Figure 4 This is a schematic diagram of the second scheme for the first communication unit. (Example) Figure 4 As shown, the first branch B1 includes a resistor R and a first switching device such as MP1; the second branch B2 includes a second switching device such as MN2; and the first communication unit 13 also includes a second inverter INV2 and a third switching device such as MN1. The voltage withstand capability of MP1, MN1, and MN2 can withstand the output voltage of the boost unit 12. For example, if the output voltage of the boost unit 12 is 5V, the voltage withstand capability of these three transistors needs to reach 5V or higher.

[0040] In this circuit, the output terminal of the second inverter INV2 is connected to the control terminal of the third switching device, such as MN1. The second terminal of the third switching device, such as MN1, is grounded. The first terminal of the third switching device, such as MN1, and one end of the resistor R are connected to the control terminal of the first switching device, such as MP1. The other end of the resistor R and the first terminal of the first switching device, such as MP1, are connected to the output terminal (output voltage VBST) of the boost unit 12. The second terminal of the first switching device, such as MP1, and the first terminal of the second switching device, such as MN2, are connected to the charging terminal VCHG. The second terminal of the second switching device, such as MN2, is connected to the first application processor 14 (for outputting the digital signal DA). The input terminal of the second inverter INV2 and the control terminal of the second switching device, such as MN2, are used to receive the control signal ComEN. The control signal ComEN turns on the third switching device, such as MN1, and the first switching device, such as MP1, and turns off the second switching device, such as MN2; or, the control signal ComEN turns off the third switching device, such as MN1, and the first switching device, such as MP1, and turns on the second switching device, such as MN2.

[0041] Specifically, when the control signal ComEN is high, MN2 is turned on, and the DA signal is transmitted to the charging terminal VCHG. At this time, the first application processor 14 can transmit the upgrade software to the headset via the DA signal. When the control signal ComEN is low, the output of INV2 is high, MN1 is turned on, pulling the output of MP1 low to ground, and MP1 is turned on. At this time, the VBST voltage is delivered to VCHG, which can power the headset charging circuit. The function of the resistor R is to pull up the gate of MP1 to turn off MP1 when MN1 is not turned on. The first communication unit 13 of this second scheme can be easily implemented on the PCB board using discrete components.

[0042] In this configuration, the first switching device can be a PMOS transistor, with its first terminal serving as the source, its second terminal as the drain, and its control terminal as the gate. Alternatively, the first switching device can be a PNP transistor, with its first terminal serving as the emitter, its second terminal as the collector, and its control terminal as the base.

[0043] Alternatively, the third and second switching devices can be NMOS transistors, with their first terminals serving as the drain and second terminals as the source, and their control terminals serving as the gate. Or, the third and second switching devices can be NPN transistors, with their first terminals serving as the collector and second terminals as the emitter, and their control terminals serving as the base.

[0044] Furthermore, the present invention also provides a charging case, which includes the charging case circuit described above.

[0045] Figure 5 This is a schematic diagram of a wireless earphone charging system provided in an embodiment of this application. Figure 5 As shown, the wireless earphone charging system includes a wireless earphone circuit 2 and the aforementioned charging case circuit 1. The wireless earphone circuit 2 may include a second battery BAT2, a second charging management unit 21, a second application processor 22, a second memory 23, and a second capacitor C2. The second charging management unit 21 manages the charging of the second battery BAT2 and has a charging terminal VCHG that can be disconnected from the charging case circuit. The second capacitor C2 is connected to the charging terminal VCHG; specifically, one end of the second capacitor C2 can be connected to the charging terminal VCHG, and the other end can be grounded. The function of the second capacitor C2 is to resist the parasitic inductance effect on the connection line from the charging case to the earphone at the charging terminal VCHG. Parasitic inductance exists in the actual circuit connection; without the second capacitor C2, the actual circuit, such as the second charging management unit 21 in the earphone, may not function. Furthermore, the capacitance value of the second capacitor C2 should be as small as possible, generally less than 100nF. The second application processor 22 receives data information sent by the charging case circuit through the charging terminal VCHG and stores the data information in the second memory 23. Furthermore, the wireless earphone circuit 2 may also include a wireless communication unit 24, such as an RF module, for communicating with terminal devices such as mobile phones.

[0046] Furthermore, the wireless earphone circuit 2 may also include a second communication unit 25, which is used to adjust the high and low level signals representing data information sent by the charging case circuit to high and low level signals adapted to the requirements of the second application processor 22. The second communication unit 25 may include one of a comparator, a Schmitt trigger, and a level shifting circuit.

[0047] Figure 6 This is a schematic diagram of the first scheme for the second communication unit. (Example) Figure 6As shown, the second communication unit 25 includes a comparator com. The first input terminal of the comparator com receives the high and low level signals of the charging terminal VCHG. The second input terminal of the comparator com is connected to a reference voltage VREF. The reference voltage VREF is greater than the low level signal and less than the high level signal in the high and low level signals. When the first input terminal of the comparator com receives a high level signal, the output terminal of the comparator com outputs the power supply level of the comparator com. When the first input terminal of the comparator com receives a low level signal, the output terminal of the comparator outputs a zero level, thereby adjusting the high and low level signals representing data information sent by the charging box circuit to adapt to the high and low level signals required by the second application processor 22.

[0048] Figure 7 This is a schematic diagram of the second scheme for the second communication unit. (Example:) Figure 7 As shown, the second communication unit 25 includes a Schmitt trigger. The Schmitt trigger can be designed with a switching threshold voltage of 0.9V and 0.8V. That is, when the voltage at the input charging terminal VCHG is greater than 0.9V, its output DO is high; when the voltage at the input charging terminal VCHG is less than 0.8V, its output DO is low. This 0.1V difference between 0.9V and 0.8V is called the hysteresis voltage. The hysteresis voltage prevents the output signal from erroneously switching or fluctuating repeatedly near the switching threshold due to circuit noise or environmental noise. For example, when the charging terminal VCHG drops from, for example, 0.95V, if it is still greater than 0.8V, the output remains high until it falls below 0.8V, at which point it becomes low. Similarly, when the charging terminal VCHG rises from, for example, 0.6V, if it is still less than 0.9V, the output remains low until it rises above 0.9V, at which point it becomes high.

[0049] Figure 8 This is a schematic diagram of the third scheme for the second communication unit. (Example) Figure 8 As shown, the second communication unit 25 includes a level conversion circuit LS connected in series between the charging terminal VCHG and the second application processor 22 (which receives DATA). The level conversion circuit LS is used to adjust the high and low level signals received from the charging terminal VCHG to high and low level signals that meet the requirements of the second application processor 22.

[0050] In addition, the present invention also provides an earphone assembly, which includes wireless earphones and a charging case as described in the first aspect, wherein the wireless earphones can be stored in the charging case and the charging case can charge the wireless earphones.

[0051] Figure 9 This is a flowchart illustrating a wireless earphone communication method provided in an embodiment of this application. Figure 9As shown, the wireless earphone communication method includes the following steps:

[0052] In step S901, the first application processor of the charging box circuit outputs a control signal to the first communication unit of the charging box circuit. The control signal turns on one of the first branch and the second branch of the first communication unit and turns off the other. The first capacitor of the charging box circuit is connected to the output terminal of the boost unit of the charging box circuit.

[0053] In step S902, when the first branch is turned on, the output terminal of the boost unit outputs a charging voltage to the charging terminal of the wireless earphone circuit through the first branch.

[0054] In step S903, when the second branch is turned on, the first application processor outputs data information to the wireless earphone circuit through the second branch and the charging terminal.

[0055] In summary, this application provides a communication unit with two branches, and connects the first capacitor to the output terminal of the boost unit. When the first application processor outputs a logic low level as a control signal to the first communication unit, causing the first branch to conduct and the second branch to disconnect, the output terminal of the boost unit outputs a charging voltage to the charging terminal through the first branch. Due to the presence of the first capacitor, the boost unit can maintain stable operation. When the first application processor outputs a logic high level as a control signal to the first communication unit, causing the first branch to disconnect and the second branch to conduct, the first application processor can send data information to the wireless earphone circuit through the second branch and the charging terminal. Since the first capacitor is not connected to the second branch, data transmission through the second branch is not affected by the first capacitor, thus reducing communication latency and increasing communication speed.

[0056] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0057] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A charging box circuit, characterized in that, include: First battery; The first charging management unit is used to manage the charging of the first battery; A boost unit is used to adjust the voltage of the first battery to the charging voltage before outputting it. The first capacitor is connected to the output terminal of the boost unit; The first communication unit has a first branch and a second branch for connecting to the charging end of the wireless earphone circuit; A first application processor is configured to receive data information sent by a terminal device and output a control signal to the first communication unit. The control signal enables one of the first branch and the second branch to be turned on and the other to be turned off. When the first branch is turned on, the output terminal of the boost unit outputs the charging voltage to the charging terminal through the first branch. When the second branch is turned on, the first application processor sends the data information to the wireless earphone circuit through the second branch and the charging terminal. The first branch includes a resistor and a first switching device; the second branch includes a second switching device; and the first communication unit further includes a second inverter and a third switching device. The output terminal of the second inverter is connected to the control terminal of the third switching device. The second terminal of the third switching device is grounded. The first terminal of the third switching device and one end of the resistor are connected to the control terminal of the first switching device. The other end of the resistor and the first terminal of the first switching device are connected to the output terminal of the boost unit. The second terminal of the first switching device and the first terminal of the second switching device are connected to the charging terminal. The second terminal of the second switching device is connected to the first application processor. The input terminal of the second inverter and the control terminal of the second switching device are used to receive the control signal. The control signal turns on the third switching device and the first switching device and turns off the second switching device; or, the control signal turns off the third switching device and the first switching device and turns on the second switching device. The first switching device is a PMOS transistor, with its first terminal being the source of the PMOS transistor, its second terminal being the drain of the PMOS transistor, and its control terminal being the gate of the PMOS transistor; or the first switching device is a PNP transistor, with its first terminal being the emitter of the PNP transistor, its second terminal being the collector of the PNP transistor, and its control terminal being the base of the PNP transistor; and / or, The third and second switching devices are NMOS transistors, with their first terminals serving as the drain and their second terminals serving as the source and gate, respectively; or the third and second switching devices are NPN transistors, with their first terminals serving as the collector and their second terminals serving as the emitter and base, respectively. The first application processor converts the data information into high and low level signals and sends them to the wireless earphone circuit. The voltage values ​​of the high and low level signals are less than the minimum charging voltage required for the wireless earphone circuit to charge; and / or, The charging box circuit includes a first memory, in which the first application processor stores the received data information.

2. A charging case, characterized in that, Includes the charging box circuit as described in claim 1.

3. A wireless earphone charging system, characterized in that, include: Wireless earphone circuitry; and The charging box circuit according to claim 1.

4. The wireless earphone charging system according to claim 3, characterized in that, The wireless earphone circuit includes a second battery, a second charging management unit, a second application processor, and a second memory. The second charging management unit is used to manage the charging of the second battery and has a charging terminal that can be disconnected from the charging case circuit. The second application processor is used to receive data information sent by the charging case circuit through the charging terminal and store the data information in the second memory. The wireless earphone circuit also includes: The second capacitor is connected to the charging terminal; or, A second capacitor and a wireless communication unit are provided. The second capacitor is connected to the charging terminal, and the wireless communication unit is used to communicate with the terminal device.

5. The wireless earphone charging system according to claim 4, characterized in that, The wireless earphone circuit further includes a second communication unit, which is used to adjust the high and low level signals representing the data information sent by the charging case circuit to high and low level signals that meet the requirements of the second application processor.

6. The wireless earphone charging system according to claim 5, characterized in that, The second communication unit includes one of a comparator, a Schmitt trigger, and a level shifting circuit.

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