Display panel driving method and display panel

Abstract

The present invention discloses a driving method for a display panel and a display panel, and relates to the field of display technology. The display panel has a charging phase and a holding phase within a frame cycle, and the display panel driving method includes: charging the sub-pixels within the charging phase; and providing a holding signal to the data line within the holding phase, wherein the holding signal has an alternating high-level phase and a low-level phase. The present invention switches the voltage on the data line between a high level and a low level within the holding phase, thereby avoiding the sub-pixel capacitor from continuously leaking electricity to the data line, reducing the leakage of the sub-pixel thin-film transistor, and thus avoiding the problem of screen flickering at low refresh rates when the display panel enables the variable refresh rate function.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a driving method of a display panel and a display panel. Background Art

[0002] Currently, most monitors have a VRR (variable refresh rate) function, which allows the monitor to automatically adjust the refresh rate in real time to match the frame rate output by compatible game consoles and other image output devices, thereby avoiding display anomalies (such as screen tearing) caused by the mismatch between the frame rate output of the image output device and the monitor refresh rate.

[0003] However, when the display activates the VRR function, after switching from high frequency to low frequency, the sub-pixel voltage is maintained for a long time after charging within one frame time, which can easily cause leakage. For example, for a display with a resolution of 3840×2160, if its display frequency is 144Hz, the corresponding time to scan a row of sub-pixels is 3.08us. When the refresh frequency is 144Hz, the time of one frame is 6.9ms, and the sub-pixel voltage is maintained for approximately 6.9ms. However, when the refresh frequency is switched to 48Hz through VRR, the time of one frame is 20.8ms. The sub-pixel voltage needs to be maintained for approximately 14.18ms when the data voltage is in a low state (or high state), which is much longer than the 0.28ms of 144Hz. Due to the leakage of sub-pixels, the sub-pixel voltage of 48Hz is abnormal, which in turn causes flickering or other problems. Summary of the Invention

[0004] The main purpose of the present invention is to provide a display panel driving method and a display panel, aiming to solve the technical problem in the prior art that after the VRR function of the display panel is activated, when the refresh rate is low, sub-pixels have leakage, causing abnormalities such as screen flickering.

[0005] To achieve the above objectives, the present invention provides a method for driving a display panel. The display panel includes data lines, scan lines, and sub-pixels distributed in an array. Each sub-pixel is connected to the data lines and the scan lines, respectively. The display panel has a charging phase and a holding phase within a frame period. The holding phase begins after the charging phase ends. The method for driving the display panel includes:

[0006] charging the sub-pixels during the charging phase;

[0007] A holding signal is provided to the data line in the holding phase, and the holding signal has alternating high-level phases and low-level phases.

[0008] Optionally, before the step of providing a hold signal to the data line in the hold phase, the method further includes:

[0009] Determining whether the display panel meets the compensation conditions;

[0010] When the display panel meets the compensation condition, providing a holding signal to the data line in a holding phase is performed.

[0011] Optionally, the step of determining whether the display panel meets the compensation condition includes:

[0012] Determine the holding duration corresponding to the holding phase;

[0013] Compare the hold time with the set time;

[0014] When the holding time is greater than or equal to the set time, it is determined that the display panel meets the compensation condition;

[0015] When the holding time is less than the set time, it is determined that the display panel does not meet the compensation condition.

[0016] Optionally, the step of determining whether the display panel meets the compensation condition includes:

[0017] Compare the current refresh rate of the display panel with the set refresh rate;

[0018] When the current refresh rate is less than or equal to the set refresh rate, determining that the display panel meets the compensation condition;

[0019] When the current refresh rate is greater than the set refresh rate, it is determined that the display panel does not meet the compensation condition.

[0020] Optionally, the signal is maintained to switch between the high level phase and the low level phase according to the first frequency, and a data signal of the second frequency is applied to the data line during the charging phase, and the first frequency is less than or equal to the second frequency.

[0021] Optionally, before the step of providing a hold signal to the data line in the hold phase, the method further includes:

[0022] Determine the holding duration corresponding to the holding phase;

[0023] The first frequency is determined according to the preset leakage protection time and holding time, and the holding signal is generated according to the first frequency.

[0024] Optionally, the voltage of the signal in the high level phase is maintained to be greater than the charging voltage of the sub-pixel, and the voltage of the signal in the low level phase is maintained to be less than the charging voltage of the sub-pixel.

[0025] To achieve the above objectives, the present invention further provides a display panel, comprising a data driving circuit, a scan driving circuit, data lines, scan lines, and sub-pixels distributed in an array, wherein each sub-pixel is connected to the data line and the scan line, respectively. The data driving circuit is connected to the data line, and the scan driving circuit is connected to the scan line. The display panel has a charging phase and a holding phase within a frame period, and the holding phase begins after the charging phase ends.

[0026] A scan driver circuit for turning on sub-pixels row by row during the charging phase;

[0027] The data driving circuit is used to charge the sub-pixels in the charging phase and provide a holding signal to the data line in the holding phase. The holding signal has alternating high-level phases and low-level phases.

[0028] Optionally, the data driving circuit is further configured to provide a hold signal to the data line during a hold phase when the current refresh rate of the display panel is less than a set refresh rate.

[0029] Optionally, the data driving circuit is further configured to provide a data signal to the sub-pixel during the charging phase, and to keep the frequency of the signal lower than the frequency of the data signal.

[0030] In the present invention, a display panel has a charging phase and a holding phase within a frame cycle. During the charging phase, subpixels are charged; during the holding phase, a holding signal is provided to the data line, with the holding signal having alternating high and low phases. By switching the voltage on the data line between high and low levels during the holding phase, the present invention prevents continuous leakage of subpixel capacitance onto the data line, reduces leakage of the subpixel thin-film transistor, and thus avoids the problem of screen flickering that can occur at low refresh rates when the variable refresh rate function of the display panel is enabled. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. The drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0032] Figure 1 This is a schematic structural diagram of a sub-pixel structure of the present invention;

[0033] Figure 2 A schematic diagram of a sub-pixel driving method of the present invention;

[0034] Figure 3 Schematic diagram of a flow chart of a first embodiment of a method for driving a display panel according to the present invention;

[0035] Figure 4 Schematic diagram of the waveform of a signal applied to a data line according to an embodiment of the present invention;

[0036] Figure 5 1 is a flow chart of a second embodiment of a method for driving a display panel according to the present invention;

[0037] Figure 6 1 is a flow chart of a third embodiment of a display panel driving method according to the present invention;

[0038] Figure 7 1 is a flow chart of a fourth embodiment of a display panel driving method according to the present invention;

[0039] Figure 8 Schematic diagram of the waveform of a signal applied to a data line according to an embodiment of the present invention;

[0040] Figure 9 1 is a flow chart of a fifth embodiment of a display panel driving method according to the present invention;

[0041] Figure 10 The figure is a schematic structural diagram of a display panel according to the present invention.

[0042] Description of Figure Numbers:

[0043] Label name Label name 10 data cable 50 Data drive circuit 20 Scan Line 60 Scan drive circuit 30 sub-pixel 70 Timing controller 40 array substrate

[0044] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings and in conjunction with the embodiments. DETAILED DESCRIPTION

[0045] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0046] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0047] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0048] In addition, the descriptions of "first", "second", etc. in the present invention are for descriptive purposes only and should not be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0049] Example 1

[0050] Reference Figure 1 , Figure 1 FIG. 1 is a schematic diagram of a sub-pixel structure of the present invention. Figure 1 As shown, the display panel includes a plurality of vertically distributed data lines 10, a plurality of horizontally distributed scan lines 20, and sub-pixels 30 distributed in an array (only one sub-pixel is shown in the figure). Each sub-pixel 30 is connected to the data line 10 and the scan line 20, respectively. Depending on the display driving architecture of the display panel, the connection method of each sub-pixel 30 to the data line 10 and the scan line 20 is also different. In this embodiment, the sub-pixel 30 is connected to the source of the TFT (Thin Film Transistor), the drain of the TFT is connected to a data line 10, and the gate of the TFT is connected to a scan line 20. Each data line 10 is arranged between two adjacent columns of sub-pixels 30, and each scan line 20 is arranged between two adjacent rows of sub-pixels 30. Of course, the sub-pixel structure can also be other structures, and this embodiment is not limited to this.

[0051] When the display panel displays an image, a high voltage is applied to scan lines 20 row by row, turning on each row of subpixels. During the subpixel on-time, a data voltage is applied to data lines 10 to charge the subpixels 30, causing the corresponding capacitors to have a set voltage. After all subpixels have been scanned and charged, the liquid crystal molecules corresponding to each subpixel 30 in the panel exhibit a certain degree of deflection. Light has different transmittances when passing through the liquid crystal molecules. This, combined with the color resistance of the subpixels 30, creates different colors, resulting in a combination of multiple colors to produce the output image.

[0052] It should be noted that for display panels with VRR functions, the time it takes to scan a line is usually set according to the scanning time corresponding to the highest refresh rate. However, in actual operation, the display panel may operate at different refresh rates, resulting in different frame times.

[0053] Reference Figure 2 , Figure 2This is a schematic diagram of a sub-pixel driving method of the present invention. Take a display panel with a resolution of 3840×2160 and a maximum refresh rate of 144HZ as an example. The time it takes to scan a line in one frame is 3.08us. Figure 2 As shown, when the display panel operates at a refresh rate of 144HZ, the time of one frame is 6.9ms. After all sub-pixels are scanned, it takes another 0.28ms to end a frame. At this time, the voltage holding time of the first row of sub-pixels is approximately 6.9ms, and the voltage holding time of the last row of sub-pixels is approximately 0.28ms. However, when the display panel is switched to 48HZ through the VRR function, the time of one frame becomes 20.8ms. After all sub-pixels are scanned, it takes another 14.18ms to end a frame. At this time, the voltage holding time of the first row of sub-pixels is approximately 20.8ms, and the voltage holding time of the last row of sub-pixels is approximately 14.18ms. Continue to refer to Figure 1 After the sub-pixel 30 is charged, the scanning signal is turned off, and the sub-pixel capacitor maintains the sub-pixel voltage, that is, there is a voltage difference between the gate and source of the TFT. At this time, leakage will occur between the source and drain of the TFT (that is, leakage will occur between the sub-pixel capacitor and the data line 10). Whether the data line 10 is maintained at a low level or a high level, leakage will occur, causing the sub-pixel voltage to shift, and then causing flickering or other display abnormalities. Moreover, the longer the voltage of the sub-pixel is maintained, the more obvious the problem becomes. For example, when the above-mentioned display panel operates at 48HZ, the holding time of the sub-pixel reaches 14.18ms, which is prone to leakage.

[0054] Reference Figure 3 , Figure 3 FIG. 1 is a flow chart of the first embodiment of the display panel driving method of the present invention. Figure 3 As shown, in this embodiment, the display panel driving method includes:

[0055] Step S10: charging the sub-pixels in the charging phase.

[0056] It should be noted that the charging phase refers to the period of time during which all sub-pixels in the display panel are charged. The charging phase may start at the beginning of the current frame, or at the beginning of the scanning of the first row of sub-pixels in the current frame. The charging phase may end at the time when all sub-pixels have completed charging, or at the end of the scanning of the last row of sub-pixels in the current frame. Figure 2 Taking the sub-pixel driving method shown in FIG. as an example, the charging phase time is 6.9 ms. Moreover, the charging phase time is the same when the display panel operates at a refresh rate of 144 Hz and 48 Hz. The process of charging the sub-pixel can refer to the above.

[0057] Step S20: providing a holding signal to the data line in the holding phase, wherein the holding signal has alternating high level phases and low level phases.

[0058] It should be noted that the holding phase refers to the period of time during which the sub-pixels in the display panel maintain a charged voltage. The start time of the holding phase may be the end time of the charging phase, and the end time of the holding phase may be the end time of the current frame. Figure 2 Taking the sub-pixel driving method shown as an example, when the refresh rate of the display panel is 144 Hz, the holding phase time is 0.28 ms; when the refresh rate is 48 Hz, the holding phase time is 14.18 ms.

[0059] In this embodiment, when the display panel is in the hold phase, a hold signal that switches between high and low levels is applied to the data line. The level of the hold signal is high during the high-level phase and low during the low-level phase. Since TFTs may leak current, this embodiment switches the voltage on the data line between high and low levels to prevent the sub-pixel capacitor from continuously leaking to the data line, and can even switch the leakage current in the TFT in two directions. When the voltage on the data line is low, the leakage current can flow from the sub-pixel capacitor to the data line; when the voltage on the data line is high, the leakage current flowing from the sub-pixel capacitor to the data line is reduced, and the leakage current can even flow from the data line to the sub-pixel capacitor. In this way, the leakage of the sub-pixel capacitor can be reduced to a certain extent, and large voltage fluctuations of the sub-pixel capacitor can be avoided, thereby avoiding problems such as screen flickering in the display panel during the hold phase.

[0060] In specific implementation, the hold signal can switch between high level and low level at a certain frequency. Figure 4 , Figure 4 FIG. 1 is a waveform diagram of a signal applied to a data line according to an embodiment of the present invention. Figure 4 As shown, the data line switches between positive and negative throughout the entire period of a frame, and the signal components on the data line can be divided into a data signal and a hold signal. During the charging phase, a data signal is applied to the data line, and the specific voltage of the data signal is mainly determined by the image to be displayed in the current frame. During the hold phase, the specific voltage of the hold signal can be set as required. To prevent leakage of the sub-pixel TFT in one direction, the voltage of the hold signal during the high-level phase is greater than the sub-pixel charge voltage, and the voltage of the hold signal during the low-level phase is less than the sub-pixel charge voltage.

[0061] In this embodiment, the display panel has a charging stage and a holding stage within a frame period. The sub-pixels are charged during the charging stage, and a holding signal is provided to the data line during the holding stage. The holding signal has alternating high-level stages and low-level stages, thereby avoiding the sub-pixel capacitor from continuously leaking to the data line, reducing the leakage of the sub-pixel thin film transistor, and thus avoiding the problem of screen flickering at low refresh rates when the display panel enables the variable refresh rate function.

[0062] Example 2

[0063] Reference Figure 5 , Figure 5 FIG2 is a flow chart of a second embodiment of a display panel driving method according to the present invention. Based on the above embodiments, the present invention proposes a second embodiment of a display panel driving method.

[0064] In this embodiment, before step S20, the following steps may also be included:

[0065] Step S11: determining whether the display panel meets the compensation condition.

[0066] As can be seen from the foregoing, the leakage level of the sub-pixels in the display panel is related to the duration of the hold phase. The longer the hold phase, the higher the leakage level of the sub-pixels, and the more likely the screen will flicker. The shorter the hold phase, the lower the leakage level of the sub-pixels, and the less likely the screen will flicker. Considering the power consumption caused by the data line data hold signal, this embodiment first determines whether a hold signal needs to be provided to the data line. If the leakage level is low, the hold signal is not provided. If the leakage level is high, the hold signal is provided, thereby reducing the power consumption of the display panel. If the leakage level of the display panel is high, it is determined that the display panel meets the compensation conditions, and the aforementioned step S20 can be executed.

[0067] Reference Figure 6 , Figure 6 This is a flow chart of a third embodiment of the display panel driving method of the present invention. In a specific implementation, the process of determining whether the display panel meets the compensation condition may include: step S111: determining the hold time corresponding to the hold phase; step S112: comparing the hold time with a set time; step S113: determining that the display panel meets the compensation condition when the hold time is greater than or equal to the set time; and step S114: determining that the display panel does not meet the compensation condition when the hold time is less than the set time.

[0068] It is understood that the leakage level of the TFT is related to the hold duration corresponding to the hold phase. The longer the hold duration, the higher the leakage level, while the shorter the hold duration, the lower the leakage level. Therefore, the hold duration can be directly used to determine whether the display panel meets the compensation conditions.

[0069] The holding time can be calculated by combining the time of one frame and the time of the charging stage. Specifically, the holding time = one frame time - charging time; the charging time refers to the application of the charging stage. Among them, the set time can be set according to needs, such as 1ms or 2ms. If the display panel is held for less than the set time within one frame time, it is not necessary to provide a holding signal during the holding stage, and it is determined that the display panel does not meet the compensation conditions; if the display panel is held for greater than or equal to the set time within one frame time, it is necessary to provide a holding signal during the holding stage, and it is determined that the display panel meets the compensation conditions.

[0070] Reference Figure 7 , Figure 7 This is a flow chart of a fourth embodiment of the display panel driving method of the present invention. To conserve computing resources and improve panel response speed, in a specific implementation, the process of determining whether the display panel meets the compensation condition may further include: step S115: comparing the current refresh rate of the display panel with a set refresh rate; step S116: determining that the display panel meets the compensation condition when the current refresh rate is less than or equal to the set refresh rate; and step S117: determining that the display panel does not meet the compensation condition when the current refresh rate is greater than the set refresh rate.

[0071] It is understandable that, since the display panel does not change when the VRR function is enabled, the duration of the charging phase does not change. The lower the refresh rate, the longer the time of one frame, which also leads to a longer hold phase. For ease of control, it is possible to directly determine whether it is necessary to provide a hold signal to the data line during the hold phase by adjusting the refresh rate. For example, the refresh rate can be set to 90HZ. When the current refresh rate of the display panel is less than 90HZ, such as 60HZ, the display panel is judged to meet the compensation conditions. When the current refresh rate of the display panel is less than 90HZ, such as 120HZ, the display panel is judged to not meet the compensation conditions. Of course, the refresh rate can also be set to other values, which is not limited in this embodiment.

[0072] In this embodiment, in order to further reduce the power consumption of the display panel, the hold signal may have a lower frequency. Figure 8 , Figure 8 FIG. 1 is a waveform diagram of a signal applied to a data line according to an embodiment of the present invention. Figure 8 As shown in FIG, when the refresh rate of the display panel is 48 Hz, the frequency of the hold signal is much lower than the frequency of the data signal. As the switching frequency of the hold signal is reduced, the time for providing a high level to the data line is also reduced, thereby reducing the power consumption of the display panel.

[0073] It's understandable that the lower the hold signal frequency, the longer the sub-pixel voltage remains at a certain data signal level. Therefore, even if the hold signal frequency is too low, it may still cause the display panel to flicker. Therefore, it's important to properly determine the hold signal frequency.

[0074] Reference Figure 9 , Figure 9 This is a flow chart of a fifth embodiment of the display panel driving method of the present invention. In a specific implementation, the method may further include, before step S20, the following steps: step S12: determining a hold duration corresponding to the hold phase; step S13: then determining a first frequency based on the preset leakage protection duration and the hold duration, and generating a hold signal based on the first frequency.

[0075] It should be noted that the leakage protection duration refers to the maximum time the data signal remains at a certain level to prevent leakage. The determined first frequency must ensure that the time the signal maintains a certain level is less than the leakage protection duration. This can prevent leakage caused by maintaining a signal frequency that is too low.

[0076] Continue to refer to Figure 8 The display panel does not provide a hold signal at 144 Hz. In this embodiment, the hold signal may not be provided when the display panel is at a high refresh rate, but may be provided when the display panel is at a low refresh rate. The hold signal frequency at the low refresh rate is lower. This can significantly reduce the power consumption of the display panel and also help avoid the problem of display panel screen flicker.

[0077] In this embodiment, by judging whether the display panel meets the compensation conditions, it is determined whether to provide a hold signal based on the actual driving condition of the display panel. The hold signal is only provided when the display panel is prone to flickering, which is beneficial to reducing the power consumption of the display panel.

[0078] Example 3

[0079] Reference Figure 10 , Figure 10 The figure is a schematic structural diagram of a display panel of the present invention. To achieve the above-mentioned object, the present invention further provides a display panel.

[0080] In this embodiment, the display panel includes an array substrate 40, a data driver circuit 50, a scan driver circuit 60, and a timing controller 70. The array substrate 40 is provided with a plurality of sub-pixels 30 arranged in an array along scan lines 10 and data lines 20. Each sub-pixel 30 is connected to a data line 10 and a scan line 20, respectively. The data driver circuit 50 is connected to the data line 10, the scan driver circuit 60 is connected to the scan line 20, and the timing controller 70 is connected to the data driver circuit 50 and the scan driver circuit 60, respectively. The display panel has a charging phase and a holding phase within a frame cycle, with the holding phase beginning after the charging phase ends. The scan driver circuit 60 is configured to enable the sub-pixels 30 row by row during the charging phase. The data driver circuit 50 is configured to charge the sub-pixels 30 during the charging phase and provide a holding signal to the data line 10 during the holding phase. The holding signal has alternating high and low phases.

[0081] It should be noted that the charging phase refers to the period of time during which all sub-pixels in the display panel are charged. The charging phase may start at the start of the current frame, or at the start of scanning the first row of sub-pixels in the current frame. The charging phase may end at the time when all sub-pixels have completed charging, or at the end of scanning the last row of sub-pixels in the current frame. The holding phase refers to the period of time during which the sub-pixels in the display panel maintain a charged voltage. The holding phase may start at the end of the charging phase, and the holding phase may end at the end of the current frame.

[0082] During the charging phase, the timing controller 70 generates control signals based on the received current frame image to drive the data driver circuit 50 and the scan driver circuit 60. The scan driver circuit 60 transmits scan signals to the scan lines 20 row by row, turning on each sub-pixel 30 row by row. The data driver circuit 50 provides data signals to the data lines 10 to charge the sub-pixels 30 when they are turned on. During the hold phase, the timing controller 70 controls the scan driver circuit 60 to stop outputting signals and drives the data driver circuit 50 to provide hold signals to the data lines 10.

[0083] Because TFTs can leak current, this embodiment switches the voltage on the data line between high and low levels to prevent the sub-pixel capacitor from continuously leaking into the data line. It can even switch the leakage current in the TFT in both directions. When the voltage on the data line is low, the leakage current can flow from the sub-pixel capacitor to the data line. When the voltage on the data line is high, the leakage current flowing from the sub-pixel capacitor to the data line is reduced, and the leakage current can even flow from the data line to the sub-pixel capacitor. This can reduce the leakage of the sub-pixel capacitor to a certain extent, avoid large voltage fluctuations on the sub-pixel capacitor, and thus prevent problems such as screen flickering in the display panel during the hold phase.

[0084] In this embodiment, to reduce power consumption of the display panel, the data driving circuit 50 is further configured to provide a hold signal to the data line in the hold phase when the current refresh rate of the display panel is lower than the set refresh rate.

[0085] It is understandable that the lower the refresh rate, the longer the frame time, which leads to a longer hold phase; the longer the hold phase, the higher the leakage of the sub-pixel, and the more likely it is to cause screen flicker. On the contrary, screen flicker is less likely to occur. Therefore, only providing a hold signal when the refresh rate of the display panel is low can avoid screen flicker while reducing the power consumption of the display panel. Among them, the specific value of the refresh rate can be set according to needs and is not limited in this embodiment.

[0086] In this embodiment, to further reduce the power consumption of the display panel, the data driver circuit 50 is further configured to provide data signals to the sub-pixels during the charging phase, with the frequency of the hold signal being lower than the frequency of the data signal. Since the switching frequency of the hold signal is reduced, the time during which the data line maintains a high level is also reduced, thereby reducing the power consumption of the display panel.

[0087] In this embodiment, the display panel has a charging stage and a holding stage within a frame period. The scanning drive circuit 60 is used to turn on the sub-pixels 30 row by row during the charging stage; the data drive circuit 50 is used to charge the sub-pixels 30 during the charging stage and provide a holding signal to the data line 10 during the holding stage. The holding signal has alternating high-level stages and low-level stages, thereby avoiding the sub-pixel capacitor from continuously leaking to the data line, reducing the leakage of the sub-pixel thin film transistor, and thus avoiding the problem of screen flickering at low refresh rates when the display panel enables the variable refresh rate function.

[0088] Other embodiments or specific implementations of the display panel of the present invention can refer to the above-mentioned method embodiments, and therefore at least have all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be repeated here.

[0089] The above are only preferred embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A method for driving a display panel, wherein the display panel comprises data lines, scan lines, and sub-pixels arranged in an array, wherein each sub-pixel is connected to the data lines and the scan lines, respectively, wherein: The display panel has a charging phase and a holding phase within a frame period, wherein the holding phase begins after the charging phase ends. The driving method of the display panel includes: charging the sub-pixel in the charging phase; providing a holding signal for the data line in the holding phase, wherein the holding signal has alternating high level phases and low level phases; The holding signal switches between the high level phase and the low level phase according to a first frequency, a data signal of a second frequency is applied to the data line during the charging phase, and the first frequency is less than or equal to the second frequency; Before the step of providing a holding signal to the data line in the holding phase, the method further comprises: Determining a holding time corresponding to the holding phase; The first frequency is determined according to a preset leakage protection duration and the holding duration, and a holding signal is generated according to the first frequency. The duration of maintaining the level in the holding signal of the first frequency is shorter than the leakage protection duration.

2. The method for driving a display panel according to claim 1, wherein: Before the step of providing a holding signal to the data line in the holding phase, the method further comprises: determining whether the display panel meets a compensation condition; When the display panel meets the compensation condition, providing a holding signal to the data line in the holding phase is performed.

3. The method for driving a display panel according to claim 2, wherein: The step of determining whether the display panel meets the compensation condition includes: Determining a holding time corresponding to the holding phase; Comparing the holding time with a set time; When the holding time is greater than or equal to the set time, determining that the display panel meets the compensation condition; When the holding time is shorter than the set time, it is determined that the display panel does not meet the compensation condition.

4. The method for driving a display panel according to claim 2, wherein: The step of determining whether the display panel meets the compensation condition includes: comparing a current refresh rate of the display panel with a set refresh rate; When the current refresh rate is less than or equal to the set refresh rate, determining that the display panel meets the compensation condition; When the current refresh rate is greater than the set refresh rate, it is determined that the display panel does not meet the compensation condition.

5. The method for driving a display panel according to any one of claims 1 to 4, wherein: The voltage of the holding signal in the high level phase is greater than the charging voltage of the sub-pixel, and the voltage of the holding signal in the low level phase is less than the charging voltage of the sub-pixel.

6. A display panel comprising a data driving circuit, a scan driving circuit, data lines, scan lines, and sub-pixels arranged in an array, each sub-pixel being connected to the data line and the scan line, respectively; the data driving circuit being connected to the data line; and the scan driving circuit being connected to the scan line, wherein: The display panel has a charging phase and a holding phase within a frame period, wherein the holding phase begins after the charging phase ends. The scan driving circuit is configured to turn on the sub-pixels row by row during the charging phase; The data driving circuit is configured to charge the sub-pixels in the charging phase and provide a holding signal to the data lines in the holding phase, wherein the holding signal has alternating high-level phases and low-level phases; The holding signal switches between the high level phase and the low level phase according to a first frequency, a data signal of a second frequency is applied to the data line during the charging phase, and the first frequency is less than or equal to the second frequency; The data driving circuit is further used to determine the holding time corresponding to the holding stage; The first frequency is determined according to a preset leakage protection duration and the holding duration, and a holding signal is generated according to the first frequency. The duration of maintaining the level in the holding signal of the first frequency is shorter than the leakage protection duration.

7. The display panel according to claim 6, wherein: The data driving circuit is further configured to provide the holding signal to the data line during the holding phase when the current refresh rate of the display panel is lower than a set refresh rate.

8. The display panel according to claim 7, wherein: The data driving circuit is further configured to provide a data signal to the sub-pixel during the charging phase, and the frequency of the holding signal is lower than the frequency of the data signal.

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