A method of self-diagnosis of an ATE test channel
By dividing the ATE test channel into odd and even channels and configuring different voltage parameters, and utilizing the channel's own functions for self-diagnosis, the complexity caused by external diagnostic boards is solved, and fast and convenient test channel fault detection is achieved.
Patent Information
- Application Number
- CN202210157357.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-02-21
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2042-02-21
AI Technical Summary
The existing self-diagnostic method for ATE test channels requires an external diagnostic board for signal loopback, which makes the diagnostic process complex and the transmit and receive loopback channels of different diagnostic boards may be inconsistent.
By dividing the test channels into odd and even channels and configuring different voltage parameters, the test channels themselves can transmit and receive data, enabling self-transmission and self-reception. Combined with the parameter settings of adjacent channels, this method can quickly detect whether there is a short circuit to ground or a short circuit in the channel.
It enables rapid self-diagnosis without the need for external devices, improves the diagnostic speed and efficiency of the test channel, and simplifies the diagnostic process.
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Figure CN114527422B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of ATE testing, specifically to a self-diagnostic method for an ATE testing channel. Background Technology
[0002] An ATE test chamber consists of several test boards, each with several test channels. These test channels require periodic diagnostics. Diagnostics typically require an external, independent diagnostic board to loop back the digital channels, with the TX channel sending a data stream and the RX channel receiving it. The board then determines whether the data streams sent by the TX and RX are consistent, thus diagnosing whether the board's basic signals and functions meet the requirements for subsequent testing.
[0003] The existing diagnostic methods described above have the following drawbacks:
[0004] 1. When performing self-diagnosis, an external diagnostic board must be connected to support the signal loopback requirement.
[0005] 2. The software needs to maintain the TX / RX connection relationship, and the transmit and receive loopback channels of different diagnostic boards may be inconsistent. Summary of the Invention
[0006] To address the aforementioned technical problems, this invention provides a self-diagnostic method for ATE test channels. This method eliminates the need for a diagnostic board as the receiving end, enabling rapid diagnosis of the basic signal transmission and reception functions of the test channel and effectively detecting short circuits and open circuits in adjacent test channels.
[0007] To achieve the above objectives, the present invention provides the following technical solution: a self-diagnostic method for an ATE test channel, comprising the following steps:
[0008] S01: After sorting the test channels, they are divided into odd-numbered test channels and even-numbered test channels. The input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of the odd-numbered test channels and even-numbered test channels are configured to be different.
[0009] S02: The transmitters of odd-numbered and even-numbered test channels simultaneously send the same data signal, and the receivers of each test channel receive the data signal sent by its transmitter, and determine whether the corresponding test channel is normal based on the received data signal.
[0010] Furthermore, the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL are all equal for all odd-numbered test channels; and the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL are all equal for all even-numbered test channels.
[0011] Furthermore, in step S02, if the data signals received by the odd-numbered test channel and the even-numbered test channel are equal to the transmitted data signals, then the odd-numbered test channel and the even-numbered test channel are normal.
[0012] Furthermore, the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of the odd-numbered test channels are correspondingly greater than those of the even-numbered test channels.
[0013] Furthermore, if the data signal received by the adjacent odd-numbered test channel and / or even-numbered test channel is 0, then the corresponding odd-numbered test channel and / or even-numbered test channel is short-circuited to ground.
[0014] Furthermore, if the data signal received by the even-numbered test channel is higher than the data signal it transmits, then the adjacent odd-numbered test channel and even-numbered test channel are short-circuited.
[0015] Furthermore, the odd-numbered test channel has an input high-level voltage VIH of 3.5V, an input low-level voltage VIL of 2.5V, an output high-level voltage VOH of 2V, and an output low-level voltage VOL of 3V; the even-numbered test channel has an input high-level voltage VIH of 1.5V, an input low-level voltage VIL of 0V, an output high-level voltage VOH of 1V, and an output low-level voltage VOL of 0.5V.
[0016] Furthermore, the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of the adjacent odd-numbered test channels are greater than those of the even-numbered test channels.
[0017] Furthermore, if the data signal received by the odd-numbered test channel and / or the even-numbered test channel is 0, then the corresponding odd-numbered test channel and / or the even-numbered test channel is short-circuited to ground.
[0018] Furthermore, if the data signal received by the odd-numbered test channel is higher than the data signal transmitted, then the adjacent odd-numbered test channels and even-numbered test channels are short-circuited.
[0019] The present invention has the following beneficial effects: Compared with the existing technology that requires a diagnostic board to diagnose the test channel, this application utilizes the transmission and reception functions of the test channel itself to achieve self-transmission and self-reception. With different parameter settings of adjacent test channels, it can quickly detect whether the test channel has a short circuit to ground, short circuit, or other problems. This application can quickly realize the self-diagnosis of the test channel, and the diagnosis method is simple and fast, without relying on external equipment, which greatly improves the diagnosis speed and efficiency of the test channel. Attached Figure Description
[0020] Appendix Figure 1 This is a flowchart of the self-diagnosis method for the test channel of the present invention;
[0021] Appendix Figure 2 This is the internal circuit diagram of the test channel of the present invention. Detailed Implementation
[0022] To provide a clearer understanding of the technical features, objectives, and effects of this invention, specific embodiments are now described in detail with reference to the accompanying drawings. In the following description, it should be understood that the orientations or positional relationships indicated by terms such as "front," "rear," "upper," "lower," "left," "right," "longitudinal," "horizontal," "vertical," "horizontal," "top," "bottom," "inner," "outer," "head," and "tail" are based on the orientations or positional relationships shown in the accompanying drawings, and are constructed and operated in a specific orientation. They are only for the convenience of describing this technical solution and do not indicate that the device or element referred to must have a specific orientation; therefore, they should not be construed as limitations on this invention.
[0023] It should also be noted that, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "linking," "fixing," and "setting" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. When an component is referred to as being "on" or "below" another component, the component can be located "directly" or "indirectly" on the other component, or there may be one or more intermediary components. The terms "first," "second," "third," etc., are only for the convenience of describing this technical solution and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," "third," etc., may explicitly or implicitly include one or more of that feature. For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances.
[0024] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.
[0025] An ATE testing machine includes multiple test boards, each containing several test channels. Each test channel requires diagnostics before normal use to ensure proper connections. This application aims to provide a simple and rapid method for diagnosing test channels, which can be implemented without relying on a diagnostic board. The internal circuitry of a test channel specifically includes a comparator circuit, a driver circuit, a load circuit, an input interface, and an output interface. The output interface is located within the driver circuit, which is connected to the workpiece under test, as shown in the attached diagram. Figure 2 As shown.
[0026] This application provides a self-diagnostic method for an ATE test channel, comprising the following steps:
[0027] S01: After sorting the test channels, they are divided into odd-numbered test channels and even-numbered test channels. The input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL are configured differently for odd-numbered and even-numbered test channels. VIH represents the minimum positive voltage applied to the device input, which the device will accept as a logic high. VIL represents the maximum positive voltage applied to the device input, which the device will accept as a logic low. VOL represents the maximum positive voltage output by the device, defined as "guaranteeing" a maximum positive low level above a specified load current. VOH represents the minimum positive voltage output by the device, defined as "guaranteeing" a minimum positive high level above a specified load current. The input interfaces include interfaces corresponding to the input high-level voltage VIH and the input low-level voltage VIL, and the output interfaces include interfaces corresponding to the output high-level voltage VOH and the output low-level voltage VOL.
[0028] S02: The transmitters of the odd-numbered and even-numbered test channels simultaneously transmit the same data signal, and the receivers of each test channel receive the data signal transmitted by its transmitter. The normality of the corresponding test channel is determined based on the received data signal. If the received data signal of the odd-numbered and even-numbered test channels equals the transmitted data signal, then the odd-numbered and even-numbered test channels are normal. If the received data signal of an adjacent odd-numbered and / or even-numbered test channel is 0, then the corresponding odd-numbered and / or even-numbered test channel is short-circuited to ground. If the received data signal of an adjacent odd-numbered and / or even-numbered test channel is greater than its transmitted data signal, then the adjacent odd-numbered and / or even-numbered test channels are short-circuited.
[0029] Preferably, in this application, the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of all odd-numbered test channels on the same test board are equal; the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of all even-numbered test channels are equal. This facilitates the data setting of the test channels and allows all test channels to be tested simultaneously.
[0030] Specifically, the parameter configurations for odd-numbered test channels and / or even-numbered test channels can be divided into the following two cases:
[0031] (1) The input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH and output low-level voltage VOL of the odd-numbered test channels are greater than the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH and output low-level voltage VOL of the even-numbered test channels.
[0032] (2) The input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH and output low-level voltage VOL of adjacent odd-numbered test channels are greater than the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH and output low-level voltage VOL of even-numbered test channels.
[0033] Example 1
[0034] This application provides a self-diagnostic method for an ATE test channel, comprising the following steps:
[0035] S01: After sorting the test channels, divide them into odd-numbered test channels and even-numbered test channels. Set the input high-level voltage VIH of the odd-numbered test channels to 3.5V, the input low-level voltage VIL to 2.5V, the output high-level voltage VOH to 2V, and the output low-level voltage VOL to 3V; set the input high-level voltage VIH of the even-numbered test channels to 1.5V, the input low-level voltage VIL to 0V, the output high-level voltage VOH to 1V, and the output low-level voltage VOL to 0.5V.
[0036] S02: The transmitters of the odd-numbered and even-numbered test channels simultaneously transmit the same data signal, and the receivers of each test channel receive the data signal transmitted by its transmitter. The normality of the corresponding test channel is determined based on the received data signal. If the received data signal of the odd-numbered and even-numbered test channels equals the transmitted data signal, then the odd-numbered and even-numbered test channels are normal. If the received data signal of an adjacent odd-numbered test channel and / or even-numbered test channel is 0, then the corresponding odd-numbered and / or even-numbered test channel is short-circuited to ground. If the received data signal of an even-numbered test channel is higher than its transmitted data signal, then the adjacent odd-numbered and even-numbered test channels are short-circuited.
[0037] Example 2
[0038] This application provides a self-diagnostic method for an ATE test channel, comprising the following steps:
[0039] S01: After sorting the test channels, divide them into odd-numbered test channels and even-numbered test channels. Set the input high-level voltage VIH of the even-numbered test channels to 3.5V, the input low-level voltage VIL to 2.5V, the output high-level voltage VOH to 2V, and the output low-level voltage VOL to 3V. Set the input high-level voltage VIH of the odd-numbered test channels to 1.5V, the input low-level voltage VIL to 0V, the output high-level voltage VOH to 1V, and the output low-level voltage VOL to 0.5V.
[0040] S02: The transmitters of the odd-numbered and even-numbered test channels simultaneously transmit the same data signal, and the receivers of each test channel receive the data signal transmitted by its transmitter. The normality of the corresponding test channel is determined based on the received data signal. If the received data signal of the odd-numbered and even-numbered test channels equals the transmitted data signal, then the odd-numbered and even-numbered test channels are normal. If the received data signal of an adjacent odd-numbered test channel and / or even-numbered test channel is 0, then the corresponding odd-numbered and / or even-numbered test channel is short-circuited to ground. If the received data signal of an odd-numbered test channel is higher than its transmitted data signal, then the adjacent odd-numbered and even-numbered test channels are short-circuited.
[0041] Compared to existing technologies that rely on diagnostic boards for test channel diagnosis, this application utilizes the built-in sending and receiving functions of the test channel itself to achieve self-sending and self-receiving. With different parameter settings for adjacent test channels, it can quickly detect whether the test channel has problems such as short circuits to ground or short circuits. This application can quickly achieve self-diagnosis of the test channel, and the diagnosis method is simple and fast, without relying on external equipment, which greatly improves the diagnostic speed and efficiency of the test channel.
[0042] It is understood that the above embodiments only illustrate preferred embodiments of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can freely combine the above technical features without departing from the concept of the present invention, and can also make several modifications and improvements, all of which fall within the protection scope of the present invention. Therefore, all equivalent transformations and modifications made with respect to the scope of the claims of the present invention should fall within the scope of the claims of the present invention.
Claims
1. A self-diagnostic method for an ATE test channel, characterized in that, Includes the following steps: S01: After sorting the test channels, they are divided into odd-numbered test channels and even-numbered test channels. The input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of the odd-numbered test channels and even-numbered test channels are different. Moreover, the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of one group of channels are all higher than those of the other adjacent group of channels. S02: The transmitting end and receiving end of the same test channel are the same channel. The transmitting ends of odd-numbered test channels and even-numbered test channels send the same data signal at the same time, and the receiving end of each test channel receives the data signal sent by its transmitting end. The corresponding test channel is judged to be normal based on the received data signal. If the data signal received by the odd test channel and / or the even test channel is 0, then the corresponding odd test channel and / or even test channel is short-circuited to ground. If the data signal received by the odd-numbered test channel and / or the even-numbered test channel is greater than the data signal transmitted by it, then the odd-numbered test channel and / or the even-numbered test channel are short-circuited.
2. The self-diagnostic method for an ATE test channel according to claim 1, characterized in that, For all odd-numbered test channels, the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL are equal; for all even-numbered test channels, the input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL are equal.
3. The self-diagnostic method for an ATE test channel according to claim 1, characterized in that, In step S02, if the data signals received by the odd-numbered test channel and the even-numbered test channel are equal to the data signals transmitted, then the odd-numbered test channel and the even-numbered test channel are normal.
4. The self-diagnostic method for an ATE test channel according to claim 2, characterized in that, The input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of the odd-numbered test channels are greater than those of the even-numbered test channels.
5. The self-diagnostic method for an ATE test channel according to claim 4, characterized in that, If the data signal received by the even-numbered test channel is higher than the data signal it transmits, then the adjacent odd-numbered test channel and the even-numbered test channel are short-circuited.
6. The self-diagnostic method for an ATE test channel according to claim 1, characterized in that, The input high-level voltage VIH, input low-level voltage VIL, output high-level voltage VOH, and output low-level voltage VOL of the adjacent odd-numbered test channels are greater than those of the even-numbered test channels.
7. The self-diagnostic method for an ATE test channel according to claim 6, characterized in that, If the data signal received by the odd test channel and / or the even test channel is 0, then the corresponding odd test channel and / or the even test channel is short-circuited to ground.
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