Infrared light emitting diode epitaxial structure and preparation method thereof

By introducing a component-gradual stress release layer into the epitaxial structure of the infrared light emitting diode, it relieves stress, improves the polarization electric field and surface morphology, the problem of low luminous efficiency of infrared light emitting diodes is solved, and more efficient luminous efficiency and voltage reduction are achieved.

CN114551670BActive Publication Date: 2025-04-04XIAMEN SILAN ADVANCED COMPOUND SEMICON CO LTD
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Patent Information

Application Number
CN202210157090.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-02-21
Publication Date
2025-04-04
Estimated Expiration
2042-02-21

AI Technical Summary

Technical Problem

In the epitaxial structure of infrared light emitting diodes, the quantum restricted Stark effect caused by stress reduces the luminous efficiency.

Method used

Introducing a component-gradual stress release layer into the epitaxial structure of infrared light emitting diodes, relieving stress in the active layer and improving polarization electric field and surface morphology.

Benefits of technology

Through the introduction of a stress relief layer, the luminous efficiency of the infrared light emitting diode is improved and the voltage is effectively reduced.

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Abstract

The present invention provides an infrared light-emitting diode epitaxial structure and a preparation method thereof, wherein the infrared light-emitting diode epitaxial structure comprises, from bottom to top, a buffer layer located on a substrate, an etching stop layer, a first-type semiconductor layer, an active layer, a stress release layer and a second-type semiconductor layer, wherein the stress release layer is a structural layer with a gradient composition. The present invention can increase the luminous efficiency of the light-emitting diode and effectively reduce the voltage by inserting a stress release layer with a gradient composition between the active layer and the second-type semiconductor layer.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an infrared light emitting diode epitaxial structure and a preparation method thereof. Background Art

[0002] Light Emitting Diode (LED) is a semiconductor solid-state light-emitting device with the advantages of simple structure, light weight and no pollution. It has been widely used in digital, display, lighting and plant engineering and other fields. It is known as an environmentally friendly and energy-saving green lighting source and contains huge business opportunities. Among them, infrared light-emitting diode is an important light-emitting diode, which is widely used in remote control, vehicle sensing, closed-circuit television and other fields. The epitaxial structure of infrared light-emitting diode is the basic structure for preparing infrared light-emitting diode.

[0003] In the epitaxial structure of infrared light-emitting diodes, there is a piezoelectric field in the active layer (InGaAs / AlGaAs). This piezoelectric field is caused by the different lattice constants between InGaAs and AlGaAs. This phenomenon is usually called the quantum confined Stark effect. The Stark effect has a great negative effect on the luminous efficiency of light-emitting diodes. In the active layer structure, under the action of the built-in polarization electric field, the energy band of the semiconductor tilts, the electron-hole pairs are spatially separated, and the wave function overlap is reduced, which will cause the luminous efficiency to decrease and the luminous peak (absorption edge) to red shift and other undesirable phenomena.

[0004] Therefore, it is necessary to provide an infrared light emitting diode epitaxial structure and a preparation method thereof to improve the luminous efficiency of the infrared light emitting diode. Summary of the invention

[0005] The object of the present invention is to provide an infrared light emitting diode epitaxial structure and a preparation method thereof, so as to relieve stress in an active layer and improve the light emitting efficiency of the infrared light emitting diode.

[0006] In order to achieve the above-mentioned purpose and other related purposes, the present invention provides an infrared light-emitting diode epitaxial structure, which includes, from bottom to top: a buffer layer located on a substrate, a corrosion stop layer, a first-type semiconductor layer, an active layer, a stress release layer and a second-type semiconductor layer, wherein the stress release layer is a structural layer with a gradient composition.

[0007] Optionally, in the infrared light emitting diode epitaxial structure, the stress release layer includes a first structural layer and a second structural layer sequentially stacked on the active layer, the P component in the first structural layer is gradually changed, and the Al component in the second structural layer is gradually changed.

[0008] Optionally, in the infrared light-emitting diode epitaxial structure, the P component in the first structure layer decreases from the active layer to the second-type semiconductor layer; the Al component in the second structure layer decreases from the active layer to the second-type semiconductor layer.

[0009] Optionally, in the infrared light emitting diode epitaxial structure, the Al component in the first structural layer is fixed, and the Al component in the first structural layer is the same as the Al component in the second structural layer closest to the first structural layer.

[0010] Optionally, in the infrared light emitting diode epitaxial structure, the second-type semiconductor layer includes a second-type confinement layer, a second-type current spreading layer and a second-type ohmic contact layer stacked in sequence.

[0011] Optionally, in the infrared light emitting diode epitaxial structure, the Al component of the second type confinement layer is m, and the material of the first structural layer includes Al z Ga 1-z As 1-y P y , wherein 0≤y≤0.15, m≤z≤m+0.15, and the P composition range of the first structural layer closest to the active layer is 0.05-0.15.

[0012] Optionally, in the infrared light emitting diode epitaxial structure, the Al component of the second type confinement layer is m, and the second structural layer is Al x Ga 1-x As, where m≤x≤m+0.15.

[0013] Optionally, in the infrared light emitting diode epitaxial structure, the thickness of the first structural layer is 5 nm to 25 nm; the thickness of the second structural layer is 5 nm to 25 nm.

[0014] Optionally, in the infrared light emitting diode epitaxial structure, the stress release layer has a thickness of 10 nm to 50 nm.

[0015] Optionally, in the infrared light emitting diode epitaxial structure, the stress release layer is doped with C, and the doping concentration of C is 0.7E18cm -3 ~5E18cm -3 .

[0016] Optionally, in the infrared light emitting diode epitaxial structure, the first-type semiconductor layer includes a first-type ohmic contact layer, a first-type current spreading layer and a first-type confinement layer stacked in sequence.

[0017] Optionally, in the infrared light emitting diode epitaxial structure, the first-type semiconductor layer is an n-type semiconductor layer, and the second-type semiconductor layer is a p-type semiconductor layer.

[0018] In order to achieve the above-mentioned object and other related objects, the present invention also provides a method for preparing an infrared light-emitting diode epitaxial structure, comprising the following steps:

[0019] providing a substrate;

[0020] A buffer layer, a corrosion stop layer, a first type semiconductor layer, an active layer and a stress release layer are sequentially grown on the substrate, and the stress release layer is a structural layer with a gradient composition;

[0021] A second type semiconductor layer is grown on the stress release layer.

[0022] Optionally, in the method for preparing the infrared light-emitting diode epitaxial structure, the stress release layer includes a first structural layer and a second structural layer sequentially stacked on the active layer, the P component in the first structural layer is gradually changed, and the Al component in the second structural layer is gradually changed.

[0023] Optionally, in the method for preparing the infrared light-emitting diode epitaxial structure, the P component in the first structural layer decreases from the active layer to the second-type semiconductor layer; the Al component in the second structural layer decreases from the active layer to the second-type semiconductor layer.

[0024] Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the Al component in the first structural layer is fixed, and the Al component in the first structural layer is the same as the Al component in the second structural layer closest to the first structural layer.

[0025] Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the second-type semiconductor layer includes a second-type confinement layer, a second-type current spreading layer and a second-type ohmic contact layer stacked in sequence.

[0026] Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the Al component of the second type confinement layer is m, and the material of the first structural layer includes Al z Ga 1-z As 1-y P y , wherein 0≤y≤0.15, m≤z≤m+0.15, and the P composition range of the first structural layer closest to the active layer is 0.05-0.15.

[0027] Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the Al component of the second type confinement layer is m, and the second structural layer is Al x Ga 1-x As, where m≤x≤m+0.15.

[0028] Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the thickness of the first structural layer is 5 nm to 25 nm; the thickness of the second structural layer is 5 nm to 25 nm.

[0029] Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the thickness of the stress release layer is 10 nm to 50 nm.

[0030] Optionally, in the method for preparing the infrared light-emitting diode epitaxial structure, the stress release layer is doped with C, and the doping concentration of C is 0.7E18cm -3 ~5E18cm -3 .

[0031] Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the first-type semiconductor layer includes a first-type ohmic contact layer, a first-type current spreading layer and a first-type confinement layer stacked in sequence.

[0032] Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the first-type semiconductor layer is an n-type semiconductor layer, and the second-type semiconductor layer is a p-type semiconductor layer.

[0033] Optionally, in the method for preparing the infrared light-emitting diode epitaxial structure, the preparation process of the epitaxial structure is any one of a MOCVD process, a molecular beam epitaxy process, a HVPE process, a plasma-assisted chemical vapor deposition and a sputtering method.

[0034] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0035] The present invention adopts the method of adding a stress release layer with a gradient composition between the active layer and the second type semiconductor layer, which can relieve the stress in the active layer, improve the polarization electric field of the active layer, and improve the surface morphology of the active layer, thereby improving the luminous efficiency of the infrared light emitting diode. At the same time, the potential barrier of the stress release layer is gradually reduced, which can effectively reduce the voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a schematic structural diagram of an infrared light emitting diode epitaxial structure according to an embodiment of the present invention;

[0037] Figure 2 is a schematic structural diagram of a stress release layer according to an embodiment of the present invention;

[0038] Figure 3 is a flow chart of a method for preparing an infrared light emitting diode epitaxial structure according to an embodiment of the present invention;

[0039] Figures 1 to 3 middle,

[0040] 10-substrate, 201-buffer layer, 202-corrosion stop layer, 203-first type ohmic contact layer, 204-first type current spreading layer, 205-first type confinement layer, 206-active layer, 207-stress release layer, 2071-first structural layer, 2072-second structural layer, 208-second type confinement layer, 209-second type current spreading layer, 210-second type ohmic contact layer. DETAILED DESCRIPTION

[0041] The infrared light emitting diode epitaxial structure and the preparation method thereof proposed by the present invention are further described in detail below in combination with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0042] Before describing the embodiments of the present invention, the following contents are described in advance. First, in this specification, when it is simply marked as "GaInP", it means an arbitrary compound in which the chemical composition ratio of the sum of Ga and In to P is 1:1, and the ratio of Ga to In is not fixed. When it is simply marked as "AlGaAs", it means an arbitrary compound in which the chemical composition ratio of the sum of Al and Ga to As is 1:1, and the ratio of Al to Ga is not fixed. In addition, when it is simply marked as "InGaAs", it means an arbitrary compound in which the chemical composition ratio of the sum of Ga and In to As is 1:1, and the ratio of Ga to In is not fixed.

[0043] Figure 1 FIG. 1 is a schematic diagram of the structure of the infrared light emitting diode epitaxial structure of this embodiment. Figure 1 The infrared light emitting diode epitaxial structure includes, from bottom to top, a buffer layer 201 located on the substrate 10, an etching stop layer 202, a first type semiconductor layer, an active layer 206, a stress release layer 207 and a second type semiconductor layer.

[0044] The stress release layer 207 includes a first structure layer 2071 and a second structure layer 2072 sequentially stacked on the active layer 206, wherein the P (phosphorus) component in the first structure layer 2071 changes gradually, and the Al (aluminum) component in the second structure layer 2072 changes gradually. The P component in the first structure layer 2071 decreases along the growth direction of the first structure layer 2071 (from the active layer 206 to the second-type semiconductor layer); the Al component in the second structure layer 2072 decreases along the growth direction of the second structure layer 2072 (from the active layer 206 to the second-type semiconductor layer).

[0045] The first-type semiconductor layer includes, from bottom to top, a first-type ohmic contact layer 203 , a first-type current spreading layer 204 and a first-type confinement layer 205 .

[0046] The second-type semiconductor layer includes, from bottom to top, a second-type confinement layer 208 , a second-type current spreading layer 209 and a second-type ohmic contact layer 210 .

[0047] The polarity of the first-type semiconductor layer is opposite to that of the second-type semiconductor layer. For example, if the first-type semiconductor layer is an n-type semiconductor layer, the corresponding second-type semiconductor layer is a p-type semiconductor layer. Accordingly, the n-type semiconductor layer includes an n-type ohmic contact layer, an n-type current spreading layer, and an n-type limiting layer stacked in sequence. The p-type semiconductor layer includes a p-type limiting layer, a p-type current spreading layer, and a p-type ohmic contact layer stacked in sequence.

[0048] The method for preparing the infrared light emitting diode epitaxial structure specifically comprises the following steps:

[0049] Step S1: providing a substrate 10;

[0050] Step S2: sequentially growing a buffer layer 201, an etching stop layer 202, a first type semiconductor layer, an active layer 206 and a stress release layer 207 on the substrate 10, wherein the stress release layer 207 is a structural layer with a gradient composition;

[0051] Step S3: growing a second type semiconductor layer on the stress release layer 207 .

[0052] The preparation process of the infrared light emitting diode epitaxial structure is any one of metal organic chemical vapor deposition (MOCVD) process, molecular beam epitaxy (MBE) process or ultra-high vacuum chemical vapor deposition (UHVCVD), preferably MOCVD process. The following specific embodiments are described by taking MOCVD process as an example.

[0053] In step S1 , the substrate 10 is preferably a GaAs (gallium arsenide) substrate, and may also be a Si (silicon) substrate, but is not limited thereto.

[0054] In step S2, a buffer layer 201 is grown on the substrate 10. The buffer layer 201 eliminates the influence of the surface defects of the substrate 10 on the epitaxial structure of the infrared light-emitting diode to the greatest extent, reduces the defects and dislocations in the epitaxial structure of the infrared light-emitting diode, and provides a smooth interface for the next growth. The material of the buffer layer 201 is preferably GaAs, but not limited to this. The buffer layer 201 is doped with a first-type dopant, such as an n-type dopant, which can be at least one of silicon (Si) and tellurium (Te), but not limited to this. Furthermore, the first-type dopant is preferably Si.

[0055] The buffer layer 201 is preferably grown in a reaction chamber of a MOCVD growth furnace to grow a buffer layer 201 with a thickness of 100 nm to 300 nm. Preferably, the buffer layer 201 is grown with a thickness of 150 nm.

[0056] After the buffer layer 201 is grown, an etch stop layer 202 is grown on the buffer layer 201. The material of the etch stop layer 202 is preferably GaInP, but not limited thereto. The etch stop layer 202 is doped with a first-type dopant, such as an n-type dopant, which may be at least one of silicon (Si) and tellurium (Te), but not limited thereto. Further, the first-type dopant is preferably Si.

[0057] The corrosion stop layer 202 is preferably grown in a reaction chamber of a MOCVD growth furnace to grow a corrosion stop layer 202 with a thickness of 100 nm to 300 nm. Preferably, the corrosion stop layer 202 is grown with a thickness of 150 nm.

[0058] After the etching stop layer 202 is grown, a first-type semiconductor layer is grown on the etching stop layer 202. The first-type semiconductor layer includes a first-type ohmic contact layer 203, a first-type current spreading layer 204 and a first-type confinement layer 205 in order from bottom to top.

[0059] Therefore, after the etching stop layer 202 is grown, the first-type ohmic contact layer 203 is grown on the etching stop layer 202. The material of the first-type ohmic contact layer 203 can be InGaAs or GaAs, preferably GaAs, but not limited thereto. The first-type ohmic contact layer 201 is doped with a first-type dopant, such as an n-type dopant, which can be one of silicon (Si) and tellurium (Te), but not limited thereto. Further, the first-type dopant is preferably Si.

[0060] The first type ohmic contact layer 203 is preferably grown in a reaction chamber of a MOCVD growth furnace to grow the first type ohmic contact layer 203 with a thickness of 20 nm to 150 nm. Preferably, the first type ohmic contact layer 203 is grown with a thickness of 50 nm.

[0061] After the first-type ohmic contact layer 203 is grown, the first-type current spreading layer 204 is grown on the first-type ohmic contact layer 203. The material of the first-type current spreading layer 204 may be AlGaAs, but is not limited thereto. The first-type current spreading layer 204 is doped with a first-type dopant, such as an n-type dopant, which may be at least one of silicon (Si) and tellurium (Te), but is not limited thereto. Furthermore, the first-type dopant is preferably Si, and the doping concentration of Si is preferably 0.7E18cm -3 ~5E18cm -3 .

[0062] The first type current spreading layer 204 is preferably grown in a reaction chamber of a MOCVD growth furnace to have a thickness of 1.5 μm to 8 μm. Preferably, the first type current spreading layer 204 is grown to have a thickness of 6 μm.

[0063] After the first-type current spreading layer 204 is grown, the first-type confinement layer 205 is grown on the first-type current spreading layer 204. The material of the first-type confinement layer 205 is preferably AlGaAs, but not limited thereto. The first-type confinement layer 205 is doped with a first-type dopant, such as an n-type dopant, which may be at least one of silicon (Si) and tellurium (Te), but not limited thereto. Further, the first-type dopant is preferably Si.

[0064] The first type confinement layer 205 is preferably grown in a reaction chamber of a MOCVD growth furnace to grow a first type confinement layer 205 with a thickness of 200 nm to 1000 nm. Preferably, the first type confinement layer 205 is grown with a thickness of 500 nm.

[0065] After the first type confinement layer 205 is grown, an active layer 206 is grown on the first type confinement layer 205. The material of the active layer 206 is preferably InGaAs / AlGaAs, and is preferably a multi-quantum well structure, that is, the active layer 206 is preferably a periodic structure composed of quantum wells and quantum barriers, and the number of periods of the active layer 206 is preferably 6 to 30, that is, the active layer 206 preferably has 6 to 30 pairs of quantum wells and quantum barriers. The thickness of the active layer 206 is 50nm to 2000nm, preferably 900nm.

[0066] The active layer 206 is preferably grown in a reaction chamber of a MOCVD growth furnace for 6 to 30 periods of the active layer 206. For example, 12 periods of the active layer 206 are grown.

[0067] After the active layer 206 is grown, a stress release layer 207 is grown on the active layer 206. The stress release layer 207 includes a first structure layer 2071 and a second structure layer 2072 which are stacked in sequence.

[0068] The Al component of the second limiting layer 208 is m, and the material of the first structural layer 2071 is preferably Al z Ga 1- z As 1-y P y , wherein 0≤y≤0.15, m≤z≤m+0.15, and the initial value of the P component in the first structure layer 2071 (i.e., the P component at the first structure layer 2071 closest to the active layer 206) is preferably in the range of 0.05 to 0.15. The P component in the first structure layer 2071 decreases along the growth direction of the first structure layer 2071 (from the active layer 206 to the second-type semiconductor layer), for example, the P component in the first structure layer 2071 gradually changes from 0.05 to 0 along the growth direction of the first structure layer 2071. The Al component in the first structure layer 2071 is fixed, and the Al component in the first structure layer 2071 is preferably the same as the initial value of the Al component in the second structure layer 2072 (i.e., the value of the Al component at the second structure layer 2072 closest to the first structure layer 2071). For example, the Al composition in the first structure layer 2071 is 0.55, and the Al composition in the second structure layer 2072 gradually changes from 0.55 to 0.45 along the growth direction of the second structure layer 2072. The thickness of the first structure layer 2071 is preferably 5 nm to 25 nm.

[0069] The material of the quantum well in the active layer 206 is InGaAs, which has a larger lattice (relative to GaAs) and is rich in In, while the AlGaAsP of the first structural layer 2071 is rich in Ga, which can relieve the stress of the active layer 206 and improve the polarization electric field of the active layer 206, thereby achieving the purpose of effectively modulating the stress of the active layer 206, improving the surface morphology of the active layer 206, and improving the luminous efficiency of the light-emitting diode.

[0070] The thickness of the second structural layer 2072 is preferably 5 nm to 25 nm. The material of the second structural layer 2072 is preferably Al x Ga 1-xAs, where m≤x≤m+0.15. The Al component in the second structure layer 2072 decreases along the growth direction of the second structure layer 2072 (from the active layer 206 to the second-type semiconductor layer), for example, the Al component in the second structure layer 2072 gradually changes from z to m along the growth direction of the second structure layer 2072. For another example, the Al component in the second structure layer 2072 gradually changes from z to m+0.1 along the growth direction of the second structure layer 2072. Since the initial value of the Al component in the second structure layer 2072 is preferably the same as the Al component in the first structure layer 2071, the Al component in the second structure layer 2072 preferably gradually decreases from z along the growth direction of the second structure layer 2072, so that the potential barrier from the stress release layer 207 (specifically the second structure layer 2072) to the second-type confinement layer 208 is gradually reduced, which can effectively reduce the voltage.

[0071] The P component in the first structural layer 2071 is gradually changed in a manner including linear gradual change, nonlinear gradual change, or any combination thereof. The Al component in the second structural layer 2072 is gradually changed in a manner including linear gradual change, nonlinear gradual change, or any combination thereof. Specifically, the linear gradual change includes linear gradual change from high P component to no P component from the first structural layer 2071 to the second structural layer 2072; linear gradual change from high Al component to low Al component from the second structural layer 2072 to the second type restriction layer 208. Nonlinear gradual change may be, for example, gradual change first and then stable, or gradual change first and then stable and then gradual change, or parabolic gradual change, etc. In a preferred embodiment, the P component in the first structural layer 2071 decreases linearly to 0, and the Al component in the second structural layer 2072 decreases linearly from 0.55 to 0.45 from the second structural layer 2072 to the second type restriction layer 208.

[0072] The stress release layer 207 is doped with a second type dopant, such as a p-type dopant, which may be at least one of carbon (C), magnesium (Mg), and zinc (Zn), but is not limited thereto. Further, the second type dopant is preferably C, and the doping concentration of C is 0.7E18cm -3 ~5E18cm -3 The stress release layer 207 is preferably grown in a reaction chamber of a MOCVD growth furnace to grow a stress release layer 207 with a thickness of 10 nm to 50 nm. Preferably, the stress release layer 207 with a thickness of 20 nm is grown, including a first structure layer 2071 with a thickness of 10 nm and a second structure layer 2072 with a thickness of 10 nm.

[0073] A second type confinement layer 208 is grown on the stress release layer 207. The second type confinement layer 208 is used to provide holes. Moreover, the first type confinement layer 205 and the second type confinement layer 208 have two main functions as confinement layers. On the one hand, they limit minority carriers from overflowing the active layer 206 to improve the composite luminescence efficiency; on the other hand, they serve as an important window to make it very easy for photons emitted by the active layer 206 to pass through the confinement layer to improve the luminescence efficiency of the light-emitting diode.

[0074] The material of the second type confinement layer 208 is preferably Al m Ga 1-m As, but not limited thereto. The Al component of the second-type confinement layer 208 is m, and 0.85≥m≥0, and the specific value of m can be set according to the process requirements. The second-type confinement layer 208 is doped with a second-type dopant, such as a p-type dopant, which can be at least one of carbon (C), magnesium (Mg), and zinc (Zn), but not limited thereto. Further, the second-type dopant is preferably Mg.

[0075] The second type confinement layer 208 is preferably grown in a reaction chamber of a MOCVD growth furnace to grow a second type confinement layer 208 with a thickness of 200 nm to 1500 nm. Preferably, the second type confinement layer 208 is grown with a thickness of 600 nm.

[0076] After the second-type confinement layer 208 is grown, a second-type current spreading layer 209 is grown on the second-type confinement layer 208. The material of the second-type current spreading layer 209 is preferably AlGaAs, but not limited thereto. The second-type current spreading layer 209 is doped with a second-type dopant, such as a p-type dopant, which may be at least one of magnesium (Mg) and zinc (Zn), but not limited thereto. Further, the second-type dopant is preferably Mg.

[0077] The second type current spreading layer 209 is preferably grown in a reaction chamber of a MOCVD growth furnace to grow a second type current spreading layer 209 with a thickness of 200nm to 3000nm. Preferably, the second type current spreading layer 209 is grown with a thickness of 1200nm.

[0078] After the second-type current spreading layer 209 is grown, the second-type ohmic contact layer 210 is grown on the second-type current spreading layer 209. The second-type ohmic contact layer 210 is used to form an ohmic contact with a metal electrode. The material of the second-type ohmic contact layer 210 is preferably GaP, but not limited thereto. The second-type ohmic contact layer 210 may be doped with carbon (C).

[0079] The second type ohmic contact layer 210 is preferably grown in a reaction chamber of a MOCVD growth furnace to grow the second type ohmic contact layer 210 to a thickness of 20 nm to 100 nm. Preferably, the second type ohmic contact layer 210 is grown to a thickness of 50 nm.

[0080] The present invention can relieve stress in the active layer, improve the polarization electric field of the active layer, and improve the surface morphology of the active layer by adding a stress release layer between the active layer and the second type semiconductor layer, thereby improving the luminous efficiency of the light emitting diode. At the same time, the potential barrier of the stress release layer is gradually reduced, which can effectively reduce the voltage.

[0081] In addition, it is understood that although the present invention has been disclosed as a preferred embodiment, the above embodiment is not intended to limit the present invention. For any technician familiar with the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or modified into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

[0082] It should also be understood that the present invention is not limited to the specific methods, compounds, materials, manufacturing techniques, usages and applications described herein, which may vary. It should also be understood that the terms described herein are only used to describe specific embodiments, and are not used to limit the scope of the present invention. It must be noted that the singular forms "one", "a kind" and "the" used herein and in the appended claims include plural references unless the context clearly indicates the opposite meaning. Therefore, for example, a reference to "a step" means a reference to one or more steps, and may include secondary steps. All conjunctions used should be understood in the broadest sense. Therefore, the word "or" should be understood to have the definition of a logical "or", not a logical "exclusive or", unless the context clearly indicates the opposite meaning. The structure described herein will be understood to also quote the functional equivalent of the structure. Language that can be interpreted as approximate should be understood as such, unless the context clearly indicates the opposite meaning.

Claims

1. An infrared light emitting diode epitaxial structure, characterized in that: The infrared light-emitting diode epitaxial structure includes, from bottom to top, a buffer layer, a corrosion stop layer, a first-type semiconductor layer, an active layer, a stress release layer and a second-type semiconductor layer located on a substrate. The stress release layer includes a first structural layer and a second structural layer stacked on the active layer in sequence. The P component in the first structural layer is gradually changed, and the Al component in the second structural layer is gradually changed.

2. The infrared light emitting diode epitaxial structure according to claim 1, characterized in that: The P component in the first structure layer decreases from the active layer to the second-type semiconductor layer; The Al composition in the second structure layer decreases from the active layer toward the second-type semiconductor layer.

3. The infrared light emitting diode epitaxial structure according to claim 1, characterized in that: The Al composition in the first structural layer is fixed, and the Al composition in the first structural layer is the same as the Al composition in the second structural layer closest to the first structural layer.

4. The infrared light emitting diode epitaxial structure according to claim 1, characterized in that: The second-type semiconductor layer includes a second-type confinement layer, a second-type current spreading layer and a second-type ohmic contact layer which are stacked in sequence.

5. The infrared light emitting diode epitaxial structure according to claim 4, characterized in that: The Al component of the second type confinement layer is m, and the material of the first structural layer includes Al z Ga 1-z As 1-y P y , wherein 0≤y≤0.15, m≤z≤m+0.15, and the P composition range of the first structural layer closest to the active layer is 0.05-0.

15.

6. The infrared light emitting diode epitaxial structure according to claim 4, characterized in that: The Al component of the second type confinement layer is m, and the second structural layer is Al x Ga 1-x As, where m≤x≤m+0.

15.

7. The infrared light emitting diode epitaxial structure according to claim 1, characterized in that: The thickness of the first structural layer is 5 nm to 25 nm; the thickness of the second structural layer is 5 nm to 25 nm.

8. The infrared light emitting diode epitaxial structure according to claim 1, characterized in that: The thickness of the stress release layer is 10nm-50nm.

9. The infrared light emitting diode epitaxial structure according to claim 1, characterized in that: The stress release layer is doped with C, and the doping concentration of C is 0.7E18 cm -3 ~5E18 cm -3 .

10. The infrared light emitting diode epitaxial structure according to claim 1, characterized in that: The first-type semiconductor layer includes a first-type ohmic contact layer, a first-type current spreading layer and a first-type confinement layer which are stacked in sequence.

11. The infrared light emitting diode epitaxial structure according to claim 1, characterized in that: The first-type semiconductor layer is an n-type semiconductor layer, and the second-type semiconductor layer is a p-type semiconductor layer.

12. A method for preparing an infrared light emitting diode epitaxial structure, characterized in that: The following steps are involved: providing a substrate; A buffer layer, an etching stop layer, a first type semiconductor layer, an active layer and a stress release layer are sequentially grown on the substrate, wherein the stress release layer comprises a first structure layer and a second structure layer sequentially stacked on the active layer, wherein the P component in the first structure layer changes gradually, and the Al component in the second structure layer changes gradually; A second type semiconductor layer is grown on the stress release layer.

13. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The P component in the first structure layer decreases from the active layer to the second-type semiconductor layer; The Al composition in the second structure layer decreases from the active layer toward the second-type semiconductor layer.

14. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The Al composition in the first structural layer is fixed, and the Al composition in the first structural layer is the same as the Al composition in the second structural layer closest to the first structural layer.

15. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The second-type semiconductor layer includes a second-type confinement layer, a second-type current spreading layer and a second-type ohmic contact layer which are stacked in sequence.

16. The method for preparing an infrared light emitting diode epitaxial structure according to claim 15, characterized in that: The Al component of the second type confinement layer is m, and the material of the first structural layer includes Al z Ga 1-z As 1-y P y , wherein 0≤y≤0.15, m≤z≤m+0.15, and the P composition range of the first structural layer closest to the active layer is 0.05-0.

15.

17. The method for preparing an infrared light emitting diode epitaxial structure according to claim 15, characterized in that: The Al component of the second type confinement layer is m, and the second structural layer is Al x Ga 1-x As, where m≤x≤m+0.

15.

18. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The thickness of the first structural layer is 5 nm to 25 nm; the thickness of the second structural layer is 5 nm to 25 nm.

19. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The thickness of the stress release layer is 10nm-50nm.

20. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The stress release layer is doped with C, and the doping concentration of C is 0.7E18cm -3 ~5E18cm -3 .

21. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The first-type semiconductor layer includes a first-type ohmic contact layer, a first-type current spreading layer and a first-type confinement layer which are stacked in sequence.

22. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The first-type semiconductor layer is an n-type semiconductor layer, and the second-type semiconductor layer is a p-type semiconductor layer.

23. The method for preparing an infrared light emitting diode epitaxial structure according to claim 12, characterized in that: The preparation process of the epitaxial structure is any one of a MOCVD process, a molecular beam epitaxy process, a HVPE process, a plasma-assisted chemical vapor deposition and a sputtering method.

Citation Information

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