Back contact solar cell, manufacturing method thereof and photovoltaic module

Abstract

The invention relates to a back contact solar cell and a manufacturing method thereof, and a photovoltaic module, the back contact solar cell comprises a substrate, the back surface of the substrate comprises first doped regions and second doped regions, the first doped regions and the second doped regions are alternately arranged, and each of the first doped regions and the second doped regions comprises a first sub-region and a second sub-region; the first doped semiconductor layer is located on the corresponding first doped region; the second doped semiconductor layer is located on the corresponding second doped region; the transparent conducting layer comprises a plurality of first conducting parts and a plurality of second conducting parts, the first conducting parts are located on the side, away from the substrate, of the first doped semiconductor layer, and the second conducting parts are located on the side, away from the substrate, of the second doped semiconductor layer; the first anti-reflection layer comprises a plurality of first anti-reflection parts, and the first anti-reflection parts are arranged on the sides, away from the substrate, of the first doped semiconductor layer and the second doped semiconductor layer and located in the second sub-regions of the first doped region and the second doped region. The double-sided rate and the light utilization rate can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cell manufacturing, and in particular to a back-contact solar cell and a manufacturing method thereof, and a photovoltaic module. Background Art

[0002] IBC cell (Interdigitated Back Contact) refers to a back-contact solar cell structure in which the positive and negative metal electrodes are arranged in a finger-like manner on the backlight side of the cell, and its PN junction is located on the back of the cell. The back junction refers to the PN junction located on the back of the cell. IBC cells are based on single crystal silicon, and the PN junction and metal electrodes are located on the back of the cell. There is no metal electrode shading on the front, which can obtain higher short-circuit current and conversion efficiency. Summary of the invention

[0003] Based on this, it is necessary to provide a back-contact solar cell and its manufacturing method, and a photovoltaic module to address the problem that the bifaciality and light utilization efficiency of back-contact solar cells in the prior art need to be improved.

[0004] In a first aspect, the present application provides a back-contact solar cell, comprising:

[0005] A substrate having a front side and a back side disposed opposite to each other, wherein the back side comprises first doping regions and second doping regions arranged alternately, and each of the first doping regions and the second doping regions comprises a first sub-region and a second sub-region;

[0006] A first doped semiconductor layer, located on the corresponding first doped region, wherein the first doped semiconductor layer has a first doping element;

[0007] A second doped semiconductor layer is located on the corresponding second doped region, and the second doped semiconductor layer contains a second doping element having a conductivity type different from that of the first doping element;

[0008] a transparent conductive layer, comprising a plurality of first conductive portions and a plurality of second conductive portions, wherein the first conductive portion is located on a side of the first doped semiconductor layer away from the substrate and at least located in the first sub-region of the first doped region, and the second conductive portion is located on a side of the second doped semiconductor layer away from the substrate and at least located in the first sub-region of the second doped region;

[0009] A first electrode is located in the first sub-region of the first doping region and is located on a side of the first conductive portion away from the substrate;

[0010] a second electrode, located in the first sub-region of the second doping region and located on a side of the second conductive portion away from the substrate;

[0011] The first anti-reflection layer includes a plurality of first anti-reflection parts, wherein the first anti-reflection parts are arranged on a side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate and are located in the first doped region and the second sub-region of the second doped region.

[0012] In some embodiments, both the first conductive portion and the second conductive portion are disposed in contact with the adjacent first anti-reflection portion.

[0013] In some embodiments, the transparent conductive layer has a thickness of 60 nanometers to 90 nanometers; and / or,

[0014] The thickness of the first anti-reflection layer is 60 nanometers to 90 nanometers.

[0015] In some embodiments, the material of the transparent conductive layer includes: at least one of indium tin oxide, indium tungsten oxide, zinc aluminum oxide, titanium-doped indium oxide, and fluorine-doped tin oxide; and / or,

[0016] The material of the first anti-reflection layer includes at least one of silicon oxide, silicon nitride and silicon oxynitride.

[0017] In some embodiments, it further comprises:

[0018] A first tunneling layer, located between the substrate and the first doped semiconductor layer;

[0019] The first intrinsic amorphous silicon layer is located between the substrate and the second doped semiconductor layer.

[0020] In some embodiments, the first intrinsic amorphous silicon layer is in contact with the adjacent first doped semiconductor layer; and / or,

[0021] The first intrinsic amorphous silicon layer contacts the adjacent first tunneling layer.

[0022] In some embodiments, the thickness of the first tunneling layer is 0.5 nanometers to 2 nanometers; and / or,

[0023] The thickness of the first intrinsic amorphous silicon layer is 4 nanometers to 10 nanometers.

[0024] In a second aspect, the present application also provides a method for manufacturing a back-contact solar cell, comprising:

[0025] Providing a substrate, wherein the substrate has a front side and a back side disposed opposite to each other, the back side comprises first doping regions and second doping regions arranged alternately, and the first doping regions and the second doping regions each comprise a first sub-region and a second sub-region;

[0026] forming a first doped semiconductor layer in the first doped region, wherein the first doped semiconductor layer has a first doping element;

[0027] forming a second doped semiconductor layer in the second doped region, wherein the second doped semiconductor layer has a second doping element having a conductivity type different from that of the first doping element;

[0028] forming a transparent conductive layer on a side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate, the transparent conductive layer comprising a plurality of first conductive portions and a plurality of second conductive portions, the first conductive portion being located on a side of the first doped semiconductor layer away from the substrate and at least located in the first sub-region of the first doped region, and the second conductive portion being located on a side of the second doped semiconductor layer away from the substrate and at least located in the first sub-region of the second doped region;

[0029] forming a first electrode on a side of the first conductive portion away from the substrate;

[0030] forming a second electrode on a side of the second conductive portion away from the substrate;

[0031] A first anti-reflection layer is formed on a side of the first doped semiconductor layer and the second doped semiconductor layer facing away from the substrate, the first anti-reflection layer includes a plurality of first anti-reflection portions, the first anti-reflection portions are arranged on a side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate, and are located in the first doped region and the second sub-region of the second doped region.

[0032] In some embodiments, in the step of forming a first anti-reflection layer on the side of the first doped semiconductor layer and the second doped semiconductor layer facing away from the substrate, the first conductive portion and the second conductive portion are both disposed in contact with the adjacent first anti-reflection portion.

[0033] In a third aspect, the present application further provides a photovoltaic assembly, including:

[0034] A cell string, formed by connecting a plurality of back-contact solar cells as described in any one of the above or back-contact solar cells manufactured by any one of the above manufacturing methods;

[0035] A connecting component, used for electrically connecting two adjacent back-contact solar cells;

[0036] A packaging film, used to cover the surface of the battery string;

[0037] The cover plate is used to cover the surface of the packaging film facing away from the battery string.

[0038] In the embodiment of the present application, on the back side, the first doping region and the second doping region are respectively provided with the first conductive part and the second conductive part; on the back side, on the first doping region, on the second sub-region, the first doped semiconductor layer and the first anti-reflection part are sequentially stacked; on the back side, on the second doping region, on the second sub-region, the second doped semiconductor layer and the first anti-reflection part are sequentially stacked. That is, in the direction parallel to the plane where the substrate is located (in the thickness direction perpendicular to the substrate), the first anti-reflection part is at least located between the adjacent first conductive part and the second conductive part, which has many beneficial effects. On the one hand, in the direction parallel to the plane where the substrate is located, the blank gap between the first conductive part and the second conductive part is eliminated, and the first anti-reflection layer or the first anti-reflection part is used to reduce the reflection of the back side to the external light, thereby improving the utilization rate of the back side to the light, thereby improving the bifaciality of the solar cell. On the second hand, in the direction parallel to the plane where the substrate is located, the film layer of the transparent conductive layer between the first conductive part and the second conductive part is removed, for example, the film layer of the transparent conductive layer between the first conductive part and the second conductive part can be completely removed by an over-etching process. Although the high-energy particles deposited to form the transparent conductive layer will bombard the surface of the first doped region, etc., destroying the original film layer with a passivation effect (for example, destroying the film layer of the first doped semiconductor layer, for example, destroying the film layer of the first tunneling layer), the present application subsequently forms a first anti-reflection layer on the surface of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate. The hydrogen element and the like in the deposition process of the first anti-reflection layer can repair the destroyed passivation effect, and the hydrogen element and the like can repair the lattice defects in the film layer with a passivation effect, improve the crystal quality, and eliminate the influence of the passivation reduction caused by the high-energy particles in the deposition process of the transparent conductive layer, thereby improving the photoelectric conversion efficiency of the solar cell. On the third hand, the material of the first anti-reflection part is an insulating material, and at the same time, a short circuit between the first conductive part and the second conductive part can be avoided. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of the present application, the drawings required for use in the description of the embodiments or exemplary embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 A schematic diagram of a first cross-sectional structure of a solar cell provided in an embodiment of the present application.

[0041] Figure 2 A schematic diagram of a second cross-sectional structure of a solar cell provided in an embodiment of the present application.

[0042] Figure 3A schematic diagram of a third cross-sectional structure of a solar cell provided in an embodiment of the present application.

[0043] Figure 4 A schematic diagram of the process steps of a method for manufacturing a back-contact solar cell provided in an embodiment of the present application.

[0044] Reference numerals:

[0045] Back-contact solar cell 100; substrate 11; first doped semiconductor layer 31; second doped semiconductor layer 32; transparent conductive layer 40; first electrode 61; second electrode 62; first anti-reflection layer 50; front side 111; back side 112; first doped region 112a; second doped region 112b; first sub-region 1121; second sub-region 1122; first conductive portion 41; second conductive portion 42; first anti-reflection portion 51; first tunneling layer 21; first intrinsic amorphous silicon layer 22; passivation layer 12; reflective layer 13; in first direction X. DETAILED DESCRIPTION

[0046] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0047] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0048] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0049] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0050] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0051] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0052] See also Figure 1 and Figure 3 . Figure 1 A schematic diagram of a first cross-sectional structure of a solar cell provided in an embodiment of the present application. Figure 2 A schematic diagram of a second cross-sectional structure of a solar cell provided in an embodiment of the present application. Figure 3 A schematic diagram of a third cross-sectional structure of a solar cell provided in an embodiment of the present application.

[0053] In a first aspect, the present application provides a back-contact solar cell 100, which includes a substrate 11, a first doped semiconductor layer 31, a second doped semiconductor layer 32, a transparent conductive layer 40, a first electrode 61, a second electrode 62, and a first anti-reflection layer 50. The substrate 11 has a front side 111 and a back side 112 arranged opposite to each other, and the back side 112 includes first doped regions 112a and second doped regions 112b arranged alternately, and the first doped regions 112a and the second doped regions 112b each include a first sub-region 1121 and a second sub-region 1122. The first doped semiconductor layer 31 is located on the corresponding first doped region 112a, and the first doped semiconductor layer 31 has a first doping element. The second doped semiconductor layer 32 is located on the corresponding second doped region 112b, and the second doped semiconductor layer 32 has a second doping element having a conductivity type different from that of the first doping element. The transparent conductive layer 40 includes a plurality of first conductive portions 41 and a plurality of second conductive portions 42. The first conductive portion 41 is located on a side of the first doped semiconductor layer 31 away from the substrate 11, and is at least located in the first sub-region 1121 of the first doped region 112a. The second conductive portion 42 is located on a side of the second doped semiconductor layer 32 away from the substrate 11, and is at least located in the first sub-region 1121 of the second doped region 112b. The first electrode 61 is located in the first sub-region 1121 of the first doped region 112a, and is located on a side of the first conductive portion 41 away from the substrate 11. The second electrode 62 is located in the first sub-region 1121 of the second doped region 112b, and is located on a side of the second conductive portion 42 away from the substrate 11. The first anti-reflection layer 50 includes a plurality of first anti-reflection portions 51. The first anti-reflection portions 51 are provided on a side of the first doped semiconductor layer 31 and the second doped semiconductor layer 32 away from the substrate 11, and are located in the second sub-region 1122 of the first doped region 112a and the second doped region 112b.

[0054] For example, the substrate 11 may have a doping element, and the doping element type is N-type or P-type. The N-type element may be a V-group element such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As), and the P-type element may be a III-group element such as boron (B), aluminum (Al), gallium (Ga), or indium (In). For example, when the substrate 11 is a P-type substrate, the type of the doping element inside it is P-type. For another example, when the substrate 11 is an N-type substrate, the type of the doping element inside it is N-type.

[0055] For example, the substrate 11 has a front side 111 and a back side 112 which are arranged opposite to each other. The front side 111 and the back side 112 are arranged opposite to each other along the thickness direction of the substrate 11. Both the front side 111 and the back side 112 can be used to receive incident light. In the embodiment of the present application, the front side 111 of the substrate 11 is the main light-receiving surface, and the back side 112 of the substrate 11 is the secondary light-receiving surface. It can be understood that the light-receiving surface and the backlight surface are relative, and the light-receiving surface is specifically the surface on the substrate 11 which is mainly irradiated by sunlight in the back-contact solar cell or in the photovoltaic module. With the development of solar cell technology, the backlight surface will also receive energy from sunlight, mainly from reflected light or scattered light in the surrounding environment.

[0056] For example, the back side 112 includes first doped regions 112a and second doped regions 112b arranged alternately, and the first doped regions 112a and the second doped regions 112b each include a first sub-region 1121 and a second sub-region 1122. The first sub-region 1121 may be a region corresponding to the first electrode 61 or the second electrode 62, and the first sub-region 1121 may be understood as a metal contact region. The second sub-region 1122 may be a region outside the first sub-region 1121, and the second sub-region 1122 may be understood as a non-metal contact region.

[0057] For example, in some embodiments, Figure 1 As shown, the first doping regions 112 a and the second doping regions 112 b are alternately arranged at least in the first direction X.

[0058] For example, in some embodiments, Figure 1 As shown, in the first direction X, the width of the metal contact region is greater than the width of the corresponding first electrode 61, and / or the width of the metal contact region is greater than the width of the corresponding second electrode 62, but is not limited thereto. For example, due to process errors, the width of the metal contact region may be set to be greater than the width of the corresponding first electrode 61, and the width of the metal contact region may be set to be greater than the width of the corresponding second electrode 62, so that the first electrode 61 may be located in the corresponding metal contact region, and the second electrode 62 may be located in the corresponding metal contact region.

[0059] For example, in Figure 1 In the embodiment, on the back surface 112, on the first doped region 112a, and on the first sub-region 1121, the first doped semiconductor layer 31, the first conductive portion 41, and the first electrode 61 are sequentially stacked. The orthographic projection of the first electrode 61 on the back surface 112 is located within the range of the orthographic projection of the first conductive portion 41 on the back surface 112, that is, the first electrode 61 is electrically connected to the first doped semiconductor layer 31 through the first conductive portion 41.

[0060] For example, in Figure 1In the embodiment, on the back surface 112, on the second doped region 112b, and on the first sub-region 1121, the second doped semiconductor layer 32, the second conductive portion 42, and the second electrode 62 are sequentially stacked. The orthographic projection of the second electrode 62 on the back surface 112 is located within the range of the orthographic projection of the second conductive portion 42 on the back surface 112, that is, the second electrode 62 is electrically connected to the second doped semiconductor layer 32 through the second conductive portion 42.

[0061] For example, the first doped semiconductor layer 31 contains a first doping element, and the second doped semiconductor layer 32 contains a second doping element having a conductivity type different from that of the first doping element, and one of the first doping element and the second doping element is an N-type doping element, and the other is a P-type doping element. This application takes the example that the first doping element is an N-type doping element and the second doping element is a P-type doping element.

[0062] For example, in Figure 1 In the embodiment, on the back side 112 , on the first doped region 112 a , and on the second sub-region 1122 , the first doped semiconductor layer 31 and the first anti-reflection portion 51 are sequentially stacked.

[0063] For example, in Figure 1 In the embodiment, on the back side 112 , on the second doped region 112 b , and on the second sub-region 1122 , the second doped semiconductor layer 32 and the first anti-reflection portion 51 are sequentially stacked.

[0064] For example, the first anti-reflection layer 50 or the first anti-reflection portion 51 is used to reduce the reflection of external light by the back surface 112 , thereby improving the utilization rate of light by the back surface 112 , and thus improving the bifaciality of the solar cell.

[0065] For example, the bifaciality and light utilization rate of the back-contact solar cell in the prior art need to be improved. The inventors found that the reasons include: 1) In the prior art, a transparent conductive oxide (TCO) is used as the emission and transmission layer of the back side 112. In order to prevent the first doping region 112a and the second doping region 112b from leaking electricity through the transparent conductive oxide, the transparent conductive oxide between the first doping region 112a and the second doping region 112b will be removed. For example, a spacer is set between the first doping region 112a and the second doping region 112b, and the transparent conductive oxide of the spacer will be removed, thereby preventing the first doping region 112a and the second doping region 112b from leaking electricity through the transparent conductive oxide. 2b leaks electricity through the transparent conductive oxide, but the transparent conductive oxide covers the entire first doped region 112a and the entire second doped region 112b. The transparent conductive oxide has a large parasitic absorption of short waves, which reduces the light utilization rate, thereby reducing the bifaciality of the solar cell; 2) In addition, during the deposition of the transparent conductive oxide, the high-energy particles deposited to form the transparent conductive oxide will bombard the surface of the first doped region 112a, destroying the original film layer with a passivation effect (for example, destroying the film layer of the first doped semiconductor layer 31, for example, destroying the film layer of the first tunneling layer 21), reducing the passivation of the first doped region 112a, and this damage is difficult to repair later. In order to solve at least one of the above problems, the inventors have proposed multiple embodiments of the present application.

[0066] In the embodiment of the present application, on the back side 112, the first doping region 112a and the second doping region 112b are respectively provided with the first conductive part 41 and the second conductive part 42; on the back side 112, on the first doping region 112a, and on the second sub-region 1122, the first doped semiconductor layer 31 and the first anti-reflection part 51 are sequentially stacked; on the back side 112, on the second doping region 112b, and on the second sub-region 1122, the second doped semiconductor layer 32 and the first anti-reflection part 51 are sequentially stacked. That is, in the direction parallel to the plane where the substrate 11 is located (in the thickness direction perpendicular to the substrate 11), the first anti-reflection part 51 is at least located between the adjacent first conductive part 41 and the second conductive part 42, which has many beneficial effects. On the one hand, in the direction parallel to the plane where the substrate 11 is located, the blank gap between the first conductive part 41 and the second conductive part 42 is eliminated, and the first anti-reflection layer 50 or the first anti-reflection part 51 is used to reduce the reflection of external light by the back side 112, thereby improving the utilization rate of light by the back side 112, thereby improving the bifaciality of the solar cell. On the second aspect, in a direction parallel to the plane where the substrate 11 is located, the film layer of the transparent conductive layer 40 between the first conductive part 41 and the second conductive part 42 is removed. For example, the film layer of the transparent conductive layer 40 between the first conductive part 41 and the second conductive part 42 can be completely removed by an over-etching process. Although the high-energy particles deposited to form the transparent conductive layer 40 will bombard the surface of the first doped region 112a, etc., and destroy the original film layer with a passivation effect (for example, destroying the film layer of the first doped semiconductor layer 31, for example, destroying the film layer of the first tunneling layer 21), the present application subsequently forms a first anti-reflection layer 50 on the surface of the first doped semiconductor layer 31 and the second doped semiconductor layer 32 away from the substrate 11. The hydrogen element and the like in the deposition process of the first anti-reflection layer 50 can repair the destroyed passivation effect. The hydrogen element and the like can repair the lattice defects in the film layer with a passivation effect, improve the crystal quality, and eliminate the influence of the passivation reduction caused by the high-energy particles in the deposition process of the transparent conductive layer 40, thereby improving the photoelectric conversion efficiency of the solar cell. Thirdly, the material of the first anti-reflection portion 51 is an insulating material, which can also prevent a short circuit between the first conductive portion 41 and the second conductive portion 42 .

[0067] In some embodiments, Figure 1 As shown, the first conductive portion 41 and the second conductive portion 42 are both arranged in contact with the adjacent first anti-reflection portion 51 .

[0068] For example, the first conductive portion 41 and the second conductive portion 42 are both arranged in contact with the adjacent first anti-reflection portion 51, that is, in a direction parallel to the plane where the substrate 11 is located (for example Figure 1 in a direction parallel to the paper or tabletop; for example, in Figure 1In the first direction X), the end face of the first conductive part 41 is in contact with the adjacent first anti-reflection part 51, and the end face of the second conductive part 42 is in contact with the adjacent first anti-reflection part 51. In the direction parallel to the plane where the substrate 11 is located, the gap between the first conductive part 41 and the second conductive part 42 and the adjacent first anti-reflection part 51 is eliminated, and the area of ​​the first anti-reflection part 51 is increased, so that the reflection of external light by the back side 112 can be further reduced, and the utilization rate of light by the back side 112 can be improved, so that the bifaciality of the solar cell can be improved.

[0069] In some embodiments, Figure 1 As shown, the thickness of the transparent conductive layer 40 is 60 nanometers to 90 nanometers; and / or the thickness of the first anti-reflection layer 50 is 60 nanometers to 90 nanometers.

[0070] For example, the thickness of the transparent conductive layer 40 may be any value among 60 nanometers, 65 nanometers, 70 nanometers, 75 nanometers, 80 nanometers, 85 nanometers and 90 nanometers.

[0071] For example, the thickness of the first anti-reflection layer 50 may be any value among 60 nanometers, 65 nanometers, 70 nanometers, 75 nanometers, 80 nanometers, 85 nanometers and 90 nanometers.

[0072] For example, the inventors have found that when the thickness of the transparent conductive layer 40 is 60 nanometers to 90 nanometers, the first conductive portion 41 and the second conductive portion 42 have good electrical transmission performance, while avoiding the influence of reduced passivation caused by the deposition process of an excessively thick transparent conductive layer 40 .

[0073] For example, the inventors have found that the thickness of the first anti-reflection layer 50 is 60 nanometers to 90 nanometers, so that the first anti-reflection portion 51 has good anti-reflection performance, and it is easy to remove the material of the first anti-reflection layer 50 on the surface of the first electrode 61 and the second electrode 62 away from the substrate 11.

[0074] In some embodiments, the material of the transparent conductive layer 40 includes: at least one of indium tin oxide, indium tungsten oxide, zinc aluminum oxide, titanium-doped indium oxide and fluorine-doped tin oxide; and / or, the material of the first anti-reflection layer 50 includes at least one of silicon oxide, silicon nitride and silicon oxynitride.

[0075] In some embodiments, the back contact solar cell 100 further includes a first tunneling layer 21 and a first intrinsic amorphous silicon layer 22. The first tunneling layer 21 is located between the substrate 11 and the first doped semiconductor layer 31; the first intrinsic amorphous silicon layer 22 is located between the substrate 11 and the second doped semiconductor layer 32.

[0076] By way of example, the material of the first tunneling layer 21 may include silicon oxide, but is not limited thereto.

[0077] For example, in Figure 1 In the embodiment, on the back side 112 , on the first doped region 112 a , and on the first sub-region 1121 , the first tunneling layer 21 , the first doped semiconductor layer 31 , the first conductive portion 41 , and the first electrode 61 are sequentially stacked.

[0078] For example, in Figure 1 In the embodiment, on the back side 112 , on the second doped region 112 b , and on the first sub-region 112 l , the first intrinsic amorphous silicon layer 22 , the second doped semiconductor layer 32 , the second conductive portion 42 , and the second electrode 62 are sequentially stacked.

[0079] For example, Figure 1 As shown, the back contact solar cell 100 of the present application is a heterogeneous structure, and a first intrinsic amorphous silicon layer 22 and a second doped semiconductor layer 32 are sequentially arranged in the second doped region 112 b , and the second doped semiconductor layer 32 may be P-type amorphous silicon.

[0080] In some embodiments, Figure 1 As shown, the first intrinsic amorphous silicon layer 22 is in contact with the adjacent first doped semiconductor layer 31 ; and / or, the first intrinsic amorphous silicon layer 22 is in contact with the adjacent first tunneling layer 21 .

[0081] For example, Figure 1 As shown, in a direction parallel to the plane of the substrate 11, the end face of the first intrinsic amorphous silicon layer 22 contacts the adjacent first doped semiconductor layer 31, which can increase the area of ​​the first intrinsic amorphous silicon layer 22 and / or the area of ​​the first doped semiconductor layer 31, thereby increasing the area of ​​the back side 112 receiving sunlight, thereby increasing the bifaciality of the solar cell.

[0082] For example, Figure 1 As shown, in a direction parallel to the plane of the substrate 11, the end face of the first intrinsic amorphous silicon layer 22 contacts the adjacent first tunneling layer 21, which can increase the area of ​​the first intrinsic amorphous silicon layer 22 and / or the area of ​​the first tunneling layer 21, thereby increasing the area of ​​the back side 112 receiving sunlight, thereby increasing the bifaciality of the solar cell.

[0083] In some embodiments, Figure 1 As shown, the thickness of the first tunneling layer 21 is 0.5 nanometers to 2 nanometers; and / or the thickness of the first intrinsic amorphous silicon layer 22 is 4 nanometers to 10 nanometers.

[0084] For example, Figure 1 As shown, in a direction perpendicular to the plane of the substrate 11 (in the thickness direction of the substrate 11 ), the thickness of the first tunneling layer 21 is 0.5 nm to 2 nm, for example, any value among 0.5 nm, 1 nm, 1.5 nm and 2 nm.

[0085] For example, Figure 1 As shown, in a direction perpendicular to the plane of the substrate 11 (in the thickness direction of the substrate 11 ), the thickness of the first intrinsic amorphous silicon layer 22 is 4 nanometers to 10 nanometers, for example, any value among 4 nanometers, 6 nanometers, 8 nanometers and 10 nanometers.

[0086] For example, Figure 1 As shown, the thickness of the first intrinsic amorphous silicon layer 22 is thicker than that of the first tunneling layer 21 , so that the first intrinsic amorphous silicon layer 22 can contact the adjacent first doped semiconductor layer 31 ; and / or, the first intrinsic amorphous silicon layer 22 can contact the adjacent first tunneling layer 21 .

[0087] It should be noted that the thickness of the first doped semiconductor layer 31 is 30 nanometers to 180 nanometers, for example, any value among 30 nanometers, 50 nanometers, 70 nanometers, 80 nanometers, 100 nanometers, 120 nanometers, 150 nanometers and 180 nanometers. The thickness of the second doped semiconductor layer 32 is 6 nanometers to 20 nanometers, for example, any value among 6 nanometers, 10 nanometers, 12 nanometers, 15 nanometers, 18 nanometers and 20 nanometers.

[0088] It should be noted that if Figure 1 As shown, in a direction parallel to the plane where the substrate 11 is located (for example, at the same time in a direction parallel to Figure 2 In the direction of the paper or desktop), the width of the first conductive portion 41 can be set to be equal to the width of the first electrode 61, and the edge of the first conductive portion 41 is flush with the edge of the first electrode 61; in the direction parallel to the plane where the substrate 11 is located (for example, in the direction parallel to Figure 2 In the direction of the paper or desktop), the width of the second conductive portion 42 can be set to be equal to the width of the second electrode 62, and the edge of the second conductive portion 42 is flush with the edge of the second electrode 62.

[0089] It should be noted that if Figure 2 As shown, considering that there is a process error when the first electrode 61 is prepared on the first conductive portion 41, and there is a process error when the second electrode 62 is prepared on the second conductive portion 42, in the direction parallel to the plane where the substrate 11 is located (for example, in the direction parallel to Figure 2In the direction of the paper or desktop), the width of the first conductive portion 41 can be set to be greater than the width of the first electrode 61, and a portion of the first conductive portion 41 is arranged in the second sub-region 1122 of the first doping region 112a. The width of the second conductive portion 42 can be set to be greater than the width of the second electrode 62, and a portion of the second conductive portion 42 is arranged in the second sub-region 1122 of the second doping region 112b. At this time, a portion of the surface of the first conductive portion 41 away from the substrate 11 is exposed by the first electrode 61 and covered by the first anti-reflection portion 51, and a portion of the surface of the second conductive portion 42 away from the substrate 11 is exposed by the second electrode 62 and covered by the first anti-reflection portion 51, which can reduce the reflection of sunlight on the first conductive portion 41 and the second conductive portion 42, thereby improving the utilization rate of sunlight.

[0090] It should be noted that Figure 1 and Figure 2 It is shown that the second doping region 112b of the back surface 112 is a plane. Figure 3 As shown, the second doping region 112b of the back surface 112 may also be a velvet surface, so as to further increase the contact area between the first intrinsic amorphous silicon layer 22 and the surface of the second doping region 112b, and further improve the passivation effect of the first intrinsic amorphous silicon layer 22 on the second doping region 112b. At the same time, the conductive area of ​​the second doping region 112b may be further increased, which is more conducive to improving the photoelectric conversion efficiency of the back contact heterojunction solar cell.

[0091] It should be noted that the back contact solar cell 100 further includes a passivation layer 12 and a reflective layer 13 which are sequentially stacked on the front surface 111. The material of the passivation layer 12 can be at least one of AlOx (aluminum oxide), SiOx (silicon oxide), a-Si:H(i) (amorphous silicon), etc.; the material of the anti-reflection layer 13 can be at least one of SiNxOy (silicon oxynitride) and SiNx (silicon nitride).

[0092] See also Figure 4 , Figure 4 A schematic diagram of the process steps of a method for manufacturing a back-contact solar cell provided in an embodiment of the present application.

[0093] In the second aspect, based on the same application concept, the present application also provides a method for manufacturing a back-contact solar cell, and any of the above-mentioned back-contact solar cells 100 can be manufactured using this method for manufacturing a back-contact solar cell. The method for manufacturing a back-contact solar cell includes: step S100, step S200, step S300, step S400, step S500, step S600, and step S700.

[0094] Step S100, providing a substrate, wherein the substrate has a front side and a back side disposed opposite to each other, the back side includes first doping regions and second doping regions arranged alternately, and the first doping regions and the second doping regions each include a first sub-region and a second sub-region.

[0095] For example, a substrate 11 is provided, the substrate 11 has a front side 111 and a back side 112 disposed opposite to each other, the back side 112 includes first doping regions 112a and second doping regions 112b arranged alternately, and the first doping regions 112a and the second doping regions 112b each include a first sub-region 1121 and a second sub-region 1122 .

[0096] Step S200: forming a first doped semiconductor layer in the first doped region, wherein the first doped semiconductor layer has a first doping element.

[0097] For example, a first doped semiconductor layer 31 is formed in the first doped region 112 a , and the first doped semiconductor layer 31 has a first doping element therein.

[0098] Step S300: forming a second doped semiconductor layer in the second doped region, wherein the second doped semiconductor layer contains a second doping element having a conductivity type different from that of the first doping element.

[0099] For example, a second doped semiconductor layer 32 is formed in the second doped region 112 b , and the second doped semiconductor layer 32 contains a second doped element having a conductivity type different from that of the first doped element.

[0100] Step S400, forming a transparent conductive layer on the side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate, the transparent conductive layer comprising a plurality of first conductive portions and a plurality of second conductive portions, the first conductive portion being located on the side of the first doped semiconductor layer away from the substrate and at least located in the first sub-region of the first doped region, the second conductive portion being located on the side of the second doped semiconductor layer away from the substrate and at least located in the first sub-region of the second doped region.

[0101] For example, a transparent conductive layer 40 is formed on a side of the first doped semiconductor layer 31 and the second doped semiconductor layer 32 away from the substrate 11, and the transparent conductive layer 40 includes a plurality of first conductive portions 41 and a plurality of second conductive portions 42. The first conductive portions 41 are located on a side of the first doped semiconductor layer 31 away from the substrate 11, and are at least located in the first sub-region 1121 of the first doped region 112a. The second conductive portions 42 are located on a side of the second doped semiconductor layer 32 away from the substrate 11, and are at least located in the first sub-region 1121 of the second doped region 112b.

[0102] Step S500: forming a first electrode on a side of the first conductive portion away from the substrate.

[0103] By way of example, the first electrode 61 is formed on a side of the first conductive portion 41 away from the substrate 11 .

[0104] Step S600: forming a second electrode on a side of the second conductive portion away from the substrate.

[0105] By way of example, the second electrode 62 is formed on a side of the second conductive portion 42 away from the substrate 11 .

[0106] Step S700, forming a first anti-reflection layer on the side of the first doped semiconductor layer and the second doped semiconductor layer facing away from the substrate, the first anti-reflection layer comprising a plurality of first anti-reflection portions, the first anti-reflection portions being arranged on the side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate and being located in the first doped region and the second sub-region of the second doped region.

[0107] For example, a first anti-reflection layer 50 is formed on a side of the first doped semiconductor layer 31 and the second doped semiconductor layer 32 facing away from the substrate 11. The first anti-reflection layer 50 includes a plurality of first anti-reflection portions 51. The first anti-reflection portions 51 are arranged on a side of the first doped semiconductor layer 31 and the second doped semiconductor layer 32 away from the substrate 11, and are located in the second sub-region 1122 of the first doping region 112a and the second doping region 112b.

[0108] In some embodiments, in the step of forming the first anti-reflection layer 50 on the side of the first doped semiconductor layer 31 and the second doped semiconductor layer 32 facing away from the substrate 11 (step S700 ), the first conductive portion 41 and the second conductive portion 42 are both disposed in contact with the adjacent first anti-reflection portion 51 .

[0109] By way of example, in combination with the multiple steps of the above-mentioned method for manufacturing a back-contact solar cell, a specific process of a method for manufacturing a back-contact solar cell is further described in detail, including: 1) (step S100), providing a substrate 11, and cleaning and polishing the substrate 11; 2) forming a preset material film layer of the first tunneling layer 21 (for example, a tunneling layer of SiOx material) on the back side 112; 3) (step S200), forming polycrystalline silicon on the side of the preset material film layer of the first tunneling layer 21 away from the substrate 11, and N-type doping to form a preset material film layer of the first doped semiconductor layer 31; 4) patterning the film layer on the back side 112, removing the phosphosilicate glass layer (PSG) of the second doping region 112b, and retaining the first tunneling layer 21 and the first doped semiconductor layer 31 of the first doping region 112a; 5) single-sided through the front side 111 6) Remove the phosphosilicate glass layer (PSG) by hydrofluoric acid; 7) Remove the phosphosilicate glass layer (PSG) of the first doped region 112a on the back side by hydrofluoric acid and clean it; 8) Form a passivation layer 12 on the front side 111 (the material of the passivation layer 12 can be at least one of AlOx, SiOx, a-Si:H(i), etc.); 9) Form an anti-reflection layer 13 on the front side 111 (the material of the anti-reflection layer 13 can be at least one of SiNxOy and SiNx); 10) Chain-type back-side plating to remove the materials of the passivation layer 12 and the anti-reflection layer 13 on the back side 112; 11) Annealing to improve the passivation level; 12) Cleaning (for example, cleaning the surface of the second doped region 112b); 13) Form a preset material film layer of the first intrinsic amorphous silicon layer 22 on the entire back side 112 (for example, less than 250 o C temperature condition to deposit an amorphous silicon layer); 14) (step S300), a predetermined material film layer (for example, less than 250 C) of a second doped semiconductor layer 32 is formed on the entire back surface 112 o C temperature condition, depositing a P-type doped silicon thin film layer, which may be one of a-Si:H(p), nc-Si:H(p), nc-SiOx:H(p) or a combination of several thereof); 15), patterning the preset material film layer of the first intrinsic amorphous silicon layer 22 and the preset material film layer of the second doped semiconductor layer 32 of the back side 112, and only retaining the first intrinsic amorphous silicon layer 22 and the second doped semiconductor layer 32 of the second doped region 112b; 16) (step S400), forming a preset film layer of a transparent conductive layer 40 on the entire back side 112; 17), patterning the transparent conductive layer 40 to form a plurality of first conductive portions 41 and a plurality of second conductive portions 42; 18) (steps S500 and S600), forming a first electrode 61 and a second electrode 62 on the back side; 19) (step S700), forming a first anti-reflection layer 50 (e.g., less than 250°C) on the back side 112. o C temperature conditions for deposition of SiNxOy).

[0110] In the third aspect, based on the same application concept, the present application also provides a photovoltaic module, which includes a battery string, a connecting component, a packaging film and a cover plate. The battery string is formed by connecting a plurality of back-contact solar cells 100 of any of the above items, or the battery string is formed by connecting back-contact solar cells 100 manufactured by the manufacturing method of back-contact solar cells of any of the above items; the connecting component is used to electrically connect two adjacent back-contact solar cells 100; the packaging film is used to cover the surface of the battery string; and the cover plate is used to cover the surface of the packaging film away from the battery string.

[0111] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0112] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A back contact solar cell, characterized in that: include: A substrate having a front side and a back side disposed opposite to each other, wherein the back side comprises first doping regions and second doping regions arranged alternately, and each of the first doping regions and the second doping regions comprises a first sub-region and a second sub-region; A first doped semiconductor layer, located on the corresponding first doped region, wherein the first doped semiconductor layer has a first doping element; A second doped semiconductor layer is located on the corresponding second doped region, and the second doped semiconductor layer contains a second doping element having a conductivity type different from that of the first doping element; a transparent conductive layer, comprising a plurality of first conductive portions and a plurality of second conductive portions, wherein the first conductive portion is located on a side of the first doped semiconductor layer away from the substrate and at least located in the first sub-region of the first doped region, and the second conductive portion is located on a side of the second doped semiconductor layer away from the substrate and at least located in the first sub-region of the second doped region; A first electrode is located in the first sub-region of the first doping region and is located on a side of the first conductive portion away from the substrate; a second electrode, located in the first sub-region of the second doping region and located on a side of the second conductive portion away from the substrate; The first anti-reflection layer includes a plurality of first anti-reflection parts, wherein the first anti-reflection parts are arranged on a side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate and are located in the first doped region and the second sub-region of the second doped region.

2. The back contact solar cell according to claim 1, characterized in that: The first conductive portion and the second conductive portion are both arranged in contact with the adjacent first anti-reflection portion.

3. The back contact solar cell according to claim 1, characterized in that: The thickness of the transparent conductive layer is 60 nanometers to 90 nanometers; and / or, The thickness of the first anti-reflection layer is 60 nanometers to 90 nanometers.

4. The back contact solar cell according to claim 1, characterized in that: The material of the transparent conductive layer includes: at least one of indium tin oxide, indium tungsten oxide, zinc aluminum oxide, titanium-doped indium oxide and fluorine-doped tin oxide; and / or, The material of the first anti-reflection layer includes at least one of silicon oxide, silicon nitride and silicon oxynitride.

5. The back contact solar cell according to claim 1, characterized in that: Also includes: A first tunneling layer, located between the substrate and the first doped semiconductor layer; The first intrinsic amorphous silicon layer is located between the substrate and the second doped semiconductor layer.

6. The back contact solar cell according to claim 5, characterized in that: The first intrinsic amorphous silicon layer is in contact with the adjacent first doped semiconductor layer; and / or, The first intrinsic amorphous silicon layer contacts the adjacent first tunneling layer.

7. The back contact solar cell according to claim 5, characterized in that: The thickness of the first tunneling layer is 0.5 nanometers to 2 nanometers; and / or, The thickness of the first intrinsic amorphous silicon layer is 4 nanometers to 10 nanometers.

8. A method for manufacturing a back contact solar cell, characterized in that: include: Providing a substrate, wherein the substrate has a front side and a back side disposed opposite to each other, the back side comprises first doping regions and second doping regions arranged alternately, and the first doping regions and the second doping regions each comprise a first sub-region and a second sub-region; forming a first doped semiconductor layer in the first doped region, wherein the first doped semiconductor layer has a first doping element; forming a second doped semiconductor layer in the second doped region, wherein the second doped semiconductor layer has a second doping element having a conductivity type different from that of the first doping element; forming a transparent conductive layer on a side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate, the transparent conductive layer comprising a plurality of first conductive portions and a plurality of second conductive portions, the first conductive portion being located on a side of the first doped semiconductor layer away from the substrate and at least located in the first sub-region of the first doped region, and the second conductive portion being located on a side of the second doped semiconductor layer away from the substrate and at least located in the first sub-region of the second doped region; forming a first electrode on a side of the first conductive portion away from the substrate; forming a second electrode on a side of the second conductive portion away from the substrate; A first anti-reflection layer is formed on a side of the first doped semiconductor layer and the second doped semiconductor layer facing away from the substrate, the first anti-reflection layer includes a plurality of first anti-reflection portions, the first anti-reflection portions are arranged on a side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate, and are located in the first doped region and the second sub-region of the second doped region.

9. The method for manufacturing a back contact solar cell according to claim 8, characterized in that: In the step of forming the first anti-reflection layer on the side of the first doped semiconductor layer and the second doped semiconductor layer facing away from the substrate, the first conductive portion and the second conductive portion are both arranged in contact with the adjacent first anti-reflection portion.

10. A photovoltaic module, characterized in that: include: A cell string formed by connecting a plurality of back-contact solar cells according to any one of claims 1 to 7 or a back-contact solar cell manufactured by the manufacturing method according to any one of claims 8 and 9; A connecting component, used for electrically connecting two adjacent back-contact solar cells; A packaging film, used to cover the surface of the battery string; The cover plate is used to cover the surface of the packaging film facing away from the battery string.

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