Capacitance measurement system and method

Abstract

A system (100) operable between a charging mode and a transfer mode to measure a capacitance of a capacitive sensor (10) comprises a switching unit (102) configured to arrange the capacitive sensor (10) to be charged from a first end (10a) of the capacitive sensor (10) by a first supply voltage (14a) in a first phase of the charging mode until a voltage difference between the first end (10a) and an opposite second end (10b) of the capacitive sensor (10) reaches a first predetermined voltage, and to disconnect the first end (10a) of the capacitive sensor (10) from the first supply voltage (14a) and to couple the second end (10b) of the capacitive sensor (10) to a second supply voltage (14b) in a second phase of the charging mode to cause a voltage at the first end (10a) of the capacitive sensor (10) to rise to a second predetermined voltage.

Description

Technical Field

[0001] This disclosure relates to capacitive sensor systems, and more particularly to capacitance measurement systems. Background Technology

[0002] Capacitive sensor systems are widely used in a variety of applications, such as sensing body touch or proximity in human-machine interface applications, and determining the position of a motor's rotatable shaft by detecting the capacitance change between two opposing electrodes of a capacitive sensor in motor applications. Summary of the Invention

[0003] This disclosure relates to a capacitive sensor system that determines a touch or proximity to a capacitive sensor by detecting a change in capacitance between two opposing electrodes of the capacitive sensor. In the capacitive sensor system, the capacitance between the two electrodes of the capacitive sensing plate is measured by repeatedly charging the capacitive sensing plate and transferring the charge charged to the capacitive sensing plate to a sampling capacitor via a current mirror.

[0004] In one example, this disclosure provides a system operable between a charging mode and a transfer mode for measuring the capacitance of a capacitive sensor. The system includes a first input terminal configured to be coupled to a first end of the capacitive sensor and a second input terminal configured to be coupled to a second end of the capacitive sensor, and a switching unit coupled to the first and second ends of the capacitive sensor. The charging mode includes at least a first stage and a second stage. In the first stage, the switching unit arranges the capacitive sensor to be charged from the first end of the capacitive sensor by a first power supply voltage until the voltage difference between the first and second ends of the capacitive sensor reaches a first predetermined voltage. In the second stage, the switching unit disconnects the first end of the capacitive sensor from the first power supply voltage and couples the second end of the capacitive sensor to a second power supply voltage, causing the voltage at the first end of the capacitive sensor to rise to the second predetermined voltage.

[0005] In another example, this disclosure provides a system operable between a charging mode and a transfer mode for measuring the capacitance of a capacitance sensor. The system includes a first input terminal configured to be coupled to a first end of the capacitance sensor, and a transfer unit having an input node configured to be electrically coupled to the first end of the capacitance sensor in the transfer mode. The transfer unit includes a current mirror that discharges the capacitance sensor with a discharge current until the voltage at the first end of the capacitance sensor drops to a first predetermined voltage, and transfers a plurality of charges to a sampling capacitor by mirroring the discharge current. The current mirror receives a reference voltage and sets a bias voltage at the input node of the transfer unit based on the reference voltage, wherein the first predetermined voltage is based on the bias voltage.

[0006] In yet another example, this disclosure provides a method for measuring the capacitance of a capacitive sensor. The method includes coupling a first terminal of the capacitive sensor to a first power supply voltage to charge the capacitive sensor from the first terminal until the voltage difference between the first terminal and an opposing second terminal of the capacitive sensor reaches a first predetermined voltage; disconnecting the first terminal of the capacitive sensor from the first power supply voltage; and coupling the second terminal of the capacitive sensor to a second power supply voltage to increase the voltage at the first terminal of the capacitive sensor from the first predetermined voltage to the second predetermined voltage. Attached Figure Description

[0007] Figure 1 This is a schematic block diagram of a capacitance measurement system according to an embodiment of the present disclosure;

[0008] Figure 2 According to one embodiment of this disclosure Figure 1 A schematic diagram of the transfer unit of the capacitance measurement system;

[0009] Figure 3 This is described according to one embodiment of the present disclosure. Figure 1 Waveforms of voltage changes at the first terminal of the capacitance sensor during charging and transfer modes under the switching control of the switching unit of the capacitance measurement system; and

[0010] Figure 4 This is a flowchart of a method for measuring the capacitance of a capacitance sensor according to another embodiment of the present disclosure. Detailed Implementation

[0011] This disclosure relates to a capacitance measurement system for measuring the capacitance of a capacitance sensor.

[0012] Now for reference Figure 1 The diagram illustrates a schematic block diagram of a capacitance measurement system 100 according to an embodiment of the present disclosure. The system 100 can operate between a charging mode and a transfer mode to measure the capacitance C of a capacitance sensor 10 (e.g., a capacitance sensor for sensing touch or proximity to a conductor). x It has a capacitance C. p The parasitic capacitance element 12 is coupled to the first terminal 10a of the capacitance sensor 10 and ground V. GND The system 100 includes a first input terminal 101a for coupling to a first end 10a of the capacitive sensor 10 and a second input terminal 101b for coupling to a second end 10b of the capacitive sensor 10.

[0013] System 100 includes a switching unit 102 and a transfer unit 104. The switching unit 102 is coupled to the first terminal 10a and the second terminal 10b through the first input terminal 101a and the second input terminal 101b, respectively. The transfer unit 104 is coupled to the switching unit 102 and is configured to discharge the capacitive sensor 10 in the transfer mode.

[0014] The switching unit 102 is configured to switch the system 100 between a first terminal 10a of the capacitive sensor 10 and the transfer unit 104, and between a first stage and a second stage in a charging mode, and between a charging mode and a transfer mode. In one example, the switching unit 102 includes a first switch 106 coupled between a first power supply voltage 14a and a first input terminal 101a, and coupled between a second input terminal 101b and ground. GND The switching unit 102 includes a second switch 108 between the first input terminal 101a and the input node 114 of the transfer unit 104, and a third switch 110 coupled between the second input terminal 101a and the second power supply voltage 14b. The first switch 106 to the fourth switch 112 may be transistors that operate between an on state and an off state, respectively controlled by corresponding control signals S1 to S4.

[0015] In charging mode, the fourth switch 112 is open to disconnect the transfer unit 104 from the capacitive sensor 10 and the parasitic capacitance element 12. In the first stage, the switching unit 102 arranges the capacitive sensor 10 to be charged from its first terminal 10a by the first power supply voltage 14a until the voltage difference between the first terminal 10a and the second terminal 10b of the capacitive sensor 10 reaches a first predetermined voltage. In one example, in the first stage, the first switch 106 and the second switch 108 are closed and the third switch 110 is open, and the capacitive sensor 10 is charged by the first power supply voltage 14a until the voltage V at the first terminal 10a of the capacitive sensor 10 reaches a certain value. x A first predetermined voltage is reached. In a preferred embodiment, the first predetermined voltage is proportional to the first power supply voltage 14a. In another preferred embodiment, the first predetermined voltage is the same as the first power supply voltage 14a.

[0016] After the voltage difference between the first terminal 10a and the second terminal 10b of the capacitive sensor 10 reaches a first predetermined voltage, the switching unit 102 switches the system 100 from the first stage of the charging mode to the second stage by the following operations: disconnecting the first switch 106 to disconnect the first terminal 10a of the capacitive sensor 10 from the first power supply voltage 14a; disconnecting the second switch 108 and closing the third switch 110 to couple the second terminal 10b of the capacitive sensor 10 to the second power supply voltage 14b, thereby increasing the voltage V at the first terminal 10a of the capacitive sensor 10. x The voltage is increased to a second predetermined voltage. In a preferred embodiment, the increase from the first predetermined voltage to the second predetermined voltage is based on the second power supply voltage 14b and the capacitance C of the capacitance sensor 10. x And the capacitance C of parasitic capacitor element 12 p In a preferred embodiment, the first power supply voltage 14a and the second power supply voltage 14b are determined by the bandgap voltage reference V. bg The same power supply voltage V generated and proportional to it reg The bandgap voltage reference V bg It is a temperature-independent voltage reference. For example, the supply voltage V. reg 1.25V bg When the bandgap voltage reference V is under conditions of 50 ppm / C bg When the voltage is 1.2V, the power supply voltage V reg It is 1.5V.

[0017] In one example, the second predetermined voltage is defined according to the following equation:

[0018]

[0019] In a preferred embodiment, the capacitance C of the parasitic capacitance element 12 p The capacitance C is much smaller than that of the capacitive sensor 10. x For example, the capacitance C of the capacitance sensor 10 x If the second predetermined voltage is 1 / 100 to 1 / 10, then the second predetermined voltage is approximately 2V. reg Compared to charging the voltage at the first terminal 10a to the power supply voltage V... reg In this disclosure, another method involves using a switching unit 102 to increase the voltage at the first terminal 10a of the capacitive sensor 10 to a level higher than the power supply voltage V. re This enhances the anti-interference capability of System 100.

[0020] The voltage V at the first terminal 10a of the capacitive sensor 10 xUpon reaching the second predetermined voltage, the system 100 switches to transfer mode by closing the fourth switch 112 to electrically couple the capacitive sensor 10 and the parasitic capacitance element 12 to the input node 114 of the transfer unit 104. In a preferred embodiment, the second terminal 10b of the capacitive sensor 10 remains coupled to the second power supply voltage 14b in transfer mode.

[0021] In transfer mode, transfer unit 104 uses discharge current I in Discharge the capacitive sensor 10 until the voltage V at the first terminal 10a of the capacitive sensor 10 is reached. x The voltage drops to the reference voltage V provided to the transfer unit 104. ref A proportional third predetermined voltage, and the transfer unit 104 transfers the discharge current I from the capacitive sensor 10. in Mirroring to output current I out And transfer multiple charges to a known capacitance C s The sampling capacitor 116 is used, and the output current I is used. out The sampling capacitor 116 is charged. In a preferred embodiment, the reference voltage V... ref From the bandgap voltage reference V bg Generates and is compared with the bandgap voltage reference V bg This is proportional to the discharge endpoint, thus allowing for precise control. In a preferred embodiment, the reference voltage V... ref Equal to the bandgap voltage reference V bg .

[0022] System 100 repeatedly operates between charging mode and transfer mode until the voltage across sampling capacitor 116 reaches the trip voltage V. trip The capacitance C of the capacitive sensor 10 x Based on the period of the control signal S4 already provided to the fourth switch 112 and the capacitance C of the sampling capacitor 116. s To determine. In one example, the trip voltage V trip Also derived from the bandgap voltage reference V bg Generate and scale it proportionally. The capacitance C of sampling capacitor 116. s Large enough that the voltage across the sampling capacitor 116 reaches the trip voltage V. trip It stores several times the amount of the multiple charges at the same time.

[0023] In a preferred embodiment, the first end of the sampling capacitor 116 is coupled to the output terminal 118 of the transfer unit 104 and the first input terminal of the comparator 120, and the opposite second end of the sampling capacitor 116 is preferably coupled to ground V. GND Comparator 118 compares the voltage at the first terminal of sampling capacitor 116 with the trip voltage V.trip The comparison is performed, and an indication is generated that the voltage at the first terminal of the sampling capacitor 116 reaches the trip voltage V. trip The signal.

[0024] Figure 2 This is a schematic diagram of a transfer unit 200 according to an embodiment of the present disclosure. The transfer unit 200 may correspond to... Figure 1 The example capacitance measurement system 100 has a transfer unit 104 that has an input node 202 configured to be electrically coupled to a first end 10a of a capacitance sensor 10 in transfer mode and an output terminal 204 configured to be coupled to a sampling capacitor 116.

[0025] In a preferred embodiment, the transfer unit 200 includes a current mirror 206 and a bias current I supplied to the current mirror 206. b The current source 208 and the current mirror 206 use the discharge current I. in Discharge the capacitive sensor 10 and the parasitic capacitance element 12 until the voltage V at the first terminal 10b of the capacitive sensor 10a is discharged. x Reduce to the second predetermined voltage, and by increasing the discharge current I in Mirroring to output current I out And using the output current I out Multiple charges are transferred to sampling capacitor 116.

[0026] In a preferred embodiment, the current mirror 206 is a Class AB current mirror, which includes components series-coupled to a third power supply voltage V. dd and the fourth power supply voltage V ss The presence of at least one PMOS current mirror 210 and at least one NMOS current mirror 212 between them allows for a reduction in the amount of current relative to the discharge current I. inThe bias current. Current mirror 206 also includes a cross-linear loop 214 coupled to at least one PMOS current mirror 208 and at least one NMOS current mirror 210. The cross-linear loop 214 includes four transistors M1 to M4 coupled in the loop. Transistors M1 and M2 are coupled at their source terminals and cascaded between the input side of at least one PMOS current mirror 208 and at least one NMOS current mirror 210, wherein transistor M1 is an NMOS transistor whose drain terminal is coupled to the input side of at least one PMOS current mirror 208, and transistor M2 is a PMOS transistor whose drain terminal is coupled to the input side of at least one NMOS current mirror 210. In one example, the input node 202 of the transfer unit 200 is coupled to the source terminals of transistors M1 and M2. Transistors M3 and M4 are coupled at their source terminals and have their gate terminals coupled to the gate terminals of transistors M2 and M1, respectively, while their drain terminals are coupled to their respective gate terminals. Transistors M3 and M4 receive bias current I from current source 208 from their drain terminals, respectively. b and receives the reference voltage V at its source terminal. ref Transistors M1 and M2 will bias current I b Provided to at least one PMOS current mirror 208 and at least one NMOS current mirror 210, and based on a reference voltage V ref A bias voltage is set at the input node 202 of the transfer unit 200.

[0027] In a preferred embodiment, by providing at least one programmable current mirror among at least one PMOS current mirror 210 and at least one NMOS current mirror 212, the output current I out With discharge current I in The ratio is programmable. For example... Figure 2 In the example shown, the input side of the NMOS current mirror 212 includes multiple current sinks 216 to 222. The gate terminals of the transistors in current sink 222 are coupled to the gate terminals of corresponding transistors in the output side of the NMOS current mirror 212. This ratio can be programmed by providing a ratio signal to the gate terminals of the NMOS transistors in current sinks 216 to 220. In another example, the NMOS current mirror 212 can be enabled or disabled by providing an enable signal to the gate terminals and output side of the transistors in current sink 222. At least one PMOS current mirror 210 can also be arranged in the same manner to be programmable.

[0028] Figure 3 Waveform diagram 300, which illustrates an embodiment of this disclosure. Figure 1Under the control of the switch unit 102 of the capacitance measurement system 100, the voltage V at the first terminal 10a of the capacitance sensor 10 is measured during charging mode and transfer mode. x The changes.

[0029] Starting from the first cycle, in charging mode, the fourth switch 112 is turned off (e.g., by providing a de-assert control signal S4 to the fourth switch 112) to disconnect the transfer unit 104 from the capacitive sensor 10 and the parasitic capacitance element 12. In the first phase, the first switch 106 is closed (e.g., by providing an assert control signal S1 to the first switch 106) to couple the first terminal 10a of the capacitive sensor 10 to the power supply voltage V. reg Furthermore, by controlling signals S2 and S3 respectively, the second switch 108 is closed and the third switch 110 is turned off, thereby coupling the first terminal 10a of the capacitive sensor 10 to ground V. GND The capacitive sensor 10 is powered by a power supply voltage V. reg Charge until the voltage V at the first terminal 10a is reached. x Reaching a first predetermined voltage, such as the power supply voltage V reg .

[0030] Then, the switching unit 102 switches the system 100 from the first stage of the charging mode to the second stage by disconnecting the first switch 106 and the second switch 108 and turning on the third switch 110, so as to connect the first terminal 10a of the capacitive sensor 10 with the power supply voltage V. reg Disconnect and couple the second terminal 10b of the capacitive sensor 10 to the power supply voltage V. reg This causes the voltage V at the first terminal 10a of the capacitive sensor 10 to... x The voltage is increased to a second predetermined voltage. In a preferred embodiment, a first gap time 302 is provided between the first and second stages to ensure break-before-make switching action. In the second stage, the capacitive sensor 10 and the parasitic capacitance element 12 are coupled in series at the power supply voltage V. reg and land V GND Between. The increase from the first predetermined voltage to the second predetermined voltage is based on the capacitance C of the capacitance sensor 10. x The capacitance C of parasitic capacitor element 12 p In a preferred embodiment, the second predetermined voltage is defined according to equation (1).

[0031] The switching unit 102 then switches the system 100 from charging mode to transfer mode by turning on the fourth switch 112 (e.g., assertion control signal S4) to couple the first end 10a of the capacitive sensor 10 to the transfer unit 104.

[0032] In the transfer mode, the transfer unit 104 discharges the capacitive sensor 10 until the voltage V at the first terminal 10a of the capacitive sensor 10 is reached. x The voltage drops to the reference voltage V supplied to the transfer unit 104. ref A proportional third predetermined voltage. In a preferred embodiment, the third predetermined voltage is equal to the reference voltage V. ref The reference voltage V ref The bias voltage at the input node 202 of the transfer unit 104 is set. The amount of charge transferred to the sampling capacitor 116 is based on the voltage difference ΔV between the second predetermined voltage and the third predetermined voltage at the first terminal 10a of the first capacitive sensor 10. x In a preferred embodiment, the voltage difference ΔV x Defined according to the following equation:

[0033]

[0034] Therefore, in the capacitance C of parasitic capacitance element 12 p The capacitance C is much smaller than that of the capacitive sensor 10. x (For example, the capacitance C of the capacitance sensor 10) x In the case of 1 / 100 to 1 / 10, the voltage difference ΔV x Further definition based on the following equation:

[0035] ΔV x =2V reg -V ref (3)

[0036] The first cycle is followed by a second cycle, which is identical to the first cycle. Control signals S1 to S4 respectively connect the first switch 106 and the second switch 108, and disconnect the third switch 110 and the fourth switch 112. In a preferred embodiment, a second gap time 304 is preferably provided after the third switch 110 and the fourth switch 112 are disconnected and before the first switch 106 and the second switch 108 are connected to ensure that the switches operate with a disconnect-then-close action. Due to the power supply voltage V... reg and reference voltage V ref Both are determined by the bandgap voltage reference V, which serves as a temperature-independent voltage reference. bg The amount of charge generated and proportional to it is thus more stable with temperature and process in each cycle, and therefore the amount of charge transferred to sampling capacitor 116 is more stable with temperature and process.

[0037] refer to Figure 4 The diagram illustrates a flowchart of a method 400 for measuring the capacitance of a capacitance sensor using a capacitance measurement system, according to another embodiment of the present disclosure. Figure 1As shown in System 100, the capacitance measurement system can operate between a charging mode and a transfer mode for measuring, for example, the capacitance of a capacitance sensor 10, thereby sensing the touch or proximity of a conductive body. System 100 includes a switching unit 102 and a transfer unit 104 coupled to the switching unit 102. The switching unit 102 selectively couples a first terminal 10a and a second terminal 10b of the capacitance sensor 10 to a first power supply voltage and a second power supply voltage to charge the capacitance sensor 10. The transfer unit 104 is configured to discharge the capacitance sensor 10 in the transfer mode by means of a discharge current I from the capacitance sensor 10. in The image is mirrored to transfer multiple charges to the sampling capacitor, thereby measuring the capacitance of the capacitance sensor 10.

[0038] Starting from step 402, switching unit 102 couples the first terminal 10a of capacitive sensor 10 to a first power supply voltage 14a to charge capacitive sensor 10 until the voltage difference between the first terminal 10a and the second terminal 10b of capacitive sensor 10 reaches a first predetermined voltage. In a preferred embodiment, the first predetermined voltage is proportional to the first power supply voltage 14a. In another preferred embodiment, the charging includes coupling the first terminal 10a of capacitive sensor 10 to the first power supply voltage 14a and coupling the second terminal 10b of capacitive sensor 10 to ground. GND The first predetermined voltage is the same as the first power supply voltage 14a.

[0039] At step 404, the switching unit 102 disconnects the first terminal 10a of the capacitive sensor 10 from the first power supply voltage 14a. In a preferred embodiment, the switching unit 102 also disconnects the second terminal 10b of the capacitive sensor 10 from ground V. GND disconnect.

[0040] At step 406, the switching unit 102 couples the second terminal 10b of the capacitive sensor 10 to the second power supply voltage 14b to make the voltage V at the first terminal 10a of the capacitive sensor 10 V... x The voltage is increased to a second predetermined voltage. In a preferred embodiment, the first power supply voltage 14a and the second power supply voltage 14b are the same power supply voltage V. reg The power supply voltage V reg The bandgap voltage reference V serves as a temperature-independent voltage reference. bg It is generated and proportional to it. For example, the power supply voltage V reg 1.25V bg When the bandgap voltage reference V is under conditions of 50 ppm / C bg At 1.2V and 50ppm / C, the power supply voltage V reg The voltage is 1.5V. The increase from the first predetermined voltage to the second predetermined voltage is based on the capacitance C of the capacitive sensor 10.x The capacitance C of parasitic capacitor element 12 p In a preferred embodiment, the second predetermined voltage is defined according to equation (1). In a preferred embodiment, a first gap time 302 is provided between steps 404 and 406 to ensure that the switch operates with a break-before-make action.

[0041] At step 408, the switching unit 102 switches the system 100 from charging mode to transfer mode by electrically coupling the first terminal 10a of the capacitive sensor 10 to the input node of the current mirror of the transfer unit 104. This current mirror (e.g., as shown in the image) Figure 2 The current mirror 206 shown discharges the capacitive sensor 10 until the voltage V at the first terminal 10a of the capacitive sensor 10 is reached. x The voltage is reduced to a third predetermined voltage. This third predetermined voltage is different from the reference voltage V supplied to the transfer unit 104. ref Proportional. In a preferred embodiment, the third predetermined voltage is equal to the reference voltage V. ref The reference voltage V ref The bias voltage is set at the input node 114 of the transfer unit 104. In a preferred embodiment, the reference voltage V ref From the bandgap voltage reference V bg It is generated and proportional to it. In a preferred embodiment, the reference voltage V ref Equal to the bandgap voltage reference V bg In a preferred embodiment, the current mirror 206 is a Class AB current mirror, which includes components series-coupled to a third power supply voltage V. dd and the fourth power supply voltage V ss The presence of at least one PMOS current mirror 210 and at least one NMOS current mirror 212 between them allows for a reduction in the amount of current relative to the discharge current I. in The bias current.

[0042] At step 410, the current mirror 206 transmits the discharge current I... in Mirroring the output current I that charges the sampling capacitor 116 out Multiple charges are transferred to the sampling capacitor 116. The amount of charge is based on the voltage difference ΔV between a second predetermined voltage and a third predetermined voltage at the first terminal 10a of the first capacitive sensor 10. x In a preferred embodiment, the voltage difference ΔV x Defined according to equation (2). The capacitance C of the parasitic capacitance element 12... p The capacitance C is much smaller than that of the capacitive sensor 10. x (For example, the capacitance C of the capacitive sensor 10) x In the case of 1 / 100 to 1 / 10, the voltage difference ΔV x Further definition is based on equation (3).

[0043] At step 412, system 100 determines whether the voltage across sampling capacitor 116 reaches the trip voltage V. trip In one example, the trip voltage V trip Also derived from the bandgap voltage reference V bg It generates and is proportional to it. The capacitance C of sampling capacitor 116 s Large enough that the voltage across the sampling capacitor 116 reaches the trip voltage V. trip It stores several times the amount of the multiple charges at the same time.

[0044] At step 414, if the voltage across the sampling capacitor 116 does not reach the trip voltage V trip Then, system 100 switches from transfer mode back to charging mode by disconnecting the first terminal 10a of capacitive sensor 10 from the current mirror 206 of transfer unit 104, and returns to step 402 to start another cycle. In a preferred embodiment, a second gap time 304 is preferably provided between step 414 and step 402 to ensure the disconnect-before-close switch operation.

[0045] Repeat this cycle until the voltage across sampling capacitor 116 reaches the trip voltage V. trip Due to the power supply voltage V reg and reference voltage V ref Both are determined by the bandgap voltage reference V, which serves as a temperature-independent voltage reference. bg The amount of charge generated and proportional to it is thus stable with temperature and process in each cycle, and therefore the amount of charge transferred to sampling capacitor 116 remains constant with temperature and process.

[0046] At step 416, if the voltage across the sampling capacitor 116 reaches the trip voltage V trip Then, based on the repetition cycle of the charging mode and the transfer mode, the voltage difference ΔV provided by equation (3) in system 100 is... x And the capacitance C of sampling capacitor 116 s Determine the capacitance C x .

[0047] The description of preferred embodiments of this disclosure is for illustrative and descriptive purposes only and is not intended to be exhaustive or to limit the invention to the forms disclosed. As described in the claims, many modifications, alterations, variations, substitutions, and equivalents will be apparent to those skilled in the art without departing from the spirit and scope of this disclosure.

Claims

1. A system capable of operating between a charging mode and a transfer mode, comprising: A first input terminal configured to be coupled to a first end of a capacitive sensor and a second input terminal configured to be coupled to a second end of the capacitive sensor; A switching unit coupled to the first input terminal and the second input terminal, the switching unit being configured to switch between a charging mode and a transfer mode; as well as A transfer unit having an input terminal configured to: in transfer mode, be electrically coupled to a first terminal of the capacitive sensor via a switching unit, and in charging mode, be disconnected from the first terminal of the capacitive sensor via the switching unit; the transfer unit is configured to discharge the capacitive sensor in the transfer mode, including: A current mirror is configured to discharge the capacitive sensor with a discharge current until the voltage at the first terminal of the capacitive sensor drops to a first predetermined voltage, and to transfer multiple charges to a sampling capacitor by mirroring the discharge current. The current mirror is configured to set a bias voltage at the input terminal of the transfer unit based on a reference voltage, wherein the first predetermined voltage is based on the bias voltage.

2. The system according to claim 1, wherein: In the first stage of the charging mode, the capacitance sensor is connected to a first power supply voltage at its first terminal until the voltage difference between the first and second terminals of the capacitance sensor reaches a first voltage threshold. In the second stage of the charging mode, when the voltage difference between the first and second terminals of the capacitance sensor reaches a first voltage threshold, the capacitance sensor is disconnected from the first power supply voltage at the first terminal of the capacitance sensor. In the second phase of the charging mode, the capacitive sensor is connected to a second power supply voltage.

3. The system according to claim 2, wherein the switching unit comprises: A first switch is coupled between the first input terminal and the first power supply voltage; The second switch is coupled between the second input terminal and ground; as well as The third switch is coupled between the second input terminal and the second power supply voltage. In the first stage, the first and second switches are closed and the third switch is open to charge the capacitive sensor from the first terminal of the capacitive sensor, and in the second stage, the first and second switches are open and the third switch is closed to raise the voltage at the first terminal of the capacitive sensor to a second voltage threshold.

4. The system of claim 2, wherein the first voltage threshold is based on the first power supply voltage.

5. The system according to claim 2, wherein the first power supply voltage and the second power supply voltage are the same power supply voltage.

6. The system according to claim 5, wherein, The switching unit is further configured to: In the second phase of the charging mode after the capacitive sensor is connected to the second power supply voltage, the voltage at the first terminal of the capacitive sensor is increased to a second voltage threshold.

7. The system of claim 1, wherein the reference voltage is based on a bandgap voltage reference.

8. The system of claim 1, wherein the current mirror comprises at least one PMOS current mirror, at least one NMOS current mirror, and a cross-linear loop coupled to the at least one PMOS current mirror and the at least one NMOS current mirror.

9. A system capable of operating between a charging mode and a transfer mode, comprising: The first input terminal is configured to be coupled to the first end of the capacitive sensor; as well as A transfer unit having an input terminal configured to: be electrically disconnected from a first terminal of the capacitance sensor in the charging mode, and be electrically coupled to the first terminal of the capacitance sensor in the transfer mode, the transfer unit comprising: A current mirror, comprising at least one PMOS current mirror, at least one NMOS current mirror, and a translinear loop coupled to the at least one PMOS current mirror and the at least one NMOS current mirror, wherein the current mirror is configured as follows: The capacitive sensor is discharged using a discharge current until the voltage at the first terminal of the capacitive sensor drops to a first predetermined voltage, and multiple charges are transferred to the sampling capacitor by mirroring the discharge current. as well as The bias voltage at the input terminal of the transfer unit is set based on a reference voltage, wherein the first predetermined voltage is based on the bias voltage.

10. The system of claim 9, wherein the reference voltage is based on a bandgap voltage reference.

11. The system according to claim 9, further comprising: A second input terminal configured to be coupled to a second end of the capacitive sensor; as well as A switching unit coupled to the first input terminal and the second input terminal, the switching unit being configured to: In the first stage of the charging mode, the capacitive sensor is arranged to be charged from its first terminal by a first power supply voltage until the voltage difference between the first and second terminals of the capacitive sensor reaches a second predetermined voltage. In the second stage, the first terminal of the capacitive sensor is disconnected from the first power supply voltage, and the second terminal of the capacitive sensor is coupled to the second power supply voltage, so that the voltage at the first terminal of the capacitive sensor is increased to a third predetermined voltage.

12. The system of claim 11, wherein the switching unit comprises: A first switch is coupled between the first input terminal and the first power supply voltage; The second switch is coupled between the second input terminal and ground; as well as The third switch is coupled between the second input terminal and the second power supply voltage. In the first stage, the first and second switches are closed and the third switch is open to charge the capacitive sensor from the first terminal of the capacitive sensor, and in the second stage, the first and second switches are open and the third switch is closed to raise the voltage at the first terminal of the capacitive sensor to the third predetermined voltage.

13. The system of claim 11, wherein the second predetermined voltage is based on the first power supply voltage, and the third predetermined voltage is based on the first power supply voltage and the second power supply voltage.

14. The system of claim 11, wherein the first power supply voltage and the second power supply voltage are the same power supply voltage.

15. A method for measuring the capacitance of a capacitance sensor, comprising: In the charging mode, the capacitive sensor is charged, wherein the transfer unit is disconnected from the capacitive sensor. The method further includes connecting the input terminal of the transfer unit to the capacitive sensor for operation in transfer mode, and further comprising: during the transfer mode, Provide a reference voltage for the transfer unit; A bias voltage is set at the input of the transfer unit based on the reference voltage; and The transfer unit discharges the capacitive sensor with a discharge current until the voltage at the capacitive sensor reaches a voltage threshold, wherein the voltage threshold is based on the bias voltage.

16. The method according to claim 15, wherein, The transfer unit includes: At least one PMOS current mirror; At least one NMOS current mirror; and A translinear loop coupled to the at least one PMOS current mirror and the at least one NMOS current mirror.

17. The method of claim 15, wherein the reference voltage is based on a bandgap voltage reference.

18. The method of claim 15, further comprising: The transfer unit transfers charge to the sampling capacitor by mirroring the discharge current.

19. The method of claim 15, further comprising: In the first stage of the charging mode, the first terminal of the capacitive sensor is connected to the first power supply voltage until the voltage difference across the terminals of the capacitive sensor reaches a predetermined charging voltage threshold. as well as In the second stage of the charging mode, when the voltage difference across the terminals of the capacitance sensor reaches the predetermined charging voltage threshold, the first terminal of the capacitance sensor is disconnected from the first power supply voltage. In the second stage of the charging mode, when the voltage difference across the terminals of the capacitive sensor reaches the predetermined charging voltage threshold, the second terminal of the capacitive sensor is connected to the second power supply voltage.

20. The method of claim 19, wherein the predetermined charging voltage threshold is based on the first power supply voltage, and wherein the first power supply voltage and the second power supply voltage are the same power supply voltage.

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