Pixel driving circuit and display panel

Abstract

The present invention provides a pixel driver circuit and display panel. The pixel driver circuit includes a pulse amplitude modulation module for controlling the pulse amplitude of the driving current flowing through the light-emitting element via the driver module, and a first external compensation module for the pulse amplitude modulation module for detecting and compensating the threshold voltage of the driver module. A pulse width modulation module, in conjunction with the pulse width modulation module, controls the pulse width of the driving current flowing through the light-emitting element via the driver module, and a second external compensation module for the pulse width modulation module for detecting and compensating the threshold voltage of the driver transistor of the pulse width modulation module. Specifically, the circuit utilizes pulse width modulation at low grayscales to improve low-grayscale color shift, while utilizing pulse amplitude modulation at high grayscales to ensure high brightness. Furthermore, the circuit also includes external detection and compensation functions for the threshold voltages of the driver transistors of both the driver module and the pulse width modulation module, thereby achieving stable display brightness on the panel.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel driving circuit and a display panel. Background Art

[0002] Mini / Micro LED is widely used in the display field. Its driving methods are mainly divided into pulse amplitude modulation (PAM) driving and pulse width modulation (PWM) driving. At present, based on the respective advantages of the two in driving, a driving method combining PWM driving and PAM driving, namely PHM hybrid driving, has been developed. The existing PHM driving circuit includes two driving modules, PAM and PWM. PWM driving (changing pulse width) is used at low grayscale, and PAM driving (changing pulse amplitude) is used at high grayscale.

[0003] The PAM and PWM modules of existing PHM hybrid drive circuits each include a driver transistor. As the display panel ages, thin-film transistors are susceptible to threshold voltage drift. Therefore, the threshold voltage of the driver transistor needs to be compensated to offset the negative impact of this drift on the driver circuit and maintain stable LED light emission. The PAM and PWM modules of existing PHM hybrid drive circuits typically do not have compensation or use internal compensation to compensate for the driver transistor's threshold voltage. However, lack of compensation can lead to unstable LED light emission due to threshold voltage drift in the driver transistor. Internal compensation requires a large number of thin-film transistors. As display panel resolution increases, pixel size decreases, making internal compensation unsuitable for small pixels.

[0004] Therefore, it is urgent to propose a new pixel driving circuit that uses other compensation methods for the driving transistors of the PAM module and PWM module of the PHM hybrid driving circuit to offset the negative impact of the threshold voltage drift of the driving transistor on the driving circuit. Summary of the Invention

[0005] To solve the above problems, an embodiment of the present invention provides a pixel driving circuit for driving a light-emitting element in each sub-pixel unit of a display panel to emit light. The pixel driving circuit includes a driving module, and a pulse amplitude modulation module and a pulse width modulation module respectively connected to the driving module.

[0006] The pulse amplitude modulation module is used to control the pulse amplitude of the driving current flowing through the light-emitting element via the driving module; wherein the pulse amplitude modulation module includes a first external compensation module, and the first external compensation module is used to detect and compensate for the threshold voltage of the driving module;

[0007] The pulse width modulation module is used to control the pulse width of the driving current flowing through the light-emitting element in combination with the pulse amplitude modulation module via the driving module; wherein the pulse width modulation module includes a second external compensation module, and the second external compensation module is used to detect and compensate for the threshold voltage of the driving transistor of the pulse width modulation module.

[0008] In some embodiments, the driving module includes a first transistor, a gate of the first transistor is connected to a first node, a drain of the first transistor is connected to a constant high potential, and a source of the first transistor is connected to a second node.

[0009] In some embodiments, the pulse amplitude modulation module includes a second transistor, a first capacitor and a first external compensation module, and the first external compensation module includes a third transistor; wherein,

[0010] The gate of the second transistor is connected to the pulse amplitude modulation control signal line, the source of the second transistor is connected to the data signal line, and the drain of the second transistor is connected to the first node;

[0011] The first capacitor is coupled between the first node and the second node;

[0012] The gate of the third transistor is connected to the pulse amplitude modulation external compensation control signal line, the source of the third transistor is connected to the second node, and the drain of the third transistor is connected to the pulse amplitude modulation external compensation reference signal line.

[0013] In some embodiments, the pulse width modulation module includes a fourth transistor, a fifth transistor, a second capacitor, and a second external compensation module, and the second external compensation module includes a sixth transistor; wherein,

[0014] The gate of the fourth transistor is connected to the third node, the drain of the fourth transistor is connected to the first node, and the source of the fourth transistor is connected to the reset signal line;

[0015] The gate of the fifth transistor is connected to the pulse width modulation control signal line, the source of the fifth transistor is connected to the data signal line, and the drain of the fifth transistor is connected to the third node;

[0016] The second capacitor is coupled between the frequency sweep signal line and the third node;

[0017] The gate of the sixth transistor is connected to the pulse width modulation external compensation control signal line, the source of the sixth transistor is connected to the fourth node, and the drain of the sixth transistor is connected to the pulse width modulation external compensation reference signal line.

[0018] In some embodiments, the pulse amplitude modulation external compensation reference signal line obtains the threshold voltage of the first transistor by detecting the potential of the second node through the third transistor when the first transistor is turned off.

[0019] In some embodiments, the pulse width modulation external compensation reference signal line is used to obtain the threshold voltage of the fourth transistor by detecting the potential of the fourth node through the sixth transistor when the fourth transistor is turned off.

[0020] In some embodiments, if the fourth transistor is an N-type thin film transistor, the pulse width modulation voltage is less than a threshold voltage of the fourth transistor.

[0021] In some embodiments, the frequency sweep signal line increases the potential of the third node through the second capacitor, so as to pull down the potential of the first node through the reset signal line.

[0022] In addition, an embodiment of the present invention further provides a display panel comprising a plurality of sub-pixel units distributed in an array, each of the sub-pixel units comprising a light-emitting element, and the light-emitting element is connected between the driving module of the pixel driving circuit described above and a constant low potential.

[0023] In some embodiments, the light emitting element is a micro light emitting diode.

[0024] In a pixel driving circuit and display panel provided by embodiments of the present invention, the pixel driving circuit includes a driving module, and a pulse amplitude modulation module and a pulse width modulation module, respectively connected to the driving module. The pulse amplitude modulation module is used to control the pulse amplitude of the driving current flowing through the light-emitting element via the driving module, and the pulse amplitude modulation module includes a first external compensation module for detecting and compensating the threshold voltage of the driving module. The pulse width modulation module is used to control the pulse width of the driving current flowing through the light-emitting element via the driving module in conjunction with the pulse amplitude modulation module, and the pulse width modulation module includes a second external compensation module for detecting and compensating the threshold voltage of the driving transistor of the pulse width modulation module. Specifically, the pixel driving circuit uses a pulse width modulation driving mode at low grayscales to improve low-grayscale color shift, and uses a pulse amplitude modulation driving mode at high grayscales to ensure high brightness. Furthermore, the pixel driving circuit also has external detection and compensation functions for the threshold voltages of the driving transistors of both the driving module and the pulse width modulation module, thereby achieving stable display brightness of the panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The technical solutions and other beneficial effects of the present invention will be made apparent by describing in detail the specific embodiments of the present invention in conjunction with the accompanying drawings.

[0026] Figure 1 A structural diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0027] Figure 2 A timing diagram of a pixel driving circuit provided in an embodiment of the present invention;

[0028] Figure 3 A diagram showing the light-emitting element current and key node potentials of the pixel driving circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0030] like Figure 1 As shown, an embodiment of the present invention provides a pixel driving circuit for driving a light-emitting element LED in each sub-pixel unit of a display panel to emit light. The pixel driving circuit includes a driving module 300, and a pulse amplitude modulation (PAM) module 100 and a pulse width modulation (PWM) module 200 respectively connected to the driving module 300;

[0031] The pulse amplitude modulation (PAM) module 100 is used to control the pulse amplitude of the driving current flowing through the light-emitting element LED via the driving module 300; wherein the pulse amplitude modulation module 100 includes a first external compensation module 101, and the first external compensation module 101 is used to detect and compensate for the threshold voltage of the driving module 300;

[0032] The pulse width modulation (PWM) module 200 is used to control the pulse width of the driving current flowing through the light-emitting element LED via the driving module 300 in combination with the pulse amplitude modulation module 100; wherein, the pulse width modulation module 200 includes a second external compensation module 201, which is used to detect and compensate for the threshold voltage of the driving transistor of the pulse width modulation module 200.

[0033] The pixel driving circuit provided by an embodiment of the present invention includes a driving module 300, and a pulse amplitude modulation module 100 and a pulse width modulation module 200 respectively connected to the driving module 300; wherein the pulse amplitude modulation module 100 is used to control the pulse amplitude of the driving current flowing through the light-emitting element LED via the driving module 300, and the pulse amplitude modulation module 100 includes a first external compensation module 101, which is used to detect and compensate for the threshold voltage of the driving module 300; the pulse width modulation module 200 is used to control the pulse width of the driving current flowing through the light-emitting element LED via the driving module 300 in combination with the pulse amplitude modulation module 100, and the pulse width modulation module 200 includes a second external compensation module 201, which is used to detect and compensate for the threshold voltage of the driving transistor of the pulse width modulation module 200. That is, the pixel driving circuit uses pulse width modulation driving at low grayscale to improve low grayscale color deviation, and uses pulse amplitude modulation driving at high grayscale to ensure high brightness. At the same time, it also has external detection and compensation functions for the threshold voltages of the driving transistors of the driving module 300 and the pulse width modulation module 200, thereby achieving stability in the panel display brightness.

[0034] Please continue reading Figure 1 The driving module 300 includes a first transistor T1 , a gate of the first transistor T1 connected to the first node Q, a drain of the first transistor T1 connected to the constant high potential VDD, and a source of the first transistor T1 connected to the second node S.

[0035] Please continue reading Figure 1 , the pulse amplitude modulation module 100 includes a second transistor T2, a first capacitor C1 and a first external compensation module 101, wherein the first external compensation module 101 includes a third transistor T3;

[0036] The gate of the second transistor T2 is connected to the pulse amplitude modulation control signal line SPAM, the source of the second transistor T2 is connected to the data signal line Data, and the drain of the second transistor T2 is connected to the first node Q;

[0037] The first capacitor C1 is coupled between the first node Q and the second node S;

[0038] The gate of the third transistor T3 is connected to the pulse amplitude modulation external compensation control signal line Sense PAM, the source of the third transistor T3 is connected to the second node S, and the drain of the third transistor T3 is connected to the pulse amplitude modulation external compensation reference signal line Vref PAM.

[0039] The pulse amplitude modulation external compensation reference signal line Vref PAM is used to obtain the threshold voltage of the first transistor T1 by detecting the potential of the second node S when the first transistor T1 is turned off via the third transistor T3. Specifically, when the first transistor T1 is turned off, the gate-source potential difference of the first transistor T1 (the potential difference between the first node Q and the second node S) is the threshold voltage of the first transistor T1. When the potential of the first node Q is set to a known potential by the data signal line Data, the threshold voltage of the first transistor T1 can be obtained by the potential of the second node S.

[0040] Please continue reading Figure 1 , the pulse width modulation module 200 includes a fourth transistor T4, a fifth transistor T5, a second capacitor C2 and a second external compensation module 201, wherein the second external compensation module 201 includes a sixth transistor T6;

[0041] A gate of the fourth transistor T4 is connected to the third node P, a drain of the fourth transistor T4 is connected to the first node Q, and a source of the fourth transistor T4 is connected to the reset signal line Vneg;

[0042] A gate of the fifth transistor T5 is connected to the pulse width modulation control signal line SPWM, a source of the fifth transistor T5 is connected to the data signal line Data, and a drain of the fifth transistor T5 is connected to the third node P;

[0043] The second capacitor C2 is coupled between the sweep signal line Sweep and the third node P;

[0044] The gate of the sixth transistor T6 is connected to the pulse width modulation external compensation control signal line Sense PWM, the source of the sixth transistor T6 is connected to the fourth node M, and the drain of the sixth transistor T6 is connected to the pulse width modulation external compensation reference signal line Vref PWM.

[0045] The pulse width modulation external compensation reference signal line Vref PWM is connected to the sixth transistor T6, and when the fourth transistor T4 is turned off, the threshold voltage of the fourth transistor T4 is obtained by detecting the potential of the fourth node M. That is, when the fourth transistor T4 is turned off, the gate-source potential difference of the fourth transistor T4 (the potential difference between the third node P and the fourth node M) is the threshold voltage of the fourth transistor T4. When the potential of the third node P is set to a known potential by the data signal, the threshold voltage of the fourth node M can be obtained by detecting the potential of the fourth node M.

[0046] It should be noted that the pixel driving circuit also includes a peripheral circuit (not shown in the figure), which is set on the pulse amplitude modulation external compensation reference signal line Vref PAM or the pulse width modulation external compensation reference signal line Vref Between PWM and the data signal line Data, it is used to superimpose the threshold voltage of the first transistor T1 or the fourth transistor T4 on the data signal line Data when the threshold voltage of the first transistor T1 or the fourth transistor T4 is detected. Therefore, the threshold voltage of the first transistor T1 superimposed with the data voltage is applied to the first node Q (the gate of the first transistor T1) or the threshold voltage of the fourth transistor T4 superimposed with the data voltage is applied to the third node P (the gate of the fourth transistor T4) through the data signal line Data. According to the driving current formula through the thin film transistor: I=K(Vgs-Vth)2, where K is the intrinsic conductivity factor of the thin film transistor, Vgs is the gate-source potential difference of the thin film transistor, and Vth is the threshold voltage of the thin film transistor, when the first transistor T1 or the fourth transistor T4 is turned on, the driving current passing through the first transistor T1 offsets the threshold voltage of the first transistor T1, or the driving current passing through the fourth transistor T4 offsets the threshold voltage of the fourth transistor T4, thereby achieving threshold voltage compensation of the first transistor T1 or the fourth transistor T4.

[0047] It should be noted that if the fourth transistor T4 is an N-type thin-film transistor, the pulse width modulation voltage VPWM is less than the threshold voltage of the fourth transistor T4. The sweep signal line Sweep increases the potential of the third node P via the second capacitor C2 until the fourth transistor T4 turns on, thereby pulling down the potential of the first node Q via the reset signal line Vneg.

[0048] Specifically, pulse width modulation (PWM) is based on pulse amplitude modulation (PAM). The initial potential of the third node P is set to a pulse width modulation voltage VPWM via the data signal line Data. The potential of the third node P is then gradually increased from the pulse width modulation voltage VPWM via the second capacitor C2 via a sweep signal, thereby turning on the fourth transistor T4. The first node Q is then pulled down via the fourth transistor T4 via the reset signal line Vneg to turn off the light-emitting element LED. Different pulse width modulation voltage VPWM values will result in different turning-on times of the fourth transistor T4, thereby varying the time that the first node Q is pulled down, thereby adjusting the duration of the drive current flowing through the light-emitting element LED, that is, adjusting the pulse width of the drive current flowing through the light-emitting element LED. It can be understood that setting the initial potential of the third node P to the pulse width modulation voltage VPWM requires that the fourth transistor T4 is initially in the off state. Otherwise, if the fourth transistor T4 is always in the on state, the first node Q is always in the pull-down state, the first transistor T1 is always in the off state, the light-emitting element LED cannot emit light, and the light-emitting time of the light-emitting element LED cannot be adjusted. Therefore, when the fourth transistor T4 is an N-type thin film transistor, the pulse width modulation voltage VPWM is less than the threshold voltage of the fourth transistor T4, so that the fourth transistor T4 is initially in the off state.

[0049] Based on the above embodiments, embodiments of the present invention further provide a display panel comprising a plurality of sub-pixel units arranged in an array, each sub-pixel unit including a light-emitting element (LED), and the light-emitting element being connected between a driver module 300 of the above-described pixel driver circuit and a constant low voltage potential (VSS). The display panel and the pixel driver circuit have the same structure and advantageous effects, and the pixel driver circuit has been described in detail in the above embodiments and will not be repeated here.

[0050] In some embodiments, the light emitting element LED is a micro light emitting diode.

[0051] Based on the above embodiments, combined with Figure 1 、 Figure 2 and Figure 3 As shown in FIG, if the pixel driving circuit all uses N-type thin film transistors, the detailed workflow of the pixel driving circuit includes: T1 threshold voltage detection stage t1, T4 threshold voltage detection stage t2, VPWM voltage setting stage t3, PAM module driving stage t4, and PWM module adjustment stage t5. Among them, Vth1 is the threshold voltage of T1, and Vth4 is the threshold voltage of T4.

[0052] T1 threshold voltage detection stage t1: First, the SPWM signal and the Sense PWM signal are high, so that T5 and T6 are turned on, Data writes 0 potential to point P through T5, and Vref PWM writes 0 potential to point M through T6. Vgs of T4 = VP-VM = 0 < Vth4, and T4 is turned off; then the SPAM signal and the Sense PAM signal are high, so that T2 and T3 are turned on, Data writes 5V potential to point Q through T2, and Vref PAM writes 0 potential to point S through T3. Vgs of T1 = VQ-VS = 5V > Vth1, T1 is turned on, and VDD charges point S to increase the potential of point S until Vgs of T1 = VQ-VS = 5V-VS = Vth1, that is, when VS = 5V-Vth1, T1 is turned off; while the potential of point S gradually rises, since T3 is turned on, the potential of Vref PAM also gradually rises, so at the moment T1 is turned off, Vref The PAM detects the potential of point S and finds that the threshold voltage of T1 is Vth1 = 5V-VS. Thus, when T1 is turned on and the source potential of T1 is determined, the threshold voltage of T1 is compensated.

[0053] T4 threshold voltage detection stage t2: First, the SPAM signal and the Sense PAM signal are high, so that T2 and T3 are turned on, Data writes a 15V potential to the Q point through T2, and Vref PAM writes a 0 potential to the S point through T3. The Vgs of T1 is VQ-VS=15V>Vth1, T1 is turned on, VDD is 0 at this time, and the potential of the S point is kept at 0; then the SPWM signal and the Sense PWM signal are high, so that T5 and T6 are turned on, Data writes a 5V potential to the P point through T5 (the potential written by Data at this time should be greater than the threshold voltage Vth4 of T4), Vref PWM writes a 0 potential to the M point through T6, T4's Vgs=VP-VM=5V>Vth4, T4 is turned on, at this time Vneg is disconnected, Q point charges M point to increase the potential of M point, when T4's Vgs=VP-VM=5V-VM=Vth4, T4 is turned off; while the potential of M point gradually rises, since T6 is turned on, Vref The PWM potential also gradually rises. When T4 is turned off, Vref PWM detects the potential of point M and detects the threshold voltage of T4 as Vth4 = 5V-VM. When T4 is subsequently turned on and the source potential of T4 is determined, the threshold voltage compensation of T4 is achieved.

[0054] VPWM voltage setting stage t3: The SPWM signal and the Sense PWM signal are high, turning on T5 and T6. Data writes the pulse width modulation voltage VPWM (a negative value, less than Vth4) to point P through T5. Vref PWM writes 0 potential to point M through T6. Vgs of T4 = VP - VM = VPWM < Vth4, and T4 is turned off.

[0055] PAM module driving stage t4: The SPAM signal and the Sense PAM signal are high, turning on T2 and T3. Data writes the pulse amplitude modulation voltage VPAM to the Q point through T2, and Vref PAM writes 0 potential to the S point through T3. T1's Vgs = VQ - VS = VPAM > Vth1, T1 is turned on, and VDD is a high level of 15V. VDD drives the LED lamp to emit light through T1. Therefore, the light-emitting amplitude of the LED lamp can be adjusted by adjusting the size of VPAM.

[0056] PWM module driving stage t5: Vneg makes point M equal to 0 potential, and the Sweep signal gradually rises. Under the coupling effect of C2, the potential of point P will gradually rise from the VPWM potential until T4's Vgs=VP-VM=VP>Vth4. Then T4 turns on, and Vneg pulls down point Q to 0 potential through T4, thereby turning off T1 and the LED lamp. Therefore, by adjusting the size of VPWM, the opening time of T4 can be adjusted, thereby adjusting the lighting time of the LED lamp.

[0057] In summary, the PAM module of the pixel driver circuit can control the pulse amplitude of the LED drive current by adjusting the VPAM voltage, and the PWM module can control the pulse width of the LED drive current by adjusting the VPWM voltage. In other words, the PWM module can control the on-time of the LED drive current, i.e., the pulse width of the LED drive current, while simultaneously controlling the pulse amplitude of the LED drive current. This allows the pixel driver circuit to simultaneously control both the pulse amplitude and pulse width of the LED drive circuit. This allows the pixel driver circuit to use pulse-width modulation (PWM) at low grayscales to improve low-grayscale color shift, and to use pulse-amplitude modulation (PAM) at high grayscales to ensure high brightness. Furthermore, the pixel driver circuit provides external detection and compensation for the threshold voltages of the driver transistors in both the driver module and the PWM module, thereby achieving panel display brightness stability and avoiding the problem of unstable LED light emission caused by threshold voltage drift of the driver transistors when no compensation is applied. Internal compensation requires a large number of thin-film transistors, and as display panel resolution increases, pixel size decreases, making internal compensation unsuitable for small pixels.

[0058] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0059] The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present invention; ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A pixel driving circuit for driving a light-emitting element in each sub-pixel unit of a display panel to emit light, characterized in that: The pixel driving circuit includes a driving module, and a pulse amplitude modulation module and a pulse width modulation module respectively connected to the driving module; The pulse amplitude modulation module is used to control the pulse amplitude of the driving current flowing through the light-emitting element via the driving module; wherein the pulse amplitude modulation module includes a first external compensation module, and the first external compensation module is used to detect and compensate for the threshold voltage of the driving module; The pulse width modulation module is used to control the pulse width of the driving current flowing through the light-emitting element in combination with the pulse amplitude modulation module via the driving module; wherein the pulse width modulation module includes a second external compensation module, the second external compensation module is used to detect and compensate for the threshold voltage of the driving transistor of the pulse width modulation module; The driving module includes a first transistor, a gate of the first transistor is connected to a first node, a drain of the first transistor is connected to a constant voltage high potential, and a source of the first transistor is connected to a second node; The pulse width modulation module further includes a fourth transistor, a fifth transistor and a second capacitor; the driving transistor is the fourth transistor; The gate of the fourth transistor is connected to the third node, the drain of the fourth transistor is connected to the first node, and the source of the fourth transistor is connected to the reset signal line; The gate of the fifth transistor is connected to the pulse width modulation control signal line, the source of the fifth transistor is connected to the data signal line, and the drain of the fifth transistor is connected to the third node; The second capacitor is coupled between the frequency sweep signal line and the third node; The source of the fourth transistor is further connected to a fourth node, and the second external compensation module is connected to the fourth node.

2. The pixel driving circuit according to claim 1, wherein: The pulse amplitude modulation module includes a second transistor, a first capacitor and a first external compensation module, and the first external compensation module includes a third transistor; wherein, The gate of the second transistor is connected to the pulse amplitude modulation control signal line, the source of the second transistor is connected to the data signal line, and the drain of the second transistor is connected to the first node; The first capacitor is coupled between the first node and the second node; The gate of the third transistor is connected to the pulse amplitude modulation external compensation control signal line, the source of the third transistor is connected to the second node, and the drain of the third transistor is connected to the pulse amplitude modulation external compensation reference signal line.

3. The pixel driving circuit according to claim 2, wherein: The second external compensation module includes a sixth transistor; wherein, The gate of the sixth transistor is connected to the pulse width modulation external compensation control signal line, the source of the sixth transistor is connected to the fourth node, and the drain of the sixth transistor is connected to the pulse width modulation external compensation reference signal line.

4. The pixel driving circuit according to claim 2, wherein: The pulse amplitude modulation external compensation reference signal line is connected to the third transistor to obtain the threshold voltage of the first transistor by detecting the potential of the second node when the first transistor is turned off.

5. The pixel driving circuit according to claim 3, wherein: The pulse width modulation external compensation reference signal line is connected to the sixth transistor to obtain the threshold voltage of the fourth transistor by detecting the potential of the fourth node when the fourth transistor is turned off.

6. The pixel driving circuit according to claim 3, wherein: If the fourth transistor is an N-type thin film transistor, the pulse width modulation voltage is less than the threshold voltage of the fourth transistor; The pulse width modulation voltage is the initial potential of the third node.

7. The pixel driving circuit according to claim 3, wherein: The frequency sweep signal line increases the potential of the third node through the second capacitor, so as to pull down the potential of the first node through the reset signal line.

8. A display panel, characterized in that: The invention comprises a plurality of sub-pixel units distributed in an array, each of the sub-pixel units comprises a light-emitting element, and the light-emitting element is connected between a driving module of the pixel driving circuit according to any one of claims 1 to 7 and a constant low voltage potential.

9. The display panel according to claim 8, wherein: The light emitting element is a micro light emitting diode.

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