Image sensor, method for forming pixel, pixel readout circuit and calibration method
By introducing deep trench isolation and metal gate structure into the CMOS image sensor and optimizing the process parameters of the pixels, the crosstalk problem between adjacent pixels is solved, and image quality and photoelectric conversion efficiency are improved.
Patent Information
- Application Number
- CN202210208513.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-04
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2042-03-04
AI Technical Summary
As the size of the CMOS image sensor pixels decreases and the distance is shortened, crosstalk between adjacent pixels becomes very serious, affecting image quality.
By providing a deep trench isolation (DTI) structure and metal gate (MG) on the substrate of the image sensor, the first photoelectric sensor element of each pixel is isolated from the second photoelectric sensor element, and a depletion region within the pixel is formed by specific process parameters, the structural and process parameters of the pixel are optimized to reduce crosstalk.
It effectively reduces crosstalk between adjacent CIS pixels, improves the image quality of the image sensor, and enhances the photoelectric conversion quantum efficiency of the pixels.
Smart Images

Figure CN114567734B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of imaging, and more particularly to an image sensor, a method for forming pixels, a pixel readout circuit, and a calibration method. Background Art
[0002] As complementary metal oxide semiconductor (CMOS) image sensor (CIS) pixels develop towards billion-level pixels and sub-micron size, the size of CIS pixels is getting smaller and smaller, and the distance between CIS pixels is getting smaller and smaller. This will lead to very serious crosstalk problems between adjacent CIS pixels.
[0003] Therefore, a technology for reducing crosstalk between adjacent CIS pixels is needed. Summary of the invention
[0004] This Summary is provided to introduce in simplified form a selection of concepts that are further described below in the Detailed Description. This Summary is not intended to identify key features and / or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
[0005] According to some example embodiments, an image sensor includes: a substrate including a plurality of pixels, each pixel including a first photoelectric sensing device and a second photoelectric sensing device for converting an optical signal into an electrical signal; a plurality of deep trench isolation (DTI) structures, each DTI structure being disposed within a corresponding pixel in the substrate to isolate the first photoelectric sensing device from the second photoelectric sensing device of the corresponding pixel; and a plurality of metal gates (MGs), the plurality of MGs being correspondingly disposed above the plurality of DTI structures, wherein, in each pixel, the second photoelectric sensing device is accommodated within the first photoelectric sensing device.
[0006] In each pixel, the second photoelectric sensor device may be disposed at the center of the pixel, the second photoelectric sensor device may be accommodated in the DTI structure, the DTI structure may be accommodated in the first photoelectric sensor device, and the center lines of the first photoelectric sensor device, the DTI structure, and the second photoelectric sensor device in each pixel may coincide.
[0007] Each DTI structure may include a first periphery and a second periphery that are concentric with each other and have the same shape. The shapes of the first periphery and the second periphery may be elliptical. The major axis of the first periphery and the major axis of the second periphery may be consistent in direction with the long side of the photosensitive area of the chip of the image sensor. The ratio of the major axis to the minor axis of the first periphery and the second periphery may be the same as the ratio of the long side to the short side of the photosensitive area.
[0008] Each MG may include a third periphery and a fourth periphery that are concentric with each other and have the same shape, the shapes of the third periphery and the fourth periphery may be the same as the shapes of the first periphery and the second periphery, the centers of the third periphery and the fourth periphery may coincide with the centers of the first periphery and the second periphery, and the spacing between the third periphery and the fourth periphery may be the same as or different from the spacing between the first periphery and the second periphery.
[0009] The image sensor may also include: a pinning layer, arranged above the substrate; a high-K dielectric constant layer, arranged above the pinning layer; and a passivation layer, arranged above the high-K dielectric constant layer; wherein the multiple DTI structures extend from the upper surface of the high-K dielectric constant layer or the lower surface of the passivation layer toward the substrate.
[0010] According to some example embodiments, a method of forming a pixel includes: forming a first photoelectric sensing device disposed outside a deep trench isolation (DTI) structure of the pixel by using a first process parameter; and forming a second photoelectric sensing device disposed within the DTI structure of the pixel by using a second process parameter, wherein the first photoelectric sensing device is formed before the second photoelectric sensing device or the first photoelectric sensing device is formed after the second photoelectric sensing device.
[0011] The first process parameters may include a first N buried layer ion implantation concentration, a first implantation energy, a first thermal diffusion time, and a first temperature. The second process parameters may include a second N buried layer ion implantation concentration, a second implantation energy, a second thermal diffusion time, and a second temperature. The first N buried layer ion implantation concentration may be less than the second N buried layer ion implantation concentration, the first implantation energy may be less than the second implantation energy, the first thermal diffusion time may be less than the second thermal diffusion time, and the first temperature may be equal to the second temperature.
[0012] According to some example embodiments, a pixel readout circuit includes: a first transfer transistor connected to a first photosensing device disposed outside a deep trench isolation (DTI) structure of a pixel; and a second transfer transistor connected to a second photosensing device disposed within the DTI structure of the pixel.
[0013] According to some example embodiments, a method for calibrating crosstalk includes: obtaining a first image by reading a signal of a first photosensor device outside a deep trench isolation (DTI) structure of each pixel; obtaining a second image by reading a signal of a second photosensor device within the DTI structure of each pixel; obtaining a third image by combining the first image with the second image; and calibrating the third image using the second image.
[0014] The step of calibrating the third image using the second image may include: calculating a first average value of pixel values of multiple pixels of the second image; calculating the ratio of the pixel value of each pixel of the second image to the first average value; calculating a second average value of the pixel values of multiple pixels of the third image; and calibrating the pixel values of corresponding pixels of the third image based on the ratio of the pixel value of each pixel of the second image to the first average value and the second average value, so that the ratio of the pixel value of each pixel of the second image to the first average value is the same as the ratio of the calibrated pixel value of the corresponding pixel of the third image to the second average value.
[0015] According to some example embodiments, a non-transitory computer-readable storage medium stores instructions which, when executed by a processor, cause the processor to perform the method disclosed above.
[0016] An image sensor, a method of forming a pixel, a pixel readout circuit, and a calibration method according to some example embodiments of the inventive concepts may reduce crosstalk between adjacent CIS pixels.
[0017] Additional aspects and / or advantages of the inventive concepts will be set forth in part in the description which follows and, in part, will be obvious from the description, and / or may be learned by practice of various exemplary embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The above and other objects, features and advantages of the present disclosure will become more apparent through the following detailed description in conjunction with the accompanying drawings, in which:
[0019] Figure 1 is a block diagram illustrating an image sensor according to an example embodiment of the present disclosure;
[0020] Figure 2 is a cross-sectional view illustrating an image sensor according to an example embodiment of the present disclosure;
[0021] Figure 3 is a top view of an image sensor along line AA' according to an example embodiment of the present disclosure;
[0022] Figure 4 is a flowchart illustrating a method of forming a pixel according to an example embodiment of the present disclosure;
[0023] Figure 5 is a circuit diagram illustrating a pixel readout circuit according to an example embodiment of the present disclosure;
[0024] Figure 6 is a flow chart illustrating a method of calibrating crosstalk according to an example embodiment of the present disclosure; and
[0025] Figure 7 is a block diagram illustrating a mobile terminal according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION
[0026] The following detailed description is provided to help the reader obtain a comprehensive understanding of the methods, devices and / or systems described herein. However, after understanding the disclosure of the present application, various changes, modifications and equivalents of the methods, devices and / or systems described herein will be clear. For example, except for the operations that must occur in a specific order, the order of operations described herein is only an example and is not limited to those orders set forth herein, but can be changed as will be clear after understanding the disclosure of the present application. In addition, for greater clarity and simplicity, the description of features known in the art may be omitted.
[0027] The features described herein may be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein have been provided to illustrate only some of the many possible ways to implement the methods, devices, and / or systems described herein that will be clear after understanding the disclosure of the present application.
[0028] The structural or functional description of the examples disclosed herein below is intended only for the purpose of describing the examples, and the examples may be implemented in various forms. The examples are not intended to be limiting, but various modifications, equivalents, and substitutes are also intended to be included within the scope of the claims.
[0029] Although the terms "first" or "second" are used to explain various components, the components are not limited to the terms. These terms should only be used to distinguish one component from another component. For example, within the scope of the rights according to the concept of the present disclosure, a "first" component may be referred to as a "second" component, or similarly, a "second" component may be referred to as a "first" component.
[0030] It will be understood that when a component is referred to as being “connected to” another component, the component may be directly connected or coupled to the other component or intervening components may be present.
[0031] As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. It should also be understood that when the terms "include" and / or "comprising" are used in this specification, it indicates the presence of stated features, integers, steps, operations, elements, components or combinations thereof, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.
[0032] Unless otherwise defined, all terms (including technical or scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the examples belong. It will also be understood that, unless expressly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and will not be interpreted in an idealized or overly formal sense.
[0033] Hereinafter, examples will be described in detail with reference to the accompanying drawings. Regarding reference numerals assigned to elements in the drawings, it should be noted that the same elements will be denoted by the same reference numerals and redundant descriptions thereof will be omitted.
[0034] Figure 1 is a block diagram illustrating an image sensor according to an example embodiment of the present disclosure.
[0035] The image sensor according to various exemplary embodiments of the present disclosure may be included in, for example, a mobile phone, a tablet personal computer (PC), a personal digital assistant (PDA), etc. However, the present disclosure is not limited thereto, and the image sensor according to the present disclosure may be included in any electronic device having an image acquisition function.
[0036] Reference Figure 1 The image sensor 100 according to some example embodiments includes a pixel array 10 including two-dimensionally arranged pixels each including two photoelectric sensing devices for converting an optical signal into an electrical signal, a timing generator 20, a row decoder 30, a row driver 40, a correlated double sampler (CDS) 50, an analog-to-digital converter (ADC) 60, a latch 70, and a column decoder 80. Here, the photoelectric sensing device may be a photodiode, a photosensitive diode, etc., but is not limited thereto.
[0037] Those skilled in the art will appreciate that the image sensor may include more or fewer components than shown in the figure, or the components included in the image sensor may be separated or combined.
[0038] The pixel array 10 includes a plurality of unit pixels arranged two-dimensionally. The plurality of unit pixels may perform a function of converting an optical image into an electrical output signal.
[0039] The pixel array 10 may receive a plurality of driving signals including a row selection signal, a reset signal, a charge transfer signal, etc. from the row driver 40 and may be driven accordingly. In addition, the converted electrical output signal may be provided to the correlated double sampler 50 through a signal line (eg, a vertical signal line).
[0040] The timing generator 20 may provide a timing signal and a control signal to the row decoder 30 and the column decoder 80 .
[0041] The row driver 40 may provide a plurality of driving signals for driving a plurality of unit pixels to the pixel array 10 according to the decoding result at the row decoder 30. When the unit pixels are arranged in a matrix form, a driving signal may be provided to each row.
[0042] The correlated double sampler 50 may receive the output signal generated at the pixel array 10 through the vertical signal line, and may hold and sample the received signal. That is, the correlated double sampler 50 may double sample a specific noise level and signal level according to the output signal, and output a difference level corresponding to the difference between the noise level and the signal level.
[0043] The analog-to-digital converter 60 may convert an analog signal corresponding to the difference level into a digital signal and output the converted result.
[0044] The latch 70 may latch a digital signal, and may sequentially output the latched signal to the image signal processor according to a result of decoding at the column decoder 80 .
[0045] Combine the following Figure 2 A cross-sectional view of an image sensor according to an example embodiment of the present disclosure is described.
[0046] Figure 2 is a cross-sectional view illustrating an image sensor according to an example embodiment of the present disclosure. Figure 3 is a top view of an image sensor along line AA′ according to an example embodiment of the present disclosure.
[0047] Reference Figure 2 The image sensor 200 includes a silicon base layer 110 , a pinning (PIN) layer 120 , a high insulating dielectric (Hik) layer 130 , a passivation layer 140 , a metal grid (MG) 150 and a deep trench isolation (DTI) structure 160 .
[0048] The silicon base layer 110 may include a plurality of pixels, each pixel including a first photo-sensing device and a second photo-sensing device for converting an optical signal into an electrical signal.
[0049] like Figure 2 As shown in , the silicon base layer 110 may include a first pixel L and a second pixel M, the first pixel L may include a first photoelectric sensing device a1 and a second photoelectric sensing device b1, and the second pixel M may include a first photoelectric sensing device a2 and a second photoelectric sensing device b2, wherein the second photoelectric sensing device b1 is accommodated in the first photoelectric sensing device a1, and the second photoelectric sensing device b2 is accommodated in the first photoelectric sensing device a2. However, the example is not limited thereto, and the number of pixels included in the silicon base layer and the number of photoelectric sensing devices included in the pixels may be variously changed as needed.
[0050] The PIN layer 120 may be disposed over the silicon base layer 110 .
[0051] The Hik layer 130 may be disposed over the PIN layer 120. The Hik layer 130 may also be referred to as a high-K dielectric constant layer.
[0052] The passivation layer 140 may be disposed over the Hik layer 130 .
[0053] In some example embodiments, each DTI structure 160 may be disposed in a corresponding pixel or pixel region to isolate a first photoelectric sensing device from a second photoelectric sensing device in the corresponding pixel or pixel region. For example, a DTI structure 160 may be disposed in a first pixel L to isolate a first photoelectric sensing device a1 from a second photoelectric sensing device b1 of the first pixel L. In the first pixel L, the second photoelectric sensing device b1 is disposed at the center of the first pixel L, the second photoelectric sensing device b1 is accommodated in the DTI structure, and the DTI structure is accommodated in the first photoelectric sensing device a1. The center lines of the first photoelectric sensing device a1, the DTI structure, and the second photoelectric sensing device b1 in the first pixel L coincide.
[0054] In some example embodiments, the DTI structure 160 may extend from a surface where the Hik layer 130 and the passivation layer 140 contact each other toward the silicon base layer 110. For example, the DTI structure 160 may extend from an upper surface of the Hik layer 130 or a lower surface of the passivation layer 140 toward the silicon base layer 110.
[0055] Each MG 150 may be correspondingly disposed above each DTI structure 160 .
[0056] In some example embodiments, each DTI structure includes a first perimeter that is concentric with each other and has the same shape (see Figure 3 DTI-1) and the second peripheral (see Figure 3 DTI-2), each MG includes a third periphery and a fourth periphery that are concentric with each other and have the same shape, the shapes of the third periphery and the fourth periphery are the same as the shapes of the first periphery and the second periphery, and the centers of the third periphery and the fourth periphery of the MG coincide with the centers of the first periphery and the second periphery of the DTI structure corresponding to the MG. For example, the shapes of the first periphery, the second periphery, the third periphery and the fourth periphery may be shapes with corners (e.g., rectangle, square, etc.) or shapes without corners (e.g., circle, ellipse, etc.).
[0057] However, when the shapes of the first periphery, the second periphery, the third periphery and the fourth periphery are shapes with corners, stress and process defects may exist at the corners, thereby causing dark current. In addition, when the shapes of the first periphery, the second periphery, the third periphery and the fourth periphery are shapes without direction (for example, a circle) or the directions of the shapes of the first periphery, the second periphery, the third periphery and the fourth periphery are inconsistent with the direction of the photosensitive area of the chip of the image sensor 200, the photoelectric conversion quantum efficiency may not be high.
[0058] Therefore, in order to further overcome the above-mentioned problems, the shapes of the first periphery and the second periphery of the DTI structure according to the example embodiment may be set to an ellipse, the major axis of the first periphery and the major axis of the second periphery are consistent in direction with the long side of the photosensitive area of the chip of the image sensor 200, and the ratio of the major axis to the minor axis of the first periphery and the second periphery is the same as the ratio of the long side to the short side of the photosensitive area. Figure 3 A top view of the image sensor along line AA′ is shown in which the shapes of the first periphery and the second periphery of the DTI structure are set to be elliptical.
[0059] In some example embodiments, the spacing between the third perimeter and the fourth perimeter of each MG is the same as or different from the spacing between the first perimeter and the second perimeter of each DTI structure.
[0060] In the present disclosure, by disposing the DTI structure and the MG in the pixel, the two photoelectric sensing devices of the pixel are isolated, so that an image not affected by crosstalk and an image affected by crosstalk are obtained through the two photoelectric sensing devices and the crosstalk is calibrated by using the two images. Figure 6 Describe in detail the method of calibrating crosstalk.
[0061] In the present disclosure, by setting the shape of the DTI structure and the MG to an ellipse and setting the direction of the ellipse to be consistent with the direction of the photosensitive area of the chip of the image sensor 200, the diagonal crosstalk can be further reduced, the dark current problem in the pixel can be optimized, and the amount of light entering the pixel can be increased, so that the photoelectric conversion quantum efficiency of the pixel is significantly improved.
[0062] Figure 4 is a flowchart illustrating a method of forming a pixel according to an example embodiment of the present disclosure.
[0063] In some example embodiments, the method of forming the above-mentioned pixel includes: by adjusting the N buried layer ion implantation concentration, implantation energy, thermal diffusion time and temperature, the depletion region in the pixel is divided into an annular depletion region Depletion1 outside the DTI structure and an elliptical depletion region Depletion2 inside the DTI structure, wherein the annular depletion region Depletion1 outside the DTI structure and the elliptical depletion region Depletion2 inside the DTI structure are separated by the DTI structure. Here, the annular depletion region Depletion1 outside the DTI structure may constitute a first photoelectric sensor device of the pixel, and the elliptical depletion region Depletion2 inside the DTI structure may constitute a second photoelectric sensor device of the pixel.
[0064] Specifically, refer to Figure 4 In step S410, a first photosensor device disposed outside the DTI structure of the pixel is formed by using a first process parameter.
[0065] In step S420 , a second photosensor device disposed within the DTI structure of the pixel is formed by using a second process parameter.
[0066] In some example embodiments, the first process parameter package may include a first N buried layer ion implantation concentration, a first implantation energy, a first thermal diffusion time, and a first temperature; and the second process parameter package may include a second N buried layer ion implantation concentration, a second implantation energy, a second thermal diffusion time, and a second temperature. For example, the first N buried layer ion implantation concentration may be less than the second N buried layer ion implantation concentration, the first implantation energy may be less than the second implantation energy, the first thermal diffusion time may be less than the second thermal diffusion time, and the first temperature may be equal to the second temperature.
[0067] For example, the ion implantation concentration of the first N buried layer can be 4×10 19 / cm 3 The first implantation energy may be 15kev, the first thermal diffusion time may be 1 minute, and the first temperature may be 1000°C; the second N buried layer ion implantation concentration may be 5×10 19 / cm 3 , the second implantation energy may be 20 kev, the second thermal diffusion time may be 5 minutes, and the second temperature may be 1000° C. However, examples are not limited thereto, and the first and second process parameters may include other parameters, and the first and second process parameters may vary as needed.
[0068] Although Figure 4 The first photoelectric sensor device is shown to be formed before the second photoelectric sensor device, but the example is not limited thereto, and the first photoelectric sensor device may be formed after the second photoelectric sensor device. In addition, the method of forming the above-mentioned pixel is not limited to Figure 4The method shown in , and other existing methods may also be used to form the above-mentioned pixels.
[0069] Figure 5 is a circuit diagram illustrating a pixel readout circuit according to an example embodiment of the present disclosure.
[0070] In some example embodiments, the pixel readout circuit 500 may be included in an image sensor.
[0071] like Figure 5 As shown in , the pixel readout circuit 500 may include a first transfer transistor TG1, a second transfer transistor TG2, a reset transistor RST, a source follower amplifier Amp, a selection transistor Select, and a vertical signal line VDL.
[0072] The first transfer transistor TG1 (eg, a drain terminal of the first transfer transistor TG1 ) may be connected to a first photosensing device disposed outside the DTI structure of the pixel.
[0073] A gate of the source follower amplifier Amp may be connected to a source terminal of the first transfer transistor TG1 , and a source terminal of the source follower amplifier Amp may be connected to a drain terminal of the select transistor Select.
[0074] In some example embodiments, a signal of the first photosensing device may be read through the first transfer transistor TG1 , the source follower amplifier Amp, and the selection transistor Select.
[0075] The second transfer transistor TG2 (eg, a drain terminal of the second transfer transistor TG2 ) may be connected to a second photosensing device disposed within the DTI structure of the pixel.
[0076] A drain terminal of the reset transistor RST may be connected to a source terminal of the second transfer transistor TG2 , and a source terminal of the reset transistor RST may be connected to a drain terminal of the source follower amplifier Amp and applied with a power supply voltage VPIX.
[0077] In some example embodiments, a signal of the second photosensing device may be read through the second transfer transistor TG2 , the reset transistor RST, the source follower amplifier, and the selection transistor Select.
[0078] Although Figure 5 An example of a pixel readout circuit is shown, but those skilled in the art will appreciate that other pixel readout circuits capable of separately reading out signals of two photosensing devices or two depletion regions within one pixel may be applicable hereto.
[0079] Figure 6 is a flow chart illustrating a method of calibrating crosstalk according to an example embodiment of the present disclosure.
[0080] In some example embodiments, the following method of calibrating crosstalk may be performed by a processor disposed outside the image sensor.
[0081] Reference Figure 6 In step S610, the processor may obtain a first image by reading a signal of a first photosensor device outside the DTI structure of each pixel.
[0082] In step S620 , the processor may obtain a second image by reading a signal of a second photosensor device within the DTI structure of each pixel.
[0083] For example, the first image represents an image affected by the crosstalk, and the second image represents an image not affected by the crosstalk.
[0084] In step S630 , the processor may obtain a third image by combining the first image with the second image.
[0085] For example, the processor may obtain the third image by adding pixel values of corresponding pixels of the first image and the second image.
[0086] In step S640, the processor may calibrate the third image using the second image. The calibrated third image is a high-quality image that is less affected by crosstalk.
[0087] In some example embodiments, the processor may calibrate the third image by calculating a first average value of pixel values of multiple pixels of the second image, calculating a ratio of the pixel value of each pixel of the second image to the first average value, calculating a second average value of pixel values of multiple pixels of the third image, and calibrating the pixel values of corresponding pixels of the third image based on the ratio of the pixel value of each pixel of the second image to the first average value and the second average value, so that "the ratio of the pixel value of each pixel of the second image to the first average value" is the same as "the ratio of the calibrated pixel value of the corresponding pixel of the third image to the second average value".
[0088] In another example embodiment, the processor may further divide the second image into a plurality of regions before calibrating the third image, and perform the calibration method in units of regions.
[0089] Although the method of calibrating crosstalk using images affected by crosstalk and images not affected by crosstalk according to an example embodiment of the present disclosure is shown above, the present disclosure is not limited thereto, and other existing methods of calibrating crosstalk using images affected by crosstalk and images not affected by crosstalk may also be used.
[0090] Figure 7 is a block diagram illustrating a mobile terminal according to an exemplary embodiment of the present disclosure.
[0091] like Figure 7 As shown in , a mobile terminal 700 in some example embodiments includes a sensor unit 710 , a controller 720 , a communication unit 730 , an input unit 740 , a storage unit 750 , and a display unit 760 .
[0092] The sensor unit (eg, the image sensor) 710 is connected to the controller 720. The sensor unit 710 is used to capture images (eg, the first image and the second image). The controller 720 processes the images output by the sensor unit 710 (eg, using Figure 6 The controller 720 may display the processed image (eg, the third image after calibration) on the display unit 760 and / or may store the image in the storage unit 750.
[0093] The communication unit 730 may perform communication operations of the mobile terminal. The communication unit 730 may establish a communication channel to a communication network and / or may perform communication associated with, for example, image processing.
[0094] The input unit 740 is configured to receive input various information and various control signals and transmit the input information and control signals to the controller 720. The input unit 740 may be implemented by various input means such as a touch screen; however, example embodiments are not limited thereto.
[0095] The storage unit 750 may include a volatile memory and / or a non-volatile memory. The storage unit 750 may store various data generated and used by the mobile terminal. For example, the storage unit 750 may store an operating system, an application program (e.g., an application program associated with the method of the present disclosure) for controlling the operation of the mobile terminal. The controller 720 may control the overall operation of the mobile terminal and may control part or all of the internal elements of the mobile terminal. The controller 720 may be implemented as a general-purpose processor, an application processor (AP), an application-specific integrated circuit, a field programmable gate array, etc., but the example embodiments are not limited thereto.
[0096] The devices, units, modules and other components described herein are implemented by hardware components. Examples of hardware components that can be used to perform the operations described in this application include, where appropriate, controllers, sensors, generators, drivers, memories, comparators, arithmetic logic units, adders, subtractors, multipliers, dividers, integrators, and any other electronic components configured to perform the operations described in this application. In other examples, one or more hardware components in the hardware components that perform the operations described in this application are implemented by computing hardware (e.g., by one or more processors or computers). A processor or computer may be implemented by one or more processing elements (such as logic gate arrays, controllers and arithmetic logic units, digital signal processors, microcomputers, programmable logic controllers, field programmable gate arrays, programmable logic arrays, microprocessors, or any other device or combination of devices configured to respond and execute instructions in a limited manner to achieve the desired result). In one example, a processor or computer includes or is connected to one or more memories storing instructions or software executed by a processor or computer. The hardware components implemented by a processor or computer may execute instructions or software (such as an operating system (OS) and one or more software applications running on the OS) for performing the operations described in this application. Hardware components can also access, manipulate, process, create and store data in response to the execution of instructions or software. For simplicity, the singular term "processor" or "computer" can be used in the description of the examples described in this application, but in other examples, multiple processors or computers can be used, or processors or computers can include multiple processing elements, or multiple types of processing elements, or both. For example, a single hardware component, or two or more hardware components can be implemented by a single processor, or two or more processors, or a processor and a controller. One or more hardware components can be implemented by one or more processors, or a processor and a controller, and one or more other hardware components can be implemented by one or more other processors, or another processor and another controller. One or more processors, or a processor and a controller can implement a single hardware component, or two or more hardware components. Hardware components can have any one or more of different processing configurations, and examples of different processing configurations include: a single processor, an independent processor, a parallel processor, a single instruction single data (SISD) multiprocessing, a single instruction multiple data (SIMD) multiprocessing, multiple instructions single data (MISD) multiprocessing, and multiple instructions multiple data (MIMD) multiprocessing.
[0097] The method for performing the operations described in this application is performed by computing hardware (e.g., by one or more processors or computers), which is implemented as executing instructions or software as described above to perform the operations performed by the method described in this application. For example, a single operation, or two or more operations may be performed by a single processor, or two or more processors, or a processor and a controller. One or more operations may be performed by one or more processors, or a processor and a controller, and one or more other operations may be performed by one or more other processors, or another processor and another controller. One or more processors, or a processor and a controller may perform a single operation, or two or more operations.
[0098] Instructions or software for controlling a processor or computer to implement hardware components and perform methods as described above may be written as computer programs, code segments, instructions, or any combination thereof to individually or collectively instruct or configure a processor or computer to operate as a machine or special-purpose computer to perform operations performed by hardware components and methods as described above. In one example, instructions and / or software include machine code (such as machine code generated by a compiler) directly executed by a processor or computer. In another example, instructions or software include high-level code executed by a processor or computer using an interpreter. A person of ordinary skill in the art or a programmer may easily write instructions and / or software based on the block diagrams and flow charts shown in the accompanying drawings and the corresponding descriptions in the specification, and the block diagrams and flow charts shown in the accompanying drawings and the corresponding descriptions in the specification disclose algorithms for performing operations performed by hardware components and methods as described above.
[0099] The instructions or software for controlling a processor or computer to implement the hardware components and perform the methods described above, and any associated data, data files, and data structures are recorded, stored, or fixed in or on one or more non-transitory computer-readable storage media. Examples of non-transitory computer-readable storage media include: read-only memory (ROM), random access programmable read-only memory (PROM), electrically erasable programmable read-only memory (EEPROM), random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), flash memory, non-volatile memory, CD-ROM, CD-R, CD+R, CD-RW, CD+RW, DVD-ROM, DVD-R, DVD+R, DVD-RW, DVD+RW, DVD-RAM, BD-ROM, BD-R, BD-R At least one of LTH, BD-RE, Blu-ray or optical disk storage device, hard disk drive (HDD), solid state drive (SSD), flash memory, card memory (such as, multimedia card or micro card (for example, Secure Digital (SD) or Extreme Digital (XD))), magnetic tape, floppy disk, magneto-optical data storage device, optical data storage device, hard disk, solid state disk and any other device, any other device is configured to store instructions or software and any associated data, data files and data structures in a non-temporary manner and provide the instructions or software and any associated data, data files and data structures to a processor or computer so that the processor or computer can execute the instructions.
[0100] Although various example embodiments have been described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure as defined by the claims.
Claims
1. An image sensor, comprising: A substrate, the substrate comprising a plurality of pixels, each pixel comprising a first photoelectric sensor device and a second photoelectric sensor device for converting an optical signal into an electrical signal; a plurality of deep trench isolation (DTI) structures, each DTI structure being disposed within a corresponding pixel in the substrate to isolate a first photoelectric sensor device from a second photoelectric sensor device of the corresponding pixel; as well as a plurality of metal gates MG, wherein the plurality of MGs are correspondingly arranged above the plurality of DTI structures, In each pixel, a second photoelectric sensor device is accommodated in a first photoelectric sensor device.
2. The image sensor according to claim 1, wherein: In each pixel, a second photoelectric sensor device is arranged at the center of the pixel, a second photoelectric sensor device is accommodated in a DTI structure, and the DTI structure is accommodated in a first photoelectric sensor device, The center lines of a first photoelectric sensor device, a DTI structure, and a second photoelectric sensor device in each pixel coincide with each other.
3. The image sensor according to claim 1, wherein: Each DTI structure includes a first periphery and a second periphery that are concentric with each other and have the same shape. The shapes of the first periphery and the second periphery are elliptical. The major axis of the first periphery and the major axis of the second periphery are consistent in direction with the long side of the photosensitive area of the chip of the image sensor. The ratio of the major axis to the minor axis of the first periphery and the second periphery is the same as the ratio of the long side to the short side of the photosensitive area.
4. The image sensor according to claim 3, in, Each MG includes a third periphery and a fourth periphery that are concentric with each other and have the same shape, the shapes of the third periphery and the fourth periphery are the same as the shapes of the first periphery and the second periphery, and the centers of the third periphery and the fourth periphery coincide with the centers of the first periphery and the second periphery, The distance between the third periphery and the fourth periphery is the same as or different from the distance between the first periphery and the second periphery.
5. The image sensor according to claim 1, further comprising: A pinning layer disposed above the substrate; A high-K dielectric constant layer disposed above the pinning layer; a passivation layer disposed above the high-K dielectric constant layer; The plurality of DTI structures extend from an upper surface of the high-K dielectric constant layer or a lower surface of the passivation layer toward the substrate.
6. A method of forming a pixel, comprising: forming a first photosensor device disposed outside a deep trench isolation (DTI) structure of a pixel by using a first process parameter; as well as forming a second photosensor device disposed within the DTI structure of the pixel by using a second process parameter, wherein the one first photoelectric sensor device is formed before the one second photoelectric sensor device is formed or the one first photoelectric sensor device is formed after the one second photoelectric sensor device is formed, The DTI structure disposed in the pixel isolates the first photoelectric sensor device from the second photoelectric sensor device of the pixel. Wherein, in the pixel, the one second photoelectric sensor device is accommodated in the one first photoelectric sensor device.
7. The method according to claim 6, in, The first process parameters include a first N buried layer ion implantation concentration, a first implantation energy, a first thermal diffusion time, and a first temperature. The second process parameters include the second N buried layer ion implantation concentration, the second implantation energy, the second thermal diffusion time and the second temperature. The first N buried layer ion implantation concentration is less than the second N buried layer ion implantation concentration, the first implantation energy is less than the second implantation energy, the first thermal diffusion time is less than the second thermal diffusion time, and the first temperature is equal to the second temperature.
8. A pixel readout circuit comprising: a first transfer transistor connected to a first photosensor device disposed outside a deep trench isolation DTI structure of a pixel; as well as a second transfer transistor connected to a second photosensor device disposed within the DTI structure of the pixel, The DTI structure disposed in the pixel isolates the first photoelectric sensor device from the second photoelectric sensor device of the pixel. Wherein, in the pixel, the one second photoelectric sensor device is accommodated in the one first photoelectric sensor device.
9. A method for calibrating crosstalk, comprising: Obtaining a first image by reading a signal of a first photosensor device outside the deep trench isolation (DTI) structure of each pixel; Obtaining a second image by reading a signal of a second photosensor device within the DTI structure of each pixel; obtaining a third image by combining the first image with the second image; Use the second image to calibrate the third image, The DTI structure disposed in each pixel isolates a first photoelectric sensor device from a second photoelectric sensor device in each pixel. In each pixel, a second photoelectric sensor device is accommodated in a first photoelectric sensor device.
10. The method according to claim 9, wherein: The steps of calibrating the third image using the second image include: calculating a first average value of pixel values of a plurality of pixels of the second image; Calculating a ratio of a pixel value of each pixel of the second image to the first average value; calculating a second average value of pixel values of a plurality of pixels of the third image; Based on the ratio of the pixel value of each pixel of the second image to the first average value and the second average value, the pixel value of the corresponding pixel of the third image is calibrated so that the ratio of the pixel value of each pixel of the second image to the first average value is the same as the ratio of the calibrated pixel value of the corresponding pixel of the third image to the second average value.
11. A non-transitory computer-readable storage medium storing instructions, which, when executed by a processor, cause the processor to perform the method according to any one of claims 9 and 10.
Citation Information
Patent Citations
Image sensor with partially encapsulating attenuation layer
CN113130522A