An anti-interference radio frequency front end, spectrum detection system and electronic equipment

Abstract

The present invention discloses an anti-interference radio frequency front end, a spectrum detection system and an electronic device, and relates to the technical field of anti-interference radio frequency circuits. The anti-interference radio frequency front end includes: a switch module, and a filter amplifier module, a control signal module and an automatic gain control module connected to the switch module; the switch module includes a first switch unit, and a second switch unit and a ground resistor connected to the first switch unit in sequence; the first switch unit includes two first switches and a NOT gate arranged between the two first switches, and the two first switches share a set of control logic, the control signal module includes a digital electrical connection unit, and a non-reverse conversion unit connected to the digital electrical connection unit, and the non-reverse conversion unit is connected to the filter amplifier module; the non-reverse conversion unit is configured to serve as a buffer between the digital electrical connection unit and the filter amplifier module to improve the anti-interference performance of the anti-interference radio frequency front end.

Description

Technical Field

[0001] The present invention relates to the technical field of anti-interference radio frequency circuits, and in particular to an anti-interference radio frequency front end, a spectrum detection system and electronic equipment. Background Art

[0002] With the advantages of satellite navigation systems providing high-precision positioning, navigation and timing services in a global, all-weather and multi-field manner, it has become a high-tech industry full of sunrise atmosphere. The RF front end is an important part of the satellite navigation receiver, which filters and amplifies the weak satellite signals in the sky and outputs them to the back end for processing. A well-designed and fully functional RF front end determines the overall performance of the satellite signal receiver, and performs more prominently in terms of receiver sensitivity and noise coefficient.

[0003] Satellite signals transmitted in the form of radio waves have fatal flaws. Their characteristics determine their vulnerability and fragility. Therefore, satellite systems are easily interfered with by various means and cannot provide users with high-precision positioning, navigation and timing services. International research on satellite navigation anti-interference technology is becoming increasingly popular. Many different types of anti-interference technologies have been proposed and implemented by various experts to improve the anti-interference performance of satellite navigation systems. The RF front end of satellite navigation receivers currently widely available on the market mainly receives one or two satellite signals and cannot meet the anti-interference requirements. Therefore, the design and implementation of anti-interference RF front-end circuits based on multi-antenna arrays came into being. Summary of the invention

[0004] The purpose of the present invention is to provide a new anti-interference radio frequency front end, spectrum detection system and electronic equipment to solve the problem that the existing satellite navigation receiver radio frequency front end mainly receives one or two satellite signals and cannot meet the anti-interference requirements.

[0005] In a first aspect, the present invention provides an anti-interference radio frequency front end, the anti-interference radio frequency front end comprising: a switch module, and a filter amplifier module, a control signal module and an automatic gain control module connected to the switch module;

[0006] Wherein, the switch module includes a first switch unit, and a second switch unit and a ground resistor which are sequentially connected to the first switch unit;

[0007] The first switch unit includes two first switches and a NOT gate disposed between the two first switches, the two first switches share a set of control logic, and the control signals corresponding to the two first switches are a set of control signals in opposite states after being inverted by the NOT gate;

[0008] The control signal module includes a digital electrical connection unit, and a non-inverse conversion unit connected to the digital electrical connection unit, and the non-inverse conversion unit is connected to the filtering and amplifying module; the non-inverse conversion unit is configured to serve as a buffer between the digital electrical connection unit and the filtering and amplifying module to enhance the reliability and driving force of the control signal.

[0009] When the above technical solution is adopted, the anti-interference RF front end includes: a switch module, and a filter amplifier module, a control signal module and an automatic gain control module connected to the switch module; wherein the switch module includes a first switch unit, and a second switch unit and a ground resistor connected to the first switch unit in sequence; the first switch unit includes two first switches and a NOT gate arranged between the two first switches, the two first switches share a set of control logic, and the control signals corresponding to the two first switches are a set of control signals in opposite states after being inverted by the NOT gate, which can simplify the number of digital control signals and enhance the stability and reliability of the anti-interference RF front end; the control signal module includes a digital electrical connection unit, and a non-reverse conversion unit connected to the digital electrical connection unit, and the non-reverse conversion unit is connected to the filter amplifier module; the non-reverse conversion unit is configured to serve as a buffer between the digital electrical connection unit and the filter amplifier module, enhance the reliability and driving force of the control signal, and improve the anti-interference performance of the anti-interference RF front end.

[0010] In a possible implementation, the anti-interference RF front end also includes a power supply and overcurrent protection module connected to the filtering and amplifying module, and the power supply and overcurrent protection module are configured to monitor the low-noise amplifier operating current of the filtering and amplifying module, and when the low-noise amplifier operating current is greater than or equal to the preset low-noise amplifier operating current, control the power supply and overcurrent protection module to cut off the power supply of the filtering and amplifying module.

[0011] In a possible implementation, the power supply and overcurrent protection module includes a first PMOS tube and a second PMOS tube connected in parallel to the low noise amplifier power supply terminal of the filter amplifier module, and an NMOS tube connected in series with the first PMOS tube and the second PMOS tube;

[0012] When the overcurrent alarm signal applied to the NMOS tube is at a high level, the NMOS tube is in a conducting state, the first PMOS tube and the second PMOS tube are in a conducting state, and the monitored low noise amplifier power supply end is powered and in a normal working state;

[0013] When the working current of the low noise amplifier is greater than or equal to the working current of the preset low noise amplifier, the overcurrent alarm signal is controlled to be pulled down to zero level, the NMOS tube is in the cut-off state, the first PMOS tube and the second PMOS tube are in the cut-off state, and the power supply and the overcurrent protection module are controlled to cut off the power supply of the filtering and amplifying module, thereby completing the overcurrent protection of the filtering and amplifying module.

[0014] In a possible implementation, the control signal module also includes a decoding unit arranged between the non-inverting conversion unit and the filtering and amplifying module, and the decoding unit is configured to assist the non-inverting conversion unit in controlling the switching states of multiple low noise amplifiers in the filtering and amplifying module.

[0015] In a possible implementation, the first switch unit includes at least two first switches; the second switch unit includes at least four second switches;

[0016] The first switch is a 1:2 switch; the second switch is a 1:12 switch.

[0017] In a possible implementation, the non-inverting conversion unit includes a plurality of 8-bit non-inverting converters.

[0018] In a possible implementation, the decoding unit includes a plurality of 4:16 decoders.

[0019] In a possible implementation, the preset operating current of the low noise amplifier is 100 mA.

[0020] In a second aspect, the present invention further provides a spectrum detection system, comprising a baseband module, a radio frequency transceiver module, an anti-interference radio frequency front end and an antenna module, wherein the anti-interference radio frequency front end comprises any anti-interference radio frequency front end described in the first aspect.

[0021] The beneficial effects of the spectrum detection system provided in the second aspect are the same as the beneficial effects of the anti-interference RF front end described in the first aspect or any possible implementation of the first aspect, and are not elaborated here.

[0022] In a third aspect, the present invention further provides an electronic device, comprising: one or more processors; and one or more machine-readable media having instructions stored thereon, which, when executed by the one or more processors, enables the electronic device to execute the spectrum detection system described in any possible implementation method of the second aspect.

[0023] The beneficial effects of the electronic device provided in the third aspect are the same as the beneficial effects of the spectrum detection system described in the second aspect or any possible implementation manner of the second aspect, and are not elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0025] Figure 1 A schematic diagram of the structure of an anti-interference radio frequency front end provided in an embodiment of the present application is shown;

[0026] Figure 2 A partial structural diagram of an anti-interference radio frequency front end provided in an embodiment of the present application is shown;

[0027] Figure 3 A partial structural diagram of another anti-interference radio frequency front end provided in an embodiment of the present application is shown;

[0028] Figure 4 A partial structural diagram of another anti-interference radio frequency front end provided in an embodiment of the present application is shown;

[0029] Figure 5 A schematic diagram of the structure of another anti-interference radio frequency front end provided in an embodiment of the present application is shown;

[0030] Figure 6 A partial structural diagram of another anti-interference radio frequency front end provided in an embodiment of the present application is shown;

[0031] Figure 7 A control method for an anti-interference radio frequency front end provided in an embodiment of the present application is shown;

[0032] Figure 8 A schematic structural diagram of a low noise coefficient link design provided by an embodiment of the present application is shown;

[0033] Fig. 9 A schematic diagram of the hardware structure of an electronic device provided by an embodiment of the present invention;

[0034] Fig.10 A schematic diagram of the structure of a chip provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, words such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0036] It should be noted that, in the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0037] In the present invention, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b, c can be single or multiple.

[0038] Figure 1 A schematic diagram of the structure of an anti-interference radio frequency front end provided in an embodiment of the present application is shown. Figure 1 As shown, the anti-interference radio frequency front end includes:

[0039] A switch module 101, and a filter amplification module 102, a control signal module 103 and an automatic gain control module 104 connected to the switch module 101;

[0040] The switch module 101 includes a first switch unit 1011, and a second switch unit 1012 and a ground resistor which are sequentially connected to the first switch unit 1011;

[0041] The first switch unit 1011 includes two first switches and a NOT gate disposed between the two first switches, the two first switches share a set of control logic, and the control signals corresponding to the two first switches are a set of control signals in opposite states after being inverted by the NOT gate;

[0042] The control signal module 103 includes a digital electrical connection unit, and a non-inverse conversion unit connected to the digital electrical connection unit, and the non-inverse conversion unit is connected to the filtering and amplifying module 102; the non-inverse conversion unit is configured to serve as a buffer between the digital electrical connection unit and the filtering and amplifying module to enhance the reliability and driving force of the control signal.

[0043] In summary, the anti-interference RF front end provided in the embodiment of the present application includes: a switch module, and a filter amplification module, a control signal module and an automatic gain control module connected to the switch module; wherein the switch module includes a first switch unit, and a second switch unit and a ground resistor connected to the first switch unit in sequence; the first switch unit includes two first switches and a NOT gate arranged between the two first switches, the two first switches share a set of control logic, and the control signals corresponding to the two first switches are a set of control signals in opposite states after being inverted by the NOT gate, which can simplify the number of digital control signals and enhance the stability and reliability of the anti-interference RF front end; the control signal module includes a digital electrical connection unit, and a non-reverse conversion unit connected to the digital electrical connection unit, and the non-reverse conversion unit is connected to the filter amplification module; the non-reverse conversion unit is configured to serve as a buffer between the digital electrical connection unit and the filter amplification module, enhance the reliability and driving force of the control signal, and improve the anti-interference performance of the anti-interference RF front end.

[0044] Figure 2 A partial structural diagram of an anti-interference radio frequency front end provided in an embodiment of the present application is shown. Figure 2 As shown, the switch module 101 includes a first switch unit 1011 , and a second switch unit 1012 and a ground resistor 1013 which are sequentially connected to the first switch unit 1011 .

[0045] Optionally, the first switch unit includes at least two first switches; the second switch unit includes at least four second switches; the first switch is a 1:2 switch; and the second switch is a 1:12 switch.

[0046] In this application, see Figure 2 When the spectrum detection system is initially powered on, the control signals of the two 1:12 switches are all low by default. At this time, the RFC-RF1 path is selected, and RF2-12 is connected to the subsequent circuit. Therefore, a 51 ohm resistor is connected to the ground at the RF1 pin to protect the subsequent circuit.

[0047] The embodiment of the present application does not limit the specific resistance value of the ground resistor, and can be adjusted according to the actual application scenario.

[0048] Figure 3 FIG. 4 shows a partial structural diagram of another anti-interference radio frequency front end provided in an embodiment of the present application, such as Figure 3As shown, the control signal module 103 includes a digital electrical connection unit 1031, and a non-reverse conversion unit 1032 connected to the digital electrical connection unit 1031, and the non-reverse conversion unit 1032 is connected to the filtering and amplifying module 102; the non-reverse conversion unit 1032 is configured to serve as a buffer between the digital electrical connection unit 1031 and the filtering and amplifying module 102 to enhance the reliability and driving force of the control signal.

[0049] Among them, the baseband board FPGA can transmit digital control signals to the digital electrical connection unit 1031.

[0050] Optionally, the non-inverting conversion unit includes multiple 8-bit non-inverting converters, or may be a non-inverting converter of other bit numbers, which is not specifically limited in the embodiments of the present application.

[0051] Figure 4 FIG. 4 shows a partial structural diagram of another anti-interference radio frequency front end provided in an embodiment of the present application, such as Figure 4 As shown, the first switch unit includes two first switches A and a NOT gate B arranged between the two first switches A. The two first switches A share a set of control logic, and the control signals corresponding to the two first switches A are a set of control signals that are in opposite states after being inverted by the NOT gate B.

[0052] In the present application, two 1:2 first switches can share a set of control logic, with a total of two control signals, but the control signal J is the control signal K inverted through a NOT gate to ensure that only one path is enabled at the same time.

[0053] Optional, see Figure 4 The control signal module also includes a decoding unit arranged between the non-inverting conversion unit 1032 and the filtering and amplifying module 102, and the decoding unit is configured to assist the non-inverting conversion unit in controlling the switching states of multiple low noise amplifiers in the filtering and amplifying module.

[0054] Optionally, the decoding unit includes multiple 4:16 decoders.

[0055] In this application, see Figure 4 The signals at the five electrical connectors (inputting five control signals) can further control the switching states of the 20 low noise amplifiers in the filter amplifier module 102 through two 4:16 decoders C, wherein the enable signal of one decoder is obtained by inverting the enable signal of another decoder through a NAND gate, thereby reducing the number of control signals at the digital electrical connector.

[0056] Figure 5 FIG. 4 shows a schematic diagram of the structure of another anti-interference radio frequency front end provided in an embodiment of the present application. Figure 5 As shown, the anti-interference RF front end also includes a power supply and overcurrent protection module 105 connected to the filtering and amplifying module 102 .

[0057] The power supply and overcurrent protection module 105 is configured to monitor the low noise amplifier operating current of the filtering and amplifying module, and when the low noise amplifier operating current is greater than or equal to the preset low noise amplifier operating current, control the power supply and overcurrent protection module to cut off the power supply of the filtering and amplifying module.

[0058] Optionally, the preset operating current of the low noise amplifier is 100 mA.

[0059] Optional, Figure 6 A partial structural diagram of another anti-interference radio frequency front end provided in an embodiment of the present application is shown. Figure 6 As shown, the power supply and overcurrent protection module 105 includes a first P-type metal oxide semiconductor field effect transistor (Positive Channel Metal Oxide Semiconductor, PMOS) V2 and a second PMOS tube V3 connected in parallel to the low noise amplifier power supply terminal of the filter amplifier module 102, and an N-type metal oxide semiconductor field effect transistor (N-Metal-Oxide-Semiconductor, NMOS) V1 connected in series with the first PMOS tube V2 and the second PMOS tube V3;

[0060] When the overcurrent alarm signal applied to the NMOS tube is at a high level, the NMOS tube is in a conducting state, the first PMOS tube and the second PMOS tube are in a conducting state, and the monitored low noise amplifier power supply end is powered and in a normal working state;

[0061] When the working current of the low noise amplifier is greater than or equal to the working current of the preset low noise amplifier, the overcurrent alarm signal is controlled to be pulled down to zero level, the NMOS tube is in the cut-off state, the first PMOS tube and the second PMOS tube are in the cut-off state, and the power supply and the overcurrent protection module are controlled to cut off the power supply of the filtering and amplifying module, thereby completing the overcurrent protection of the filtering and amplifying module.

[0062] In this application, the power monitoring chip is connected to 20 low-noise amplifiers in the monitored filter amplifier module through three MOS tubes, where V1 is NMOS, V2 and V3 are PMOS of the same model, and V2 and V3 are connected in parallel, which can ensure that the module can still work normally when one tube fails.

[0063] Under normal circumstances, the overcurrent alarm signal is high level, about 3.3 volts, V1 is turned on, and then V2 and V3 are turned on, and the monitored low noise amplifier can be powered and work normally. Once the working current of the low noise amplifier reaches 100 milliamperes (mA), the overcurrent alarm signal is pulled down to zero level, V1 is turned off, and then V2 and V3 are turned off, the power supply of the low noise amplifier is cut off, and the overcurrent protection is played.

[0064] Figure 7 A control method for an anti-interference radio frequency front end provided in an embodiment of the present application is shown, such as Figure 7 As shown, when the spectrum detection device works in a certain frequency band and the working current of the low noise amplifier monitored by the power detection chip is greater than or equal to 100 mA, the power detection signal pulls down the overcurrent alarm signal and informs the baseband board field programmable gate array (Field-Programmable Gate Array, FPGA), so that the spectrum monitoring device can be further troubleshooted. The MOS tubes are all cut off, and the power supply of the low noise amplifier of the filter amplifier module is cut off. When the working current of the low noise amplifier monitored by the power detection chip is less than 100 mA, the overcurrent alarm signal of the power monitoring chip maintains a high level, the MOS tubes are all turned on, and the power supply of the low noise amplifier of the filter amplifier module is normal.

[0065] Figure 8 FIG. 4 shows a schematic diagram of a structure of a low noise coefficient link design provided by an embodiment of the present application. Figure 8 As shown in the figure, considering the worst case, the noise coefficients of the filter and the low noise amplifier are 1.8 and 1.1dB respectively, and the noise coefficient of the entire RF front-end link is around 4.15dB, which ensures that the receiver has high sensitivity performance and achieves a low noise coefficient level while ensuring the broadband anti-interference characteristics of the RF front-end.

[0066] In summary, the anti-interference RF front end provided in the embodiment of the present application includes: a switch module, and a filter amplification module, a control signal module and an automatic gain control module connected to the switch module; wherein the switch module includes a first switch unit, and a second switch unit and a ground resistor connected to the first switch unit in sequence; the first switch unit includes two first switches and a NOT gate arranged between the two first switches, the two first switches share a set of control logic, and the control signals corresponding to the two first switches are a set of control signals in opposite states after being inverted by the NOT gate, which can simplify the number of digital control signals and enhance the stability and reliability of the anti-interference RF front end; the control signal module includes a digital electrical connection unit, and a non-reverse conversion unit connected to the digital electrical connection unit, and the non-reverse conversion unit is connected to the filter amplification module; the non-reverse conversion unit is configured to serve as a buffer between the digital electrical connection unit and the filter amplification module, enhance the reliability and driving force of the control signal, and improve the anti-interference performance of the anti-interference RF front end.

[0067] The present application provides a spectrum detection system, including a baseband module, a radio frequency transceiver module, an anti-interference radio frequency front end and an antenna module, wherein the anti-interference radio frequency front end includes Figures 1 to 8 Any anti-interference radio frequency front end described above.

[0068] The spectrum detection system provided by the embodiment of the present application, the anti-interference RF front end includes: a switch module, and a filter amplifier module, a control signal module and an automatic gain control module connected to the switch module; wherein the switch module includes a first switch unit, and a second switch unit and a ground resistor connected to the first switch unit in sequence; the first switch unit includes two first switches and a NOT gate arranged between the two first switches, the two first switches share a set of control logic, and the control signals corresponding to the two first switches are a set of control signals in opposite states after being inverted by the NOT gate, which can simplify the number of digital control signals and enhance the stability and reliability of the anti-interference RF front end; the control signal module includes a digital electrical connection unit, and a non-inverting conversion unit connected to the digital electrical connection unit, and the non-inverting conversion unit is connected to the filter amplifier module; the non-inverting conversion unit is configured to serve as a buffer between the digital electrical connection unit and the filter amplifier module, enhance the reliability and driving force of the control signal, and improve the anti-interference performance of the anti-interference RF front end.

[0069] The spectrum detection system provided by the present invention can realize the following Figures 1 to 8 To avoid repetition, any of the anti-interference RF front ends shown will not be described again here.

[0070] The electronic device in the embodiment of the present invention may be a device, or a component, integrated circuit, or chip in a terminal. The device may be a mobile electronic device or a non-mobile electronic device. For example, the mobile electronic device may be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. The non-mobile electronic device may be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), a teller machine, or a self-service machine, etc., which is not specifically limited in the embodiment of the present invention.

[0071] The electronic device in the embodiment of the present invention may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present invention.

[0072] Fig. 9 FIG. 1 is a schematic diagram showing the hardware structure of an electronic device provided by an embodiment of the present invention. Fig. 9 As shown, the electronic device 200 includes a processor 210 .

[0073] like Fig. 9 As shown, the processor 210 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the present invention.

[0074] like Fig. 9 As shown, the electronic device 200 may further include a communication line 240. The communication line 240 may include a path for transmitting information between the above components.

[0075] Optional, such as Fig. 9 As shown, the electronic device may further include a communication interface 220. There may be one or more communication interfaces 220. The communication interface 220 may use any transceiver or other device for communicating with other devices or communication networks.

[0076] Optional, such as Fig. 9As shown, the electronic device may further include a memory 230. The memory 230 is used to store computer-executable instructions for executing the solution of the present invention, and is controlled to execute by a processor. The processor is used to execute the computer-executable instructions stored in the memory, thereby implementing the method provided by the embodiment of the present invention.

[0077] like Fig. 9 As shown, the memory 230 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 230 may exist independently and be connected to the processor 210 via a communication line 240. The memory 230 may also be integrated with the processor 210.

[0078] Optionally, the computer-executable instructions in the embodiment of the present invention may also be referred to as application program codes, which is not specifically limited in the embodiment of the present invention.

[0079] In a specific implementation, as an example, Fig. 9 As shown, the processor 210 may include one or more CPUs, such as Fig. 9 CPU0 and CPU1 in.

[0080] In a specific implementation, as an example, Fig. 9 As shown, the terminal device may include multiple processors, such as Fig. 9 The processor 210 in the embodiment of the present invention. Each of these processors can be a single-core processor or a multi-core processor.

[0081] Fig.10 Schematic diagram of the structure of the chip provided by the embodiment of the present invention. Fig.10 As shown, the chip 300 includes one or more (including two) processors 210 .

[0082] Optional, such as Fig.10As shown, the chip also includes a communication interface 220 and a memory 230. The memory 230 may include a read-only memory and a random access memory, and provide operation instructions and data to the processor. A portion of the memory may also include a non-volatile random access memory (NVRAM).

[0083] In some embodiments, Fig.10 As shown, the memory 230 stores the following elements, execution modules or data structures, or their subsets, or their extended sets.

[0084] In the embodiment of the present invention, Fig.10 As shown, the corresponding operation is performed by calling the operation instruction stored in the memory (the operation instruction may be stored in the operating system).

[0085] like Fig.10 As shown, the processor 210 controls the processing operations of any one of the terminal devices, and the processor 210 may also be referred to as a central processing unit (CPU).

[0086] like Fig.10 As shown, the memory 230 may include a read-only memory and a random access memory, and provide instructions and data to the processor. A portion of the memory 230 may also include an NVRAM. For example, in an application, the memory, the communication interface, and the memory are coupled together through a bus system, wherein the bus system may include a power bus, a control bus, and a status signal bus in addition to a data bus. However, for the sake of clarity, in Fig.10 Various buses are labeled as bus system 340 .

[0087] like Fig.10As shown, the method disclosed in the above embodiment of the present invention can be applied to a processor or implemented by a processor. The processor may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in the processor or an instruction in the form of software. The above processor may be a general-purpose processor, a digital signal processor (digital signal processing, DSP), an ASIC, a field-programmable gate array (field-programmable gate array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present invention can be implemented or executed. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present invention can be directly embodied as being executed by a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software module may be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0088] On the one hand, a computer-readable storage medium is provided, in which instructions are stored. When the instructions are executed, the functions performed by the terminal device in the above embodiment are implemented.

[0089] On the one hand, a chip is provided, which is applied to a terminal device, and the chip includes at least one processor and a communication interface, the communication interface and at least one processor are coupled, and the processor is used to run instructions to implement the functions performed by the anti-interference RF front end in the above embodiment.

[0090] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented by software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instruction is loaded and executed on a computer, the process or function described in the embodiment of the present invention is executed in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal, a user device or other programmable device. The computer program or instruction can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program or instruction can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired or wireless means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, a hard disk, or a tape; it can also be an optical medium, such as a digital video disc (DVD); it can also be a semiconductor medium, such as a solid state drive (SSD).

[0091] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0092] Although the present invention has been described in conjunction with specific features and embodiments thereof, it is apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present invention. Accordingly, this specification and the accompanying drawings are merely exemplary illustrations of the present invention as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present invention. Obviously, those skilled in the art may make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, the present invention is intended to include such modifications and variations if they fall within the scope of the claims of the present invention and their equivalents.

Claims

1. An anti-interference radio frequency front end, characterized in that: The anti-interference radio frequency front end includes: a switch module, and a filter amplifier module, a control signal module and an automatic gain control module connected to the switch module; Wherein, the switch module includes a first switch unit, and a second switch unit and a ground resistor which are sequentially connected to the first switch unit; The first switch unit includes two first switches and a NOT gate disposed between the two first switches, the two first switches share a set of control logic, and the control signals corresponding to the two first switches are a set of control signals in opposite states after being inverted by the NOT gate; The control signal module includes a digital electrical connection unit, and a non-inverse conversion unit connected to the digital electrical connection unit, and the non-inverse conversion unit is connected to the filtering and amplifying module; the non-inverse conversion unit is configured to serve as a buffer between the digital electrical connection unit and the filtering and amplifying module to enhance the reliability and driving force of the control signal.

2. The anti-interference radio frequency front end according to claim 1, characterized in that: The anti-interference RF front end also includes a power supply and an overcurrent protection module connected to the filtering and amplifying module. The power supply and the overcurrent protection module are configured to monitor the low-noise amplifier operating current of the filtering and amplifying module, and when the low-noise amplifier operating current is greater than or equal to the preset low-noise amplifier operating current, control the power supply and the overcurrent protection module to cut off the power supply of the filtering and amplifying module.

3. The anti-interference radio frequency front end according to claim 2, characterized in that: The power supply and overcurrent protection module includes a first PMOS tube and a second PMOS tube connected in parallel to the low noise amplifier power supply terminal of the filter amplifier module, and an NMOS tube connected in series with the first PMOS tube and the second PMOS tube; When the overcurrent alarm signal applied to the NMOS tube is at a high level, the NMOS tube is in a conducting state, the first PMOS tube and the second PMOS tube are in a conducting state, and the monitored low noise amplifier power supply end is powered and in a normal working state; When the working current of the low noise amplifier is greater than or equal to the working current of the preset low noise amplifier, the overcurrent alarm signal is controlled to be pulled down to zero level, the NMOS tube is in the cut-off state, the first PMOS tube and the second PMOS tube are in the cut-off state, and the power supply and the overcurrent protection module are controlled to cut off the power supply of the filter amplification module, thereby completing the overcurrent protection of the filter amplification module.

4. The anti-interference radio frequency front end according to claim 1, characterized in that: The control signal module further includes a decoding unit disposed between the non-inverting conversion unit and the filtering and amplifying module, and the decoding unit is configured to assist the non-inverting conversion unit in controlling the switching states of multiple low noise amplifiers in the filtering and amplifying module.

5. The anti-interference radio frequency front end according to claim 1, characterized in that: The first switch unit includes at least two first switches; the second switch unit includes at least four second switches; The first switch is a 1:2 switch; the second switch is a 1:12 switch.

6. The anti-interference radio frequency front end according to any one of claims 1 to 4, characterized in that: The non-inverting conversion unit includes a plurality of 8-bit non-inverting converters.

7. The anti-interference radio frequency front end according to claim 4, characterized in that: The decoding unit includes a plurality of 4:16 decoders.

8. The anti-interference radio frequency front end according to claim 2, characterized in that: The preset operating current of the low noise amplifier is 100 mA.

9. A spectrum detection system, comprising a baseband module, a radio frequency transceiver module, an anti-interference radio frequency front end and an antenna module, characterized in that: The anti-interference radio frequency front end comprises the anti-interference radio frequency front end described in any one of claims 1-8.

10. An electronic device, characterized in that: include: one or more processors; and one or more machine-readable media having instructions stored thereon, which, when executed by the one or more processors, cause the electronic device to perform the spectrum detection system of claim 9.

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